Method and apparatus for implementing sign-off on the basis of 3d-IC, and computer program

By integrating inspection items at various stages of the digital backend process and inspecting them in stages, the problem that traditional sign-in process cannot comprehensively check 3D-IC risks is solved, and problems are discovered early and the risk of flaking is reduced, and the productivity is improved.

WO2025050394A9PCT designated stage expired Publication Date: 2025-04-24SUNLUNE (SINGAPORE) PTE LTD
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Patent Information

Application Number
PCT/CN2023/117791
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-09-08
Publication Date
2025-04-24

AI Technical Summary

Technical Problem

The traditional 2D chip design and approval process and tools cannot comprehensively check all the risks involved in 3D-ICs, resulting in problems such as decreasing yield, sub-functional standards, or even large-scale waste films during semiconductor production.

Method used

At each stage of the digital backend process, the inspection items are integrated and independent inspection items are carried out in stages and in segments, including checking whether there are specific risks such as winding into through silicon holes in the 3D-IC design, and specify the items that need to be inspected through configuration information and execute them at each stage.

Benefits of technology

By early detection and repairing problems in the design, the risk of not being able to sign-in at the last moment is reduced, the yield is improved, and the problem of failure to meet functional standards and large-scale waste films is avoided.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application discloses a method and apparatus for implementing sign-off on the basis of a 3D-IC, and a computer program. The method comprises: in various stages of place and route in a digital back-end process, respectively inspecting more than one inspection item meeting inspection conditions, and when all inspections in the previous stage have been passed, entering the next stage, wherein the inspection items include checking whether there is wire winding into a through silicon via in a 3D-IC design; and when all the inspections in the various stages of place and route have been passed, in a sign-off stage of the digital back-end process, inspecting more than one inspected item, and when all the inspections have been passed, obtaining a manufacturable design.
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Description

A method, device and computer program for implementing signoff based on 3D-IC Technical Field

[0001] The present application relates to, but is not limited to, semiconductor technology, and more particularly to a method, apparatus, and computer program for implementing signoff based on a three-dimensional integrated circuit (3D-IC). Background Art

[0002] The rapid development of fields such as artificial intelligence, big data, cloud computing, and heterogeneous computing has posed new challenges to traditional chip design and packaging methods. As demand grows, so too does the need for lower power consumption, faster data rates, and higher integration density. In this context, 3D-ICs represent a significant turning point in electronic design, transitioning from chip design to system design.

[0003] The advantages of 3D-IC include: higher integration density, that is, by stacking multiple chips, more functional modules can be implemented in a limited space, improving the integration of the chip; shorter signal transmission distance, that is, in 3D-IC, the distance between each functional module is closer, and the signal transmission path is shorter, which can reduce signal transmission delay and power consumption; more flexible design, that is, 3D-IC can stack chips with different functions together according to different application requirements, realize heterogeneous integration, and provide more flexible design options.

[0004] The development of 3D-IC technology has also brought new challenges to its digital back-end implementation. Traditional 2D chip design signoff processes and tools are unable to fully detect all the risks involved in 3D-IC. This can lead to problems such as reduced yield, substandard functionality, and even large-scale wafer scrap during semiconductor production.

[0005] SUMMARY OF THE INVENTION

[0006] The present application provides a method, apparatus, and computer program for implementing signoff based on 3D-IC.

[0007] The present invention provides a method for implementing signoff based on a three-dimensional integrated circuit (3D-IC), including:

[0008] At each stage of the placement and routing (PR) process in the digital backend, one or more inspection items that meet the inspection criteria are inspected. After all inspections in the previous stage are passed, the next stage is entered. Among these inspection items, the 25th inspection item is used to check whether there are wire routings entering the through-silicon via (TSV) in the 3D-IC design.

[0009] After all the checks in the PR are passed, in the signoff stage of the digital backend process, one or more checked items are checked, and if all of them pass, a manufacturable design is obtained.

[0010] In an exemplary embodiment, before inspecting one or more inspection items that meet the inspection conditions, the method further includes:

[0011] Configuration information of the inspection items that need to be inspected and that meet the inspection conditions is configured.

[0012] In an exemplary embodiment, at the end of each stage of placement and routing in the digital backend process, the inspection items that meet the inspection conditions specified in the configuration information are executed according to the configuration information.

[0013] In an exemplary embodiment, the step of inspecting one or more inspection items that meet the inspection conditions includes:

[0014] For an inspection item that meets the inspection conditions in a stage of the PR, if the inspection fails, the inspection result is output as failure and an inspection item result report is given, and the inspection of the inspection item is returned; if the inspection passes, the inspection result is output as pass and an inspection item result report is given, and the inspection of the next inspection item in this stage is carried out, until all the inspection items in this stage are passed and enter the next stage of the PR.

[0015] In an exemplary embodiment, the process of placing and routing in the digital backend flow, before inspecting one or more inspection items that meet the inspection conditions, further includes:

[0016] Check the startup inspection item used to check whether the execution condition is met. If so, continue to check one or more inspection items that meet the inspection condition; otherwise, wait until the execution condition is met and continue to check one or more inspection items that meet the inspection condition.

[0017] In an exemplary embodiment, the execution condition includes: the design at runtime does not have an incomplete timing library, the instantiation unit is not placed, or the design does not have a complete routing problem.

[0018] In an exemplary embodiment, during the signoff phase of the digital backend process, the check on one or more previously checked items includes:

[0019] At the end of the Signoff phase, one or more checked items are checked according to the configuration information, and the producible design is obtained after all the checks are passed.

[0020] In an exemplary embodiment, the inspection items further include one or any combination of the following:

[0021] A thirteenth inspection item for checking whether the first-level unit connected to the high-bandwidth memory HBM and the module port is a level conversion unit;

[0022] a fifth check item for checking whether the distance between a port and a first-stage inserted buffer of the port exceeds a first distance threshold;

[0023] a tenth checking item for checking whether the Manhattan distance between the static random access memory SRAM and the nearest TSV for powering the SRAM exceeds a second distance threshold;

[0024] an eleventh checking item for checking whether the Manhattan distance between the TSV and its corresponding nearest current discharge unit exceeds a third distance threshold;

[0025] a twelfth inspection item for inspecting whether the length of the first-level interconnection line connecting the HBM and the module port exceeds a fourth distance threshold;

[0026] The twentieth check item is used to check whether all instantiated cells on the clock tree have consistent threshold voltages;

[0027] The twenty-first check item is used to check whether all instantiated units on the clock tree have the same channel length;

[0028] The 22nd inspection item is used to check whether the read project summary file is consistent with the input data used in the current design;

[0029] The twenty-third inspection item is used to check whether the number of TSVs and the number of current bleeding units in the current design are consistent with the number of TSVs and the number of current bleeding units in the input data when the currently used input data is the latest.

[0030] In an exemplary embodiment, the inspection items further include one or any combination of the following:

[0031] A first check item for checking whether there is a problem of repeated instantiation of a module;

[0032] a second check item for checking whether there is an interconnect line exceeding a fan-out threshold;

[0033] a third check item for checking whether there is an interconnection line exceeding an interconnection line length threshold;

[0034] A fourth check item for checking whether the power ground pin of the SRAM is connected to the power ground network;

[0035] A sixth inspection item for checking whether there is a winding wire within a preset range of the module boundary;

[0036] The seventh inspection item is used to check whether there is a filling gap;

[0037] The eighth inspection item is used to check whether there is a problem of floating input;

[0038] The ninth inspection item is used to check whether the clamp network is connected to the clamp unit;

[0039] A fourteenth check item for checking whether the input data of the current design is missing from the timing library or the physical library;

[0040] The fifteenth inspection item is used to check whether the input netlist circuit of the current design is missing tri-state gates or multi-input netlists;

[0041] A sixteenth check item for checking whether there are overlapping instantiation units;

[0042] The seventeenth check item is used to check whether the pre-wired H-tree network overlaps with the SRAM of the current module in the number of winding layers 1 to 4;

[0043] The eighteenth inspection item is used to check whether the signal pin pad unit and the network connected to the input and output are in a non-touch state;

[0044] A nineteenth inspection item for checking whether the distance between the pin pad unit and the digital circuit core area in the x-axis and y-axis directions exceeds the fifth distance threshold;

[0045] The twenty-fourth inspection item is used to check whether there are any error marks in the logs during the operation of the design at each of the said stages.

[0046] In an exemplary embodiment, at each stage of the placement and routing (PR) process in the digital backend flow, one or more inspection items that meet the inspection conditions are inspected, including:

[0047] At the end of the PR initialization phase, the startup inspection item, the fourteenth inspection item, the fifteenth inspection item, and the twenty-fourth inspection item are executed according to the configuration information;

[0048] At the end of the PR layout planning stage, the startup check item, the tenth check item, the eleventh check item, the sixteenth check item, the seventeenth check item, the twenty-second check item, the twenty-third check item, and the twenty-fourth check item are performed according to the configuration information;

[0049] At the end of the automatic layout phase of the PR, the startup check item, the fifth check item, the eighth check item, the ninth check item, the eighteenth check item, the nineteenth check item, and the twenty-fourth check item are executed according to the configuration information;

[0050] At the end of the clock tree synthesis stage of the PR, the startup check item, the eighteenth check item, the nineteenth check item, and the twenty-fourth check item are executed according to the configuration information;

[0051] At the end of the clock tree post-synthesis optimization phase of the protected PR, the startup check item, the eighteenth check item, the nineteenth check item, the twentieth check item, the twenty-first check item, and the twenty-fourth check item are executed according to the configuration information;

[0052] At the end of the PR wiring phase, the startup check item, the fourth check item, the sixth check item, the twelfth check item, the thirteenth check item, the twenty-fourth check item, and the twenty-fifth check item are performed according to the configuration information;

[0053] At the end of the post-routing optimization stage of the PR, the startup check item, the second check item, the third check item, the fourth check item, the sixth check item, the eighth check item, the ninth check item, the tenth check item, the eleventh check item, the twelfth check item, the thirteenth check item, the eighteenth check item, the nineteenth check item, the twentieth check item, the twenty-first check item, the twenty-third check item, the twenty-fourth check item and the twenty-fifth check item are executed according to the configuration information.

[0054] In an exemplary embodiment, during the signoff phase of the digital backend process, the check on one or more previously checked items includes:

[0055] At the end of the Signoff phase, 26 checks, from the startup check item to the twenty-fifth check item, are performed according to the configuration information.

[0056] An embodiment of the present application further provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute any of the above-mentioned methods for implementing signoff based on 3D-IC.

[0057] The present application further provides a computer program for causing a carrier of the computer program to perform the following steps:

[0058] At each stage of the layout and routing (PR) process in the digital backend flow, one or more inspection items that meet the inspection conditions are inspected respectively, and the next stage is entered after all the inspections in the previous stage are passed. Among them, the inspection items include checking whether there are routing wires entering silicon vias in the 3D-IC design. After all the inspections in each stage of the PR are passed, at the signoff stage in the digital backend flow, one or more inspection items that have been checked are inspected and passed to obtain a manufacturable design.

[0059] The embodiment of the present application further provides a device for implementing signoff based on 3D-IC, comprising: a placement and routing (PR) unit and a signoff (Signoff) unit; wherein,

[0060] The PR unit is configured to check one or more inspection items that meet the inspection conditions at each stage of layout and routing in the digital back-end process. After all the inspections in the previous stage are passed, it enters the next stage. Among the inspection items, one is to check whether there are routing wires entering silicon vias in 3D-IC designs.

[0061] The Signoff unit is set to obtain a manufacturable design after all the inspections in the PR stage are passed and one or more inspection items are inspected and passed in the Signoff stage of the digital backend process.

[0062] In an exemplary embodiment, the method further includes: a configuration unit configured to configure configuration information of the inspection items that need to be inspected and meet the inspection conditions.

[0063] In an exemplary embodiment, at each stage of placement and routing in the digital backend process, the PR unit checks one or more inspection items that meet the inspection conditions, and is set as follows:

[0064] At the end of each stage of layout and routing in the digital back-end process, the inspection items meeting the inspection conditions specified in the configuration information are executed according to the configuration information.

[0065] In an exemplary embodiment, the PR unit checks one or more inspection items that meet the inspection conditions respectively, and is set as follows:

[0066] For an inspection item that meets the inspection conditions in a stage of the PR, if the inspection fails, the inspection result is output as failure and an inspection item result report is given, and the inspection of the inspection item is returned; if the inspection passes, the inspection result is output as pass and an inspection item result report is given, and the inspection of the next inspection item in this stage is carried out, until all the inspection items in this stage are passed and the next stage of the PR is entered.

[0067] In an exemplary embodiment, the sign-off unit is configured to: at the end of the sign-off phase, perform checks on one or more checked items according to the configuration information, and obtain the manufacturable design after all checks pass.

[0068] In an exemplary embodiment, the PR unit is further configured to:

[0069] Check whether the execution conditions are met. If the execution conditions are met, continue to check the one or more inspection items that meet the inspection conditions; if the execution conditions are not met, wait until the execution conditions are met before continuing to check the one or more inspection items that meet the inspection conditions.

[0070] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present invention. The purposes and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings.

[0071] Summary of the Figures

[0072] The accompanying drawings are used to provide a further understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0073] FIG1 is a flow chart of a method for implementing signoff based on 3D-IC according to an embodiment of the present application;

[0074] FIG2 is a schematic diagram of a process for implementing signoff based on 3D-IC according to an embodiment of the present application;

[0075] FIG3 is a schematic diagram of the main interface of a GUI in an embodiment of the present application;

[0076] FIG4 is a schematic diagram of a first embodiment of a GUI interface according to an embodiment of the present application;

[0077] FIG5( a ) is a schematic diagram of a second embodiment of a GUI interface according to an embodiment of the present application;

[0078] FIG5( b ) is another schematic diagram of a second embodiment of the GUI interface in an embodiment of the present application;

[0079] FIG6 is a schematic diagram of a third embodiment of a GUI interface in an embodiment of the present application;

[0080] FIG7 is a schematic diagram of a fourth embodiment of a GUI interface in an embodiment of the present application;

[0081] FIG8 is a schematic diagram of a fifth embodiment of a GUI interface in an embodiment of the present application;

[0082] FIG9 is a schematic diagram of a sixth embodiment of a GUI interface in an embodiment of the present application;

[0083] FIG10 is a schematic diagram of a seventh embodiment of a GUI interface in an embodiment of the present application;

[0084] FIG11 is a schematic diagram of an eighth embodiment of a GUI interface in an embodiment of the present application;

[0085] FIG12( a ) is a schematic diagram of a ninth embodiment of a GUI interface according to an embodiment of the present application;

[0086] FIG12( b ) is a schematic diagram of a tenth embodiment of a GUI interface in an embodiment of the present application;

[0087] FIG12( c ) is a schematic diagram of an eleventh embodiment of a GUI interface according to an embodiment of the present application;

[0088] FIG13 is a schematic diagram of a twelfth embodiment of a GUI interface according to an embodiment of the present application;

[0089] FIG14 is a schematic diagram of a thirteenth embodiment of a GUI interface according to an embodiment of the present application;

[0090] FIG. 15 is a schematic diagram of the composition structure of an apparatus for implementing signoff based on 3D-IC in an embodiment of the present application.

[0091] Details

[0092] To make the purpose, technical solutions and advantages of this application more clear, the embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be noted that, unless there is a conflict, the embodiments and features in the embodiments of this application can be combined with each other in any way.

[0093] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings provide embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0094] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0095] Signoff is the final stage in the chip design process. It involves comprehensive design verification and validation to ensure it meets expected performance, power consumption, reliability, and manufacturing requirements. The goal of the signoff phase is to thoroughly verify the design to ensure its correctness and feasibility, and to ensure compliance with specifications and requirements. During the signoff phase, the design team performs a series of verification and analysis, including physical verification, timing verification, power verification, and reliability verification.

[0096] Signoff checking rules are a series of verification rules executed in the final stage of the chip design process to ensure the correctness and feasibility of the design in terms of physical implementation and manufacturing. These rules are intended to identify and fix potential problems in the design to ensure that the design meets the expected performance, power consumption, reliability, and manufacturing requirements. Traditional signoff tools can comprehensively check all risks required for tapeout, but 3D-ICs present many new challenges that cannot be checked by traditional 2D chip signoff processes and tools. As a result, the submitted Graphic Design System (GDS) design drawings are at greater risk of yield degradation, substandard functionality, and even large-scale scrap during the production process of semiconductor factories. This will seriously affect chip costs and may even lead to missed opportunities for the chip to enter the market.

[0097] To detect all risks associated with 3D-ICs and avoid issues such as yield degradation, substandard functionality, and even large-scale wafer scrap during semiconductor production, the present invention provides a 3D-IC signoff method that integrates inspection items into each stage of the digital backend process. In the early stages of the digital backend process, independent inspections are performed by stage and item, allowing modifications to be made during the inspection process. This reduces the risk of discovering signoff failures at the last minute. As shown in Figure 1, this method may include:

[0098] Step 100: In each stage of layout and routing in the digital back-end process, one or more inspection items that meet the inspection conditions are inspected respectively, and the next stage is entered after all the inspections in the previous stage are passed; among them, the inspection items include checking whether there are routing wires entering silicon vias in the 3D-IC design.

[0099] In one exemplary embodiment, the inspection condition can be that the inspection item can be checked for passing or failing the first time. In other words, as long as the inspection item can be checked, it will not be postponed to a later stage. The purpose of setting the inspection condition is to check the inspection items as soon as possible, so as to expose problems earlier and reduce the risk of tape-out.

[0100] In an exemplary embodiment, before step 100, the following steps may also be included:

[0101] Configuration information for inspection items that meet the inspection conditions that need to be checked. In other words, in the embodiment of the present application, it is possible to determine which inspection items to check (or skip which inspection items to not check) at each stage of the digital backend process according to user needs. In this way, only the inspection items that the user believes must be checked and meet the inspection conditions can be checked, thereby saving runtime and improving the usability of the inspection program.

[0102] In an exemplary embodiment, in step 100, at each stage of the placement and routing in the digital backend process, checking one or more inspection items that meet the inspection conditions may include:

[0103] At the end of each stage of Place and Route (PR) in the digital backend process, the inspection items that meet the inspection conditions specified in the configuration information are executed according to the configuration information.

[0104] In an exemplary embodiment, the step 100 of inspecting one or more inspection items that meet the inspection conditions may include:

[0105] For an inspection item that meets the inspection conditions in a stage of layout and routing, if the inspection fails, the inspection result is output as failed and an inspection item result report is given, and the inspection of the inspection item is returned; if the inspection passes, the inspection result is output as passed and an inspection item result report is given, and the inspection of the next inspection item in this stage is carried out, until all the inspection items in this stage pass and enter the next stage of layout and routing.

[0106] In 3D-IC design, ensuring that the wiring does not enter the through-silicon via (TSV) is an important task to avoid the risk of short circuits and electrostatic discharge (ESD) to ensure the reliability and performance of the circuit. The situation where the wiring enters the TSV may cause the following problems: Electromagnetic interference: If the wiring enters the TSV, it may cause crosstalk or mutual interference between signals, affecting the normal operation of the circuit. Electrical short circuit: If the wiring is short-circuited with the TSV, it may cause a short circuit and failure of the circuit. Signal integrity issues: The wiring entering the TSV may affect the integrity of the signal transmission, introducing additional delays and signal distortion. In an exemplary instance, the twenty-fifth inspection item (identified as inspection item 25 in the embodiment of the present application) included in the inspection items of the present application for checking whether there is a wiring entering the TSV in the 3D-IC design includes:

[0107] Checks whether the current design has any routing entering TSV. If it is detected that the routing enters TSV, the inspection result is failed and a check item result report is given; if it is detected that the routing does not enter TSV, the inspection result is passed and a check item result report is given.

[0108] In an exemplary embodiment, the inspection items may further include any one or any combination of the following:

[0109] The thirteenth inspection item is used to check whether the first-level unit connected to the high-bandwidth memory (HBM) and the module (block) port is a level shifter cell (identified as inspection item 13 in the embodiment of the present application). If it is detected that the first-level unit is not a level shifter cell, the inspection result is failed and an inspection item result report is given; if it is detected that the first-level unit is a level shifter cell, the inspection result is pass and an inspection item result report is given. Among them, HBM is a stacked memory technology in which multiple DRAM chips are stacked vertically together and connected by TSV to achieve high-density and high-bandwidth data transmission. Checking whether the first-level unit connected to the HBM and the module port is a level shifter cell is to ensure the level compatibility between the interfaces, signal integrity and the correctness of the circuit interconnection, which helps to ensure the reliability, performance and correct signal transmission of the design.

[0110] The fifth inspection item is used to check the distance between the port and the buffer inserted into the first level of the port (identified as inspection item 05 in the embodiment of the present application). If the distance detected exceeds the first distance threshold, the inspection result is failed and an inspection item result report is given; if the distance detected does not exceed the first distance threshold, the inspection result is passed and an inspection item result report is given. In one embodiment, the specific value of the first distance threshold can be determined based on experience. In order to minimize noise and high transition time problems when assembling each block to the top level, the first level of the port will insert a buffer. At this time, the buffer cannot be too far away from the port, otherwise noise and high transition problems may still exist. In particular, this problem is particularly fatal for 3D-IC projects, because in 3D-IC projects, back-end engineers may not obtain HBM timing library information until a very late stage. Therefore, the risk of port distance must be considered in advance.

[0111] The tenth inspection item is used to check whether the Manhattan distance between the static random access memory (SRAM) and its nearest TSV that supplies power to the SRAM exceeds a second distance threshold (identified as inspection item 10 in the embodiment of the present application). If the Manhattan distance detected exceeds the second distance threshold, the inspection result is failed and an inspection item result report is given; if the Manhattan distance detected does not exceed the second distance threshold, the inspection result is pass and an inspection item result report is given. In one embodiment, the specific value of the second distance threshold can be determined empirically. TSV is a vertical connection channel for transmitting signals and power between chip layers. SRAM is a common memory component and also needs to be properly connected and powered with the power TSV in 3D-IC. Manhattan distance is a metric used to measure the distance between two points in a coordinate system. In this case, Manhattan distance is used to measure the sum of the horizontal and vertical distances between the SRAM and the nearest power TSV.

[0112] The eleventh inspection item is used to check whether the Manhattan distance between the TSV and its nearest corresponding current discharge cell (clamp cell) exceeds a third distance threshold (identified as inspection item 11 in the present embodiment). If the Manhattan distance exceeds the third distance threshold, the inspection result is a fail and an inspection item result report is issued. If the Manhattan distance does not exceed the third distance threshold, the inspection result is a pass and an inspection item result report is issued. In one embodiment, the specific value of the third distance threshold can be determined based on experience.

[0113] The twelfth inspection item is used to check whether the length of the first-level interconnection line (net) connecting the HBM and the block port exceeds the fourth distance threshold (identified as inspection item 12 in the embodiment of the present application). If the length of the first-level net detected exceeds the fourth distance threshold, the inspection result is failed and an inspection item result report is given; if the length of the first-level net detected does not exceed the fourth distance threshold, the inspection result is pass and an inspection item result report is given. In one embodiment, the specific value of the fourth distance threshold can be determined based on experience. Because in 3D-IC projects, back-end engineers may not obtain HBM timing library information until a very late stage, limiting the length of this segment of net in advance helps prevent high transition time and noise from being transmitted to HBM.

[0114] The twentieth inspection item is used to check whether all the instantiation units on the clock tree have consistent threshold voltages (identified as inspection item 20 in the embodiment of the present application). If there are instantiation units with inconsistent threshold voltages on the checked clock tree, the inspection result is failed and an inspection item result report is given; if there are no instantiation units with inconsistent threshold voltages on the checked clock tree, the inspection result is pass and an inspection item result report is given. Among them, the instantiation unit (Instance) refers to a circuit module or component that has been instantiated. It is very important to ensure that all instantiation units on the clock tree have consistent threshold voltages, because inconsistent voltages may cause unpredictable behavior and timing problems of the circuit. By checking the consistency of the threshold voltages of the instantiation units on the clock tree, the yield can be further improved.

[0115] The twenty-first inspection item is used to check whether all instantiated units on the clock tree have consistent channel lengths (identified as inspection item 21 in the present embodiment). If any instantiated units with inconsistent channel lengths are found on the clock tree, the inspection result is a fail and an inspection item result report is given. If no instantiated units with inconsistent channel lengths are found on the clock tree, the inspection result is a pass and an inspection item result report is given. By checking the consistency of the channel lengths of the instantiated units on the clock tree, the yield rate is further improved.

[0116] The twenty-second inspection item is used to check whether the read project summary file is consistent with the input data used in the current design (identified as inspection item 22 in the embodiment of this application). If there is a difference in the comparison data, the inspection result is failed and a report on the inspection project results is given; if there is no difference in the comparison data, the inspection result is pass and a report on the inspection project results is given. In the digital backend, engineers responsible for the module level (block level) often receive data updates from front-end engineers or project managers. This inspection reads a project summary file and compares it with the input data used in the current design. The purpose is to ensure that the data used by the digital backend engineers responsible for each block is the same as the current latest data, thereby avoiding the risk of tape-out due to outdated data versions.

[0117] The twenty-third inspection item is used to check whether the number of TSVs and clamp cells in the current design is consistent with the number of TSVs and clamp cells in the input data (identified as inspection item 23 in the embodiment of this application) when the current input data is the latest. If they are inconsistent, the inspection result is failed and a inspection item result report is given; if they are consistent, the inspection result is passed and a inspection item result report is given. By comparing the number of TSVs and clamp cells in the current design with the number of TSVs and clamp cells in the input data, engineers are prevented from accidentally deleting operations in the digital back-end process, thereby avoiding the risk of tape-out.

[0118] In an exemplary embodiment, the inspection items may further include any one or any combination of the following:

[0119] The first inspection item is used to check whether there is a problem of repeated block instantiation in the current design (identified as inspection item 01 in the embodiment of this application). If so, the inspection result is failed and an inspection item result report is given; if not, the inspection result is pass and an inspection item result report is given.

[0120] The second inspection item is used for high fan-out inspection, which checks whether there are interconnect lines (nets) (identified as inspection item 02 in the embodiment of the present application) that exceed the fan-out threshold in the design. If so, the inspection result is failed and a report on the inspection item results is given; if not, the inspection result is pass and a report on the inspection item results is given. In integrated circuit design, High fanout refers to a situation where a signal line or circuit output is connected to a large number of inputs or branch lines. High fan-out may cause problems such as increased signal delay, increased power consumption and noise interference. By performing a high fan-out inspection, design engineers can evaluate and optimize circuits to ensure that the transmission and processing of signals can work within the expected range.

[0121] The third inspection item is used for the interconnection line length (Net length) inspection, which checks whether there is a net in the design that exceeds the Net length threshold (identified as inspection item 03 in the embodiment of the present application). If so, the inspection result is failed and an inspection item result report is given; if not, the inspection result is pass and an inspection item result report is given.

[0122] The fourth inspection item is used to check whether the power ground pin (PG pin) of the SRAM is connected to the power ground network (PG net) (identified as inspection item 04 in the embodiment of the present application). If there is a PG pin that is not connected to the PG net, the inspection result is failed and an inspection item result report is given; if there is no PG pin that is not connected to the PG net, the inspection result is pass and an inspection item result report is given. This inspection prevents the risk of discovering LVS in the final tape-out stage. In one embodiment, in 3D-IC, especially in designs where multiple chip layers are stacked, it is crucial to correctly connect the PG pin of the SRAM to the PG net. This ensures that the power and ground signals of the SRAM can be correctly transmitted and supplied to ensure stable operation of the SRAM.

[0123] The sixth inspection item is used to check whether there is a wiring within the preset range of the block boundary (identified as inspection item 06 in the embodiment of the present application). If it exists, the inspection result is failed and an inspection item result report is given; if it does not exist, the inspection result is pass and an inspection item result report is given. In one embodiment, the specific value of the preset range can be determined by experience. At the block level, since the information is cut from the top level, the block level engineer can only know the status of his own block and cannot know the specific situation of other blocks around him. Therefore, it is necessary to perform routing blocking (routing block) around his current block to prevent the net at the boundary of his own block from causing noise to the net at the boundary of other blocks.

[0124] The seventh inspection item is used to check whether there is a filler gap in the design (identified as inspection item 07 in the embodiment of the present application). If there is a filler gap, the inspection result is failed and a inspection item result report is given; if there is no filler gap, the inspection result is pass and a inspection item result report is given. This inspection can be detected in the signoff inspection of the related art. The difference is that in the embodiment of the present application, this inspection is configured in a certain stage of PR in the digital back-end process for early detection, avoiding the Design Rule Check (DRC) violation caused by the gap caused by the missing filler that interrupts the MOS tube.

[0125] The eighth inspection item is used to check whether there is an input floating problem in the design (identified as inspection item 08 in the embodiment of this application). If there is an input floating problem, the inspection result is failed and an inspection item result report is given; if there is no input floating problem, the inspection result is passed and an inspection item result report is given. The input floating problem can expose the chip to noise and other interference, making the chip input state unpredictable, causing subsequent logic problems, and may also cause the antenna to collect current and cause breakdown, thereby causing ESD problems.

[0126] The ninth inspection item is used to check whether the clamping network (TIE net) is connected to the clamping unit (TIE cell) (identified as inspection item 09 in the embodiment of the present application). If there is a TIE net that is not connected to the TIE cell, the inspection result is failed and an inspection item result report is given; if there is no TIE net that is not connected to the TIE cell, the inspection result is pass and an inspection item result report is given.

[0127] The fourteenth inspection item is used to check whether the input data of the design is missing a timing library or a physical library (identified as inspection item 14 in the embodiment of the present application). If there is a missing timing library or physical library, the inspection result is failed and an inspection item result report is given; if there is no missing timing library or physical library, the inspection result is pass and an inspection item result report is given.

[0128] The fifteenth inspection item is used to check whether the designed input netlist circuit is missing a tri-state gate or a multi-input net (identified as inspection item 15 in the embodiment of the present application). If there is a missing, the inspection result is failed and an inspection item result report is given; if there is no missing, the inspection result is pass and an inspection item result report is given.

[0129] The sixteenth check item is used to check whether there are overlapping instantiation units in the design (identified as check item 16 in the embodiment of the present application). If there are overlapping instantiation units, the check result is failed and a check item result report is given; if there are no overlapping instantiation units, the check result is passed and a check item result report is given. This check can be detected in the signoff check of the related art. The difference is that in the embodiment of the present application, this check is configured in a certain stage of the PR in the digital backend process for early detection.

[0130] The seventeenth inspection item is used to check whether the pre-wired H-tree network (Htree net) in the design overlaps with the SRAM of the current block in 1 to 4 winding layers (identified as inspection item 17 in the embodiment of the present application). If there is overlap, the inspection result is failed and a inspection item result report is given; if there is no overlap, the inspection result is pass and a inspection item result report is given. If the pre-wired Htree net overlaps with the SRAM of the current block in 1 to 4 winding layers, it is a short circuit problem, and the Htree net is cut from the top level. The Htree net cannot be changed, and the block designer needs to change the SRAM position to avoid the short circuit. In the embodiment of the present application, this inspection is configured in a certain stage of PR in the digital back-end process for early detection, so that the short circuit problem can be detected in advance without waiting until the last stage.

[0131] The eighteenth inspection item is used to check whether the nets connected to the signal pad cells and the input / output (IO) are all in the don't touch state (identified as inspection item 18 in the present embodiment). If not all are in the don't touch state, that is, there are IO nets that do not have the don't touch attribute, the inspection result is failed and an inspection item result report is issued. If all are in the don't touch state, the inspection result is passed and an inspection item result report is issued. This inspection prevents EDA tools from inserting buffers on IO nets, because IO nets are only allowed to connect to IO ports and PAD pins.

[0132] The nineteenth inspection item is used to check whether the distance between the pin pad unit (PAD cell) and the digital circuit core area (digital core) in the x-axis and y-axis directions exceeds the fifth distance threshold (identified as inspection item 19 in the embodiment of the present application). If the distance detected exceeds the fifth distance threshold, the inspection result is failed and an inspection item result report is given; if the distance detected does not exceed the fifth distance threshold, the inspection result is pass and an inspection item result report is given. In one embodiment, the specific value of the fifth distance threshold can be determined through experience. In the embodiment of the present application, this inspection is configured in a certain stage of PR in the digital back-end process for early detection.

[0133] The twenty-fourth inspection item is used to check whether there is an error (ERROR) mark in the log of the design during the operation of each stage (marked as inspection item 24 in the embodiment of the present application). If it exists, the inspection result is failed and an inspection item result report is given. At this time, manual inspection of the cause of the error is required; if it does not exist, the inspection result is pass and an inspection item result report is given.

[0134] In an exemplary embodiment, in step 100, before inspecting one or more inspection items that meet the inspection conditions at each stage of the placement and routing in the digital backend process, the process further includes:

[0135] Start an inspection item to check whether the execution conditions are met (identified as inspection item 00 in the embodiment of this application). If so, continue to check one or more inspection items that meet the inspection conditions; otherwise, wait until the execution conditions are met and continue to check one or more inspection items that meet the inspection conditions.

[0136] In one embodiment, the execution conditions may include but are not limited to: the design at runtime does not have an incomplete timing library, the instantiation unit is not placed, or the design is not fully routed.

[0137] Step 101: After all checks in the layout and routing stages are passed, at the sign-off stage in the digital backend process, one or more previously checked items are checked, and if all pass, a manufacturable design is obtained.

[0138] In one exemplary embodiment, after the signal integrity (Signoff) tool checks, the remaining Engineering Change Order (ECO) is imported into the PR EDA tool for final revisions. At the end of the Signoff phase, one or more previously checked items are checked based on the configuration information, and a manufacturable design is obtained after all checks pass.

[0139] The method for implementing sign-off based on 3D-IC provided in the embodiment of the present application, on the one hand, integrates the inspection items into each stage of the digital back-end process, and can be inspected when the inspection items are conditionally executed for the first time. By inspecting the inspection items that can be inspected as early as possible, the design problems are exposed earlier, reducing the risk of tape-out. On the other hand, the inspection items include inspections for 3D-IC designs, which detect the risks involved in 3D-IC, improve the yield, and reduce the problem of substandard functions or even large-scale scrap. The embodiment of the present application realizes independent inspections in stages and inspection items in the early digital back-end process, and modifications are made while checking, which greatly reduces the risk of discovering that the sign-off cannot be found at the last moment.

[0140] An embodiment of the present application further provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute any of the above-mentioned methods for implementing signoff based on 3D-IC.

[0141] An embodiment of the present application further provides a computer program for causing a carrier of the computer program to execute the following steps: in each stage of the PR in the digital back-end process, one or more inspection items that meet the inspection conditions are inspected respectively, and the next stage is entered after all inspections in the previous stage are passed; wherein, the inspection items include checking whether there are routings entering silicon vias in the 3D-IC design; after all inspections in each stage of the PR are passed, in the signoff stage of the digital back-end process, one or more inspection items that have been inspected are inspected and passed to obtain a manufacturable design.

[0142] FIG2 is a schematic diagram of a process of implementing a signoff based on 3D-IC in an embodiment of the present application. In this embodiment, taking the check items including 26 check items from check item 00 to check item 25 as an example, in the embodiment shown in FIG2 , it is assumed that according to user requirements, the configuration information includes: the items corresponding to the initialization (init) phase of PR include: check item 00, check item 14, check item 15 and check item 24; the items corresponding to the layout planning (floorplan) phase of PR include: check item 00, check item 10, check item 11, check item 16, check item 17, check item 22, check item 23 and check item 24; the items corresponding to the automatic layout (PreCTS) phase of PR include: check item 00, check item 05, check item 08, check item 09, check item 18, check item 19 and check item 24; the clock tree synthesis (CTS) phase of PR includes: check item 00, check item 05, check item 08, check item 09, check item 18, check item 19 and check item 24. The corresponding inspection items in the Synthesis stage include: Inspection Item 00, Inspection Item 18, Inspection Item 19 and Inspection Item 24; the corresponding inspection items in the PR clock tree synthesis optimization (PostCTS) stage include: Inspection Item 00, Inspection Item 18, Inspection Item 19, Inspection Item 20, Inspection Item 21 and Inspection Item 24; the corresponding inspection items in the PR routing (Route) stage include: Inspection Item 00, Inspection Item 04, Inspection Item 06, Inspection Item 12, Inspection Item 13, Inspection Item 24, Inspection Item 2 5. The items to be checked during the PostRoute phase of PR include: Check Item 00, Check Item 02, Check Item 03, Check Item 04, Check Item 06, Check Item 08, Check Item 09, Check Item 10, Check Item 11, Check Item 12, Check Item 13, Check Item 18, Check Item 19, Check Item 20, Check Item 21, Check Item 23, Check Item 24 and Check Item 25. The items to be checked during the Signoff phase include: 26 items in total from Check Item 00 to Check Item 25.

[0143] As shown in FIG2 , in this embodiment, in each stage of PR, after the relevant placement and routing operations are completed, i.e., at the end of the stage, the configured check items can be checked according to the configuration information by calling the main program. Similarly, in the Signoff stage, after the operation of the Signoff tool is completed, i.e., at the end of the Signoff stage, the configured check items can be checked according to the configuration information by calling the main program. This may include:

[0144] Step 200: At the end of the PR initialization (Init) phase, according to the configuration information, inspection items 00, 14, 15 and 24 are executed and the inspection results are all passed, an inspection item result report is given and the process goes to step 201; as long as there is an inspection item that fails, an inspection item result report is given and the process returns to start the inspection from that item.

[0145] The PR init phase is when the PR EDA tool initially reads the backend design data. At the end of the init phase, the main program is called and, based on the configuration information, executes check item 00. If check item 00 passes, it then executes checks 14, 15, and 24.

[0146] In one embodiment, inspection items 14 and 15 in the init phase of PR are mainly responsible for determining whether there is a real timing library or physical library, and whether there are problems with tri-state gates or multi-input nets in the input netlist, so as to predict whether the input design data is complete and accurate; inspection item 24 is mainly responsible for checking whether there is an error word marked with ERROR in the operation log.

[0147] Step 201: At the end of the PR floorplan stage, based on the configuration information, check items 00, 10, 11, 16, 17, 22, 23, and 24 are executed, and if all pass, a check item result report is given and the process proceeds to step 202. If any of the executed check items fail, a check item result report is given and the process returns to start the inspection from that item.

[0148] The PR floorplan phase is when the PR EDA tool reads the Design Exchange Format (DEF) information file and performs floorplanning. At the end of the floorplan phase, the main program is called and, based on the configuration information, executes Check Item 00. If Check Item 00 passes, it then proceeds to Check Items 10, 11, 16, 17, 22, 23, and 24.

[0149] In one embodiment, the floorplan stage of PR needs to read in the DEF file to read in information such as the TSV clamp position and Htree net position in the three-dimensional packaging circuit, and place the macro cells. Therefore, the relative positions between the SRAM, TSV and clamp cells can be determined. At this time, through inspection items 10, 11 and 16, it is possible to check whether the relative positions are reasonable and whether there are any overlaps and other problems at the last moment of the floorplan stage. Among them, the position of the TSV clamp can be specified in the DEF file by defining its coordinates or the relative position with other components. In the floorplan stage, the Htree information will also be brought in after the DEF is read in. At this time, through inspection item 17, it is possible to check whether the engineer's manual placement of the macro cells and Htree has a short circuit risk. Inspection items 22 and 23 are mainly used to check whether the DEF data file read in by the engineer responsible for the block level (block owner) is the correct version, and to check whether there is any information accidentally deleted due to human error in the floorplan stage. Inspection item 24 is mainly responsible for checking whether there is an error word marked with ERROR in the operation log.

[0150] Step 202: At the end of the PR automatic layout (PreCTS) stage, according to the configuration information, check items 00, 05, 08, 09, 18, 19 and 24 are executed and the inspection results are all passed, an inspection item result report is given and the process goes to step 203; if any of the inspection items executed have an inspection result that fails, an inspection item result report is given and the process returns to start the inspection from that inspection item.

[0151] During the PreCTS phase of PR, the PR EDA tool performs automatic layout, aiming to determine the precise placement of logic components to meet layout constraints and performance requirements. At the end of the PreCTS phase, the main program is called and, based on the configuration information, executes Check Item 00. If Check Item 00 passes, it then executes Check Items 05, 08, 09, 18, 19, and 24.

[0152] In one embodiment, the PreCTS stage of PR builds a buffer tree. Therefore, the position of the port buffers of a module (e.g., block, functional module, or logic unit) determines the timing and noise quality across block boundaries when the top layer stitches blocks together. At this point, check item 05 can be used to check for risks. Considering that after automatic placement, the EDA tool converts the standard cells in the netlist into a layout diagram for the first time and performs timing optimization, the PreCTS stage can check for input floating issues and verify that tie-off cells (TIE) are connected to all required tie-off nets. At this point, check items 08 and 09 can be used to check for risks. During the PreCTS stage, the relative positions of the PADs and standard cells in the digital core area are initially determined, and the tool makes its first attempt to insert buffers for timing optimization. At this point, if checks 18 and 19 are first executable, they are executed immediately, rather than waiting until later stages. In the inspection of the PreCTS stage, inspection item 24 is responsible for checking whether there is an error word marked with ERROR in the operation log.

[0153] Step 203: At the end of the PR clock tree synthesis (CTS) phase, according to the configuration information, check items 00, 18, 19, and 24 are executed. If all the check items pass, a check item result report is given and the process proceeds to step 204. If any of the executed check items fail, a check item result report is given and the process returns to start the check from that check item.

[0154] The PR CTS phase is when the PR EDA tool performs the CTS. At the end of the CTS phase, the main program is called and, based on the configuration information, executes check item 00. If check item 00 passes, it executes check items 18, 19, and 24.

[0155] In one embodiment, check items 18 and 19 are first executed during the preCTS phase. Because the CTS phase still performs operations such as buffer addition, optimization, and deletion, even if check items 18 and 19 pass in the preCTS phase, there's still a chance they fail in the CTS phase. To ensure yield, check items 18 and 19 are re-executed during the CTS phase. During the PreCTS phase, check item 24 checks the run log for errors marked with an "ERROR" symbol.

[0156] Step 204: At the end of the PR clock tree synthesis post-optimization (PostCTS) phase, according to the configuration information, check items 00, 18, 19, 20, 21, and 24 are executed and the check results are all passed. A check item result report is given and the process goes to step 205. If any of the executed check items has a check result that fails, a check item result report is given and the process returns to start the check from that check item.

[0157] The PostCTS phase of PR is when the PR EDA tool performs post-CTS optimization. At the end of the PostCTS phase, the main program is called and, based on the configuration information, executes check item 00. If check item 00 passes, it then executes checks 18, 19, 20, 21, and 24.

[0158] In one embodiment, since the PostCTS stage will still perform operations such as buffer addition, optimization, and deletion, that is, even if the inspection results of inspection items 18 and 19 are both pass in the first two stages, namely the PreCTS stage and the CTS stage, there is still a certain possibility of fail inspection results in the PostCTS stage. In order to ensure the yield, inspection items 18 and 19 are checked again in the PostCTS stage. The PostCTS stage completes all the steps of CTS for the first time. At this time, the clock tree is determined. Therefore, the PostCTS stage can start the first corresponding inspection of the units on the clock tree. This can be achieved by inspecting inspection items 20 and 21 to ensure that the clock tree grows as required, thereby improving the production yield. In the inspection of the PostCTS stage, inspection item 24 is responsible for checking whether there is an error word marked with ERROR in the operation log.

[0159] Step 205: At the end of the PR routing stage, according to the configuration information, check items 00, 04, 06, 12, 13, 24 and 25 are executed and the inspection results are all passed. An inspection item result report is given and the process goes to step 206. If any of the inspection items executed have an inspection result that fails, an inspection item result report is given and the process returns to start the inspection from that item.

[0160] The Route phase of PR is when the PR EDA tool performs automatic routing. At the end of the Route phase, the main program is called and, based on the configuration information, executes Check Item 00. If Check Item 00 passes, it then executes Check Items 04, 06, 12, 13, 24, and 25.

[0161] In one embodiment, during the Route phase, the EDA tool completes routing for the first time, and signal metal line information appears in the design. At this point, routing-related checks can be performed, such as Check Item 04, Check Item 06, Check Item 12, Check Item 13, and Check Item 25. During the Route phase, Check Item 24 is responsible for checking whether there are any errors marked with the error symbol in the run log.

[0162] Step 206: At the end of the PostRoute phase of PR, according to the configuration information, check items 00, 02, 03, 04, 06, 08, 09, 10, 11, 12, 13, 18, 19, 20, 21, 23, 24 and 25 are executed and the inspection results are all passed, and an inspection item result report is given and the process goes to step 207; as long as there is an inspection item among the executed inspection items that has a failed inspection result, an inspection item result report is given and the process returns to start the inspection from that item.

[0163] The PostRoute phase of PR is when the PR EDA tool performs routing optimization and various performance metrics. During the PostRoute phase, the EDA tool completes all aspects of the PR phase, producing data that enters tapeout inspection. Therefore, the PostRoute phase can include a relatively comprehensive set of inspection items. At the end of the PostRoute phase, the main program is called and, based on the configuration information, executes Check Item 00. Once Check Item 00 passes, it executes Check Items 02, 03, 04, 06, 08, 09, 10, 11, 12, 13, 18, 19, 20, 21, 23, 24, and 25. Check Items 02 and 03 have not been previously inspected.

[0164] In one embodiment, during the PreCTS, CTS, PostCTS, and PostRoute stages, the EDA tool will attempt to decompose nets that exceed the maximum fan-out limit in the current stage. As the final stage of PR, the PostRoute stage is the first stage where a check is needed to determine whether the high fan-out result meets the standard. Therefore, check item 02 will be checked during the PostRoute stage. During the CTS, PostCTS, Route, and PostRoute stages, the EDA tool will perform routing (only clock tree routing, not global routing, will be performed during the CTS and PostCTS stages). Therefore, as the final stage of PR, the PostRoute stage is the first stage where a check is needed to determine whether the net length is below the maximum length limit. Therefore, check item 03 will be checked during the PostRoute stage. PostRoute is the last stage of PR. To ensure that the previous inspection items still have a pass result, inspection items 04, 06, 08, 09, 10, 11, 12, 13, 18, 19, 20, 21, 23, and 25 that were previously inspected can be re-inspected in the PostRoute stage. This ensures that all items enter the Signoff stage with a pass status, thereby reducing tape-out risks. In the PostRoute stage, inspection item 24 is responsible for checking whether there is an error marked with ERROR in the run log.

[0165] Step 207: At the end of the signoff phase, according to the configuration information, check items 00 to 25 are executed and if all the check results are passed, an inspection item result report is given and the process ends. If any of the executed inspection items has a failed inspection result, an inspection item result report is given and the process returns to the beginning of the inspection from that item.

[0166] In one embodiment, after the signoff tool's inspection, the remaining Engineering Change Order (ECO) is imported into the PR EDA tool for final revisions. At the end of the signoff phase, the main program is called and, based on the configuration information, executes checks 00 through 25. This ensures that all check items pass, ensuring that the results exported after each ECO is imported into the EDA tool are free of additional tapeout risks.

[0167] The 3D-IC signoff method provided in the embodiments of the present application is based on past project experience and predictions of possible risks in 3D-IC design. In addition to the signoff checks in related technologies, it develops more inspection items applicable to 3D-IC design. It specifically checks some items in the 3D-IC digital back-end implementation process that would be missed by the signoff process in related technologies. Furthermore, for items that would be checked by the signoff process in related technologies, it also implements independent checks by stage and project in the early digital back-end process. This greatly reduces the risk of discovering that a signoff is impossible at the last minute, thereby effectively improving production yield.

[0168] After the inspection is completed at each stage, an inspection project result report will be given. In one embodiment, a graphical user interface (GUI) can be used to provide a visual result viewing method. In one embodiment, the GUI interface can be based on but not limited to tool command language (TCL) / TK implementation, and the GUI interface can be run on a Linux system, wherein TK is a GUI toolkit for creating a user interface for an application. In this way, the main program in the embodiment of the present application can be implemented based on the TCL language that is universally compatible with digital back-end software, and the main program can be run on Innovus, the most commonly used layout and routing software for the digital back-end. In one embodiment of the present application, the main program is written by TCL commands, and innovus itself supports TCL language and can be regarded as a TCL compiler. When the main program in the embodiment of the present application is run, first, the main program control script is read to obtain pre-defined project information, such as the current project name, the sequence number of the subroutine executed in each stage (i.e., the identification of the inspection project), and the company name identification of the output report. Then, based on the predefined variables in the process scripts of each stage, the design stage in which the current main program is running is determined, and the subroutines (i.e., inspection items) executed in this design stage are determined. They are executed in sequence using a loop method, and the output of each subroutine is stored in an array for subsequent analysis. Finally, when all subroutines are executed, the main program processes the standard output of each subroutine in the array, and through a loop, formats the output subroutine's inspection number, inspection content description, inspection results, inspection result description, and inspection output report file in the summary report. If there is a missing report file, it is automatically marked as no report file. By looping through the standardized output list of the subroutine, it is very convenient to output summary logs and summary reports. Moreover, in order to allow users to understand the inspection results more intuitively, the summary report will be output synchronously on the innovus runtime interface at the same time as it is generated. For example, by opening the GUI in the Linux shell and calling the summary report, the user can visually see the inspection results.

[0169] In the embodiment of the present application, the emphasis is on intuitively displaying the inspection results to the user through the GUI. The specific design of the GUI is not intended to limit the scope of protection of the present application. The following is a simple GUI example.

[0170] FIG3 is a schematic diagram of the main interface of a GUI in an embodiment of the present application. As shown in FIG3 , the main interface of the GUI may include: the software name at label 1; the menu bar button at label 2 (expandable); the current block design name at label 3; the result viewing button at each stage of the backend process at label 4 (clickable to enter the stage inspection result details interface); and the result viewing button at label 5 (clickable to enter the stage inspection result details interface). In one embodiment, if the mouse hovers over any button in the area labeled 4 or 5 for a certain period of time, such as 0.8 seconds, a prompt box will pop up, as shown by the arrow in FIG4 , to prompt the button function. The prompt box disappears after the mouse leaves the button.

[0171] When the design does not enter the subsequent stage in the process, the button of the unprocessed stage will prompt no data, as shown in the gray character button in Figure 5(a). At this time, clicking the no data button will prompt an error prompt box as shown in Figure 5(b).

[0172] When you click the menu bar button numbered 2 in Figure 3, sub-buttons such as Info and Exit appear, as shown in Figure 6. Clicking the Exit sub-button exits the GUI interface. In one embodiment, exiting the application can also be bound to the Esc key, that is, pressing the Esc key on any interface exits the GUI interface. Clicking the Info sub-button will cause two buttons, Feedback and About, to appear. As shown in Figure 7, clicking the Feedback button again will pop up the contact information for reporting GUI issues. Clicking the About button will pop up the GUI introduction information, as shown in Figure 8.

[0173] When you click on any of the backend process stage results buttons (numbered 4) in Figure 3, as shown in Figure 9, the result button will turn gray, as indicated by arrow 1 in Figure 9, and a result summary sub-interface for the corresponding stage will pop up. As shown in Figure 10, the sub-interface may include: the sub-interface window name (numbered 1), which indicates the current stage being inspected; a summary of all failed inspection items in the current inspection stage (numbered 2); the inspection sequence number (numbered 3); the inspection result button (numbered 4); and the inspection result report file button (numbered 5).

[0174] In one embodiment, in the inspection number area at label 3 in Figure 10, if the mouse is hovered over the corresponding number for a certain period of time, such as 0.2 seconds, a prompt box as shown in Figure 11 will pop up. Figure 11 shows the prompt box that appears after the mouse is hovered over the inspection number Item 23 for 0.2 seconds, prompting the user to describe the inspection content corresponding to the inspection number. The prompt box disappears after the mouse leaves the button.

[0175] In one embodiment, the inspection result button area at number 4 in FIG10 can use different colors to further indicate the inspection result for greater intuitiveness, such as green for pass, red for fail, and orange for skip (i.e., the inspection of the inspection item is skipped in this step). In one embodiment, orange can also be used to represent other inspection results that are not failed or pass. In one embodiment, when the inspection result button at number 4 in FIG10 is clicked, a pop-up window explaining the inspection result corresponding to the inspection result of the different color will pop up, such as the pop-up windows corresponding to pass, failed, and skip are shown in FIG12(a), FIG12(b), and FIG12(c), respectively.

[0176] In one embodiment, in the inspection result report file button area at number 5 in Figure 10, if the inspection project result report file exists, a button will appear. If the inspection project result report file does not exist, it can be indicated by a "-" symbol. Hover the mouse over the corresponding inspection project result report for a certain period of time, such as 0.65 seconds, and a prompt box as shown in Figure 13 will pop up. Figure 13 shows a prompt box that appears 0.65 seconds after the mouse is hovered over the inspection project result report file 23Rpt, which is used to prompt the user of the modification date, file size and file path of the inspection result report file corresponding to the inspection result report file button. In this way, the user can judge whether the file is wrong based on this information. The prompt box disappears after the mouse leaves. At the same time, after clicking the button of the inspection result report file at number 5 in Figure 10, the corresponding inspection result file can be opened through GVIM. If the button of the inspection project result report file that does not exist, represented by the "-" symbol, is clicked, an error pop-up window as shown in Figure 14 can be popped up.

[0177] In this embodiment, a user interface (GUI) visually presents the information backend engineers need. This clear GUI allows them to intuitively and accurately understand the status of their assigned block, allowing them to determine whether the block is at risk of failing to sign off the 3D-IC. In one implementation, the GUI is independent of write permissions. Opening the GUI does not generate new files, but only reads existing inspection reports. By granting read permissions, any account can use the GUI to view the status of other blocks, facilitating centralized inspections for project managers.

[0178] FIG15 is a schematic diagram of the structure of a device for implementing sign-off based on 3D-IC in an embodiment of the present application. As shown in FIG15 , the device may include: a PR unit and a sign-off unit; wherein,

[0179] The PR unit is configured to check one or more inspection items that meet the inspection conditions at each stage of layout and routing in the digital back-end process. After all the inspections in the previous stage are passed, it enters the next stage. Among the inspection items, one is to check whether there are routing wires entering silicon vias in 3D-IC designs.

[0180] The sign-off unit is set to obtain a manufacturable design after all checks in each stage of PR are passed and one or more checked items are checked and passed in the Signoff stage of the digital backend process.

[0181] In an exemplary embodiment, the apparatus for implementing sign-off in the present application may further include: a configuration unit configured to configure configuration information of inspection items that need to be inspected and meet inspection conditions.

[0182] In an exemplary embodiment, at each stage of placement and routing in the digital backend process in the PR unit, one or more inspection items meeting the inspection conditions are inspected respectively, which can be set as follows:

[0183] At the end of each stage of layout and routing in the digital back-end process, the inspection items that meet the inspection conditions specified in the configuration information are executed according to the configuration information.

[0184] In an exemplary embodiment, the PR unit checks one or more inspection items that meet the inspection conditions respectively, which can be set as follows:

[0185] For an inspection item that meets the inspection conditions in a stage of layout and routing, if the inspection fails, the inspection result is output as failed and an inspection item result report is given, and the inspection of the inspection item is returned; if the inspection passes, the inspection result is output as pass and an inspection item result report is given, and the inspection of the next inspection item in this stage is carried out until all the inspection items in this stage pass and enter the next stage of layout and routing.

[0186] In an exemplary embodiment, the sign-off unit may be configured to: at the end of the Signoff phase, perform checks on one or more checked items according to the configuration information, and obtain a manufacturable design after all checks pass.

[0187] In an exemplary embodiment, in each stage of placement and routing in the digital back-end process, before checking one or more inspection items that meet the inspection conditions, the PR unit is further configured to:

[0188] Check whether the execution condition (identified as check item 00 in the embodiment of the present application) is met. If so, continue to check one or more check items that meet the check condition; otherwise, wait until the execution condition is met and continue to check one or more check items that meet the check condition. In one embodiment, the execution condition may include but is not limited to: the design does not exist at runtime, the timing library is incomplete, the instantiation unit is not placed, or the design is not fully routed.

[0189] In an exemplary embodiment, the inspection items may further include any one or any combination of the following:

[0190] Inspection item 13, inspection item 05, inspection item 10, inspection item 11, inspection item 12, inspection item 20, inspection item 21, inspection item 22, inspection item 23. It should be noted that these inspection items will be inspected at each stage of PR. For details, please refer to the embodiment shown in Figure 2 and will not be repeated here.

[0191] In an exemplary embodiment, the inspection items may further include any one or any combination of the following:

[0192] Check Item 01, Check Item 02, Check Item 03, Check Item 04, Check Item 06, Check Item 07, Check Item 08, Check Item 09, Check Item 14, Check Item 15, Check Item 16, Check Item 17, Check Item 18, Check Item 19, Check Item 24. It should be noted that these check items will be checked at each stage of PR. For details, please refer to the embodiment shown in Figure 2 and will not be repeated here.

[0193] The device for implementing sign-off based on 3D-IC provided in the embodiment of the present application, on the one hand, integrates the inspection items into each stage of the digital back-end process, and can be inspected when the inspection items are conditionally executed for the first time. By inspecting the inspection items that can be inspected as early as possible, it is possible to expose design problems earlier and reduce the risk of tape-out. On the other hand, the inspection items include inspections for 3D-IC designs, which detect the risks involved in 3D-IC, improve the yield, and reduce the problem of substandard functions or even large-scale scrap. The embodiment of the present application realizes independent inspections in stages and inspection items in the early digital back-end process, and modifications are made while checking, which greatly reduces the risk of discovering that the sign-off cannot be found at the last moment.

[0194] Although the embodiments disclosed in this application are as described above, the contents described are merely embodiments adopted to facilitate understanding of this application and are not intended to limit this application. Any person skilled in the art to which this application belongs may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed in this application. However, the scope of patent protection of this application shall still be based on the scope defined by the attached claims.

Claims

1. A method for implementing sign-off based on a three-dimensional integrated circuit 3D-IC, characterized in that: include: In each stage of the layout and routing PR in the digital backend process, one or more inspection items that meet the inspection conditions are inspected respectively, and the next stage is entered after all the inspections in the previous stage are passed; among them, the inspection items include the twenty-fifth inspection item for checking whether there is a wire routing into the through silicon via TSV in the 3D-IC design; After all the checks in the PR are passed, in the signoff stage of the digital backend process, one or more checked items are checked, and a manufacturable design is obtained after all of them pass.

2. The method according to claim 1, before respectively inspecting one or more inspection items that meet the inspection conditions, further comprising: Configuration information of the inspection items that need to be inspected and that meet the inspection conditions is configured.

3. The method according to claim 2, wherein: At the end of each stage of layout and routing in the digital backend process, the inspection items satisfying the inspection conditions specified in the configuration information are executed according to the configuration information.

4. The method according to claim 3, wherein: The step of respectively inspecting one or more inspection items that meet the inspection conditions includes: For an inspection item that meets the inspection conditions in a stage of the PR, if the inspection fails, the inspection result is output as failure and an inspection item result report is given, and the inspection of the inspection item is returned; if the inspection passes, the inspection result is output as pass and an inspection item result report is given, and the inspection of the next inspection item in this stage is carried out, until all inspection items in this stage are passed and enter the next stage of the PR.

5. The method according to claim 4, wherein before checking one or more inspection items meeting the inspection conditions at each stage of layout and routing in the digital backend process, the method further comprises: Checking the startup inspection item for checking whether the execution condition is met, and if so, continuing to check one or more inspection items that meet the inspection condition; Otherwise, wait until the execution condition is met and then continue to check one or more inspection items that meet the inspection condition.

6. The method according to claim 5, wherein: The execution conditions include: the design at runtime does not have an incomplete timing library, the instantiation unit is not placed, or the design does not have a complete routing problem.

7. The method according to claim 2, wherein: In the sign-off phase of the digital backend process, one or more previously checked items are checked, including: At the end of the Signoff phase, one or more checked items are checked according to the configuration information, and the producible design is obtained after all the checks are passed.

8. The method according to claim 5, wherein the inspection items further include one or any combination of the following: A thirteenth inspection item for checking whether the first-level unit connected to the high-bandwidth memory HBM and the module port is a level conversion unit; a fifth check item for checking whether the distance between a port and a buffer inserted at the first stage of the port exceeds a first distance threshold; a tenth checking item for checking whether the Manhattan distance between the static random access memory SRAM and its nearest TSV for powering the SRAM exceeds a second distance threshold; an eleventh checking item for checking whether the Manhattan distance between the TSV and the nearest current discharge unit corresponding thereto exceeds a third distance threshold; a twelfth inspection item for checking whether the length of the first-level interconnection line connecting the HBM and the module port exceeds a fourth distance threshold; A twentieth check item for checking whether all instantiation units on the clock tree have consistent threshold voltages; The twenty-first check item is used to check whether all instantiation units on the clock tree have the same channel length; The 22nd inspection item is used to check whether the read project summary file is consistent with the input data used in the current design; The twenty-third inspection item is used to check whether the number of TSVs and the number of current discharge units in the current design are consistent with the number of TSVs and the number of current discharge units in the input data when the currently used input data is the latest.

9. According to the method of claim 8, the inspection items further include one or any combination of the following: A first check item for checking whether there is a problem of repeated instantiation of a module; A second check item for checking whether there is an interconnect line exceeding a fan-out threshold; a third inspection item for inspecting whether there is an interconnection line exceeding an interconnection line length threshold; A fourth inspection item for checking whether the power ground pin of the SRAM is connected to the power ground network; A sixth inspection item for checking whether there is a winding within a preset range of the module boundary; The seventh inspection item is used to check whether there is a filling gap; The eighth inspection item is used to check whether there is a problem of input dangling; The ninth check item is used to check whether the clamp network is connected to the clamp unit; A fourteenth check item for checking whether the input data of the current design is missing from the timing library or the physical library; The fifteenth inspection item is used to check whether the input netlist circuit of the current design is missing tri-state gates and multi-input netlists; A sixteenth check item for checking whether there are overlapping instantiation units; The seventeenth inspection item is used to check whether the pre-wired H-tree network overlaps with the SRAM of the current module in the number of winding layers 1 to 4; The eighteenth inspection item is used to check whether the signal pin pad unit and the network connected to the input and output are in a non-touch state; A nineteenth inspection item for checking whether the distance between the pin pad unit and the digital circuit core area in the x-axis and y-axis directions exceeds the fifth distance threshold; The twenty-fourth inspection item is used to check whether there are error marks in the logs of the design during the operation of each of the said stages.

10. The method according to claim 9, wherein: At each stage of the layout and routing PR in the digital backend process, one or more inspection items that meet the inspection conditions are inspected respectively, including: At the end of the initialization phase of the PR, the startup inspection item, the fourteenth inspection item, the fifteenth inspection item and the twenty-fourth inspection item are executed according to the configuration information; At the end of the layout planning stage of the PR, the startup inspection item, the tenth inspection item, the eleventh inspection item, the sixteenth inspection item, the seventeenth inspection item, the twenty-second inspection item, the twenty-third inspection item, and the twenty-fourth inspection item are executed according to the configuration information; At the end of the automatic layout stage of the PR, the startup inspection item, the fifth inspection item, the eighth inspection item, the ninth inspection item, the eighteenth inspection item, the nineteenth inspection item and the twenty-fourth inspection item are executed according to the configuration information; At the end of the clock tree synthesis phase of the PR, the startup check item, the eighteenth check item, the nineteenth check item and the twenty-fourth check item are executed according to the configuration information; At the end of the post-synthesis optimization phase of the clock tree of the protected PR, the startup check item, the eighteenth check item, the nineteenth check item, the twentieth check item, the twenty-first check item and the twenty-fourth check item are executed according to the configuration information; At the end of the wiring phase of the PR, the startup inspection item, the fourth inspection item, the sixth inspection item, the twelfth inspection item, the thirteenth inspection item, the twenty-fourth inspection item and the twenty-fifth inspection item are executed according to the configuration information; At the end of the post-routing optimization stage of the PR, the startup inspection item, the second inspection item, the third inspection item, the fourth inspection item, the sixth inspection item, the eighth inspection item, the ninth inspection item, the tenth inspection item, the eleventh inspection item, the twelfth inspection item, the thirteenth inspection item, the eighteenth inspection item, the nineteenth inspection item, the twentieth inspection item, the twenty-first inspection item, the twenty-third inspection item, the twenty-fourth inspection item and the twenty-fifth inspection item are executed according to the configuration information.

11. The method according to claim 9, wherein: In the sign-off phase of the digital backend process, one or more previously checked items are checked, including: At the end of the Signoff phase, a total of 26 inspections from the startup inspection item to the twenty-fifth inspection item are performed according to the configuration information. 12 . A computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the method for implementing signoff based on 3D-IC according to claim 1 .

13. A computer program for causing a carrier of the computer program to perform the following steps: In each stage of the layout and routing PR in the digital back-end process, one or more inspection items that meet the inspection conditions are inspected respectively, and the next stage is entered after all the inspections in the previous stage are passed; among them, The inspection items include checking whether there are routing wires entering silicon through vias in the 3D-IC design; after the inspections at each stage in the PR are passed, in the signoff stage in the digital backend process, one or more inspection items that have been checked are checked and passed to obtain a manufacturable design.

14. A device for implementing sign-off based on 3D-IC, characterized in that: include: Placement and routing PR unit, sign-off unit; among them, The PR unit is configured to check one or more inspection items that meet the inspection conditions at each stage of layout and routing in the digital back-end process, and enter the next stage after all the inspections in the previous stage are passed; among which, the inspection items include checking whether there is a routing wire entering the silicon through-hole in the 3D-IC design; The Signoff unit is set to obtain a manufacturable design after all the inspections in each stage of PR have passed, and then in the Signoff stage of the digital backend process, more than one inspected inspection item is inspected and passed.

15. The apparatus according to claim 14, further comprising: The configuration unit is configured to configure configuration information of the inspection items that need to be inspected and meet the inspection conditions.

16. The device according to claim 14, wherein at each stage of layout and routing in the digital backend process, the PR unit respectively checks one or more inspection items that meet the inspection conditions, and is set as follows: At the end of each stage of layout and routing in the digital backend process, the inspection items meeting the inspection conditions specified in the configuration information are executed according to the configuration information.

17. The device according to claim 16, wherein: The PR unit checks one or more inspection items that meet the inspection conditions respectively, and is set as follows: For an inspection item that meets the inspection conditions in a stage of the PR, if the inspection fails, the inspection result is output as failure and an inspection item result report is given, and the inspection of the inspection item is returned; if the inspection passes, the inspection result is output as pass and an inspection item result report is given, and the inspection of the next inspection item in this stage is carried out, until all inspection items in this stage are passed and enter the next stage of the PR.

18. The device according to claim 14, wherein: The sign-off unit is configured to: at the end of the sign-off phase, perform checks on one or more checked items according to the configuration information, and obtain the producible design after all the checks are passed.

19. The device according to claim 14, wherein: The PR unit is also configured to: Check whether the execution condition is met, if the execution condition is met, continue to check the one or more inspection items that meet the inspection condition; if the execution condition is not met, wait until the execution condition is met and continue to check the one or more inspection items that meet the inspection condition.