Method for manufacturing semiconductor device, and insulating resin material

Abstract

In this method for manufacturing a semiconductor device, a semiconductor member 10 that has, on a semiconductor wafer 11, minute copper pillars 12 and solder bumps 13, which are microbumps, is prepared. Subsequently, an underfill material is applied and spread on the semiconductor member 10 so as to cover the copper pillars 12 and the solder bumps 13, and is then cured. Consequently, an insulating resin layer 20 that is thicker than the height of connection parts 14 composed of the copper pillars 12 and the solder bumps 13 is formed. After that, the thick insulating resin layer 20 is ground by a CMP device, and the surfaces 13a of the solder bumps 13A are exposed from the insulating resin layer. According to this method, the uniformity of the heights of the bumps 13 and the smoothness of the surfaces of the bumps 13 can be improved. Since the smoothness of the surfaces is improved, voids are less likely to be generated. In addition, since the insulating resin layer 20 covers each bump 13, a bridge is less likely to be generated. This method may be applied to CoW and WoW.

Description

Semiconductor device manufacturing method and insulating resin material

[0001] The present disclosure relates to a method for manufacturing a semiconductor device and an insulating resin material.

[0002] Flip-chip bonding is known, in which conductive protrusions called bumps are formed on a semiconductor chip to directly connect the semiconductor chip to a wiring circuit board. Attempts have been made to use such flip-chip bonding to form multi-tiered semiconductor chips, such as four-tiered, eight-tiered, and twelve-tiered, and as a result, the bumps tend to be smaller in height and diameter (see, for example, Non-Patent Documents 1 and 2).

[0003] Julia Woertink et.al., “From C4 to micro-bump: Adapting lead free solder electroplating processes to next-gen advanced packaging applications”, 2014 Electronic Components and Technology Conference, pp.342-347, 2014.Mi-Seok Park et.al, “Effects of the degradation of methane sulfonic acid electrolyte on the collapse failure of Sn-Ag alloy solders for flip-chip interconnections”, The Royal Society of Chemistry 2017, pp.23136-23142, 2017.

[0004] With such microbumps, the bumps are so tiny that it can be difficult to make the heights of multiple bumps uniform and to make the surfaces of each bump smooth. Furthermore, the bump pitch is small with microbumps, making it easier for bridges to form between the bumps. These problems with microbumps affect the manufacturing yield of semiconductor devices.

[0005] An object of the present disclosure is to provide a method for manufacturing a semiconductor device and an insulating resin material that can improve the manufacturing yield of semiconductor devices.

[0006] [1] In one aspect, the present disclosure provides a method for manufacturing a semiconductor device. The method includes the steps of preparing a bonded assembly including a semiconductor substrate, a connection portion provided on a main surface of the semiconductor substrate, and an insulating resin layer provided on the main surface of the semiconductor substrate so as to cover the connection portion, and grinding the insulating resin layer of the bonded assembly. In the grinding step, the insulating resin layer is ground to expose a surface of the connection portion.

[0007] In this semiconductor device manufacturing method, the connection portions are covered with an insulating resin layer, and then the insulating resin layer is ground to expose the surfaces of the connection portions. In this case, grinding can reliably improve the uniformity of the height of the connection portions and the smoothness of the surface. Improved surface smoothness also makes voids less likely to occur. Furthermore, because the connection portions are covered with the insulating resin layer, bridges are less likely to occur. Therefore, this semiconductor device manufacturing method can improve the manufacturing yield of semiconductor devices even when the connection portions are miniaturized.

[0008] [2] In the method for manufacturing a semiconductor device according to [1] above, it is preferable that the grinding step includes grinding a part of the connection part together with the insulating resin layer. In this case, grinding a part of the connection part can reliably improve the uniformity of the height of the connection part and the smoothness of the surface.

[0009] [3] In the method for manufacturing a semiconductor device according to [1] or [2] above, the connection portion may include a connection terminal provided on the main surface of the semiconductor substrate and a bump provided on the connection terminal. In the grinding step, it is preferable to grind a portion of the bump so that the surface of the bump is exposed from the insulating resin layer. In this case, grinding a portion of the bump that constitutes the connection portion can reliably improve the uniformity of the bump height and the smoothness of the surface.

[0010] [4] In any of the semiconductor device manufacturing methods described above in [1] to [3], the step of preparing the bonded assembly may include the steps of preparing a semiconductor member having a semiconductor substrate and a connection portion, and forming an insulating resin layer by applying a liquid insulating resin material to the main surface of the semiconductor substrate so as to cover the connection portion of the semiconductor member. The insulating resin layer is thicker than the height of the connection portion when provided on the semiconductor substrate. In this case, because a liquid insulating resin material is used, the insulating resin material can easily reach the fine details even when the connection portion is miniaturized. This reliably ensures the insulating resin layer's ability to prevent bridging.

[0011] [5] In any of the semiconductor device manufacturing methods described in [1] to [3] above, the step of preparing the bonded assembly may include the steps of preparing a semiconductor member having a semiconductor substrate and a connection portion, and forming an insulating resin layer by attaching a film-like insulating resin material to a main surface of the semiconductor substrate so as to cover the connection portion of the semiconductor member. The insulating resin layer is thicker than the height of the connection portion when attached to the semiconductor substrate. In this case, the use of a film-like insulating resin layer reduces variation in the height of the formed insulating resin layer, allowing for more appropriate subsequent grinding processing.

[0012] [6] In the semiconductor device manufacturing method of [4] or [5] above, the step of preparing the bonded body may further include a step of curing the insulating resin layer of the bonded body before the grinding step. When a liquid insulating resin material is used, this curing process can semi-cure the material, making it possible to reliably perform grinding of the insulating resin layer. Even when a film-like insulating resin material is used, the material may be viscous and soft. In such cases, performing the curing process makes it possible to reliably perform grinding of the insulating resin layer. Note that the curing process here is sufficient as long as the material is hardened to an extent that cutting can be performed, and does not necessarily have to be completely hardened.

[0013] [7] In the method for manufacturing a semiconductor device according to any one of the above [1] to [6], the grinding step preferably uses at least one of a grinder, a surface planer, and a CMP device to grind the insulating resin layer. In this case, the insulating resin layer can be more reliably ground.

[0014] [8] In the method for manufacturing a semiconductor device according to any one of the above [1] to [7], the insulating resin layer may contain an epoxy resin, a curing agent, and an inorganic filler.

[0015] [9] In the method for manufacturing a semiconductor device according to any one of the above [1] to [7], the insulating resin layer may contain an epoxy resin, a curing agent, and a fluxing agent.

[0016]

[10] The method for manufacturing a semiconductor device according to any one of [1] to [9] above may further include the steps of: grinding the insulating resin layer and then singulating the bonded body into a plurality of semiconductor chips; and mounting at least one of the plurality of semiconductor chips on a substrate.

[0017]

[11] In the semiconductor device manufacturing method of

[10] above, the substrate may be provided with terminals to be connected to the connection portions of the bonded body, and the terminals may be surface-treated for connection to the solder of the connection portions. In the manufacturing method of the present disclosure, grinding is performed to expose the surfaces of the connection portions of the bonded body, and by performing a predetermined surface treatment on the terminals of the receiving substrate, it is possible to more reliably connect the connection portions (bumps, for example, solder bumps) to the terminals. Examples of such surface treatments include, but are not limited to, NiAu treatment and OSP (organic solderability preservatives).

[0018]

[12] In the method for manufacturing a semiconductor device according to the above

[10] or

[11] , the substrate may be a semiconductor wafer having a separate connection portion, and in the mounting step, the connection portion of at least one semiconductor chip may be connected to the separate connection portion of the semiconductor wafer. In this case, the method for manufacturing a semiconductor device according to the present disclosure may be applied to a so-called Chip on Wafer (CoW) to achieve thinning and miniaturization of the semiconductor device.

[0019]

[13] The method for manufacturing a semiconductor device according to any one of [1] to [9] above may further include a step of bonding the first semiconductor wafer, which is the bonded body after grinding the insulating resin layer, to a second semiconductor wafer having another connecting portion. In the bonding step, the connecting portion of the first semiconductor wafer may be connected to another connecting portion of the second semiconductor wafer. In this case, the method for manufacturing a semiconductor device according to the present disclosure may be applied to a so-called wafer-on-wafer (WoW) process, thereby enabling the semiconductor device to be thinned and miniaturized.

[0020]

[14] In another aspect, the present disclosure provides an insulating resin material for use in forming an insulating resin layer in a method for manufacturing a semiconductor device, the method including the steps of: preparing a bonded body having a semiconductor substrate, a connection portion provided on a main surface of the semiconductor substrate, and an insulating resin layer provided on the main surface of the semiconductor substrate so as to cover the connection portion; and grinding the insulating resin layer of the bonded body so as to expose a surface of the connection portion.

[0021] According to the present disclosure, the manufacturing yield of semiconductor devices can be improved.

[0022] FIG. 1 is a schematic cross-sectional view showing an example of a method for manufacturing a semiconductor device. FIG. 2 is a schematic cross-sectional view showing an example of a method for manufacturing a semiconductor device. FIG. 3 is a schematic cross-sectional view showing an example of a method for manufacturing a semiconductor device. FIGS. 4(a) to 4(d) are cross-sectional views showing a case where the semiconductor device manufacturing method according to this embodiment is applied to CoW (first modified example). FIGS. 5(a) to 5(c) are cross-sectional views showing a case where the semiconductor device manufacturing method according to this embodiment is applied to WoW (second modified example).

[0023] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In the following description, the same or equivalent parts will be denoted by the same reference numerals, and duplicate explanations will be omitted. Furthermore, unless otherwise specified, positional relationships such as up, down, left, and right will be based on the positional relationships shown in the drawings. Furthermore, the dimensional ratios of the drawings are not limited to those shown in the drawings.

[0024] In this specification, the term "layer" includes not only a structure having a shape formed over the entire surface when observed in a plan view, but also a structure having a shape formed on a portion thereof. In this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes as long as the intended effect of the process is achieved.

[0025] In this specification, numerical ranges indicated using "to" indicate ranges that include the numerical values ​​before and after "to" as the minimum and maximum values, respectively. In numerical ranges described in stages in this specification, the upper or lower limit of a numerical range in one stage may be replaced with the upper or lower limit of a numerical range in another stage. In numerical ranges described in this specification, the upper or lower limit of the numerical range may be replaced with a value shown in the examples.

[0026] A method for manufacturing a semiconductor device according to this embodiment will be described with reference to Figures 1 to 3. Figures 1, 2 and 3 are schematic cross-sectional views sequentially illustrating the method for manufacturing a semiconductor device.

[0027] 1A, a semiconductor member 10 is prepared, which includes a semiconductor substrate 11 and a plurality of connection terminals 12 and a plurality of bumps 13 provided on a main surface 11a of the semiconductor substrate 11. The semiconductor substrate 11 is, for example, an elemental semiconductor composed of the same type of element, such as silicon or germanium, or a semiconductor substrate including a compound semiconductor, such as gallium arsenide or indium phosphide. In this embodiment, the semiconductor substrate 11 is described as a semiconductor wafer, but the semiconductor substrate 11 may also be a semiconductor chip. The thickness of the semiconductor substrate 11 is, for example, 10 μm to 800 μm.

[0028] Each of the bumps 13 is provided on a corresponding connection terminal 12. The connection terminals 12 and the bumps 13 can be, for example, metal layers containing one or more metals selected from gold, silver, copper, solder, nickel, tin, and lead. The main component of the solder may be, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, or tin-silver-copper. The metal constituting the connection terminals 12 and the bumps 13 may be gold, silver, copper, or solder, or may be silver, copper, or solder, or may be solder. The connection terminals 12 and the bumps 13 may be metal layers formed by plating. The connection terminals 12 and the bumps 13 may be a single layer or may include multiple metal layers. As an example, the connection terminals 12 may be copper pillars, and the bumps 13 may be solder bumps.

[0029] The diameter of each of the connection terminals 12 and the bumps 13 may be, for example, 20 μm or less, or 10 μm or less. The overall height of the connection portion 14 including both the connection terminals 12 and the bumps 13 may be, for example, 20 μm or less, 15 μm or less, or 10 μm or less. The pitch (meaning the center pitch) between adjacent connection portions 14 may be, for example, 20 μm or less, or 15 μm or less. Such connection portions 14 may be so-called microbumps.

[0030] Next, after the semiconductor member 10 is prepared, a liquid insulating resin material is prepared. The liquid insulating resin material contains, for example, an epoxy resin, a curing agent, and an inorganic filler. The liquid insulating resin material may be an underfill material, and a detailed configuration example will be described later. The liquid insulating resin material is then applied to the semiconductor substrate 11 so as to cover the multiple connection terminals 12 and multiple bumps 13 of the semiconductor member 10, forming an insulating resin layer 20 as shown in FIG. 2A. When a liquid insulating resin material is used, the insulating resin material may be applied and spread on the semiconductor substrate 11 by spin coating or the like to cover the connection terminals 12 and bumps 13, and then cured. In this case, the curing process may be, for example, to semi-cure the liquid insulating resin material. The curing here may be thermal curing or light (ultraviolet) curing. As a result of the above, a bonded body 30 is formed in which the insulating resin layer 20 is provided on the main surface 11a of the semiconductor substrate 11 so as to cover the connection portions 14. The bonded body 30 includes a semiconductor substrate 11 , a plurality of connecting portions 14 and an insulating resin layer 20 .

[0031] The insulating resin layer 20 is configured to be thicker than the height of the connecting portion 14 at least after it is provided (applied and spread) on the semiconductor substrate 11 (or after it is cured, if cured). The insulating resin layer 20 may have a thickness that is 1.2 times or more, 1.5 times or more, or even 2 times or more the height of the connecting portion 14 after it is provided on the semiconductor substrate 11. Furthermore, the insulating resin layer 20 may have a thickness of 30 μm or more, or 20 μm or more after it is provided on the semiconductor substrate 11.

[0032] The formation of the insulating resin layer 20 is not limited to the above method. For example, as shown in FIG. 1B, once the semiconductor member 10 is prepared, a film-like adhesive 21 is prepared. The film-like adhesive 21 is, for example, an insulating adhesive such as NCF (Non-Conductive Film), and contains, for example, an epoxy resin, a curing agent, and a fluxing agent. The film-like adhesive 21 is then attached to the semiconductor substrate 11 so as to cover the multiple connection terminals 12 and multiple bumps 13 of the semiconductor member 10, thereby forming the insulating resin layer 20 shown in FIG. 2A. In this attachment, for example, the semiconductor member 10 and the film-like adhesive 21 are heated to 60 to 100°C and pressurized for 30 seconds to 10 minutes, thereby laminating the film-like adhesive 21 to the semiconductor member 10. The film-like adhesive 21 can be attached to the main surface 11a of the semiconductor substrate 11 by, for example, heat pressing, roll lamination, or vacuum lamination. After the film-like adhesive 21 is attached to the semiconductor substrate 11 and before grinding, the film-like adhesive 21 may be subjected to a curing process to form the insulating resin layer 20. The curing at this time does not completely harden the film-like adhesive 21, but rather lightly hardens it, as long as it is hardened to an extent that it can be ground.

[0033] 1C, the insulating resin layer 20 may be formed by preparing a paste-like insulating resin material 22, applying the insulating resin material 22 onto the main surface 11a of the semiconductor substrate 11, and printing the same with a squeegee S or the like. In this case, the insulating resin layer 20 is also configured to be thicker than the height of the connecting portions 14 after being provided (applied and spread) on the semiconductor substrate 11 (or after being cured, if cured), as shown in FIG.

[0034] Next, as shown in FIGS. 2B and 2C , the insulating resin layer 20 of the bonded assembly 30 including the semiconductor substrate 11, the plurality of connecting portions 14, and the insulating resin layer 20 is ground. As a device C for grinding the insulating resin layer 20, at least one of a grinder, a surface planer, and a CMP (chemical vapor mechanical polishing) device is used to grind the insulating resin layer 20 to a predetermined thickness. A CMP device is preferably used as a method for grinding the insulating resin layer 20. This results in a smooth ground surface. In the process of grinding the insulating resin layer, the insulating resin layer 20 is ground so that the surfaces 13 a of the bumps 13A are exposed from the insulating resin layer 20A. During this grinding, portions of the bumps 13 at the connecting portions 14 may be ground together with the insulating resin layer 20. This more reliably exposes the surfaces 13 a of the bumps 13A from the insulating resin layer.

[0035] 2C, the insulating resin layer 20A is ground to be thinner, and the surfaces 13a of the bumps 13A are exposed. The bonded body 35 (semiconductor wafer) after the insulating resin layer 20A is ground is then diced into a plurality of semiconductor chips (not shown). This makes it possible to easily obtain semiconductor chips provided with minute bumps (microbumps, etc.).

[0036] Next, as shown in FIGS. 3A and 3B, at least one semiconductor chip 40 among the plurality of semiconductor chips is placed on a wiring substrate 45 (substrate), and the semiconductor chip 40 is mounted on the wiring substrate 45 by applying heat and pressure. This results in a semiconductor device 50 in which each bump 13A of the semiconductor chip 40 is connected to a connection terminal 46 (terminal) of the wiring substrate 45, and the semiconductor substrate 11 and the wiring substrate 45 are fixed to each other by an insulating resin layer 20A. The connection terminals 46 of the wiring substrate 45 may be subjected to a surface treatment such as NiAu treatment or OSP treatment before mounting to ensure reliable connection with the bumps 13A. In the OSP treatment, a water-soluble preflux may be applied to perform a rust prevention treatment. Note that if the semiconductor chip 40 has a TSV (Through-Silicon Via) structure, a multi-tiered semiconductor device may be formed by stacking multiple semiconductor chips 40 three-dimensionally and then collectively heating and pressurizing the stacked semiconductor chips 40.

[0037] As described above, in the semiconductor device manufacturing method according to this embodiment, after the connecting portions 14 are covered with the insulating resin layer 20, the insulating resin layer 20 is ground so that the surfaces 13a of the connecting portions 14 (bumps 13) are exposed. This allows the height of the connecting portions 14 and the smoothness of the surfaces 13a of the connecting portions 14 (bumps 13) to be easily adjusted by grinding. The improved smoothness of the surfaces 13a also reduces the likelihood of voids. Furthermore, because the insulating resin layer 20A covers the connecting portions 14, bridging during mounting is also less likely to occur. Therefore, this semiconductor device manufacturing method can improve the manufacturing yield of semiconductor devices even when the connecting portions 14 are miniaturized (in the case of microbumps).

[0038] In the method for manufacturing a semiconductor device according to this embodiment, when grinding the insulating resin layer 20, a part of the connection portion 14 (bump 13) is also ground together with the insulating resin layer 20. By grinding a part of the connection portion 14 (bump 13) in this way, it is possible to reliably improve the uniformity of the height of the connection portion 14 and the smoothness of the surface 13a of the bump 13 by grinding.

[0039] In the method for manufacturing a semiconductor device according to this embodiment, when preparing the bonded body 30, a liquid insulating resin material is applied to the main surface 11a of the semiconductor substrate 11 so as to cover the connection portions 14 of the semiconductor member 10, thereby forming the insulating resin layer 20. Because a liquid insulating resin material is used in this manner, the insulating resin material can easily reach the fine details even when the connection portions 14 are miniaturized. This reliably ensures the insulating resin layers 20, 20A's ability to prevent bridging.

[0040] In the method for manufacturing a semiconductor device according to this embodiment, when preparing the bonded body 30, the insulating resin layer 20 may be formed by attaching a film-like adhesive 21 to the main surface 11a of the semiconductor substrate 11 so as to cover the connection portion 14 of the semiconductor member 10. When such a film-like insulating resin layer is used, it is possible to suppress variations in the height of the insulating resin layer 20 to be formed, and to more appropriately perform the subsequent grinding process.

[0041] In the method for manufacturing a semiconductor device according to this embodiment, when preparing the bonded body 30, the insulating resin layer 20 of the bonded body 30 may be subjected to a curing treatment before grinding. If a liquid insulating resin material is used, this curing treatment can semi-cure the material, making it possible to reliably perform the grinding process on the insulating resin layer 20. Even when a film-like adhesive 21 is used, the material may be viscous and soft. In such cases, performing the curing treatment makes it possible to reliably perform the grinding process on the insulating resin layer 20. Note that the curing at this stage need only be sufficient to allow the grinding process to be performed, and does not have to be complete.

[0042] The method for manufacturing a semiconductor device according to this embodiment is not limited to the above-described method, and may be applied to chip-on-wafer (CoW) or wafer-on-wafer (WoW). Figures 4(a) to 4(d) are cross-sectional views showing a case where the method for manufacturing a semiconductor device according to this embodiment is applied to CoW (first modified example). Figures 5(a) to 5(c) are cross-sectional views showing a case where the method for manufacturing a semiconductor device according to this embodiment is applied to WoW (second modified example).

[0043] In the semiconductor device manufacturing method according to the first modification, a bonded body 35 is prepared and then singulated into multiple semiconductor chips 40 using a method similar to that of the semiconductor device manufacturing method according to the present embodiment (see FIGS. 1, 2, and 3). Specifically, the connection portions 14 are covered with a thick insulating resin layer 20, and the insulating resin layer 20 is then ground to expose the surfaces 13a of the connection portions 14, resulting in the formation of individual bonded bodies 35. This results in the preparation of semiconductor chips 40, as shown in FIG. 4A. A semiconductor wafer 60 (substrate) for mounting the semiconductor chips 40 is also prepared. The semiconductor wafer 60 includes a wafer body 61, wiring 62 provided on the wafer body 61, a passivation film 63 provided on the wafer body 61 and covering the wiring 62, and multiple connection portions 64 provided on the wiring 62. The connection portions 64 are connection terminals formed of a metal such as gold, silver, or copper.

[0044] Next, the semiconductor wafer 60 is placed on a heated stage 70 with the connection portions 64 facing upward. Then, the semiconductor chip 40 is thermocompression bonded to the semiconductor wafer 60 using a bonding tool 71. At this time, the semiconductor chip 40 having the multiple connection portions 14 is thermocompression bonded to the semiconductor wafer 60 having the multiple connection portions 64 with an insulating resin layer 20A interposed therebetween. As a result, a temporary compression-bonded body 55 is formed, as shown in FIG. 4B. The heating temperature of the stage 70 is lower than the melting points of the connection portions 14 (particularly the solder 13) and the connection portions 64, and may be, for example, 60 to 150°C or 70 to 100°C. The temperature of the bonding tool 71 may be, for example, 80 to 350°C or 100 to 170°C. The thermocompression bonding time to form the temporary compression-bonded body 55 may be, for example, 5 seconds or less, 3 seconds or less, or 2 seconds or less.

[0045] 4C, the pre-bonded body 55 on the heated stage 70 is pressurized using a crimping tool 72 while being heated to a temperature equal to or higher than at least one of the melting point of the connection portion 14 (particularly the solder 13) and the melting point of the connection portion 64. The temperature of the crimping tool 72 may be, for example, 180°C or higher, 220°C or higher, or 250°C or higher, or 350°C or lower, 320°C or lower, or 300°C or lower. The heating temperature of the stage 70 during thermocompression bonding by the crimping tool 72 may be 60 to 150°C, or 70 to 100°C. The time for thermocompression bonding by the crimping tool 72 may be, for example, 5 seconds or less, 3 seconds or less, or 2 seconds or less.

[0046] As a result, as shown in FIG. 4D, the connection portions 14 of the semiconductor chip 40 are electrically connected to the connection portions 64 of the semiconductor wafer 60. The electrically connected connection portions 14, 64 are sealed by the cured insulating resin layer 20A. This forms the semiconductor device 50A. Note that the semiconductor device 50A having a plurality of semiconductor chips 40 may be formed by sequentially mounting a plurality of semiconductor chips 40 on a single semiconductor wafer 60 with the insulating resin layer 20A interposed therebetween. Alternatively, the bonded body 35 before being singulated may be used as the semiconductor wafer 60, and the semiconductor chips 40 may be mounted on such a semiconductor wafer 60. The semiconductor device 50A may be further singulated to form individual semiconductor devices.

[0047] Next, a method for manufacturing a semiconductor device according to the second modification will be described. In the method for manufacturing a semiconductor device according to the second modification, a bonded body 35 is prepared using a method similar to the method for manufacturing a semiconductor device according to the present embodiment described above (see FIGS. 1 and 2). That is, the connection portions 14 are covered with a thick insulating resin layer 20, and then the insulating resin layer 20 is ground to obtain the bonded body 35. As shown in FIG. 5A, the bonded body 35 is, for example, a semiconductor wafer 80 having an insulating resin layer 20A. The semiconductor wafer 80 includes a semiconductor substrate 11, multiple connection portions 14 provided on the main surface 11a of the semiconductor substrate 11, and an insulating resin layer 20A provided on the main surface 11a of the semiconductor substrate 11 and covering the multiple connection portions 14. Each connection portion 14 includes a connection terminal 12 and a bump 13. A semiconductor wafer 60 is also prepared for bonding to the semiconductor wafer 80. Similar to the first modification, the semiconductor wafer 60 includes a wafer main body 61, wiring 62, a passivation film 63, and connection portions 64.

[0048] Next, the semiconductor wafer 60 is placed on a heated stage 70 with the connection portions 64 facing upward. Then, a semiconductor wafer 80 is thermocompression bonded to the semiconductor wafer 60 using a bonding tool 74. At this time, the semiconductor wafer 80 having the plurality of connection portions 14 is bonded to the semiconductor wafer 60 having the plurality of connection portions 64 by thermocompression bonding, with an insulating resin layer 20A interposed between them. As a result, a temporary bonded body is formed, as shown in FIG. 5B. The heating temperature of the stage 70 is a temperature lower than the melting points of the connection portions 14 (particularly the solder 13) and the connection portions 64, and may be, for example, 60 to 150°C or 70 to 100°C. The temperature of the bonding tool 74 may be, for example, 80 to 350°C or 100 to 170°C. The thermocompression bonding time to form the temporary bonded body may be, for example, 5 seconds or less, 3 seconds or less, or 2 seconds or less.

[0049] Next, the pre-compression bonded body on the heated stage 70 is pressurized using a crimping tool 75 while being heated to a temperature equal to or higher than at least one of the melting point of the connection portion 14 (particularly the solder 13) and the melting point of the connection portion 64. The temperature of the crimping tool 75 may be, for example, 180°C or higher, 220°C or higher, or 250°C or higher, and may be 350°C or lower, 320°C or lower, or 300°C or lower. The heating temperature of the stage 70 during thermocompression bonding by the crimping tool 75 may be 60 to 150°C, or 70 to 100°C. The time for thermocompression bonding by the crimping tool 72 may be, for example, 5 seconds or less, 3 seconds or less, or 2 seconds or less.

[0050] As a result, as shown in Figure 5(c), the connection portions 14 of the semiconductor wafer 80 are electrically connected to the connection portions 64 of the semiconductor wafer 60. The electrically connected connection portions 14, 64 are sealed with the cured insulating resin layer 20A. This forms the semiconductor device 50B. Note that such semiconductor device 50B may be diced into individual semiconductor devices.

[0051] In the semiconductor device manufacturing method according to these modifications, the connecting portions 14 are covered with the insulating resin layer 20, and then the insulating resin layer 20 is ground to expose the surfaces 13a of the connecting portions 14 (bumps 13). This allows the height of the connecting portions 14 and the smoothness of the surfaces 13a of the connecting portions 14 (bumps 13) to be easily adjusted by grinding. The improved smoothness of the surfaces 13a also reduces the likelihood of voids. Furthermore, because the insulating resin layer 20A covers the connecting portions 14, bridging during mounting is also less likely to occur. Therefore, the semiconductor device manufacturing method according to these modifications can also improve the manufacturing yield of the semiconductor devices 50A and 50B, even when the connecting portions 14 are miniaturized (in the case of microbumps). The semiconductor device manufacturing method according to these modifications can also achieve other advantageous effects of the semiconductor device manufacturing method according to the above-described embodiment.

[0052] [Underfill Material] As described above, the underfill material of the present disclosure contains an epoxy resin, a curing agent, and an inorganic filler.

[0053] The type of epoxy resin contained in the underfill material is not particularly limited. The epoxy resin may include an epoxy resin having two epoxy groups per molecule (also called a bifunctional epoxy resin), an epoxy resin having three epoxy groups per molecule (also called a trifunctional epoxy resin), or a combination thereof. In this disclosure, a monomer compound having one epoxy group (epoxy compound) is also referred to as an epoxy resin.

[0054] As long as the underfill material as a whole is liquid at room temperature (25°C, the same applies below), the epoxy resin may be solid or liquid at room temperature, or a combination of both. From the viewpoint of reducing the viscosity of the underfill material, it is preferable to use an epoxy resin that is liquid at room temperature.

[0055] Examples of epoxy resins include bisphenol-type epoxy resins, naphthalene-type epoxy resins, glycidylamine-type epoxy resins, hydrogenated bisphenol-type epoxy resins, alicyclic epoxy resins, alcohol ether-type epoxy resins, cycloaliphatic epoxy resins, fluorene-type epoxy resins, and siloxane-based epoxy resins. The epoxy resins may be used alone or in combination of two or more. Among these, from the viewpoint of fluidity, it is preferable that the epoxy resin contains a bisphenol-type epoxy resin.

[0056] The type of bisphenol epoxy resin is not particularly limited, and examples thereof include bisphenol A epoxy resin, bisphenol F epoxy resin, bisphenol AD ​​epoxy resin, etc. Among the above, from the viewpoint of excellent handleability as an underfill material, the bisphenol epoxy resin is preferably one that is liquid at room temperature, and more preferably bisphenol F epoxy resin that is liquid at room temperature. The bisphenol epoxy resin that is liquid at room temperature may be a synthetic product or a commercially available product.

[0057] When the epoxy resin contains a bisphenol-type epoxy resin, the proportion of the bisphenol-type epoxy resin in the total amount of epoxy resin is not particularly limited and can be selected depending on the desired properties of the underfill material, for example, it may be 5% by mass to 90% by mass, 5% by mass to 75% by mass, or 5% by mass to 60% by mass.

[0058] The content of the epoxy resin relative to the total amount of the underfill material is not particularly limited, but from the viewpoints of viscosity, glass transition temperature, heat resistance, etc., the content of the epoxy resin relative to the total amount of the underfill material is preferably 0.5% by mass to 75% by mass, more preferably 20% by mass to 70% by mass, and even more preferably 25% by mass to 70% by mass.

[0059] The type of curing agent contained in the underfill material is not particularly limited and may be selected depending on the desired properties of the underfill material. Examples of curing agents include amine curing agents, phenolic curing agents, acid anhydride curing agents, polymercaptan curing agents, polyaminoamide curing agents, isocyanate curing agents, and blocked isocyanate curing agents. One type of curing agent may be used alone, or two or more types may be used in combination.

[0060] The curing agent used in the underfill material is preferably liquid at room temperature, and from the viewpoints of low water absorption and adhesion to the substrate, an amine curing agent is preferable. Examples of amine curing agents include aliphatic amine compounds such as diethylenetriamine, triethylenetetramine, n-propylamine, 2-hydroxyethylaminopropylamine, cyclohexylamine, and 4,4'-diamino-dicyclohexylmethane; aromatic amine compounds such as diethyltoluenediamine, 3,3'-diethyl-4,4'-diaminodiphenylmethane, and 2-methylaniline; imidazole compounds such as imidazole, 2-methylimidazole, 2-ethylimidazole, and 2-isopropylimidazole; and imidazoline compounds such as imidazoline, 2-methylimidazoline, and 2-ethylimidazoline. Among these, aromatic amine compounds are preferred as the amine curing agent.

[0061] From the viewpoint of minimizing unreacted amounts of each, the compounding ratio of the epoxy resin and the curing agent is preferably set so that the ratio of the number of functional groups of the curing agent (active hydrogens in the case of an amine curing agent) to the number of epoxy groups of the epoxy resin (number of functional groups of the curing agent / number of epoxy groups of the epoxy resin) is within the range of 0.5 to 2.0, more preferably within the range of 0.6 to 1.3, and even more preferably within the range of 0.8 to 1.2.

[0062] The type of inorganic filler contained in the underfill material is not particularly limited. Specifically, inorganic materials such as silica, alumina, calcium carbonate, zirconium silicate, calcium silicate, silicon nitride, aluminum nitride, boron nitride, beryllia, zirconia, zircon, fosterite, steatite, spinel, mullite, titania, talc, clay, and mica can be used. Among the above inorganic fillers, silica is preferred from the viewpoint of reducing the thermal expansion coefficient, and alumina is preferred from the viewpoint of improving thermal conductivity. The inorganic fillers may be used alone or in combination of two or more.

[0063] In addition to the components described above, the underfill material may contain various additives such as a curing accelerator, a stress relief agent, a coupling agent, a colorant, etc. In addition to the additives exemplified below, the underfill material may also contain various additives known in the art as needed.

[0064] 10...semiconductor member, 11...semiconductor substrate, 11a...main surface, 12...connection terminal, 13, 13A...bump, 13a...surface, 14, 64...connection portion, 20, 20A...insulating resin layer, 21...film-like adhesive, 30, 35...bonded body, 40...semiconductor chip, 45...wiring board (substrate), 46...connection terminal, 50, 50A, 50B...semiconductor device, 60...semiconductor wafer (substrate), 80...semiconductor wafer.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of: preparing a bonded body having a semiconductor substrate, a connection portion provided on a main surface of the semiconductor substrate, and an insulating resin layer provided on the main surface of the semiconductor substrate so as to cover the connection portion; and grinding the insulating resin layer of the bonded body, wherein in the grinding step, the insulating resin layer is ground so as to expose a surface of the connection portion.

2. The method for manufacturing a semiconductor device according to claim 1, wherein in the grinding step, a part of the connection portion is ground together with the insulating resin layer.

3. A method for manufacturing a semiconductor device according to claim 1 or 2, wherein the connection portion includes a connection terminal provided on the main surface of the semiconductor substrate and a bump provided on the connection terminal, and in the grinding step, a portion of the bump is ground so that a surface of the bump is exposed from the insulating resin layer.

4. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the step of preparing the bonded body includes the steps of: preparing a semiconductor member having the semiconductor substrate and the connection portion; and providing a liquid insulating resin material on the main surface of the semiconductor substrate so as to cover the connection portion of the semiconductor member to form the insulating resin layer, and the insulating resin layer is thicker than the height of the connection portion when provided on the semiconductor substrate.

5. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the step of preparing the bonded body includes the steps of: preparing a semiconductor member having the semiconductor substrate and the connection portion; and attaching a film-like insulating resin material to the main surface of the semiconductor substrate so as to cover the connection portion of the semiconductor member to form the insulating resin layer, and the insulating resin layer is thicker than the height of the connection portion when attached to the semiconductor substrate.

6. The method for manufacturing a semiconductor device according to claim 4 or 5, wherein the step of preparing the bonded body further includes a step of performing a hardening treatment on the insulating resin layer of the bonded body before the grinding step.

7. The method for manufacturing a semiconductor device according to any one of claims 1 to 6, wherein in the grinding step, the insulating resin layer is ground using at least one of a grinder, a surface planer, and a CMP device.

8. The method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein the insulating resin layer contains an epoxy resin, a hardener, and an inorganic filler.

9. The method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein the insulating resin layer contains an epoxy resin, a hardener, and a flux agent.

10. A method for manufacturing a semiconductor device according to any one of claims 1 to 9, further comprising the steps of: dividing the bonded body into a plurality of semiconductor chips after grinding the insulating resin layer; and mounting at least one of the plurality of semiconductor chips on a substrate.

11. The method for manufacturing a semiconductor device according to claim 10, wherein the substrate is provided with a terminal to be connected to the connection portion of the joint, and the terminal is subjected to a surface treatment for connection to the solder of the connection portion.

12. The method for manufacturing a semiconductor device according to claim 10 or 11, wherein the substrate is a semiconductor wafer having another connection portion, and in the mounting step, the connection portion of the at least one semiconductor chip is connected to the other connection portion of the semiconductor wafer.

13. A method for manufacturing a semiconductor device according to any one of claims 1 to 9, further comprising a step of bonding the first semiconductor wafer, which is the bonded body after the insulating resin layer has been ground, to a second semiconductor wafer having another connecting portion, wherein in the bonding step, the connecting portion of the first semiconductor wafer is connected to the other connecting portion of the second semiconductor wafer.

14. An insulating resin material used to form an insulating resin layer in a manufacturing method for a semiconductor device, the method comprising the steps of: preparing a bonded body having a semiconductor substrate, a connection portion provided on a main surface of the semiconductor substrate, and an insulating resin layer provided on the main surface of the semiconductor substrate so as to cover the connection portion; and grinding the insulating resin layer of the bonded body so as to expose a surface of the connection portion.

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