Smart IC substrate, smart IC module, and IC card comprising same

Abstract

A smart IC substrate according to an embodiment of the present invention includes a substrate including a first surface and a second surface opposite the first surface; and a conductive pattern part disposed on the first surface of the substrate, wherein the conductive pattern part includes a plurality of conductive patterns separated from each other by separation regions, and the separation regions between the plurality of conductive patterns include a first region having a first width and a second region having a second width different from the first width.

Description

Smart IC substrate, smart IC module and IC card including the same

[0001] The present invention relates to a smart IC substrate, a smart IC module, and an IC card including the same.

[0002] An IC card is a plastic card with an integrated circuit chip capable of storing and processing information. The IC card is equipped with an IC that stores the necessary information. This information is transmitted to a reader in the form of an electrical signal.

[0003] The above IC card is manufactured by inserting a smart IC module into the main body of the card.

[0004] The above smart IC module is classified into a single type or a dual type depending on the arrangement of the metal layers. The single type has the metal layer and plating layer arranged on only one side of the substrate. In addition, the dual type has the metal layer and plating layer arranged on both sides of the substrate.

[0005] Additionally, the smart IC module is categorized into contact, contactless, hybrid, and combi cards depending on how the card is used. The contact card transmits and receives information through physical contact. Furthermore, the contactless card transmits and receives information without physical contact. Furthermore, the hybrid card and combi card include both the contact and contactless functions.

[0006] The IC card may include a fingerprint sensor. Specifically, the IC card may include a fingerprint sensor chip. Accordingly, the IC card may include a fingerprint authentication function.

[0007] Accordingly, the IC card can operate based on whether the fingerprint has been authenticated. However, it may be difficult for the user to externally verify whether the fingerprint has been authenticated. In other words, the user cannot verify whether the fingerprint has been authenticated before connecting the IC card to the reader. This can increase user inconvenience.

[0008] Therefore, a new structure of a smart IC substrate, a smart IC module, and an IC card including the same that can solve the above problems is required.

[0009] As a prior art related to the above smart IC substrate, it is disclosed in Korean Patent Publication No. KR10-2022-0110247.

[0010] The embodiment provides a smart IC module that can easily confirm fingerprint recognition of an IC card.

[0011] A smart IC substrate according to an embodiment comprises a substrate including a first surface and a second surface opposite to the first surface; and a conductive pattern portion disposed on the first surface of the substrate, wherein the conductive pattern portion includes a plurality of conductive patterns spaced apart from each other with a spaced area therebetween, and the spaced area between the plurality of conductive patterns includes a first area having a first width and a second area having a second width different from the first width.

[0012] In addition, the first width is larger than the second width, and the maximum width of the first region is 1.5 times the average width of the second region and 3.5 times the average width of the second region.

[0013] Additionally, the width of the second region is 180 μm to 220 μm.

[0014] Additionally, the smart IC substrate further includes a wiring pattern disposed under the second surface of the substrate, the second surface including a first mounting area where a chip is disposed; and a second mounting area where a light source is disposed.

[0015] In addition, the wiring pattern includes a first wiring pattern connected to at least one of the antenna and fingerprint sensor packages; and a second wiring pattern connected to the light source, wherein the second wiring pattern includes a wiring portion and a pad portion.

[0016] Additionally, the pad portion overlaps the first region in the thickness direction of the substrate.

[0017] Additionally, the pad portion does not overlap the first region in the thickness direction of the substrate.

[0018] In addition, the smart IC substrate further includes a first bonding layer disposed between the first surface of the substrate and the conductive pattern portion; and a second bonding layer disposed between the second surface of the substrate and the wiring pattern, wherein at least one of the first bonding layer and the second bonding layer includes a bead.

[0019] Additionally, the beads comprise at least one of a scattering agent or a colored bead.

[0020] In addition, the first width of the first region is a smart IC substrate that changes in one direction.

[0021] In addition, the smart IC substrate includes a first metal layer disposed on the first bonding layer; a second metal layer disposed on the second bonding layer; a first plating layer disposed on one surface of the first metal layer; a second plating layer disposed on the other surface of the first metal layer; and a third plating layer disposed on one surface of the second metal layer, wherein the conductive pattern includes the first metal layer and the first plating layer, and the wiring pattern includes the second metal layer and the third plating layer.

[0022] Additionally, the smart IC substrate includes a plurality of holes penetrating the substrate, the first bonding layer, and the second bonding layer, and the first metal layer and the second plating layer on the first metal layer are disposed inside the holes.

[0023] Additionally, the smart IC substrate includes a groove or a second hole formed by removing at least one of the substrate, the first bonding layer, and the second bonding layer.

[0024] Additionally, the smart IC substrate includes a via connecting the conductive pattern portion and the second wiring pattern.

[0025] Additionally, the substrate includes a second hole, and the first plating layer is disposed on one surface, a side surface, and the other surface of the first metal layer.

[0026] A smart IC substrate according to an embodiment includes a plurality of conductive patterns. In addition, light emitted from the light source passes through a spaced area between the conductive patterns.

[0027] The above-mentioned separation region includes a first separation region and a second separation region. The first separation region includes a first region and a second region. The width of the first region is greater than the width of the second region.

[0028] The user verifies whether the fingerprint is authenticated by the light or the color of the light emitted from the light source.

[0029] Light emitted from the light source passes through the first region. Accordingly, the amount of light passing through the smart IC substrate increases. Consequently, the light transmittance of the smart IC substrate increases. Consequently, a user can easily identify the light or its color. Consequently, a user can easily verify whether a fingerprint has been authenticated.

[0030] Accordingly, the user can check whether fingerprint authentication is required before connecting the IC card to the reader.

[0031] FIG. 1 is a top view of a first surface of a smart IC substrate according to an embodiment.

[0032] FIG. 2 is a top view of a second surface of a smart IC substrate according to an embodiment.

[0033] Figure 3 is a cross-sectional view taken along area AA' of Figure 2.

[0034] Figure 4 is a cross-sectional view taken along the BB' area of ​​Figure 2.

[0035] Figure 5 is a cross-sectional view taken along the CC' area of ​​Figure 2.

[0036] Figure 6 is an enlarged view of area D of Figure 3.

[0037] Figures 7 to 10 are other cross-sectional views taken along the AA' area of ​​Figure 2.

[0038] Fig. 11 is a top view of a second side of a smart IC module according to an embodiment.

[0039] Figures 12 to 16 are cross-sectional views showing chips mounted on the smart IC substrates of Figures 3 and 7 to 10.

[0040] Figure 17 is a cross-sectional view taken along the EE' area of ​​Figure 11.

[0041] Figure 18 is a cross-sectional view taken along the FF' area of ​​Figure 11.

[0042] Fig. 19 is an exploded perspective view of a smart IC card according to an embodiment.

[0043] Fig. 20 is a drawing for explaining the combination of a smart IC module according to an embodiment.

[0044] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings. However, the technical concept of the present invention is not limited to the described embodiments, but may be implemented in various different forms. Within the scope of the technical concept of the present invention, one or more of the components of the embodiments may be selectively combined or substituted for use.

[0045] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0046] In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention. In this specification, the singular may also include the plural unless specifically stated in the phrase, and when it is described as “and (and) at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C.

[0047] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only intended to distinguish the components from other components, and are not intended to limit the nature, order, or sequence of the components.

[0048] And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, it may include not only cases where the component is directly connected, coupled or connected to the other component, but also cases where the component is 'connected', 'coupled' or 'connected' by another component between the component and the other component.

[0049] Additionally, when it is described as being formed or disposed "above or below" each component, above or below includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or disposed between the two components.

[0050] Additionally, when expressed as “upper or lower,” it can include the meaning of not only the upward direction but also the downward direction based on one component.

[0051]

[0052] Hereinafter, a smart IC substrate, a smart IC module, and a smart IC card including the same according to an embodiment will be described with reference to the drawings.

[0053]

[0054] Referring to FIGS. 1 to 10, the smart IC substrate (1000) includes a substrate (100), a bonding layer, a metal layer, a plating layer, and a wiring pattern.

[0055] The above-mentioned substrate (100) includes a first side (1S) and a second side (2S). The first side (1S) and the second side (2S) are opposite sides.

[0056] The first surface (1S) is a contact surface. Specifically, the first surface (1S) is a surface that can recognize information of the smart IC module through direct or indirect contact. In addition, the second surface (2S) is a bonding surface. Specifically, the second surface (2S) is a surface on which a chip is mounted and bonded to the main body of the IC card.

[0057] The above substrate (100) comprises a resin material. The substrate (100) may comprise a prepreg comprising glass fibers. Specifically, the substrate (100) may comprise a material in which glass fibers and a silicon-based filler (Si filler) are dispersed within an epoxy resin.

[0058] Alternatively, the substrate (100) may be rigid or flexible. For example, the substrate (100) may include glass or plastic. Specifically, the substrate (100) may include chemically strengthened / semi-strengthened glass such as soda lime glass or aluminosilicate glass. Alternatively, the substrate (100) may include polyimide (PI), polyethylene terephthalate (PET), propylene glycol (PPG), polycarbonate (PC), or sapphire.

[0059] Alternatively, the substrate (100) may include an optically isotropic film. For example, the substrate (100) may include a cyclic olefin copolymer (COC), a cyclic olefin polymer (COP), an optically isotropic polycarbonate (PC), or an optically isotropic polymethyl methacrylate (PMMA).

[0060] Alternatively, the substrate (100) may be bent while having a partially curved surface. That is, the substrate (100) may be bent while having a partially flat surface and a partially curved surface. In detail, the ends of the substrate (100) may be bent while having a curved surface. Alternatively, the substrate (100) may be bent while having a random curvature.

[0061] The substrate (100) may have a thickness within a set range. For example, the thickness of the substrate (100) may be 80 μm to 150 μm, 90 μm to 140 μm, or 100 μm to 120 μm. When the thickness of the substrate (100) is less than 80 μm, the support capacity of the substrate (100) decreases. In addition, when the thickness of the substrate (100) exceeds 150 μm, the thickness of the smart IC substrate may increase. As a result, the size of the IC card increases.

[0062] The above substrate (100) has insulating properties. As a result, the substrate (100) prevents short circuits between circuits. In addition, the substrate (100) serves to support the circuit during the process of forming the circuit.

[0063] The above-described substrate (100) includes a plurality of mounting areas. Specifically, the second surface (2S) includes a plurality of mounting areas. The mounting areas may include a first mounting area (MR1) and a second mounting area (MR2). The second mounting area (MR2) may include at least one mounting area.

[0064] Different electronic components are placed on the first mounting area (MR1) and the second chip mounting area (MR2). For example, a chip is placed on the first mounting area (MR1). Specifically, a driver IC is placed on the first mounting area (MR1). In addition, at least one of a light source and an MCLL is placed on the second mounting area (MR2). For example, a light source may be placed on the second mounting area (MR2). Specifically, a light emitting diode (LED) may be placed on the second mounting area (MR2).

[0065] The second mounting area (MR2) is positioned outside the molding area (MA). Accordingly, the light source (600) is also positioned outside the molding area (MA). Accordingly, the transmittance of light emitted from the light source increases.

[0066]

[0067] The above-mentioned substrate (100) includes a hole. In detail, the above-mentioned substrate (100) includes a plurality of holes (H).

[0068] At least one of the plurality of holes is a wire-bonding region. For example, all of the plurality of holes are wire-bonding regions. Alternatively, some of the plurality of holes are wire-bonding regions. The chip (C) and the plating layer are wire-bonded through the hole (H).

[0069] The above hole (H) has a width within a set range. The width of the hole (H) can be defined as the diameter of the hole or the minimum distance between the inner sides of the hole. For example, the width of the hole (H) can be 500 ㎛ to 1000 ㎛, 600 ㎛ to 900 ㎛, or 700 ㎛ to 800 ㎛. When the width of the hole (H) is less than 500 ㎛, wire bonding through the hole (H) becomes difficult. In addition, when the width of the hole (H) exceeds 1000 ㎛, the support capacity of the substrate (100) decreases.

[0070]

[0071] The bonding layer is disposed on the substrate (100). The bonding layer includes a first bonding layer (210) and a second bonding layer (220). The first bonding layer (210) is disposed on the first surface (1S). The second bonding layer (220) is disposed on the second surface (2S).

[0072] At least one of the first bonding layer (210) and the second bonding layer (220) includes a resin material. For example, the bonding of at least one of the first bonding layer (210) and the second bonding layer (220) may include at least one of an epoxy resin, an acrylic resin, and a polyimide resin. In addition, the bonding of at least one of the first bonding layer (210) and the second bonding layer (220) may include at least one additive of natural rubber, a plasticizer, a curing agent, and a phosphorus-based flame retardant. Thereby, the flexibility of the bonding layers (210, 220) is improved.

[0073] The bonding layer (210, 220) may have a thickness within a set range. For example, the thickness of the bonding layer (210, 220) may be 15 μm to 35 μm, 20 μm to 30 μm, or 22 μm to 28 μm. When the thickness of the bonding layer (210, 220) is less than 15 μm, the adhesive strength of the bonding layer is reduced. As a result, the metal layer on the bonding layer may be delaminated. In addition, when the thickness of the bonding layer (210, 220) exceeds 35 μm, the thickness of the smart IC substrate may be increased. As a result, the size of the IC card is increased.

[0074]

[0075] The metal layer is disposed on the substrate (100). The metal layer includes a first metal layer (310) and a second metal layer (320). The first metal layer (310) is disposed on the first surface (1S). The first metal layer (310) is disposed on the first bonding layer (210). The second metal layer (320) is disposed on the second surface (2S). The second metal layer (320) is disposed on the second bonding layer (220).

[0076] The metal layer (310, 320) includes a metal material. For example, the metal layer (310, 320) may include at least one material selected from the group consisting of gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tin (Sn), copper (Cu), and zinc (Zn). Preferably, the metal layer (310, 320) includes copper.

[0077] The metal layer (310, 320) may have a thickness within a set range. For example, the thickness of the metal layer (310, 320) may be 30 µm to 75 µm, 40 µm to 65 µm, or 50 µm to 60 µm. When the thickness of the metal layer (300) is less than 30 µm, the resistance of the metal layer (310, 320) increases. In addition, when the thickness of the metal layer (310, 320) exceeds 75 µm, the thickness of the smart IC substrate may increase. As a result, the size of the IC card increases. In addition, process efficiency may decrease.

[0078] The first metal layer (310) includes a plurality of conductive patterns (P). The conductive patterns (P) are formed by patterning the first metal layer (310). The hole (H) is arranged on at least one of the conductive patterns (P).

[0079] The conductive patterns (P) are arranged on the first surface (1S). The conductive patterns (P) are arranged on the first bonding layer (210). The conductive patterns (P) are arranged on the contact surface.

[0080] Accordingly, the conductive patterns (P) are spaced apart from each other. For example, the conductive patterns are spaced apart by spaced areas (S1, S2).

[0081]

[0082] The plating layer is disposed on the metal layer. The plating layer is divided into multiple plating layers depending on the location. Specifically, the plating layer may include a first plating layer (410), a second plating layer (420), and a third plating layer (430) disposed at different locations.

[0083] The first plating layer (410) is disposed on one surface (311) of the first metal layer (310). The conductive pattern (P) is formed by the first metal layer (310) and the first plating layer (410). The second plating layer (420) is disposed on the other surface (312) of the first metal layer (310). The second plating layer (420) is disposed in an area overlapping the hole (H). The second plating layer (420) may be a first pad portion to which the wire is bonded. The third plating layer (430) is disposed on one surface (321) of the second metal layer (320). The wiring pattern is formed by the second metal layer (320) and the third plating layer (430).

[0084] The first plating layer (410) includes a 1-1 layer (411) and a 1-2 layer (412). The 1-1 layer (411) is in contact with the first metal layer (310). The 1-2 layer (412) is in contact with the 1-1 layer (411). Accordingly, the 1-1 layer (411) is disposed between the first metal layer (310) and the 1-2 layer (412).

[0085] Meanwhile, although not shown in the drawing, an organic coating layer may be disposed on the first-second layer (412). The organic coating layer protects the first-second layer (412). Accordingly, corrosion of the first-second layer (412) can be prevented.

[0086] The second plating layer (420) includes a 2-1 layer (421) and a 2-2 layer (422). The 2-1 layer (421) is in contact with the first metal layer (310). The 2-2 layer (422) is in contact with the 2-1 layer (421). Accordingly, the 2-1 layer (421) is disposed between the first metal layer (310) and the 2-2 layer (422).

[0087] The third plating layer (430) includes a third-1 layer (431) and a third-2 layer (432). The third-1 layer (441) is in contact with the second metal layer (320). The third-2 layer (432) is in contact with the third-1 layer (431). Accordingly, the third-1 layer (431) is disposed between the second metal layer (320) and the third-2 layer (432).

[0088] The first-1 layer (411), the second-1 layer (421), and the third-1 layer (431) may include the same material. In detail, the first-1 layer (411), the second-1 layer (421), and the third-1 layer (431) may include the same metal. For example, the first-1 layer (411), the second-1 layer (421), and the third-1 layer (431) may include nickel.

[0089] The first-second layer (412), the second-second layer (422), and the third-second layer (423) may include the same material. In detail, the first-second layer (412), the second-second layer (422), and the third-second layer (423) may include the same metal. For example, the first-second layer (412), the second-second layer (422), and the third-second layer (423) may include gold (Au) or palladium (Pd).

[0090] The above plating layers may have different sizes. For example, the thicknesses of the first plating layer (410) and the third plating layer (430) may be different from the thickness of the second plating layer (420).

[0091] In detail, the thickness of the second plating layer (410) is greater than the thicknesses of the first plating layer (410) and the third plating layer (430). The thicknesses of the 1-1 layer (411) and the 3-1 layer (431) may be different from the thickness of the 2-1 layer (421). In detail, the thicknesses of the 1-1 layer (411) and the 3-1 layer (431) may be smaller than the thickness of the 2-1 layer (421). In addition, the thicknesses of the 1-2 layer (412) and the 3-2 layer (432) may be different from the thickness of the 2-2 layer (422). In detail, the thicknesses of the 1-2 layer (412) and the 3-2 layer (432) may be smaller than the thickness of the 2-2 layer (422). Accordingly, the thickness of the second plating layer (420) is greater than the thicknesses of the first plating layer (410) and the third plating layer (430).

[0092]

[0093] The above wiring pattern is arranged on the second surface (2S). The above wiring pattern is arranged on the second bonding layer (220). The above wiring pattern is arranged on the bonding surface. The above wiring pattern (500) is formed by the second metal layer (320) and the third plating layer (430).

[0094] The above wiring pattern may include a first wiring pattern (510) and a second wiring pattern (520).

[0095] The IC card includes at least one of an antenna and a fingerprint sensor package. The first wiring pattern (510) may be connected to the fingerprint sensor package. Accordingly, the IC card may recognize a fingerprint. Alternatively, the first wiring pattern (510) may be connected to the antenna and the fingerprint sensor package. Accordingly, the IC card may be operated in a contactless manner.

[0096] The above first wiring pattern (510) may include a first wiring portion (511) and a connection portion (512).

[0097] The first wiring portion (511) may include a first a wiring portion (511a), a first b wiring portion (511b), and a first c wiring portion (511c). The first a wiring portion (511a) and the connection portion (512) are disposed inside the molding area (MA). The first b wiring portion (511b) and the first c wiring portion (511c) are disposed outside the molding area (MA).

[0098] The above 1a wiring portion (511a) and the 1c wiring portion (511c) can be connected by the 1b wiring portion (511b).

[0099] The first a wiring portion (511a), the first b wiring portion (511b), and the first c wiring portion (511c) may have different line widths. For example, the line width of the first b wiring portion (511b) may be larger than the line width of the first a wiring portion (511a). Accordingly, after the molding portion (M) is placed inside the molding area (MA), the wiring portion placed outside the molding portion (M) can be prevented from being damaged.

[0100] The above 1c wiring portion (511c) may be a 1-1 pad portion connected to the pad portion of the antenna or the fingerprint sensor package.

[0101] The line width of the 1c wiring portion (511c) may be larger than the line widths of the 1a wiring portion (511a) and the 1b wiring portion (511b). The 1c wiring portion (511c) is an area connected to the antenna and / or the fingerprint sensor package. For example, the line width (LW) of the 1c wiring portion (511c) may be 2500 ㎛ or more. In detail, the line width (LW) of the 1c wiring portion (511c) may be 2500 ㎛ to 3500 ㎛, 2700 ㎛ to 3450 ㎛, or 3000 ㎛ to 3400 ㎛. Accordingly, the first wiring pattern (510) may be easily connected to the antenna or the pad portion of the fingerprint sensor package.

[0102] The above connecting portion (512) may include a first connecting portion (512a) and a second connecting portion (512b). In detail, at least one of the plurality of wiring patterns may include the first connecting portion (512a) and the second connecting portion (512b).

[0103] The sizes of the first connecting portion (512a) and the second connecting portion (512b) may be smaller than the size of the hole (H). In addition, the size of the second connecting portion (512b) may be smaller than the size of the first c wiring portion (511c). For example, the area of ​​the second connecting portion (512b) may be smaller than the area of ​​the first c wiring portion (511c). Accordingly, the space of the first mounting area (MR1) can be secured widely, and the packaging size can be reduced.

[0104] In addition, the first connection portion (512a) or the second connection portion (512b) is wire-bonded to the chip. That is, the connection portion (512) may be a first-second pad portion bonded to the wire. The connection portion (512) includes two or more connection portions. Therefore, if a problem occurs in the wire bonding at one connection portion, a wire can be bonded to another connection portion. For example, if a problem occurs in the wire bonding of the first connection portion (512a), a wire can be additionally bonded to the second connection portion (512b).

[0105]

[0106] The IC card includes a light source (600). For example, the IC card includes a light-emitting diode. The second wiring pattern (520) can be connected to the light source (600). Accordingly, the IC card can emit light.

[0107] The above second wiring pattern (520) may include a second wiring portion (521) and a second pad portion (522).

[0108] The second wiring portion (521) is arranged inside and outside the second mounting area (MR2). The second pad portion (522) is arranged inside the second mounting area (MR2).

[0109] The line width of the second wiring section (522) may be the same as the line width of the first a wiring section (511a) or the first b wiring section (511b).

[0110] The above second pad portion (522) can be connected to a terminal of the light source (600).

[0111]

[0112] The above smart IC module (2000) includes a light source (600).

[0113] The light source (600) is disposed on the second surface (2S). The light source (600) is disposed on the second bonding layer (220). The light source (600) is disposed on the third circuit pattern (430). In detail, the light source (600) is disposed on the second pad portion (522). The terminal of the light source (600) is electrically connected to the second pad portion (522) by solder.

[0114] The light source (600) emits light in the direction of the first surface (1S). The light travels to the outside of the smart IC substrate (1000) through the separation area. Therefore, a user can perceive the light from the outside.

[0115] The above light source (600) is placed outside the molding area (MA). Accordingly, the light transmittance of the IC card increases.

[0116] The user checks whether the fingerprint has been normally authenticated by the light source (600). For example, if the user's fingerprint has been normally authenticated, light is emitted from the light source. Also, if the user's fingerprint has not been normally authenticated, light is not emitted from the light source.

[0117] Alternatively, if the user's fingerprint is authenticated normally, light of a first color is emitted from the light source. In addition, if the user's fingerprint is not authenticated normally, light of a second color is emitted from the light source.

[0118] Therefore, the user can check whether the fingerprint is authenticated before connecting the IC card to the reader, thereby increasing user convenience.

[0119] If the light transmittance of the IC card is low, the user cannot easily recognize the presence or color of light. Accordingly, the above problem is solved by controlling the size of the separation area of ​​the smart IC substrate.

[0120]

[0121] The conductive patterns (P) are spaced apart by the spaced area. The spaced area includes a plurality of spaced areas. For example, the spaced area may include a first spaced area (S1) and a second spaced area (S2). Specifically, the spaced area includes at least one first spaced area.

[0122] The first separation region (S1) includes a region whose width changes. Accordingly, the first separation region (S1) can be divided into a first region (1A) and a second region (2A) based on the size of the width. The first separation region (S1) includes at least one first region (1A). The width of the first region (1A) is greater than the width of the second region (2A).

[0123] The second separation area (S2) does not include an area whose width changes. The width of the second separation area (2A) may be the same as or similar to the width of the second area (2A).

[0124] The light emitted from the light source (600) can pass through at least one of the first region (1A) and the second region (2A). For example, the light can pass through the first region (1A). Alternatively, the light can pass through the first region (1A) and the second region (2A). The light passes through the first region (1A) more. For example, most of the light passes through the first region (1A).

[0125] The maximum width (W) of the first region (1A) may be at least 1.5 times the average width of the second region (2A). In detail, the maximum width of the first region (1A) may be 1.5 times, 3.5 times, 1.7 times, 2.5 times, or 1.9 times to 2.1 times the average width of the second region (2A).

[0126] If the maximum width of the first region (1A) is less than 1.5 times the average width of the second region (2A), the amount of light passing through the first separation region (S1) decreases. Accordingly, the user cannot easily recognize the light. In addition, if the maximum width of the first region (1A) exceeds 3.5 times the average width of the second region (2A), the area of ​​the conductive pattern (P) decreases. Accordingly, the contact characteristics of the contact portion of the IC card may decrease. In addition, impurities may be introduced through the first region (1A).

[0127] For example, the width of the second region (2A) may be 180 μm to 220 μm, and the width of the first region (1A) satisfies the above condition.

[0128] The path of light emitted from the light source (600) overlaps with the first region (1A). Accordingly, the amount of light passing through the first separation region (S1) can increase.

[0129] That is, the light source (600) overlaps or does not overlap with the first region (1A), and the path of movement of the light overlaps or mostly overlaps with the first region (1A).

[0130]

[0131] A smart IC substrate according to an embodiment includes a plurality of conductive patterns. In addition, light emitted from the light source passes through a spaced area between the conductive patterns.

[0132] The above-mentioned separation region includes a first separation region and a second separation region. The first separation region includes a first region and a second region. The width of the first region is greater than the width of the second region.

[0133] The user verifies whether the fingerprint is authenticated by the light or the color of the light emitted from the light source.

[0134] Light emitted from the light source passes through the first region. Accordingly, the amount of light passing through the smart IC substrate increases. Consequently, the light transmittance of the smart IC substrate increases. Consequently, a user can easily identify the light or its color. Consequently, a user can easily verify whether a fingerprint has been authenticated.

[0135] Accordingly, the user can check whether fingerprint authentication is required before connecting the IC card to the reader.

[0136]

[0137] Referring to FIG. 6, at least one of the first bonding layer (210) and the second bonding layer (220) may include a bead (B).

[0138] The above bead (B) may be a scattering agent. Accordingly, light emitted from the light source (600) may be scattered by the bead (B). Accordingly, the amount of light passing through the first separation area (S1) may increase. Accordingly, the user may easily recognize the light.

[0139] Alternatively, the bead (B) may be a colored bead. Accordingly, light emitted from the light source (600) may pass through the first separation area (S1) in various colors by the bead (B). Accordingly, a user may perceive light of various colors. In addition, light may pass through in a color suitable for the design of the card body. Accordingly, a user may easily perceive the light.

[0140] Alternatively, the bead (B) may include at least one of a scattering agent or a colored bead.

[0141]

[0142] Referring to FIGS. 7 and 8, the first region (1A) can have various widths.

[0143] The width of the first region (1A) can vary as it extends from the bottom to the top.

[0144] Referring to Fig. 7, the width of the first region (1A) may narrow as it extends from the bottom to the top. Accordingly, the first region (1A) has a maximum width at the bottom and a minimum width at the top. The minimum width may be equal to or similar to the width of the second separation region (S2).

[0145] Since the first region (1A) has a maximum width at the bottom, the amount of light passing through the first region (1A) can increase. Accordingly, the brightness of the light can increase. Therefore, the user can easily recognize the light. In addition, since the first region (1A) has a minimum width at the top, the spacing between the conductive patterns can be made uniform. Therefore, the aesthetic appeal of the IC card is improved. In addition, the inflow of impurities through the first region (1A) can be prevented.

[0146] Alternatively, the second pad portion (522) may not overlap with the first separation area (S1). In addition, the light source (600) may not overlap with the first separation area (S1). The light source (600) may emit light laterally. Accordingly, the light emitted from the light source may evenly pass through the first area (1A) and the second area (2A). Accordingly, since the area through which light is transmitted increases, the user may easily recognize the light even from a long distance.

[0147]

[0148] Referring to Fig. 8, the width of the first region (1A) can be widened while extending from the bottom to the top. Therefore, the first region (1A) has a minimum width at the bottom and a maximum width at the top. In addition, the width of the second separation region (S2) can be widened while extending from the bottom to the top. Therefore, the second separation region (S2) has a minimum width at the bottom and a maximum width at the top.

[0149] The inclination angle of the first region (1A) may be different from the inclination angle of the second separation region (S2). Specifically, the inclination angle of the first region (1A) may be greater than the inclination angle of the second separation region (S2).

[0150] The minimum width of the first region (1A) may be equal to or similar to the maximum width of the second separation region (S2).

[0151] Since the first region (1A) has a maximum width at the top, the area of ​​light passing through the first region (1A) can increase. Accordingly, a user can easily recognize the light. In addition, since the first region (1A) has a minimum width at the bottom, the area of ​​the conductive pattern can increase. Accordingly, the electrical characteristics of the conductive pattern can be improved. Accordingly, the operating characteristics of the IC card can be improved.

[0152] The second pad portion (522) may overlap with the first separation area (S1). The second pad portion (522) may overlap with the first area (1A) in whole or in part. In addition, the light source (600) may also overlap with the first area (1A) in whole or in part. In addition, the light source (600) may emit light upward. Accordingly, most of the light passes through the first area (1A). Therefore, since the brightness of the light increases, the user can easily recognize the light even in a dark environment.

[0153]

[0154] Referring to FIGS. 9 and 10, the smart IC substrate may include a groove (G) and a second hole (H2). The groove (G) and the second hole (H2) overlap the first separation area (S1) in the thickness direction of the substrate. The groove (G) and the second hole (H2) overlap the first area (1A).

[0155] The above home (G) can be formed by removing at least one of the substrate (100), the first bonding layer (210), and the second bonding layer (220).

[0156] Referring to Fig. 9, the groove (G) is formed by removing the second bonding layer (220) and the substrate (100). The first bonding layer (510) may be exposed by the groove (G).

[0157] The light source (600) can be accommodated inside the above groove (G). Therefore, the groove (G) can be larger than the size of the light source (600).

[0158] A third metal layer (330) and a fourth plating layer (440) may be arranged inside the groove (G). The third metal layer (330) includes the same material as the first metal layer (310) or the second metal layer (320). The fourth plating layer includes the 4-1 plating layer (441) and the 4-2 plating layer (442). The 4-1 plating layer (441) includes the same material as the 1-1 plating layer, the 2-1 plating layer, and the 3-1 plating layer. In addition, the 4-2 plating layer (442) includes the same material as the 1-2 plating layer, the 2-2 plating layer, and the 3-2 plating layer.

[0159] The light source (600) is placed on the 4-2 plating layer (422). In detail, the terminal of the light source (600) is joined to the 4-2 plating layer (422) by solder. That is, the third metal layer (330) and the fourth plating layer (440) may be pad portions connected to the light source (600).

[0160] The third metal layer (330) is connected to the first metal layer (310) by the first via (V1). In addition, the first metal layer (310) is connected to the second metal layer (320) by the second via (V2). Therefore, the conductive pattern (P) and the second wiring pattern (520) are connected by the second via.

[0161] Accordingly, the light source (600) is connected to an external power source by the third metal layer (320).

[0162] Referring to Fig. 10, the second hole (H2) is formed by removing the second bonding layer (220), the substrate (100), and the first bonding layer (210). The first metal layer (310) can be exposed by the second hole (H2).

[0163] The light source (600) can be accommodated inside the above groove (G). Therefore, the groove (G) can be larger than the size of the light source (600).

[0164] The first plating layer (410) extends to the other surface (312) of the first metal layer through the second hole (H2). The light source (600) is disposed on the first-second plating layer (412). In detail, the terminal of the light source (600) is joined to the first-second plating layer (412) by solder.

[0165] The first metal layer (310) is connected to the second metal layer (320) by the second via (V2).

[0166] Accordingly, the light source (600) is connected to an external power source by the second wiring pattern (520).

[0167] The light source (600) is positioned within the groove or hole. Accordingly, the light source (600) can prevent the smart IC substrate from becoming thicker. In addition, the light source (600) is positioned adjacent to the first separation area (S1). Therefore, the light transmittance increases. Accordingly, the user can easily recognize the light.

[0168]

[0169] Below, a smart IC module according to an embodiment is described with reference to FIGS. 11 to 18.

[0170] Referring to FIGS. 11 to 18, the smart IC module (2000) includes the smart IC substrate (1000), a chip (C), and a light source (600).

[0171] The above chip (C) may include a driver IC. The chip (C) is placed on the first mounting area (MR1).

[0172] The chip (C) is connected to the second plating layer (420) and the third plating layer (430). In detail, the chip (C) and the second plating layer (430) are bonded by a wire (W). Accordingly, the chip (C) and the conductive patterns (P) are electrically connected. In addition, the chip (C) and the third plating layer (430) are bonded by the wire (W). Accordingly, the chip (C) and the antenna and fingerprint sensor package are electrically connected.

[0173] A molding member (M) is placed on the chip (C). The molding member (M) is placed so as to cover the chip (C) and the wire (W). Accordingly, damage to the wire due to external impact can be prevented.

[0174] The light source (600) is placed on the second mounting area (MR2). Alternatively, the light source (600) is placed inside the groove (G) or the second hole (H2).

[0175] The terminal (650) of the light source is connected to the third plating layer (430). In detail, the terminal (650) is joined to the second pad portion (522) by solder.

[0176]

[0177] Hereinafter, an IC card according to an embodiment will be described with reference to FIGS. 19 and 20.

[0178] Referring to FIGS. 19 and 20, the IC card (3000) may include a main body (3100), an upper layer (3210), and a lower layer (3220).

[0179] The above main body (3100) includes a receiving portion (3110). The smart IC module (2000) is placed inside the receiving portion (3110).

[0180] The above IC card can be operated in various modes. For example, the above IC card can be operated as a contact card.

[0181] Alternatively, an antenna pattern (AP) may be arranged on the main body (3100). Specifically, the antenna pattern may be arranged in a coil shape at the edge of the main body (3100). Accordingly, the IC card may be operated as a contactless card, a combination card, or a hybrid card.

[0182] Additionally, a fingerprint sensor package (SP) is placed on the main body. The fingerprint sensor package is connected to the smart IC module (2000).

[0183] The smart IC module (2000) is inserted into the interior of the receiving portion (3110). The smart IC module (2000) and the main body (3100) are bonded by an adhesive layer (3300). As a result, the smart IC module (2000) is inserted into and fixed in the receiving portion (3110).

[0184] The upper layer (3210) is disposed on the upper portion of the main body (3100). The upper layer (3210) may include a transparent material. The upper layer (3210) may include a transparent resin material. The upper layer (3210) may be disposed as at least one layer. That is, the upper layer (3210) may include a plurality of layers.

[0185] The lower layer (3220) is disposed below the main body (3100). A magnetic stripe may be disposed on the lower layer (3220). The lower layer (3220) may include a transparent material. The lower layer (3220) may include a transparent resin material. The lower layer (3220) may be disposed as at least one layer. That is, the lower layer (3220) may include a plurality of layers.

[0186]

[0187] The features, structures, effects, etc. described in the above-described embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to just one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by those skilled in the art to which the embodiments pertain. Therefore, the contents related to such combinations and modifications should be construed as falling within the scope of the present invention.

[0188] In addition, although the above description focuses on embodiments, these are merely examples and do not limit the present invention. Those skilled in the art to which the present invention pertains will appreciate that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the present embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, differences related to such modifications and applications should be interpreted as being included within the scope of the present invention defined in the appended claims.

Claims

1. A substrate comprising a first side and a second side opposite to the first side; and Including a conductive pattern portion arranged on the first surface of the above-described substrate, The conductive pattern portion includes a plurality of conductive patterns spaced apart from each other with a separation region between them, A smart IC substrate wherein the spacing region between the plurality of conductive patterns includes a first region having a first width and a second region having a second width different from the first width.

2. In paragraph 1, The above first width is larger than the above second width, A smart IC substrate wherein the maximum width of the first region is 1.5 times the average width of the second region and 3.5 times the average width of the second region.

3. In paragraph 1, A smart IC substrate having a width of the second region of 180 μm to 220 μm.

4. In paragraph 1, Further comprising a wiring pattern arranged under the second surface of the above description, A smart IC substrate comprising a first mounting area where a chip is placed, and a second mounting area where a light source is placed, wherein the second surface is a first mounting area where a chip is placed.

5. In paragraph 4, The wiring pattern includes a first wiring pattern connected to at least one of the antenna and fingerprint sensor packages; and a second wiring pattern connected to the light source. The above second wiring pattern is a smart IC substrate including a wiring portion and a pad portion.

6. In paragraph 5, A smart IC substrate in which the pad portion overlaps the first region in the thickness direction of the substrate.

7. In paragraph 5, A smart IC substrate in which the pad portion does not overlap the first region and the substrate in the thickness direction.

8. In paragraph 4, A first bonding layer disposed between the first surface of the above-described substrate and the conductive pattern portion; and Further comprising a second bonding layer disposed between the second surface of the above-described substrate and the wiring pattern, A smart IC substrate, wherein at least one of the first bonding layer and the second bonding layer comprises a bead.

9. In paragraph 8, A smart IC substrate comprising at least one of a scattering agent and a colored bead.

10. In paragraph 1, A smart IC substrate in which the first width of the first region changes in one direction.

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