Quantum information processing device and quantum information processing method
The quantum information processing device addresses the challenge of handling a large number of qubits by using a simple structure with a first channel for gate operations and a second channel for holding qubits, enabling efficient and cost-effective quantum information processing with maintained coherence and arbitrary quantum operations.
Patent Information
- Application Number
- PCT/JP2023/033667
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-09-15
- Publication Date
- 2025-03-20
AI Technical Summary
Current technologies face challenges in creating a quantum computer that can handle a large number of qubits without requiring sophisticated manufacturing techniques and expensive semiconductor equipment, while also maintaining coherence and enabling arbitrary quantum operations and error correction.
A quantum information processing device with a first channel for performing predetermined gate operations on sequentially input qubits and a second channel for temporarily holding qubits, allowing for the movement and processing of qubits in a physically simple structure, thereby enabling the handling of a large number of qubits without advanced manufacturing techniques.
The device allows for efficient quantum information processing with a large number of qubits, reducing costs and complexity, while maintaining coherence and enabling arbitrary quantum operations and error correction, thus advancing the capability to perform complex quantum calculations.
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Figure JP2023033667_20032025_PF_FP_ABST
Abstract
Description
Quantum information processing device and quantum information processing method
[0001] The present invention relates to a quantum information processing device and a quantum information processing method.
[0002] Currently, many groups around the world are conducting research aimed at realizing quantum computers. Experiments are being conducted using a variety of physical systems. Regardless of the physical system used, the first requirement for realizing a quantum computer is to create qubits in an isolated system that does not exchange matter or energy with the outside world, and to be able to maintain quantum system coherence for a long period of time. However, in real physical systems, it is impossible to completely avoid decoherence due to interactions with the outside world. In experiments using any physical system, efforts are continuing to suppress qubit decoherence and extend the coherence time. Furthermore, to operate as a quantum computer, it is generally not sufficient to simply create a single qubit; multiple qubits must be configured into a device that meets the following three requirements:
[0003] The first requirement is scalability. One of the reasons quantum computers are capable of high-speed calculations is that by utilizing quantum superposition, the dimension of Hilbert space increases exponentially with the number of qubits. However, it would be meaningless if the costs (time, space, energy, etc.) required to control qubits also increase exponentially. Controlling qubits requires electrical circuits to apply RF pulses and dilution refrigerators to cool qubits to extremely low temperatures, but a mechanism is needed to expand the number of qubits without increasing the costs required for these experimental devices.
[0004] The second requirement is that arbitrary quantum operations must be possible. Like classical computers, quantum computers are composed of basic logic gates, which, in the case of quantum computers, are called quantum gates. Examples include a rotate gate, which is a one-qubit gate, and a controlled NOT gate, which is a two-qubit gate. "Any quantum operation is possible" means that any quantum state can be reached with a finite number of quantum gate operations. It has theoretically been shown that in gate-type quantum computers, any quantum operation is possible by combining a rotate gate and a controlled NOT gate. In other words, if these quantum gate operations can be performed on any quantum bit, any quantum operation will be possible.
[0005] The third requirement is the ability to correct errors. To realize a quantum computer using real quantum bits with decoherence, a function to correct errors (quantum error correction) is required when errors occur due to decoherence. Many algorithms for quantum error correction have been proposed, but all of them involve "initialization" and "readout" to eliminate the entropy caused by decoherence. "Initialization" is an operation that returns a quantum bit superposition state to an initialized pure state when decoherence causes the superposition state to become mixed. "Readout" is an operation that measures the state of the quantum bit with an accuracy allowed by quantum mechanics. Currently, an algorithm called Surface Code is considered to be the most promising method for error correction. Surface Code operates on an array of physical quantum bits arranged in a two-dimensional square lattice.
[0006] In other words, if it is possible to expand the number of quantum bits to two dimensions while using the same device to control quantum bits with long coherence times, and if any quantum bit can be configured as a quantum bit string that allows ``initialization,'' ``rotation gate operation,'' ``controlled NOT gate operation,'' and ``readout,'' it is expected that it will be possible to operate it as a quantum computer.
[0007] Japanese Patent Application Laid-Open No. 2021-027142
[0008] To operate a quantum computer using quantum bits, it is essential not only to pursue the performance of a single quantum bit, but also to construct a device containing a large number of quantum bits that satisfies the three requirements mentioned above. Quantum computation is performed by repeatedly performing gate operations, such as controlled NOT gate operations, on each quantum bit included in the device. In principle, the greater the number of quantum bits that can be handled, the more complex quantum computations can be performed. To integrate a large number of quantum bits, numerous quantum bit array structures have been proposed to date, with quantum bits integrated in two or three dimensions. For example, Patent Document 1 proposes a silicon quantum dot-type two-dimensional quantum bit array structure that can be expanded in two dimensions. This two-dimensional quantum dot array is composed of a two-layer gate structure and can be fabricated using currently established semiconductor manufacturing technology. However, proper formation of the two-layer gate structure requires specific etching and alignment conditions, which necessitates advanced manufacturing technology and expensive semiconductor manufacturing equipment.
[0009] An object of the present invention is to solve the above problems and to provide a quantum information processing device and a quantum information processing method that can handle a large number of quantum bits without using advanced manufacturing techniques or expensive semiconductor manufacturing equipment.
[0010] The quantum information processing device of the present invention is a quantum information processing device in which quantum bits are movable, and is configured as a quantum information processing device characterized by having a first channel that performs a predetermined gate operation on quantum bits that are sequentially input to gate electrodes of the quantum information processing device, and a second channel that temporarily holds the quantum bits on which the predetermined gate operation is performed.
[0011] According to the present invention, it is possible to handle a large number of quantum bits without using advanced manufacturing techniques and expensive semiconductor manufacturing equipment.
[0012] FIG. 1 is a three-dimensional bird's-eye view showing the structure of a quantum information processing device in the present embodiment; FIG. 2 is an electrical circuit diagram of a quantum information processing device in the present embodiment; FIG. 3 is a quantum circuit diagram showing quantum computation of Example 1; FIG. 4 is an electrical circuit diagram showing the quantum computation method of Example 1; FIG. 5 is an electrical circuit diagram showing the quantum computation method of Example 1; FIG. 6 is an electrical circuit diagram showing the quantum computation method of Example 1; FIG. 7 is an electrical circuit diagram showing the quantum computation method of Example 1; FIG. 8 is an electrical circuit diagram showing the quantum computation method of Example 1; Fig. 1 is an electrical circuit diagram showing a quantum computing method according to Example 2. Fig. 2 is an electrical circuit diagram showing a quantum computing method according to Example 2. Fig. 3 is an electrical circuit diagram showing a quantum computing method according to Example 2. Fig. 4 is an electrical circuit diagram showing a quantum computing method according to Example 2. Fig. 5 is a flowchart of operations on quantum bits. Fig. 6 is an electrical circuit diagram in which a plurality of delay lines are arranged in a row. Fig. 7 is an electrical circuit diagram in which a plurality of auxiliary quantum bit supply lines are arranged in a row.
[0013] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The examples are illustrative for explaining the present invention, and appropriate omissions and simplifications have been made for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural. The position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc., in order to facilitate understanding of the invention. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.
[0014] When there are multiple components with the same or similar functions, they may be described using the same reference numeral with different subscripts. When there is no need to distinguish between these multiple components, the subscripts may be omitted.
[0015] The structure of a quantum information processing device used in quantum information processing and a method for controlling the same will be described below.
[0016] FIG. 1 shows a three-dimensional bird's-eye view illustrating the structure of a quantum information processing device. In the quantum information processing device shown in FIG. 1, a semiconductor (e.g., silicon) channel 102 is formed on an insulator layer 101. Quantum dots 103 can be formed in the channel by controlling the electrostatic potential using a gate electrode, which will be described later. Reservoir 104, reservoir 105, and output 106 serve as terminals for inputting and outputting electrons to and from the channel 102. N-type regions are formed in the reservoir 104, reservoir 105, and output 106 by ion implantation. A source 107 and a drain 108 serve as terminals for inputting and outputting holes to and from the channel 102. P-type regions are formed in the source 107 and drain 108 by ion implantation.
[0017] A single layer of gate electrodes 111 to 133 is formed on the channel 102. By applying a voltage to the gate electrodes 111 to 133, the electrostatic potential of electrons in the channel 102 directly below the gate electrodes 111 to 133 can be controlled. By changing the electrostatic potential below the gate electrodes 112, 114, 116, 118, 120, 122, 124, 127, 129, and 132, the number of electrons in the quantum dots 103 formed directly below can be controlled. By changing the electrostatic potential below the gate electrodes 111, 113, 115, 117, 119, 121, 123, 125, 126, 128, 130, 131, and 133, electrons can be confined in the quantum dots 103 or moved from one quantum dot 103 to another.
[0018] FIG. 2 shows an electrical circuit diagram corresponding to the three-dimensional bird's-eye view of FIG. 1. Electrons are input from reservoirs 104 and 105 and output from output 106. By controlling the voltage applied to the gate electrode array and moving the position where the electrostatic potential is at a minimum in the direction of the arrow, the electrons also move while retaining their spin information. This type of operation is called a shuttle operation. In the following, the side where reservoir 104 or reservoir 105 where electrons are input is located may be referred to as the upstream side, and the side where output 106 where electrons are output is located may be referred to as the downstream side.
[0019] The channel 102 is composed of two lines in the planar direction of the insulator layer 101. In Fig. 2, the upper line is composed of a calculation line 201 that connects the channel 102 from the reservoir 104 to the output 106. In Fig. 2, the lower line is composed of a delay line 202 for temporarily holding electrons and an auxiliary quantum bit supply line 203 for supplying an auxiliary quantum bit required for quantum bit measurement from the reservoir 105. The quantum dot 103 at the most downstream of the calculation line 201 is provided with a source 107 and a drain 108, and the number of electrons contained in the quantum dot 103 can be measured by a hole current 204.
[0020] Next, a basic method for performing quantum computation in a quantum information processor will be described. FIG. 24 shows a flowchart of operations on quantum bits. In quantum computation, multiple quantum bits are generated sequentially, and operations are performed on each quantum bit in a similar manner. The quantum information processor first inputs electrons from the reservoir 104 and then places them in the quantum dot below the gate electrode 112 (step 2401). The quantum information processor resets the number of electrons to one and then initializes the electron spin, thereby generating a quantum bit with a fixed spin state (step 2402). The quantum information processor shuttles the quantum bit downstream, to the right in FIG. 2 (step 2403). When the electrons below the gate electrode 112 run out, a new quantum bit is generated sequentially, and steps 2401 to 2403 are repeated.
[0021] The quantum information processing device performs quantum gate operations on the quantum bits that have moved downstream below the gate electrodes 116 and 118 (steps 2404 to 2408).
[0022] Micromagnets 134 are disposed above the gate electrodes 116 and 118, and the strength of the static magnetic field applied to the quantum bits under the gate electrodes 116 and 118 is different from that of the quantum bits under the other gate electrodes. Therefore, the quantum bits under the gate electrodes 116 and 118 have their own spin resonance frequencies, and the spins of the quantum bits under the gate electrodes 116 and 118 can be individually controlled even when an RF pulse is applied to the entire quantum information processing device.
[0023] In the following, since gate operations are performed while sequentially moving quantum bits, quantum gate operations for one quantum bit, quantum gate operations for two quantum bits, and quantum gate operations for more quantum bits will be described as examples.
[0024] First, the quantum information processing device determines whether a gate operation for one quantum bit is necessary to create a predetermined quantum state (step 2404). If the quantum information processing device determines that a gate operation for one quantum bit is necessary (step 2404; Yes), it performs a gate operation on the quantum bit that has moved under gate electrode 116 (step 2405).
[0025] After making the determination in step 2404, the quantum information processing device determines whether gate operations are necessary for the quantum bit that has moved below gate electrode 118 and the quantum bit that has next moved below gate electrode 116 (i.e., gate operations for two quantum bits) (step 2406). If the quantum information processing device determines that gate operations are necessary for two quantum bits (step 2406; Yes), it performs gate operations on the quantum bits that have now moved below gate electrode 116 and below gate electrode 118, respectively (step 2407).
[0026] After making the determinations in steps 2404 and 2406, the quantum information processing device further determines whether gate operations are necessary for the quantum bits that have moved under gate electrode 118 and gate electrode 116, as well as the quantum bits that are moving from under gate electrode 112 (i.e., gate operations for quantum bits of two or more quantum bits) (step 2408).
[0027] If the quantum information processing device determines that gate operations are required for two or more quantum bits (step 2408; Yes), it moves the quantum bit that has moved below gate electrode 116 to delay line 202 (step 2409), and moves the quantum bit that is moving from below gate electrode 112 to below gate electrode 116 (step 2410). After performing the control in step 2410, the process returns to step 2404, and the quantum information processing device repeatedly performs gate operations on the quantum bits that are sequentially moved.
[0028] As explained in step 2409, if it is desired to temporarily hold the quantum bits without moving them in the downstream direction, the quantum bits are moved to delay line 202. Then, the quantum information processing device can change the order in which the quantum bits are arranged, and arrange the two selected quantum bits under gate electrodes 116 and 118. This allows a two-qubit gate operation to be performed between the two selected quantum bits.
[0029] If the quantum information processing device determines that gate operations for two or more quantum bits are not required (step 2408; No), it moves the quantum bits that have been moved under gate electrode 116 to under gate electrode 118 (step 2411).
[0030] The quantum information processing device determines whether a gate operation is required for the quantum bit that has been moved under the gate electrode 118 (step 2412). If the quantum information processing device determines that a gate operation is required for the quantum bit that has been moved under the gate electrode 118 (step 2412; Yes), it executes a gate operation for the quantum bit (step 2413).
[0031] After making the determination in step 2412, the quantum information processing device determines whether gate operations are required for the quantum bit that has moved below gate electrode 118 and the quantum bit that has next moved below gate electrode 116 (i.e., quantum gate operations for the quantum bits above) (step 2414). If the quantum information processing device determines that quantum gate operations are required for the quantum bits above (step 2414; Yes), it performs gate operations on the quantum bits that have now moved below gate electrode 116 and below gate electrode 118, respectively (step 2415).
[0032] After making the determination in step 2414, the quantum information processing device moves the quantum bit under gate electrode 118 to under gate electrode 120 (step 2416). Finally, the quantum information processing device performs spin-charge conversion of the quantum bit moved under gate electrode 120, and reads out the spin state of the quantum bit (step 2417).
[0033] Step 2417 will now be described. The quantum information processing device uses the auxiliary quantum bit supply line 203 to read out the spin state of the quantum bit that has moved below the gate electrode 120. The quantum information processing device inputs electrons from the reservoir 105 and initializes the input electrons below the gate electrode 132 to generate an auxiliary quantum bit. The auxiliary quantum bit is a quantum bit for measuring the spin of the quantum bit that has moved below the gate electrode 120. The quantum information processing device uses the generated auxiliary quantum bit to perform spin-charge conversion of the quantum bit below the gate electrode 120. As a result, the number of electrons below the gate electrode 122 changes to one or two depending on the spin state.
[0034] When the quantum information processing device performs the control in step 2417, it moves the electrons under the gate electrode 122 directly to under the gate electrode 124 (step 2418). In the quantum information processing device, a bias voltage is applied between the source 107 and the drain 108, causing a hole current to flow. Since the electrostatic potential changes depending on the number of electrons under the gate electrode 124, the magnitude of the hole current 204 also changes at the same time. This makes it possible to read out the number of electrons (charge) under the gate electrode 124, and therefore the spin state of the quantum bit under the gate electrode 120 (step 2419).
[0035] As described above, in the quantum information processing device, initialized quantum bits are generated sequentially, and quantum entanglement can be formed by operating a two-qubit gate. This allows for quantum computations requiring a large number of quantum bits to be performed. Meanwhile, the channel 102 is composed of two lines. Therefore, the gate electrodes can be extended to the outside of the insulator layer 101 on each line, eliminating the need for three-dimensional contacts or the provision of two gate electrodes. As a result, a quantum bit array capable of performing information processing using a large number of quantum bits can be provided with a compact device size.
[0036] Furthermore, a delay line 202 is used to select a quantum bit for performing a two-qubit gate operation, and this delay line 202 can have various configurations. The more quantum bits included in the delay line, the more quantum bits it can hold, and the more quantum bits it can perform two-qubit gate operations between quantum bits that were far apart at the time of initialization. Multiple delay lines 202 may also be arranged side by side. For example, as shown in FIG. 25 , a delay line 202a may be provided that is configured with multiple loops (two loops in this example). Such a configuration allows for multiple loops to be configured, increasing the degree of freedom in the gate control pattern for the quantum bits and enabling more flexible rearrangement of the quantum bits.
[0037] However, since the process from initialization to readout of the quantum bits must be completed within the coherence time that can maintain the spin state of the quantum bits, an upper limit is set for the number of quantum bits and the number of loops in the delay line 202.
[0038] Examples of the present invention will be described below with reference to the accompanying drawings. However, the present invention should not be construed as being limited to the following embodiments. Those skilled in the art will readily understand that the specific configuration can be modified without departing from the spirit or scope of the present invention. (Example 1) A method for generating a four-qubit GHZ state using a quantum information processing device will be described. Figure 3 shows a quantum circuit diagram constituting the quantum information processing device 100. In this example, quantum bits 301 to 304 are used. The quantum circuit 310 shown in Figure 3 has a Hadamard gate 305 and a controlled CNOT gate 306, and charge readout 307 is performed. The quantum computation process will be described below with reference to Figures 4 to 10.
[0039] The quantum information processing device 100 initializes the quantum bit 301 under the gate electrode 112 (FIG. 4). For example, the quantum information processing device 100 controls the quantum bit 301 in steps 2401 and 2402.
[0040] The quantum information processing device 100 moves the quantum bit 301 under the gate electrode 116 and performs a Hadamard gate operation. The quantum bit 302 is initialized under the gate electrode 112 (FIG. 5). For example, the quantum information processing device 100 controls the quantum bit 301 in steps 2404 and 2405, and the quantum bit 302 in steps 2401 and 2402.
[0041] The quantum information processing device 100 moves quantum bit 301 below gate electrode 118 and quantum bit 302 below gate electrode 116, respectively, to perform a controlled NOT gate operation. The quantum information processing device 100 initializes quantum bit 303 below gate electrode 112 and initializes auxiliary quantum bit 305 below gate electrode 132 ( FIG. 6 ). For example, the quantum information processing device 100 controls quantum bits 301 and 302 in steps 2406 and 2407, respectively, and controls quantum bit 303 in steps 2401 and 2402. Furthermore, the quantum information processing device 100 controls the initialization of auxiliary quantum bit 305 below gate electrode 132 in step 2417.
[0042] The quantum information processing device 100 performs spin-charge conversion of the quantum bit 301 using the auxiliary quantum bit 305, moves the spin-charge converted quantum bit 301 under the gate electrode 124, and reads out the charge using a hole current. The quantum information processing device 100 also moves the quantum bit 302 under the gate electrode 118 and the quantum bit 303 under the gate electrode 116, respectively, to perform a controlled NOT gate operation. The quantum information processing device 100 initializes the quantum bit 304 under the gate electrode 112 and the auxiliary quantum bit 305 under the gate electrode 132 ( FIG. 7 ). For example, the quantum information processing device 100 controls steps 2417 and 2418 for the quantum bit 301 and steps 2406 and 2407 for the quantum bits 302 and 303. The quantum information processing device 100 controls steps 2401 and 2402 for the quantum bit 304.
[0043] The quantum information processing device 100 performs spin-charge conversion of the quantum bit 302 using the auxiliary quantum bit 305, moves the spin-charge converted quantum bit 302 to below the gate electrode 124, and reads out the charge using a hole current. The quantum information processing device 100 also moves the quantum bit 303 to below the gate electrode 118 and the quantum bit 304 to below the gate electrode 116, respectively, to perform a controlled NOT gate operation. The quantum information processing device 100 initializes the auxiliary quantum bit 305 below the gate electrode 132 ( FIG. 8 ). For example, the quantum information processing device 100 performs the same control as in FIG. 7 for the quantum bits 302, 303, and 304 and the auxiliary quantum bit 305.
[0044] The quantum information processing device 100 performs spin-charge conversion of the quantum bit 303 using the auxiliary quantum bit 305, moves the spin-charge converted quantum bit 303 below the gate electrode 124, and reads out the charge using a hole current. The quantum information processing device 100 also moves the quantum bit 304 below the gate electrode 118. The auxiliary quantum bit 305 is initialized below the gate electrode 132 ( FIG. 9 ). For example, the quantum information processing device 100 performs the same control as in FIG. 8 for the quantum bits 303, 304, and the auxiliary quantum bit 305.
[0045] The quantum information processing device 100 performs spin-charge conversion of the quantum bit 304 using the auxiliary quantum bit 305, moves the quantum bit 304 after spin-charge conversion under the gate electrode 124, and reads out the charge using a hole current ( FIG. 10 ). For example, the quantum information processing device 100 performs the same control as in FIG. 9 for the quantum bit 304 and the auxiliary quantum bit 305.
[0046] The above method completes the generation of a four-qubit GHZ state. In this quantum computation, the delay line 202 was not used. Generally, if two-qubit gate operations are performed only between qubits that were adjacent at the time of initialization, there is no need to use the delay line 202. (Example 2) A method for performing a four-qubit quantum Fourier transform using a quantum information processing device will be described. FIG. 11 shows a quantum circuit diagram constituting the quantum information processing device 200. In this example, qubits 301 to 304 are used. The quantum circuit 320 shown in FIG. 11 includes a controlled π / 2 rotate gate 1101, a controlled π / 4 rotate gate 1102, and a controlled π / 8 rotate gate 1103. The quantum computation process will be described below with reference to FIGS. 12 to 23.
[0047] The quantum information processing device 200 initializes the quantum bit 301 under the gate electrode 112 (FIG. 12). A detailed description is omitted here as it is the same as in the first embodiment.
[0048] The quantum information processing device 200 moves the quantum bit 301 under the gate electrode 116 and performs a Hadamard gate operation. The quantum bit 302 is initialized under the gate electrode 112 (FIG. 13). A detailed description is omitted here as it is the same as in the first embodiment.
[0049] Quantum information processing device 200 moves quantum bit 301 below gate electrode 118 and quantum bit 302 below gate electrode 116, and performs a controlled π / 2 rotation gate operation. Quantum information processing device 200 initializes quantum bit 303 below gate electrode 112 ( FIG. 14 ). For example, quantum information processing device 200 performs the control of steps 2406 and 2407 (controlled π / 2 rotation gate operation) for quantum bits 301 and 302, respectively, and performs the control of steps 2401 and 2402 for quantum bit 303.
[0050] The quantum information processing device 200 moves the quantum bit 302 to below the gate electrode 127 in the delay line 202. The quantum bit 301 remains below the gate electrode 118, and the quantum bit 303 is moved below the gate electrode 116, performing a controlled π / 4 rotation gate operation. The quantum bit 304 is initialized below the gate electrode 112 ( FIG. 15 ). For example, the quantum information processing device 200 performs control in step 2409 for the quantum bit 302, and in step 2411, performs control to keep the quantum bit 301 below the gate electrode 118, while performing control in steps 2410, 2404, and 2405 for the quantum bit 303 (controlled π / 4 rotation gate operation). The quantum information processing device 200 also performs control in steps 2401 and 2402 for the quantum bit 304.
[0051] The quantum information processing device 200 moves the quantum bit 303 to below the gate electrode 129 in the delay line 202. The quantum bit 301 remains below the gate electrode 118, and the quantum bit 304 is moved below the gate electrode 116, performing a controlled π / 8 rotation gate operation. The auxiliary quantum bit 305 is initialized below the gate electrode 132 ( FIG. 16 ). For example, the quantum information processing device 200 performs the control of step 2409 for the quantum bit 303, and performs the control of step 2411 for the quantum bit 301 to remain below the gate electrode 118, while performing the control of steps 2410, 2404, and 2405 for the quantum bit 304 (controlled π / 8 rotation gate operation). Furthermore, the quantum information processing device 200 performs the control of step 2417 for initializing the auxiliary quantum bit 305 below the gate electrode 132.
[0052] The quantum information processing device 200 performs spin-charge conversion of the quantum bit 301 using the auxiliary quantum bit 305, moves the spin-charge converted quantum bit 301 to below the gate electrode 124, and reads out the charge using a hole current. The quantum information processing device 200 also moves the quantum bit 302 to below the gate electrode 116, performs a Hadamard gate operation, moves the quantum bit 303 to below the gate electrode 127 in the delay line 202, and moves the quantum bit 304 to below the gate electrode 129 in the delay line 202 ( FIG. 17 ). For example, the quantum information processing device 200 controls steps 2418 and 2419 for the quantum bit 301, controls step 2410 for the quantum bit 302, and controls step 2409 for the quantum bits 303 and 304.
[0053] Quantum information processing device 200 moves quantum bit 302 to below gate electrode 118 and quantum bit 303 to below gate electrode 116, and performs controlled π / 2 rotation gate operation ( FIG. 18 ). For example, quantum information processing device 200 controls quantum bit 302 in step 2411, and quantum bit 303 in steps 2410, 2404, and 2405.
[0054] The quantum information processing device 200 moves the quantum bit 303 to below the gate electrode 127 in the delay line 202. The quantum bit 302 remains below the gate electrode 118, and the quantum bit 304 is moved below the gate electrode 116, performing a controlled π / 4 rotation gate operation. The auxiliary quantum bit 305 is initialized below the gate electrode 132 ( FIG. 19 ). For example, the quantum information processing device 200 performs the control of step 2411 for the quantum bit 302, and performs the control of steps 2410, 2404, and 2405 for the quantum bit 304 (controlled π / 4 rotation gate operation). The quantum information processing device 200 also performs the control of step 2417, in which the auxiliary quantum bit 305 is initialized below the gate electrode 132.
[0055] The quantum information processing device 200 performs spin-charge conversion on the quantum bit 302 using the auxiliary quantum bit 305, moves it under the gate electrode 124, and reads out the charge using a hole current. The quantum bit 303 is moved under the gate electrode 116, and a Hadamard gate operation is performed. The quantum bit 304 is moved under the gate electrode 129 in the delay line 202 ( FIG. 20 ). For example, the quantum information processing device 200 performs the same control as in FIG. 17 for the quantum bits 302, 303, and 304. For example, the quantum information processing device 200 performs the control of steps 2418 and 2419 for the quantum bit 302, the control of step 2410 for the quantum bit 303, and the control of step 2409 for the quantum bit 304, as in FIG. 17 .
[0056] The quantum information processing device 200 moves the quantum bit 303 to below the gate electrode 118 and the quantum bit 304 to below the gate electrode 116, and performs a controlled π / 2 rotation gate operation. The auxiliary quantum bit 305 is initialized below the gate electrode 132 ( FIG. 21 ). For example, the quantum information processing device 200 performs the control of step 2411 for the quantum bit 303, keeping it below the gate electrode 118, while performing the control of step 2410 for the quantum bit 304, performing the control of steps 2404 and 2405 (controlled π / 4 rotation gate operation). Furthermore, the quantum information processing device 200 performs the control of step 2417, initializing the auxiliary quantum bit 305 below the gate electrode 132.
[0057] The quantum information processing device 200 performs spin-charge conversion of the quantum bit 303 using the auxiliary quantum bit 305, moves it under the gate electrode 124, and reads out the charge using a hole current. The quantum bit 304 is moved under the gate electrode 116 and a Hadamard gate operation is performed. The auxiliary quantum bit 305 is initialized under the gate electrode 132 ( FIG. 22 ). For example, as in the case of FIG. 20 , the quantum information processing device 200 performs control in steps 2418 and 2419 for the quantum bit 303 and control in step 2410 for the quantum bit 304. Furthermore, the quantum information processing device 200 performs control in step 2417 to initialize the auxiliary quantum bit 305 under the gate electrode 132.
[0058] The quantum information processing device 200 performs spin-charge conversion of the quantum bit 304 using the auxiliary quantum bit 305, moves it under the gate electrode 124, and reads out the charge using a hole current ( FIG. 23 ). For example, the quantum information processing device 200 controls steps 2418 and 2419 for the quantum bit 304, similar to the case of FIG. 22 .
[0059] The above method completes the quantum Fourier transform of four qubits. In this quantum computation, it was necessary to perform two-qubit gate operations, such as the controlled π / 8 rotation gate operation between qubit 301 and qubit 304, between qubits that were not adjacent at the time of initialization. Therefore, unlike in Example 1, by using delay line 202, gate operations can be performed between qubits that were not adjacent at the time of initialization.
[0060] The present invention is not limited to the above-described embodiment, and various modifications are possible, as shown in FIG. 25 as an example. In this case, increasing the number of quantum bits or loops in delay line 202 enables more complex quantum computation. While FIG. 25 illustrates a configuration in which delay line 202 has multiple loops, as shown in FIG. 26, auxiliary quantum bit supply line 203 may also have a multiple line configuration (in this example, auxiliary quantum bit supply lines 203a and 203b), similar to delay line 202. With such a configuration, auxiliary quantum bits required for quantum bit measurement can be input at any timing.
[0061] As described above, the quantum information processing device of this embodiment is a quantum information processing device in which quantum bits can be moved, as described using Figure 2 and other figures, and includes a first channel (e.g., calculation line 201) that performs predetermined gate operations (e.g., initialization, shuttle operation, Hadamard gate operation, controlled NOT gate operation, readout, etc.) on quantum bits that are sequentially input to gate electrodes of the quantum information processing device, and a second channel (e.g., delay line 202) that temporarily holds the quantum bits on which the predetermined gate operations are performed. This allows "initialization," "quantum gate operation," and "readout" to be performed sequentially and continuously while moving the quantum bits, making it possible to inexpensively perform quantum information processing requiring a large number of quantum bits with a physically simple configuration. Furthermore, it becomes possible to form entanglement between arbitrary quantum bits that is wider and more complex than before.
[0062] 1 and the like, the quantum information processing device has a single-layer structure in which the first channel and the second channel are provided in the same layer, which allows the device to be configured with a single-layer gate structure and to handle a large number of quantum bits.
[0063] 1 and 2, etc., a third channel is provided in the same layer as the first channel and the second channel, and supplies auxiliary quantum bits necessary for measuring the quantum bits. This makes it possible to measure all quantum bits that have been gate-operated.
[0064] 2 and the like, the first channel has a first gate electrode (e.g., gate electrode 112) that initializes the quantum bit, a second gate electrode (e.g., gate electrodes 116-118) that performs the predetermined gate operation on the quantum bit initialized by the first gate electrode, including a gate operation to move the quantum bit to a third gate electrode (e.g., gate electrodes 122-125) or the second channel, and the third gate electrode that reads out the quantum bit that has been subjected to the predetermined gate operation, and the second channel is disposed between the first gate electrode and the second gate electrode, and temporarily holds the quantum bit that is input after the quantum bit that is input next to the initialized quantum bit. This makes it possible to perform gate operations on two or more quantum bits between distant quantum bits.
[0065] Furthermore, as explained using Figure 25 etc., since a plurality of the second channels are provided between the first gate electrode and the second gate electrode, the degree of freedom of the gate control pattern for the quantum bits can be increased, and the quantum bits can be rearranged more freely.
[0066] 26 and the like, the quantum dot sensor includes a first gate electrode that initializes the quantum bit, a second gate electrode that performs the predetermined gate operation on the quantum bit initialized by the first gate electrode, including a gate operation for moving the quantum bit to a third gate electrode or the second channel, and the third gate electrode that reads out the quantum bit that has been subjected to the predetermined gate operation, and a plurality of the third channels are provided between the second gate electrode and the third gate electrode. With this configuration, it is possible to improve the degree of freedom in timing for measuring the spin of the quantum bit.
[0067] According to the above embodiment, a practical quantum computer can be realized, which consumes less energy, reduces carbon emissions, prevents global warming, and contributes to the realization of a sustainable society.
[0068] 101...insulator layer, 102...channel, 103...quantum dot, 104...reservoir, 105...reservoir, 106...output, 107...source, 108...drain, 111-133, 150-154...gate electrode, 134...micromagnet, 201...computation line, 202...delay line, 203...auxiliary quantum bit supply line, 204...hole current, 301-304...quantum bit, 305...Hadamard gate, 306...controlled NOT gate, 307...readout, 1101...controlled π / 2 rotation gate, 1102...controlled π / 4 rotation gate, 1103...controlled π / 8 rotation gate.
Claims
1. A quantum information processing device in which quantum bits can be moved, comprising: a first channel that performs a predetermined gate operation on quantum bits that are sequentially input to a gate electrode of the quantum information processing device; and a second channel that temporarily holds the quantum bit on which the predetermined gate operation is performed.
2. The quantum information processing device according to claim 1, characterized in that the first channel and the second channel are provided in the same layer to form a single-layer structure.
3. The quantum information processing device according to claim 1, further comprising: a third channel provided in the same layer as the first channel and the second channel, for supplying an auxiliary quantum bit required for measuring the quantum bit.
4. The quantum information processing device according to claim 1, characterized in that the first channel has a first gate electrode that initializes the quantum bit, a second gate electrode that performs the specified gate operation on the quantum bit initialized by the first gate electrode, including a gate operation to move the quantum bit to a third gate electrode or the second channel, and the third gate electrode that reads out the quantum bit on which the specified gate operation has been performed, and the second channel is disposed between the first gate electrode and the second gate electrode, and temporarily holds the quantum bit that is input after the quantum bit that is input next to the initialized quantum bit.
5. The quantum information processing device according to claim 4, wherein the second channel is provided in a plurality between the first gate electrode and the second gate electrode.
6. The quantum information processing device according to claim 3, further comprising: a first gate electrode for initializing the quantum bit; a second gate electrode for performing the specified gate operation on the quantum bit initialized by the first gate electrode, the specified gate operation including a gate operation for moving the quantum bit to a third gate electrode or the second channel; and the third gate electrode for reading out the quantum bit for which the specified gate operation has been performed, wherein a plurality of the third channels are provided between the second gate electrode and the third gate electrode.
7. A quantum information processing method performed in a quantum information processing device in which quantum bits are movable, comprising the steps of: sequentially inputting quantum bits to gate electrodes of the quantum information processing device; performing a predetermined gate operation on the input quantum bits through a first channel; and temporarily holding the quantum bits on which the predetermined gate operation is performed through a second channel.
Citation Information
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