Dual-mode radio frequency front-end module

Abstract

The present invention relates to the technical field of radio frequency modules. Disclosed is a dual-mode radio frequency front-end module. The dual-mode radio frequency front-end module comprises a signal input end, a first-stage amplifier, an interstage matching circuit, a second-stage amplifier, a main bias circuit and a signal output end, wherein the main bias circuit comprises an amplifier bias circuit and a current adjustment circuit, a first end of the current adjustment circuit is used for being connected to an input port of a radio frequency front end, a second end of the current adjustment circuit is grounded, a third end of the current adjustment circuit is connected to both a power source voltage and a first end of the amplifier bias circuit, and a fourth end of the current adjustment circuit is connected to a second end of the amplifier bias circuit; and a third end of the amplifier bias circuit is grounded, a fourth end of the amplifier bias circuit is connected to the power source voltage, a fifth end of the amplifier bias circuit serves as an output end of the main bias circuit, and the fifth end of the amplifier bias circuit outputs a bias current to a gate electrode of the second-stage amplifier. The dual-mode radio frequency front-end module of the present invention can prevent signal distortion, reduces energy consumption, and has high working efficiency.

Description

Dual-mode RF front-end module Technical Field

[0001] The present invention relates to the technical field of radio frequency modules, and in particular to a dual-mode radio frequency front-end module. Background Art

[0002] Currently, among the RF transceiver chips in dual-mode terminals, the RF front-end (RFF) in mobile terminals is the key component for signal transmission and reception. With the trend toward multi-mode and multi-standard communications, the RF front-end is responsible for transmitting and receiving signals across multiple standards and modes. As mobile communication technology evolves toward 5G and beyond, telecom operators are using multiple different standards, each with its own distinct modes and frequency bands.

[0003] A typical TDD system RF front-end module, such as a Wi-Fi RF front-end module, consists of the following components: a power amplifier, which amplifies the RF signal output by the RF chip; a receiver circuit, which receives the signal and typically includes a low-noise amplifier (LNA); an RF switch, which switches between transmit and receive paths; and a logic control module, which controls the operating status of other components. These components are assembled on a substrate, connected together by bonding or other means, and packaged into a complete module.

[0004] However, different input signals have different requirements for the amplifier's operating mode. For example, GSM signals have constant envelope characteristics, and their power amplifiers can operate in Class AB or Class B mode without damaging the signal. However, RF signals such as LTE (Long Term Evolution), 5GNR, and WIFI are non-constant envelope signals with a high peak-to-average ratio. Usually, the power amplifier must operate in the linear region, otherwise the signal characteristics will be destroyed, leading to deterioration of indicators such as EVM. However, a direct consequence of the power amplifier operating in the linear region is low operating efficiency and high power consumption. At the same time, pre-distortion technology has been developed to improve the PA's operating efficiency for non-constant envelope signals. However, in pre-distortion mode, the power amplifier operates in a nonlinear state.

[0005] Summary of the Invention

[0006] The purpose of an embodiment of the present invention is to provide a dual-mode RF front-end module, in which the power amplifier can switch between linear and nonlinear operating modes under the control of an external signal, so as to solve the problems of low operating efficiency, high power consumption and signal distortion of the existing RF front-end module.

[0007] In order to solve the above technical problems, an embodiment of the present invention provides a dual-mode RF front-end module, which includes a signal input terminal, a first-stage amplifier, an inter-stage matching circuit, a second-stage amplifier, a main bias circuit, and a signal output terminal; the signal input terminal, the first-stage amplifier, the inter-stage matching circuit, the second-stage amplifier, and the signal output terminal are electrically connected in sequence, the input terminal of the main bias circuit is connected to a power supply voltage, and the output terminal of the main bias circuit is connected between the inter-stage matching circuit and the second-stage amplifier;

[0008] The main bias circuit includes an amplifier bias circuit and a current adjustment circuit. The first end of the current adjustment circuit is used to connect to the input port of the radio frequency front end, the second end of the current adjustment circuit is grounded, the third end of the current adjustment circuit is connected to the power supply voltage and the first end of the amplifier bias circuit respectively, and the fourth end of the current adjustment circuit is connected to the second end of the amplifier bias circuit; the third end of the amplifier bias circuit is grounded, the fourth end of the amplifier bias circuit is connected to the power supply voltage, and the fifth end of the amplifier bias circuit serves as the output end of the main bias circuit; the fifth end of the amplifier bias circuit outputs the bias current to the gate of the second-stage amplifier;

[0009] The current adjustment circuit is used to adjust the bias current; the amplifier bias circuit is used to amplify the bias current and output it to the gate of the second-stage amplifier; when the fifth terminal of the amplifier bias circuit outputs a low level, the second-stage amplifier is in a Class B or Class AB operating state; when the fifth terminal of the amplifier bias circuit outputs a high level, the second-stage amplifier is in a Class A operating state.

[0010] Preferably, the current adjustment circuit includes a first resistor, a second resistor, a first transistor and a third resistor; the first end of the first resistor serves as the first end of the current adjustment circuit, the second end of the first resistor is respectively connected to the first end of the second resistor and the gate of the first transistor, and the second end of the second resistor serves as the second end of the current adjustment circuit; the drain of the first transistor is connected to the first end of the third resistor, the second end of the third resistor serves as the third end of the current adjustment circuit, and the source of the first transistor serves as the fourth end of the current adjustment circuit.

[0011] Preferably, the amplifier bias circuit includes a first transistor, a second transistor, a third transistor and a fourth resistor; the first end of the fourth resistor serves as the first end of the amplifier bias circuit, the second end of the fourth resistor is respectively connected to the source of the first transistor and the collector of the first transistor, and the emitter of the first transistor is connected to the collector of the second transistor; the collector of the second transistor is connected to the base of the second transistor, and the emitter of the second transistor serves as the third end of the amplifier bias circuit; the base of the first transistor is respectively connected to the collector of the first transistor and the base of the third transistor, the collector of the third transistor serves as the fourth end of the amplifier bias circuit, and the emitter of the third transistor serves as the fifth end of the amplifier bias circuit.

[0012] Preferably, the dual-mode RF front-end module also includes a first inductor, the first end of the first inductor is connected to the drain of the second-stage amplifier, and the second end of the first inductor is connected to the power supply voltage; the gate of the second-stage amplifier is connected to the inter-stage matching circuit, and the source of the second-stage amplifier is grounded.

[0013] Preferably, the dual-mode RF front-end module further includes an output matching impedance circuit; the input end of the output matching impedance circuit is connected to the drain of the second-stage amplifier, and the output end of the output matching impedance circuit is connected to the signal output end.

[0014] Preferably, the output matching impedance circuit includes a second inductor, a third inductor, a first capacitor, a second capacitor, a third capacitor, a second transistor, a fifth resistor, a sixth resistor and a seventh resistor;

[0015] The first end of the second inductor serves as the input end of the output matching impedance circuit, the second end of the second inductor is respectively connected to the first end of the first capacitor, the first end of the second capacitor and the first end of the third inductor, and the second end of the third inductor serves as the output end of the output matching impedance circuit and is respectively connected to the first end of the third capacitor and the signal output end;

[0016] The second end of the first capacitor is connected to the first end of the fifth resistor and the drain of the second transistor respectively, the source of the second transistor is grounded, the gate of the second transistor is connected to the first end of the sixth resistor and the first end of the seventh resistor respectively, the second end of the sixth resistor is connected to the input port, the second end of the seventh resistor is grounded, and the second end of the fifth resistor is connected to the power supply voltage;

[0017] The second end of the second capacitor and the second end of the third capacitor are grounded respectively.

[0018] Preferably, the dual-mode RF front-end module further includes a fourth capacitor, and two ends of the fourth capacitor are respectively connected to the inter-stage matching circuit and the second-stage amplifier.

[0019] Preferably, the dual-mode RF front-end module also includes an eighth resistor, the first end of the eighth resistor is connected to the fifth end of the amplifier bias circuit, and the second end of the eighth resistor is connected between the inter-stage matching circuit and the second-stage amplifier.

[0020] Preferably, the second-stage amplifier is an NPN transistor.

[0021] Preferably, the first transistor is an NMOS transistor.

[0022] Compared with the prior art, the dual-mode RF front-end module of the present invention connects the first end of the current adjustment circuit to the input port of the RF front-end, and the RF front-end is used to connect to the system GPIO; the second end of the current adjustment circuit is grounded, the third end of the current adjustment circuit is respectively connected to the power supply voltage and the first end of the amplifier bias circuit, the fourth end of the current adjustment circuit is connected to the second end of the amplifier bias circuit, the third end of the amplifier bias circuit is grounded, and the fourth end of the amplifier bias circuit is connected to the power supply voltage. The fifth end of the amplifier bias circuit serves as the output end of the main bias circuit; the fifth end of the amplifier bias circuit outputs a bias current to the gate of the second-stage amplifier; the current adjustment circuit is used to adjust the bias current; the amplifier bias circuit is used to amplify the bias current and output it to the gate of the second-stage amplifier; when the fifth end of the amplifier bias circuit outputs a low level (low bias current), the second-stage amplifier is in Class B or Class AB operating state; when the fifth end of the amplifier bias circuit outputs a high level (high bias current), the second-stage amplifier is in Class A operating state. This can effectively control the switching between linear and nonlinear working states, prevent signal distortion, further reduce the implementation complexity of transmit power control, reduce radiation, reduce energy consumption, and increase product service life. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:

[0024] FIG1 is a circuit diagram of a dual-mode RF front-end module provided in an embodiment of the present invention.

[0025] In the figure, 100, dual-mode RF front-end module, 1, signal input terminal, 2, first-stage amplifier, 3, inter-stage matching circuit, 4, main bias circuit, 41, amplifier bias circuit, 42, current adjustment circuit, 5, output matching impedance circuit, 6, signal output terminal. DETAILED DESCRIPTION

[0026] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0027] Please refer to Figure 1. An embodiment of the present invention provides a dual-mode RF front-end module 100, which includes a signal input terminal 1, a first-stage amplifier 2, an inter-stage matching circuit 3, a second-stage amplifier Q5, a main bias circuit 4 and a signal output terminal 6; the signal input terminal 1, the first-stage amplifier 2, the inter-stage matching circuit 3, the second-stage amplifier Q5 and the signal output terminal 6 are electrically connected in sequence, the input terminal of the main bias circuit 4 is connected to the power supply voltage VDD, and the output terminal of the main bias circuit 4 is connected between the inter-stage matching circuit 3 and the second-stage amplifier Q5.

[0028] The signal is transmitted through the signal input terminal 1 and input to the first-stage amplifier 2. The signal is amplified by the first-stage amplifier 2 and then output to the inter-stage matching circuit 3. After impedance matching, the signal is input to the gate of the second-stage amplifier Q5. The signal is amplified by the second-stage amplifier Q5 and then output to the signal output terminal 6 through the drain of the second-stage amplifier Q5. A bias current is provided to the gate of the second-stage amplifier Q5 by the main bias circuit 4.

[0029] The main bias circuit 4 includes an amplifier bias circuit 41 and a current adjustment circuit 42. The first end of the current adjustment circuit 42 is connected to the input port P1 of the RF front end, and the RF front end is used to connect to the system GPIO; the second end of the current adjustment circuit 42 is grounded, and the third end of the current adjustment circuit 42 is respectively connected to the power supply voltage VDD and the first end of the amplifier bias circuit 41; the fourth end of the current adjustment circuit 42 is connected to the second end of the amplifier bias circuit 41, the third end of the amplifier bias circuit 41 is grounded, and the fourth end of the amplifier bias circuit 41 is connected to the power supply voltage VDD. The fifth end of the amplifier bias circuit 41 serves as the output end of the main bias circuit 4; the fifth end of the amplifier bias circuit 41 outputs the bias current to the gate of the second-stage amplifier Q5.

[0030] The current adjustment circuit 42 is used to adjust the bias current; the amplifier bias circuit 41 is used to amplify the bias current and output it to the gate of the second-stage amplifier Q5; when the fifth terminal of the amplifier bias circuit 41 outputs a low level, the second-stage amplifier Q5 is in Class B (Class B) or Class AB (Class AB) operating state; when the fifth terminal of the amplifier bias circuit 41 outputs a high level, the second-stage amplifier Q5 is in Class A (Class A) operating state.

[0031] The low level indicates that the bias current outputted from the fifth terminal of the amplifier bias circuit 41 is small, and the high level indicates that the bias current outputted from the fifth terminal of the amplifier bias circuit 41 is large.

[0032] Specifically, the first end of the current adjustment circuit 42 is connected to the input port P1 of the RF front-end, which is used to connect to the system GPIO; the second end of the current adjustment circuit 42 is grounded; the third end of the current adjustment circuit 42 is connected to the power supply voltage VDD and the first end of the amplifier bias circuit 41, respectively; the fourth end of the current adjustment circuit 42 is connected to the second end of the amplifier bias circuit 41; the third end of the amplifier bias circuit 41 is grounded; the fourth end of the amplifier bias circuit 41 is connected to the power supply voltage VDD; the fifth end of the amplifier bias circuit 41 serves as the output end of the main bias circuit 4; the fifth end of the amplifier bias circuit 41 outputs a bias current to the gate of the second-stage amplifier Q5; when the bias current output from the fifth end of the amplifier bias circuit 41 is low, the second-stage amplifier Q5 operates in Class B or Class AB; when the bias current output from the fifth end of the amplifier bias circuit 41 is high, the second-stage amplifier Q5 operates in Class A. This effectively controls the switching between linear and nonlinear operating states, prevents signal distortion, further reduces the complexity of transmit power control, reduces radiation, reduces energy consumption, and improves product life.

[0033] In this embodiment, the current adjustment circuit 42 includes a first resistor R1, a second resistor R2, a first transistor Q1 and a third resistor R3; the first end of the first resistor R1 serves as the first end of the current adjustment circuit 42, the second end of the first resistor R1 is respectively connected to the first end of the second resistor R2 and the gate of the first transistor Q1, and the second end of the second resistor R2 serves as the second end of the current adjustment circuit 42; the drain of the first transistor Q1 is connected to the first end of the third resistor R3, the second end of the third resistor R3 serves as the third end of the current adjustment circuit 42, and the source of the first transistor Q1 serves as the fourth end of the current adjustment circuit 42.

[0034] In this embodiment, the amplifier bias circuit 41 includes a first transistor Q2, a second transistor Q3, a third transistor Q4, and a fourth resistor R4. A first end of the fourth resistor R4 serves as a first end of the amplifier bias circuit 41. A second end of the fourth resistor R4 is connected to the source of the first transistor Q1 and the collector of the first transistor Q2, respectively. The emitter of the first transistor Q2 is connected to the collector of the second transistor Q3. The collector of the second transistor Q3 is connected to the base of the second transistor Q3, and the emitter of the second transistor Q3 serves as a third end of the amplifier bias circuit 41. The base of the first transistor Q2 is connected to the collector of the first transistor Q2 and the base of the third transistor Q4, respectively. The collector of the third transistor Q4 serves as a fourth end of the amplifier bias circuit 41, and the emitter of the third transistor Q4 serves as a fifth end of the amplifier bias circuit 41.

[0035] Specifically, the collector of the third transistor Q4 outputs ISENSE to provide a bias current to the gate of the second-stage amplifier Q5.

[0036] The bias current (IBAS) is adjusted through the first resistor R1, the second resistor R2, the first transistor Q1, the third resistor R3 and the input port P1, wherein the input port P1 is an external pin of the FEM and is controlled by the system GPIO.

[0037] When the input port P1 is connected to 0V, the gate of the first transistor Q1 is 0V and the first transistor Q1 is turned off. At this time, the resistance value Ra between the power supply voltage VDD and the node a is equal to R4.

[0038] The current Ia flowing from the power supply voltage VDD to a=(VDD-2*Vbe) / R4; Vbe is the PN junction voltage between the base and emitter of the first transistor Q2, the second transistor Q3, and the third transistor Q4.

[0039] When the input port P1 is connected to a high level, the gate of the first transistor Q1 is at a high level, and the first transistor Q1 is turned on. At this time, Ra is: Ra=R3*R4 / (R3+R4).

[0040] The current Ia flowing from the power supply voltage VDD to a = (VDD-2*Vbe)(R3+R4) / (R3*R4). When P1 is not connected to the system GPIO, that is, in a floating state, the first transistor Q1 is also turned off due to the pull-down effect of the second resistor R2. At this time, the resistance between the power supply voltage VDD and a is R4.

[0041] The bias of the first transistor Q1 when it is turned off is IBIAS0 , and the bias of the first transistor Q1 when it is turned on is IBIAS1 .

[0042] Since the first transistor Q2, the second transistor Q3, and the third transistor Q4 form a current mirror, it is obvious that IBIAS1>IBIAS0.

[0043] When the amplifier bias circuit 41 outputs IBIAS0, the second-stage amplifier Q5 operates in a class B or class AB state, so that the system is in a pre-distortion working mode.

[0044] When the amplifier bias circuit 41 outputs IBIAS1, the second-stage amplifier Q5 operates in a class A state, and the system is in a linear operating mode.

[0045] In this embodiment, the dual-mode RF front-end module 100 further includes a first inductor L1. A first end of the first inductor L1 is connected to the drain of the second-stage amplifier Q5, and a second end of the first inductor L1 is connected to the power supply voltage VCC. The gate of the second-stage amplifier Q5 is connected to the inter-stage matching circuit 3, and the source of the second-stage amplifier Q5 is grounded. The first inductor L1 is connected to the power supply voltage VCC to provide a drain bias current for the second-stage amplifier Q5.

[0046] In this embodiment, the dual-mode RF front-end module 100 also includes an output matching impedance circuit 5; the input end of the output matching impedance circuit 5 is connected to the drain of the second-stage amplifier Q5, and the output end of the output matching impedance circuit 5 is connected to the signal output end 6.

[0047] The output matching impedance circuit 5 of the final stage is used to convert the low impedance at the final stage output end into 50 ohm impedance to match the external impedance.

[0048] In this embodiment, the output matching impedance circuit 5 includes a second inductor L2, a third inductor L3, a first capacitor C1, a second capacitor C2, a third capacitor C3, a second transistor Q6, a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7;

[0049] The first end of the second inductor L2 serves as the input end of the output matching impedance circuit 5, the second end of the second inductor L2 is respectively connected to the first end of the first capacitor C1, the first end of the second capacitor C2, and the first end of the third inductor L3, and the second end of the third inductor L3 serves as the output end of the output matching impedance circuit 5 and is respectively connected to the first end of the third capacitor C3 and the signal output end 6;

[0050] A second end of the first capacitor C1 is connected to a first end of the fifth resistor R5 and a drain of the second transistor Q6, respectively. The source of the second transistor Q6 is grounded. A gate of the second transistor Q6 is connected to a first end of the sixth resistor R6 and a first end of the seventh resistor R7, respectively. A second end of the sixth resistor R6 is connected to the input port P1. A second end of the seventh resistor R7 is grounded. A second end of the fifth resistor R5 is connected to the power supply voltage VDD.

[0051] A second end of the second capacitor C2 and a second end of the third capacitor C3 are grounded respectively.

[0052] Specifically, the input port P1 is a FEM pin and can be controlled by the system GPIO. The input port P1 connected to the sixth resistor R6 and the input port P1 connected to the first resistor R1 are the same FEM pin.

[0053] When the input port P1 is connected to 0V or in a floating state, the gate of the second transistor Q6 is 0V. At this time, the drain and source of the second transistor Q6 are in a cut-off state, point c is open to the ground, and the first capacitor C1 is not connected to the circuit.

[0054] At this time, the capacitance of node b to ground is Cb=C2.

[0055] When the system controls the GPIO so that the input port P1 is at a high level, the gate of the second transistor Q6 is at a high level, the drain and source of the second transistor Q6 are conductive, and the first capacitor C1 is connected to the circuit.

[0056] At this time, the capacitance of node b to ground is Cb=C2+C1.

[0057] Due to the real-time adjustment of Cb, the output matching impedance circuit 5 can dynamically adapt to different working states of the second-stage amplifier Q5, achieving the purpose of best matching and optimizing the FEM performance.

[0058] Therefore, by controlling the external pin P1, the FEM operating mode can be flexibly controlled;

[0059] When P1 is at a low level, the first transistor Q1 and the second transistor Q6 are turned off, IBIAS is small, the second-stage amplifier Q5 is in a class AB working state, and Cb=C2.

[0060] When P1 is at a high level, the first transistor Q1 and the second transistor Q6 are turned on, IBIAS is large, the second-stage amplifier Q5 is in a class AB working state, and Cb=C2+C1.

[0061] In this embodiment, the dual-mode RF front-end module 100 further includes a fourth capacitor C4, the two ends of which are connected to the inter-stage matching circuit 3 and the second-stage amplifier Q5, respectively. The fourth capacitor C4 can block the signal output by the inter-stage matching circuit 3 and output it to the gate of the second-stage amplifier Q5.

[0062] In this embodiment, the dual-mode RF front-end module 100 further includes an eighth resistor R8. A first end of the eighth resistor R8 is connected to the fifth end of the amplifier bias circuit 41, and a second end of the eighth resistor R8 is connected between the inter-stage matching circuit 3 and the second-stage amplifier Q5. The eighth resistor R8 is used to limit the bias current output by the amplifier bias circuit 41, outputting a more stable bias current to the gate of the second-stage amplifier Q5 with high reliability. The eighth resistor R8 serves as a ballast resistor, which can improve the thermal stability of the second-stage amplifier Q5.

[0063] In this embodiment, the second-stage amplifier Q5 is an NPN transistor, but may also be other types of transistors.

[0064] In this embodiment, the first transistor Q1 is an NMOS transistor. The second transistor Q6 is a PMOS transistor. Of course, in alternative embodiments, the first transistor Q1 is a PMOS transistor and the second transistor Q6 is an NMOS transistor. Alternatively, the first transistor Q1 is an NMOS transistor and the second transistor Q6 is a PMOS transistor. Alternatively, the first transistor Q1 is a PMOS transistor and the second transistor Q6 is an NMOS transistor. Alternatively, bipolar transistors may be used. The specific selection depends on the actual situation and will not be described here.

[0065] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0066] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention's description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A dual-mode RF front-end module, comprising a signal input terminal, a first-stage amplifier, an inter-stage matching circuit, a second-stage amplifier, a main bias circuit and a signal output terminal; the signal input terminal, the first-stage amplifier, the inter-stage matching circuit, the second-stage amplifier and the signal output terminal are electrically connected in sequence, the input terminal of the main bias circuit is connected to a power supply voltage, and the output terminal of the main bias circuit is connected between the inter-stage matching circuit and the second-stage amplifier; characterized in that The main bias circuit comprises an amplifier bias circuit and a current adjustment circuit, wherein the first end of the current adjustment circuit is used to connect to the input port of the radio frequency front end, the second end of the current adjustment circuit is grounded, the third end of the current adjustment circuit is respectively connected to the power supply voltage and the first end of the amplifier bias circuit, and the fourth end of the current adjustment circuit is connected to the second end of the amplifier bias circuit; the third end of the amplifier bias circuit is grounded, the fourth end of the amplifier bias circuit is connected to the power supply voltage, and the fifth end of the amplifier bias circuit serves as the output end of the main bias circuit; The fifth terminal of the amplifier bias circuit outputs a bias current to the gate of the second stage amplifier; The current adjustment circuit is used to adjust the bias current; the amplifier bias circuit is used to amplify the bias current and output it to the gate of the second-stage amplifier; when the fifth end of the amplifier bias circuit outputs a low level, the second-stage amplifier is in a Class B or Class AB working state; when the fifth end of the amplifier bias circuit outputs a high level, the second-stage amplifier is in a Class A working state.

2. The dual-mode RF front-end module according to claim 1, characterized in that: The current adjustment circuit includes a first resistor, a second resistor, a first transistor and a third resistor; the first end of the first resistor serves as the first end of the current adjustment circuit, the second end of the first resistor is respectively connected to the first end of the second resistor and the gate of the first transistor, and the second end of the second resistor serves as the second end of the current adjustment circuit; the drain of the first transistor is connected to the first end of the third resistor, the second end of the third resistor serves as the third end of the current adjustment circuit, and the source of the first transistor serves as the fourth end of the current adjustment circuit.

3. The dual-mode RF front-end module according to claim 2, characterized in that: The amplifier bias circuit includes a first triode, a second triode, a third triode and a fourth resistor; the first end of the fourth resistor serves as the first end of the amplifier bias circuit, the second end of the fourth resistor is respectively connected to the source of the first transistor and the collector of the first triode, and the emitter of the first triode is connected to the collector of the second triode; the collector of the second triode is connected to the base of the second triode, and the emitter of the second triode serves as the third end of the amplifier bias circuit; the base of the first triode is respectively connected to the collector of the first triode and the base of the third triode, the collector of the third triode serves as the fourth end of the amplifier bias circuit, and the emitter of the third triode serves as the fifth end of the amplifier bias circuit.

4. The dual-mode RF front-end module according to claim 1, characterized in that: The dual-mode RF front-end module also includes a first inductor, a first end of which is connected to the drain of the second-stage amplifier, and a second end of which is connected to the supply voltage; the gate of the second-stage amplifier is connected to the inter-stage matching circuit, and the source of the second-stage amplifier is grounded.

5. The dual-mode RF front-end module according to claim 1, characterized in that: The dual-mode RF front-end module also includes an output matching impedance circuit; the input end of the output matching impedance circuit is connected to the drain of the second-stage amplifier, and the output end of the output matching impedance circuit is connected to the signal output end.

6. The dual-mode RF front-end module according to claim 5, characterized in that: The output matching impedance circuit includes a second inductor, a third inductor, a first capacitor, a second capacitor, a third capacitor, a second transistor, a fifth resistor, a sixth resistor and a seventh resistor; The first end of the second inductor serves as the input end of the output matching impedance circuit, the second end of the second inductor is respectively connected to the first end of the first capacitor, the first end of the second capacitor and the first end of the third inductor, and the second end of the third inductor serves as the output end of the output matching impedance circuit and is respectively connected to the first end of the third capacitor and the signal output end; The second end of the first capacitor is connected to the first end of the fifth resistor and the drain of the second transistor respectively, the source of the second transistor is grounded, the gate of the second transistor is connected to the first end of the sixth resistor and the first end of the seventh resistor respectively, the second end of the sixth resistor is connected to the input port, the second end of the seventh resistor is grounded, and the second end of the fifth resistor is connected to the power supply voltage; The second end of the second capacitor and the second end of the third capacitor are grounded respectively.

7. The dual-mode RF front-end module according to claim 1, characterized in that: The dual-mode RF front-end module also includes a fourth capacitor, and two ends of the fourth capacitor are respectively connected to the inter-stage matching circuit and the second-stage amplifier.

8. The dual-mode RF front-end module according to claim 1, characterized in that: The dual-mode RF front-end module also includes an eighth resistor, a first end of the eighth resistor is connected to the fifth end of the amplifier bias circuit, and a second end of the eighth resistor is connected between the inter-stage matching circuit and the second-stage amplifier.

9. The dual-mode RF front-end module according to claim 1, characterized in that: The second stage amplifier is an NPN transistor.

10. The dual-mode RF front-end module according to claim 2, characterized in that: The first transistor is an NMOS transistor.

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