Vertical cavity light-emitting element and light-emitting device
Patent Information
- Application Number
- PCT/JP2024/031839
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-20
- Filing Date
- 2024-09-05
- Publication Date
- 2025-03-27
Smart Images

Figure JP2024031839_27032025_PF_FP_ABST
Abstract
Description
Vertical cavity light emitting element and light emitting device
[0001] The present invention relates to a vertical cavity light emitting device and a light emitting device.
[0002] A vertical cavity surface emitting laser (VCSEL) is known as one type of semiconductor laser. For example, Patent Document 1 discloses a vertical cavity surface emitting laser (VCSEL) including a semiconductor structure layer that includes an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer, with a protrusion formed on an upper surface of the p-type semiconductor layer, an insulating layer formed on an upper surface of the p-type semiconductor layer excluding an upper surface of the protrusion, and a light-transmitting electrode layer formed so as to cover the p-type semiconductor layer.
[0003] Patent Publication No. 2021-197437
[0004] In the vertical-cavity surface-emitting laser disclosed in Patent Document 1, pinholes may occur in the insulating layer depending on the thickness of the insulating layer during manufacturing. For example, if an electrode is provided directly above the insulating layer where a pinhole has occurred, via a transparent electrode layer, the pinhole may become a conductive portion, causing current leakage from a location other than the intended current flow location. If such current leakage occurs, it may lead to a decrease in gain or failure of the vertical-cavity surface-emitting laser.
[0005] The present invention has been made in consideration of the above points, and aims to provide a vertical cavity light emitting element and a light emitting device that can suppress current leakage and reduce the risk of device failure.
[0006] A vertical cavity light emitting device according to the present invention includes a substrate, a first multilayer reflector formed on the substrate, a first semiconductor layer having a first conductivity type formed on the first multilayer reflector, a light emitting layer formed on the first semiconductor layer, and a semiconductor structure layer including a second semiconductor layer having a second conductivity type opposite to the first conductivity type and having a protruding portion protruding upward from the center of an upper surface of the light emitting layer, a first insulating film formed in a ring shape in a region along an outer edge of the protruding portion in an outer region outside the protruding portion on the upper surface of the second semiconductor layer, and a second insulating film formed in a ring shape in the outer region spaced outward from the first insulating film in a top view. a transparent conductive film covering an upper surface of the protrusion and formed from the upper surface of the protrusion to the surface of the second insulating film, the transparent conductive film having a contact portion in direct contact with an upper surface of the second semiconductor layer exposed between the first insulating film and the second insulating film; a first electrode electrically connected to the first semiconductor layer; a second electrode provided in a region on the outer region of the conductive film and electrically connected to the second semiconductor layer via the conductive film; and a second multilayer film reflector formed on the semiconductor structure layer covering the protrusion and constituting a resonator between itself and the first multilayer film reflector, wherein the second semiconductor layer has an inactive region that is inactivated at least in the contact portion.
[0007] FIG. 1 is a perspective view of a vertical cavity surface emitting laser according to Example 1. FIG. 2 is a top view of the vertical cavity surface emitting laser according to Example 1. FIG. 3 is a cross-sectional view of the vertical cavity surface emitting laser according to Example 1. FIG. 4 is an enlarged view of a part of the cross section of the vertical cavity surface emitting laser according to Example 1. FIG. 5 is an enlarged view of a part of the cross section of a vertical cavity surface emitting laser according to a conventional example. FIG. 6 is a top view of a light emitting device according to an application example of the vertical cavity surface emitting laser of Example 1. FIG. 7 is a cross-sectional view of a light emitting device according to an application example of the vertical cavity surface emitting laser of Example 1.
[0008] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and the description of the same components will be omitted.
[0009] The configuration of a vertical cavity surface emitting laser 100 (hereinafter referred to as surface emitting laser 100) according to Example 1 will be described with reference to Figures 1 to 4. Figure 1 is a perspective view of the surface emitting laser 100. Figure 2 is a top view of the surface emitting laser 100. Figure 3 is a cross-sectional view of the surface emitting laser 100 taken along line 3-3 shown in Figure 2. Figure 4 is an enlarged view of part A of the surface emitting laser 100 in Figure 3. Note that in Figures 3 and 4, the up-down direction corresponds to the height direction of the surface emitting laser 100.
[0010] The substrate 11 is a flat, transparent substrate with a rectangular upper surface. The substrate 11 is a growth substrate on which a semiconductor crystal can be grown. The substrate 11 is made of a material that is transparent to light having a blue wavelength, such as undoped gallium nitride (GaN). In the following description, an axis that passes through the center of the upper surface of the substrate 11 and is perpendicular to the upper surface will be referred to as a central axis CA. Furthermore, the direction radially away from the central axis CA will be referred to as an outward direction.
[0011] The first multilayer reflector 12 is a semiconductor multilayer reflector made up of semiconductor layers grown on the upper surface of the substrate 11. The first multilayer reflector 12 is a so-called distributed Bragg reflector (DBR) in which high-refractive-index semiconductor films with a relatively high refractive index and low-refractive-index semiconductor films with a refractive index lower than that of the high-refractive-index semiconductor films are alternately stacked on the upper surface of the substrate 11.
[0012] The first multilayer reflector 12 is formed by stacking, for example, 42 pairs of high-refractive-index semiconductor films made of GaN and low-refractive-index semiconductor films made of indium aluminum nitride (AlInN) on the upper surface of the substrate 11. With this configuration, the first multilayer reflector 12 is reflective to light in the blue wavelength range. A buffer layer (not shown) made of GaN is provided between the substrate 11 and the first multilayer reflector 12.
[0013] The semiconductor structure layer EM is a laminated structure made up of a plurality of semiconductor layers formed on the first multilayer reflector 12. The semiconductor structure layer EM has an n-type semiconductor layer 13 formed on the first multilayer reflector 12, a light-emitting layer 14 formed on the n-type semiconductor layer 13, and a p-type semiconductor layer 15 formed on the light-emitting layer 14.
[0014] The structures of the n-type semiconductor layer 13, the light emitting layer 14, and the p-type semiconductor layer 15 that constitute the semiconductor structure layer EM will be described below.
[0015] The n-type semiconductor layer 13 as a first semiconductor layer having a first conductivity type is a semiconductor layer formed over the upper surface of the first multilayer film reflector 12. The n-type semiconductor layer 13 is made of GaN and is doped with silicon (Si) as an n-type impurity.
[0016] The n-type semiconductor layer 13 has a so-called mesa-shaped structure composed of a flat lower portion 13A and a cylindrical upper portion 13B protruding upward from the center of the lower portion 13A along a central axis CA (see FIG. 3).
[0017] The light-emitting layer 14 is formed over the upper portion 13B of the n-type semiconductor layer 13 and is a semiconductor layer having a quantum well structure in which well layers made of InGaN and barrier layers made of GaN are stacked one on top of the other. The light-emitting layer 14 is formed so that its light-emitting center is located on the central axis CA. The light-emitting layer 14 emits blue light with a peak wavelength of, for example, 450 nm.
[0018] P-type semiconductor layer 15, which serves as a second semiconductor layer having a second conductivity type, is a semiconductor layer formed over the upper surface of light emitting layer 14. P-type semiconductor layer 15 includes a p-type GaN layer doped with p-type impurities and a p-type AlGaN layer doped with p-type impurities.
[0019] In p-type semiconductor layer 15, the p-type AlGaN layer is formed between light emitting layer 14 and the p-type GaN layer, and functions as an electron blocking layer. Note that an undoped GaN layer may be formed between light emitting layer 14 and the p-type AlGaN layer to prevent diffusion of p-type impurities from the p-type AlGaN layer into light emitting layer 14.
[0020] 3, the p-type semiconductor layer 15 has a central protrusion 15P1 that has a circular top surface shape and protrudes upward in a region including the central axis CA at the center of the top surface. The p-type semiconductor layer 15 also has a peripheral protrusion 15P2 on the top surface that is spaced apart from the central protrusion 15P1 in the radial direction of the central axis CA and that protrudes upward in a region along the outer edge of the top surface of the p-type semiconductor layer 15.
[0021] In other words, the p-type semiconductor layer 15 has a first region 15R1 that is a region passing through the central axis CA, an annular second region 15R2 that is a region outside the outer periphery of the first region 15R1 and is recessed downward relative to the first region 15R1, and a third region 15R3 that is a region outside the outer periphery of the second region 15R2 and protrudes upward relative to the second region 15R2. That is, the p-type semiconductor layer 15 has an annular recess on its upper surface that surrounds the central protrusion 15P1 and has the second region 15R2 as its bottom surface.
[0022] In the p-type semiconductor layer 15, the surfaces of the central protrusion 15P1 and the outer peripheral protrusion 15P2 are at the same height. The side surface of the central protrusion 15P1 is inclined inward with respect to the upper surface of the p-type semiconductor layer 15, and the inner side surface of the outer peripheral protrusion 15P2 is inclined outward with respect to the upper surface of the p-type semiconductor layer 15. In other words, the annular recess having the second region 15R2 as its bottom surface has an inverted trapezoidal cross section.
[0023] In the p-type semiconductor layer 15, the upper surface of the p-type semiconductor layer 15 corresponding to the second region 15R2 is an inactive region in which the p-type impurity (Mg) doped into the p-type semiconductor layer 15 is electrically inactivated. The second region 15R2 is formed, for example, by masking the first region 15R1 and the third region 15R3 on the upper surface of the flat p-type semiconductor layer and dry etching only the second region 15R2. In other words, by forming the second region 15R2 as a recess, the central protrusion 15P1 and the peripheral protrusion 15P2 are formed.
[0024] In the p-type semiconductor layer 15 before the central protrusion 15P1 is formed, i.e., in the p-type semiconductor layer 15 before dry etching is performed, the p-type impurities on the upper surface of the p-type semiconductor layer 15 are in an electrically activated state.
[0025] In the p-type semiconductor layer 15 after dry etching, the p-type impurities in the second region 15R2 are electrically inactive due to etching damage. In other words, the second region 15R2 is a region where the p-type impurities are unlikely to generate carriers. Therefore, the second region 15R2 becomes a high-resistance region having a higher electrical resistance than the first region 15R1 and the third region 15R3, which are not damaged by etching.
[0026] In other words, the first region 15R1 and the third region 15R3, which are regions of the upper surface of the p-type semiconductor layer 15 that have not been damaged by etching in the dry etching process, become low-resistance regions with a relatively low electrical resistance that is lower than that of the second region 15R2.
[0027] The first insulating film 17 is an electrically insulating coating layer formed in a ring shape in the second region 15R2 along the outer edge of the central protrusion 15P1. The first insulating film 17 is made of a material having a refractive index lower than that of the p-type semiconductor layer 15, such as silicon dioxide (SiO 2 The first insulating film 17 has a thickness t1 that is the same as the height of the first region 15R1 from the second region 15R2 (see FIG. 4).
[0028] The film thickness t1 of the first insulating film 17 is, for example, about 4 to 20 nm. The first insulating film 17 may cover part of the periphery of the upper surface of the central protrusion 15P1. This makes it possible to suppress electric field concentration on the outer periphery of the central protrusion 15P1.
[0029] The second insulating film 18 is an electrically insulating, transparent coating layer that is formed in a ring shape on the upper surface of the p-type semiconductor layer 15 and spaced outward from the first insulating film 17 in a plan view of the surface-emitting laser 100 from above.
[0030] The second insulating film 18 continuously covers the inner surface of the outer peripheral protrusion 15P2, the third region 15R3, and the side surfaces of the p-type semiconductor layer 15, the light emitting layer 14, and the upper portion 13B of the n-type semiconductor layer 13, and its outer edge reaches a part of the upper surface of the lower portion 13A. 2 It consists of:
[0031] 4, the thickness t2 of the second insulating film 18 on the third region 15R3 is configured to be thicker than the thickness t1 of the first insulating film 17. The thickness t2 of the second insulating film 18 is a thickness that can insulate the conductive film 21 from the third region 15R3, and is, for example, about 100 to 200 nm. This makes it possible to prevent unintended pinholes from occurring in the second insulating film 18.
[0032] The first insulating film 17 and the second insulating film 18 described above are fabricated, for example, by sequentially patterning them to a predetermined film thickness on the upper surface of the p-type semiconductor layer 15 on which the central protrusion 15P1 and the peripheral protrusion 15P2 are formed.
[0033] The conductive film 21 is a light-transmitting conductive film that covers the first region 15R1 and is formed from the first region 15R1 to the surface of the second insulating film 18 on the third region 15R3. That is, the conductive film 21 is in direct contact with the upper surface of the central protrusion 15P1 and covers the first insulating film 17 and the second insulating film 18.
[0034] 4, the conductive film 21 has a contact portion 21C that is in direct contact with the upper surface of the p-type semiconductor layer 15 exposed between the first insulating film 17 and the second insulating film 18. In other words, the contact portion 21C of the conductive film 21 separates the first insulating film 17 and the second insulating film 18 above the second region 15R2 in a plan view of the surface-emitting laser 100 from above. The conductive film 21 is formed to have an inclined surface that follows the inclined inner side surface of the second insulating film 18.
[0035] The conductive film 21 is made of a metal oxide, such as indium tin oxide (ITO) or indium zinc oxide (IZO), that is translucent to the blue light emitted from the light emitting layer 14 of the semiconductor structure layer EM described above.
[0036] The n-electrode NE as a first electrode is a metal electrode having a ring-shaped upper surface that is formed on the upper surface of the lower portion 13A of the n-type semiconductor layer 13 and is electrically connected to the n-type semiconductor layer 13. The n-electrode NE is formed on the upper surface of the lower portion 13A so that a portion of the n-electrode NE covers the outer edge of the second insulating film 18. The n-electrode NE is formed, for example, by stacking titanium (Ti) and aluminum (Al) in this order on the upper surface of the lower portion 13A.
[0037] The p-electrode PE as the second electrode is a metal electrode made of gold (Au) that is formed on the conductive film 21 and electrically connected to the p-type semiconductor layer 15. The p-electrode PE is made up of a first p-electrode PE1 and a second p-electrode PE2.
[0038] The first p-electrode PE1 of the p-electrodes PE has an annular top surface shape and is formed along the outer edge of the conductive film 21 so as to surround the first region 15R1. In a plan view of the surface-emitting laser 100 from above, the inner edge of the first p-electrode PE1 and the outer edge of the first insulating film 17 are spaced apart by a distance L, as shown in FIG. 4 . The inner edge of the first p-electrode PE1 is located on a contact portion 21C of the conductive film 21. In other words, when viewed from above, there is no location where all three films, i.e., the first p-electrode PE1, the conductive film 21, and the first insulating film 17, overlap.
[0039] In this example, the first p-electrode PE1 is formed so as to cover the inclined surface of the above-described conductive film 21. By having the first p-electrode PE1 configured in this manner, it is expected that durability against cracks and the like during long-term use will be improved compared to a case in which the first p-electrode PE1 does not cover the inclined surface of the conductive film 21.
[0040] The second multilayer reflector 23 is a cylindrical dielectric multilayer reflector made of dielectric layers formed on the conductive film 21. The second multilayer reflector 23 is formed so as to cover the first region 15R1 and the inner edge of the first p-electrode PE1 in a plan view of the surface-emitting laser 100 seen from above.
[0041] The second multilayer film reflector 23 is a so-called distributed Bragg reflector (DBR) in which high-refractive-index dielectric films with a relatively high refractive index and low-refractive-index dielectric films with a lower refractive index than the high-refractive-index dielectric films are alternately stacked on the upper surface of the conductive film 21.
[0042] The second multilayer reflector 23 is made of, for example, niobium pentoxide (Nb 2 O 5 ) and a high refractive index dielectric film made of SiO 2 The second multilayer film reflector 23 has a reflectivity for the blue light emitted from the light emitting layer 14.
[0043] A transparent dielectric layer (not shown) having a circular top surface may be formed as a phase adjustment layer between the second multilayer reflector 23 and the conductive film 21. The dielectric layer may be made of, for example, Nb 2 O 5 , tantalum pentoxide (Ta 2 O 5 ), zinc oxide (ZrO 2 ), titanium oxide (TiO 2 ), hafnium oxide (HfO 2 ) etc.
[0044] The second p-electrode PE2 of the p-electrodes PE is a metal electrode made of Au, having a circular upper surface, formed so as to cover the first p-electrode PE1 and the second multilayer film reflector 23. The second p-electrode PE2 is electrically connected to the p-type semiconductor layer 15 via the first p-electrode PE1 and the conductive film 21.
[0045] In the surface-emitting laser 100, the lower surface of the second multilayer reflector 23 faces the upper surface of the first multilayer reflector 12, with the conductive film 21 and the semiconductor structure layer EM sandwiched between them. As a result, the first multilayer reflector 12 and the second multilayer reflector 23 form a resonator OC between the first multilayer reflector 12 and the second multilayer reflector 23, with the resonator length direction being the direction perpendicular to the semiconductor structure layer EM (the up-and-down direction in FIG. 3 ).
[0046] In the surface-emitting laser 100, the reflectance of the first multilayer reflector 12 for blue light is slightly lower than the reflectance of the second multilayer reflector 23 for blue light. Therefore, part of the blue light resonating in the resonator OC passes through the first multilayer reflector 12 and the substrate 11 and is extracted to the outside. That is, the light resonating between the first multilayer reflector 12 and the second multilayer reflector 23 is emitted downward in FIG. 3 .
[0047] The lower surface of the substrate 11 is covered with Nb 2 O 5 and SiO 2 The anti-reflection film (not shown) is formed by laminating the above-mentioned anti-reflection layer 11 and the above-mentioned anti-reflection layer 11. The anti-reflection film is a so-called AR coat that suppresses the blue light emitted from the substrate 11 from being reflected upward in FIG.
[0048] Here, we will explain the operation and optical characteristics of the surface-emitting laser 100. When a voltage is applied to the n-electrode NE and p-electrode PE described above and a current flows between the n-electrode NE and the p-electrode PE, the current flows in the light-emitting layer 14 of the semiconductor structure layer EM as shown by the thick dashed two-dot arrow in Figure 3, and when the current reaches a predetermined current value, which is a threshold current, the intensity of the blue light emitted from the light-emitting layer 14 increases rapidly.
[0049] The blue light emitted from the light-emitting layer 14 when the threshold current is reached is repeatedly reflected between the first multilayer film reflector 12 and the second multilayer film reflector 23, i.e., within the resonator OC, and reaches a resonance state (i.e., laser oscillation occurs).
[0050] As described above, the conductive film 21 is in direct contact with the first region 15R1 on the upper surface of the p-type semiconductor layer 15, and is formed to cover the second insulating film 18 formed on the third region 15R3. In other words, the conductive film 21 is electrically insulated from the third region 15R3.
[0051] As described above, the second region 15R2 is a high-resistance region that has been made highly resistive due to etching damage, and therefore the current flowing through the conductive film 21 is less likely to flow through the second region 15R2 into the p-type semiconductor layer 15. Therefore, on the upper surface of the p-type semiconductor layer 15, only the first region 15R1, which is the upper surface of the central protrusion 15P1, is electrically connected to the conductive film 21.
[0052] Therefore, in the p-type semiconductor layer 15, most of the current flowing from the p-electrode PE to the conductive film 21 is supplied to the semiconductor structure layer EM via the first region 15R1, which is a low-resistance region, and then flows to the n-electrode NE. Therefore, in the surface-emitting laser 100, current is supplied to the light-emitting layer 14 via the first region 15R1, and blue light is emitted from the first region 15R1 along the central axis CA. That is, in the surface-emitting laser 100, the central protrusion 15P1 of the p-type semiconductor layer 15 functions as a current constriction portion that limits the current supply range so that the current does not spread any further.
[0053] As described above, the blue light emitted from the light-emitting layer 14 and resonated within the resonator OC is partially extracted to the outside after passing through the first multilayer reflector 12 and the substrate 11 because the optical reflectance of the first multilayer reflector 12 is lower than the optical reflectance of the second multilayer reflector 23. In other words, the lower surface of the substrate 11 serves as the light-emitting surface of the surface-emitting laser 100.
[0054] In the surface-emitting laser 100, the first insulating film 17 has a refractive index lower than that of the p-type semiconductor layer 15. Therefore, the effective refractive index of the resonator OC, which is a cylindrical region including the central protrusion 15P1, is larger than the effective refractive index of the cylindrical peripheral region along the first insulating film 17 around it.
[0055] Furthermore, in the surface-emitting laser 100, the effective refractive index in the cylindrical peripheral region along the first insulating film 17 is greater than the effective refractive index in the surrounding cylindrical peripheral region along the second region 15R2 where the first insulating film 17 is not formed.
[0056] That is, in the surface-emitting laser 100, the effective refractive index decreases from the center of the central protrusion 15P1 toward the radial direction. By configuring the surface-emitting laser 100 in this manner, optical loss caused by the standing wave in the resonator OC diverging (radiating) to the first peripheral region is suppressed. That is, a large amount of light remains within the resonator OC, and the laser light is extracted to the outside in this state.
[0057] Therefore, a large amount of light emitted from the light-emitting layer 14 is concentrated around the central axis CA of the resonator OC, thereby generating and emitting high-power, high-density laser light. This makes it possible to stabilize the intensity distribution in the transverse cross section of the laser light emitted from the surface-emitting laser 100, i.e., the transverse mode of the laser light.
[0058] [Suppression of Current Leakage in Surface-Emitting Laser 100] Hereinafter, suppression of current leakage in the surface-emitting laser 100 of this embodiment will be described with reference to FIGS.
[0059] As described above, in the surface-emitting laser 100, the conductive film 21 has a contact portion 21C that is in direct contact with the upper surface of the p-type semiconductor layer 15 that is exposed between the first insulating film 17 and the second insulating film 18. Also, as described above, in the surface-emitting laser 100, the inner edge of the first p-electrode PE1 is spaced apart from the first insulating film 17 in a plan view of the surface-emitting laser 100 seen from above.
[0060] In this embodiment, since the surface-emitting laser 100 has the above-described configuration, when a voltage is applied to the p-electrode PE and the n-electrode NE and a current flows from the first p-electrode PE1 to the p-type semiconductor layer 15 via the conductive film 21, the current can be prevented from leaking into the p-type semiconductor layer 15 from regions other than the first region 15R1.
[0061] Here, a conventional surface-emitting laser will be described with reference to Fig. 5. Fig. 5 is an enlarged view of a portion A in the conventional surface-emitting laser, similar to Fig. 4. The conventional surface-emitting laser differs from Example 1 in that it has an insulating layer 25, but is otherwise similar to Example 1.
[0062] In the conventional surface-emitting laser, the insulating layer 25 has a first portion 25A having a thickness t1 formed across the second region 15R2 and a second portion 25B having a thickness t2 formed across the third region 15R3. In other words, the insulating layer 25 can be said to be the first insulating film 17 in the surface-emitting laser 100 formed across the second region 15R2.
[0063] In the surface-emitting laser, the thickness t1 of the first portion 25A of the insulating layer 25 is the same as the height of the first region 15R1 from the second region 15R2. The height of the first region 15R1 is preferably about 20 nm from the viewpoints of transverse mode control and suppressing damage to the light-emitting layer 14, and therefore the thickness t1 of the first portion 25A can also be a similar thickness. During the manufacture of the surface-emitting laser, if the thickness t1 is, for example, about 10-odd nm or less, pinholes penetrating the first portion 25A in the vertical direction are likely to occur in the first portion 25A.
[0064] For example, as shown in Figure 5, if a pinhole Ph occurs in a region of the first portion 25A closer to the outer peripheral protrusion 15P2 than the center of the first portion 25A, when a conductive film 21 is formed on top of the insulating layer 25 by sputtering or the like, the nanometal particles that make up the conductive film 21 will enter the pinhole Ph, and the pinhole Ph itself will become a conductive portion.
[0065] For example, when a voltage is applied between the p-electrode PE and the n-electrode NE, the current flowing from the first p-electrode PE1 to the n-electrode NE flows from the first p-electrode PE1 to the first region 15R1, which is a low-resistance region, along the extending direction of the conductive film 21, and also flows into the pinhole Ph formed in the first insulating film 17. Note that the inner edge of the first p-electrode PE1 is a region where current concentration is likely to occur on the current path from the first p-electrode PE1 to the first region 15R1.
[0066] In the conventional surface-emitting laser, the inner edge of the first p-electrode PE1 is located directly above the region of the first portion 25A in which the pinhole Ph is formed, as shown in Fig. 5. That is, in the conventional surface-emitting laser, when the pinhole Ph is present directly below the inner edge of the first p-electrode PE1, the distance between the first p-electrode PE1 and the pinhole Ph becomes very short.
[0067] A Schottky contact is made between the pinhole Ph, which is a conductive portion, and the second region 15R2 of the p-type semiconductor layer 15. However, when the distance between the first p-electrode PE1 and the pinhole Ph is very short as described above, a local high voltage is applied to the interface between the pinhole Ph and the second region 15R2 of the p-type semiconductor layer 15, and a current may flow from the pinhole Ph into the p-type semiconductor layer 15 across the Schottky barrier.
[0068] If this occurs, current leakage may occur within the surface-emitting laser from the conductive film 21 through the pinhole Ph. For example, if current leakage occurs, the amount of current flowing through the central protrusion 15P1 of the p-type semiconductor layer, through which current is intended to flow, may decrease, which may lead to a decrease in gain or a malfunction of the surface-emitting laser 100.
[0069] In the surface-emitting laser 100 of this embodiment, as described above, the first insulating film 17 and the second insulating film 18 are formed to be separated by the contact portion 21C of the conductive film 21, and the inner edge of the first p-electrode PE1 is located on the contact portion 21C. In other words, the first insulating film 17 is not formed in the region directly below the first p-electrode PE1. That is, the first p-electrode PE1 and the first insulating film 17 are spaced apart from each other.
[0070] Therefore, when a voltage is applied to the n-electrode NE and the p-electrode PE in the surface-emitting laser 100 and a current flows from the p-electrode PE to the n-electrode NE, the current flowing in the conductive film 21 flows in the extending direction of the conductive film 21 as shown in FIG. 4, and most of the current passes through the first region 15R1, which is a low-resistance region, and proceeds into the p-type semiconductor layer 15 and toward the n-electrode NE.
[0071] At this time, even if a pinhole occurs in the first insulating film 17, in the surface-emitting laser 100 of this embodiment, the inner edge of the first p-electrode PE1 and the outer edge of the first insulating film 17 are spaced apart by a distance L, so that a local high voltage is unlikely to be applied as in the conventional example. In other words, current leakage as in the conventional example is unlikely to occur. Note that the distance L is preferably 5 μm or more.
[0072] Therefore, according to the surface-emitting laser 100 of this embodiment, even when the first p-electrode PE1 is brought closer to the first region 15R1, by increasing the distance between the first insulating film 17 and the first p-electrode PE1 in top view, it is possible to prevent the current flowing through the conductive film 21 from flowing from the second region 15R2 into the p-type semiconductor layer 15.
[0073] Therefore, according to the surface-emitting laser 100 of this embodiment, it is possible to suppress current leakage from portions other than the portion through which current is originally desired to flow, thereby reducing the risk of failure of the surface-emitting laser 100.
[0074] In this embodiment, the upper surface of the p-type semiconductor layer 15 has been described as having the outer peripheral protrusion 15P2, but the outer peripheral protrusion 15P2 may not be provided, and the second region 15R2 may be formed up to the outer edge of the p-type semiconductor layer 15. That is, the entire upper surface of the p-type semiconductor layer 15 may be etched (inactive region) except for the first region 15R1.
[0075] In this embodiment, the second region 15R2 is passivated by dry etching the upper surface of the p-type semiconductor layer 15, but the passivation method is not limited to dry etching. For example, the p-type impurity may be passivated by slightly removing the surface of the p-type semiconductor layer and then performing ion implantation, or the p-type impurity may be passivated by ashing.
[0076] [Application Example of Surface-Emitting Laser] An application example using the surface-emitting laser of Example 1 will be described with reference to Figures 6 and 7. Figure 6 is a top view of a light-emitting device 200 as an application example, and Figure 7 is a cross-sectional view of the light-emitting device 200 taken along line 7-7 in Figure 6. Note that the vertical direction in Figure 7 corresponds to the height direction of the light-emitting device 200.
[0077] The light emitting device 200 is obtained by flip-chip mounting and packaging the surface emitting laser 100 according to the first embodiment on a mounting substrate 31. The light emitting device 200 includes the mounting substrate 31 on which the surface emitting laser 100 is mounted, a frame 37, and a light-transmitting plate 41. The configuration of the surface emitting laser 100 is the same as that of the first embodiment.
[0078] The mounting substrate 31 serving as the bottom portion is a plate-like body having a rectangular top surface. The mounting substrate 31 is made of ceramic such as aluminum nitride (AlN) or aluminum oxide (Al 2 O 3 The insulating material is made of silicon (Si), silicon carbide (SiC), or the like.
[0079] The n-electrode NE of the surface-emitting laser 100 is bonded to a first pad electrode (not shown) provided on the upper surface of the mounting substrate 31 via an n-electrode bonding member 33 made of Au and extending downward in the figure, and a bonding member 34 made of Au-Sn eutectic bonding.
[0080] The second p-electrode PE2 of the surface-emitting laser 100 is bonded to a second pad electrode (not shown) provided on the upper surface of the mounting substrate 31 at a distance from the first pad electrode via a bonding member 35 made of Au-Sn eutectic bonding.
[0081] The first pad electrode and the second pad electrode are electrically connected to respective back electrodes (not shown) provided at a distance from each other on the back surface of the mounting substrate 31 through vias that penetrate the mounting substrate 31. That is, the surface-emitting laser 100 can receive power supply via the back electrode of the mounting substrate 31.
[0082] The frame 37 is formed along the outer edge of the mounting substrate 31 so as to expose the region of the upper surface of the mounting substrate 31 on which the surface-emitting laser 100 is mounted. In other words, in a plan view of the light-emitting device 200 seen from above, the frame 37 surrounds the surface-emitting laser 100 on the mounting substrate 31. The frame 37 is made of a material such as ceramic, e.g., AlN, or Al, similar to the mounting substrate 31. 2 O 3 The insulating material is made of silicon, silicon carbide, or the like.
[0083] The light-transmitting plate 41 is a transparent plate-like body with a rectangular upper surface. The lower surface of the light-transmitting plate 41 is joined to the frame 37 via a metal layer 42 made of Au formed on the upper surface of the frame 37 and a joining member 43. In other words, the light-transmitting plate 41 is held by the frame 37 so as to cover the surface-emitting laser 100. The light-transmitting plate 41 is made of a material that is translucent to the light emitted from the surface-emitting laser 100, such as borosilicate glass.
[0084] In the light-emitting device 200, light emitted from the surface-emitting laser 100 passes through the light-transmitting plate 41 and is emitted to the outside of the light-emitting device 200. That is, in this embodiment, the upper surface of the light-transmitting plate 41 is the light-emitting surface of the light-emitting device 200.
[0085] In the light emitting device 200 as well, by separating the outer edge of the first insulating film 17 and the inner edge of the first p-electrode PE1 by a distance L, it is possible to prevent the current flowing through the conductive film 21 from leaking from the second region 15R2 and flowing into the p-type semiconductor layer 15. Therefore, in the light emitting device 200 as well, it is possible to reduce the risk of failure of the surface emitting laser 100 due to the occurrence of current leakage.
[0086] In the light-emitting device 200, the surface-emitting laser 100 may be configured to be mounted by wire bonding in addition to flip-chip mounting. In this case, the p-electrode PE of the surface-emitting laser 100 may be provided with only the first p-electrode PE1. For example, when the surface-emitting laser 100 is connected by wire bonding in the light-emitting device 200, the wire may be directly bonded to the first p-electrode PE1.
[0087] REFERENCE SIGNS LIST 100, 110 Surface-emitting laser (vertical cavity light-emitting element) 200 Light-emitting device 11 Substrate 12 First multilayer reflector 13 N-type semiconductor layer 14 Light-emitting layer 15 P-type semiconductor layer 17 First insulating film 18 Second insulating film 21 Conductive film 23 Second multilayer reflector 31 Mounting substrate 33 N-electrode bonding member 34, 35, 43 Bonding member 37 Frame 41 Light-transmitting plate 42 Metal layer NE n-electrode PE p-electrode
Claims
a semiconductor structure layer including: a first semiconductor layer having a first conductivity type formed on the first multilayer reflector, a light emitting layer formed on the first semiconductor layer, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type formed on the light emitting layer and having a protruding portion protruding upward from the center of an upper surface; a first insulating film having insulating properties formed in a ring shape in a region along an outer edge of the protruding portion in an outer region outside the protruding portion on the upper surface of the second semiconductor layer; a second insulating film having insulating properties formed in a ring shape in the outer region and spaced outward from the first insulating film in a top view; a light-transmitting conductive film covering an upper surface of the protruding portion and formed from the upper surface of the protruding portion to a surface of the second insulating film, the first electrode being electrically connected to the first semiconductor layer; a second electrode provided in a region on the outer region of the conductive film and electrically connected to the second semiconductor layer via the conductive film; and a second multilayer film reflector formed on the semiconductor structure layer to cover the protrusion and to form a resonator between the second multilayer film reflector and the first multilayer film reflector, wherein the second semiconductor layer has an inactive region that is inactivated at least in the contact portion.
2. The vertical cavity light emitting device according to claim 1, wherein the first insulating film and the second electrode are spaced apart from each other in a radial direction from the center of the protrusion.
3. The vertical cavity light emitting device according to claim 2, wherein the inner edge of said second electrode is located on said contact portion of said conductive film.
4. The vertical cavity light emitting device according to claim 1 or 2, wherein the first insulating film has a thickness equal to the height of the upper surface of the protrusion from the outer region.
5. The vertical cavity light emitting element according to claim 1 or 2, characterized in that the second semiconductor layer has a ring-shaped step portion formed along the outer edge of the upper surface of the second semiconductor layer, and each of the second insulating film, the conductive film and the second electrode is formed so as to cover the step portion.
6. A light-emitting device including the vertical resonator type light-emitting element according to claim 1, comprising: a flat bottom having the vertical resonator type light-emitting element provided in one region of one main surface; a frame formed on the one main surface of the bottom and surrounding the vertical resonator type light-emitting element so as to expose the one region; and a light-transmitting plate held by the frame so as to cover the one region.
Citation Information
Patent Citations
Vertical resonator type light emitting element
JP2020136524A
Vertical resonator type light emitting element
JP2021197437A
Wavelength conversion device and light emitting device
JP2023029501A