A method of efficient transferring of extracted reference signals and received signals from a digital interface chip, a computer program product, a non-transitory computer-readable storage medium, a processor, a multi-antenna receiver arrangement, and a wireless device therefor

Abstract

A method (100) for a multi-antenna receiver arrangement (400), the multi-antenna receiver arrangement (400) comprising transceivers (500, 501, …, 515), a digital interface chip, DIC, (320), and a processor (930), wherein the multi-antenna receiver arrangement (400) is comprisable in a wireless device, WD, (302), the method comprising: obtaining (110), by the processor (930), connection configuration information of a current communication with a remote transceiver node, TNode (398, 399, 399); receiving (120), by the transceivers (500, 501, …, 515), a first plurality of analog radio signals; converting (125), by the DIC (320), the first plurality of analog radio signals into a first plurality of digital signals; obtaining (128), by the processor (930), one or more snapshots of the first plurality of digital signals by extracting reference signals from each of the first plurality of digital signals at one or more time instants, each snapshot corresponding to one of the time instants; determining (140), by the processor (930), a first snapshot transfer rate based on the obtained connection configuration information; determining (150) a second plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined first snapshot rate, wherein the second plurality is smaller than the first plurality; configuring (160) the DIC (320) to transfer snapshots with the first snapshot rate; and configuring (170) the DIC (320) to transfer the second plurality of digital signals to the processor over a first time period. Corresponding computer program product, non-transitory computer-readable storage medium, processor, multi-antenna receiver arrangement, and wireless device are also disclosed.

Description

[0001] A method of efficient transferring of extracted reference signals and received signals from a digital interface chip, a computer program product, a non-transitory computer-readable storage medium, a processor, a multi-antenna receiver arrangement, and a wireless device therefor

[0002] Technical field

[0003] The present disclosure relates to a method of efficient transferring of extracted reference signals and received signals from a digital interface chip, e.g., to a processor, a computer program product, a non-transitory computer-readable storage medium, a processor, a multi-antenna receiver arrangement, and a wireless device therefor. More specifically, the disclosure relates to a method of efficient transferring of extracted reference signals and received signals from a digital interface chip, e.g., to a processor, a computer program product, a non-transitory computer-readable storage medium, a processor, a multiantenna receiver arrangement, and a wireless device as defined in the introductory parts of the independent claims.

[0004] Background art

[0005] One approach to implement digital beamforming in mobile / wireless devices is described in WO 2023 / 153979 Al. In WO 2023 / 153979 Al a digital interface chip is introduced. Snapshots of antenna information are taken in the digital interface chip on a regular basis and sent to the baseband processor, which computes pre-processing parameters and sends the pre-processing parameters back to the digital interface chip. By utilizing the digital interface chip of WO 2023 / 153979 Al to reduce the data rate from N transceivers to M (instead of N) streams (M smaller than N), a compression rate of N / M is achieved, and thus the processing requirements of the baseband (BB) processor is (e.g., significantly) reduced. Furthermore, US 10951445 B2 discloses a radio frequency (RF) integrated circuit, US11705929B2 discloses a direct digital radio having a high-speed RF front end in communication with an antenna, and a radio subsystem that can be configured to form a programmable multi-standard transceiver system, and US 8630381 B2 discloses a dual band receiver. However, there is a need for methods and / or apparatuses determining and / or configuring the snapshot rate as well as the number of streams needed to be processed in the

[0006] BB processor for improved / optimal trade-off between performance and complexity.

[0007] An object of the present disclosure is to mitigate, alleviate or eliminate one or more of the above-identified deficiencies and disadvantages in the prior art and / or solve at least the above-mentioned problem or other problems.

[0008] According to a first aspect there is provided a method for a multi-antenna receiver arrangement, the multi-antenna receiver arrangement comprising one or more transceivers, a digital interface chip (DI C), and a processor, the multi-antenna receiver arrangement is comprisable in a wireless device (WD). The method comprises obtaining by the processor, connection configuration information of a current communication with a remote transceiver node (TNode); receiving, by the one or more transceivers a first plurality of analog radio signals; converting, by the DI C, the first plurality of analog radio signals into a first plurality of digital signals; obtaining, by the processor, one or more snapshots of the first plurality of digital signals by extracting reference signals from each of the first plurality of digital signals at one or more time instants, each snapshot corresponding to one of the one or more time instants; determining, by the processor, a first snapshot transfer / transmission rate based on the obtained connection configuration information; determining a second plurality of digital signals to be transferred / transmitted from the digital interface to the processor based on the determined first snapshot rate, wherein the second plurality is smaller than the first plurality; configuring the DIC to transmit snapshots with the first snapshot rate; and configuring the DIC to transmit the second plurality of digital signals to the processor over a first time period.

[0009] According to some embodiments, obtaining, by the processor, radio channel characteristics is based on the one or more snapshots; and determining, by the processor, the first snapshot transfer rate is further based on the obtained radio channel characteristics.

[0010] According to some embodiments, the first time period is a pre-determined time period, such as 20 milliseconds (ms).

[0011] According to some embodiments, the first time period is determined based on the obtained radio channel characteristics. According to some embodiments, the obtained radio channel characteristics is one or more of: a radio channel variation measure; an estimated doppler rate; a time-dispersion measure; a frequency selectivity measure; and an angle of arrival (AoA) variation measure.

[0012] According to some embodiments, the connection configuration is one or more of: a carrier aggregation, CA, configuration; a dual connectivity, DC, configuration; a bandwidth part, BWP, configuration; and a frequency range configuration.

[0013] According to some embodiments, the connection configuration is a CA configuration or a DC configuration, and an aggregated bandwidth of the carrier aggregation or the DC configuration is smaller than 75 percent of the full bandwidth supported by the WD, and the method further comprises: determining, by the processor, a second snapshot transfer rate based on the first snapshot transfer rate and / or based on a ratio between the aggregated bandwidth and the full bandwidth supported by the WD, and the second snapshot transfer rate is higher than the first snapshot transfer rate; determining a third plurality of digital signals to be transferred from the digital interface to the processor based on the determined second snapshot rate; reconfiguring the DIC to transmit snapshots with the second snapshot rate; and reconfiguring the DIC to transmit the third plurality of digital signals to the processor over the first time period.

[0014] According to some embodiments, the connection configuration is a BWP configuration, and the BWP of the BWP configuration is set to be smaller than a threshold, and the method further comprises: determining, by the processor, a third snapshot transfer rate based on the first snapshot transfer rate and / or based on a ratio between the BWP and the full bandwidth supported by the WD, and the third snapshot transfer rate is smaller than the first snapshot transfer rate; determining a fourth plurality of digital signals to be transferred from the digital interface to the processor based on the determined third snapshot rate; reconfiguring the DIC to transmit snapshots with the third snapshot rate; and reconfiguring the DIC to transmit the fourth plurality of digital signals to the processor over the first time period.

[0015] According to a second aspect there is provided: a computer program product comprising a non-transitory computer readable medium, having stored thereon a computer program comprising program instructions, the computer program being loadable into a data processing unit and configured to cause execution of the method of the first aspect or any of the embodiments mentioned herein when the computer program is run by the data processing unit; a computer program product comprising instructions, which, when executed on at least one processor of a processing device, cause the processing device to carry out the method according to the first aspect or any of the embodiments mentioned herein; or a non- transitory computer-readable storage medium storing one or more programs configured to be executed by one or more processors of a processing device, the one or more programs comprising instructions which, when executed by the processing device, causes the processing device to carry out the method according to the first aspect or any of the embodiments mentioned herein.

[0016] According to a third aspect there is provided a processor for a multi-antenna receiver arrangement, comprising controlling circuitry configured to cause: obtainment of connection configuration information of a current communication with a remote transceiver node (TNode); reception of a first plurality of analog radio signals; conversion of the first plurality of analog radio signals into a first plurality of digital signals; obtainment of one or more snapshots of the first plurality of digital signals by extracting reference signals from each of the first plurality of digital signals at one or more time instants, each snapshot corresponding to one of the one or more time instants; optionally obtainment of radio channel characteristics based on the one or more snapshots; determination of a first snapshot transfer rate based on the obtained connection configuration information and optionally based on the obtained radio channel characteristics; determination of a second plurality of digital signals to be transferred / transmitted from the digital interface to the processor based on the determined first snapshot rate, the second plurality is smaller than the first plurality; configuration of the DIC to transmit snapshots with the first snapshot rate; and configuration of the DIG to transmit the second plurality of digital signals to the processor over a first time period.

[0017] According to a fourth aspect there is provided a multi-antenna receiver arrangement comprising: a first plurality NRX of antenna units; a first plurality of receivers / transceivers; a digital interface chip (DIC); and the processor of the third aspect.

[0018] According to some embodiments, the first plurality of receivers / transceivers are configured to receive the first plurality of analog radio signals via the first plurality of antenna units, and the DIC comprises: a plurality of analog to digital converters configured to convert the first plurality of analog radio signals into a first plurality of digital signals; a plurality of spatio-temporal filters configured to process the first plurality of digital signals to obtain a plurality of combined signals; and the processor comprises: an extraction unit configured to extract reference signals from each of the first plurality of digital signals; a channel analyser configured to determine characteristics for each of the first plurality of digital signals based on the extracted reference signals; and optionally a transform unit configured to transform each of the plurality of combined signals into a frequency domain, a post-processing unit configured to post-process the transformed signals in the frequency domain to obtain a plurality of frequency domain processed signals, and a decoder configured to decode the plurality of frequency domain processed signals.

[0019] According to some embodiments, the plurality of combined signals is equal in number to the plurality of spatio-temporal filters.

[0020] According to a fifth aspect there is provided a wireless device (WD) comprising the multi-antenna receiver arrangement of the fourth aspect or any of the embodiments described herein.

[0021] According to a sixth aspect there is provided a digital interface chip.

[0022] Effects and features of the second, third, fourth, fifth and sixth aspects are fully or to a substantial extent analogous to those described above in connection with the first aspect and vice versa.

[0023] Embodiments mentioned in relation to the first aspect are fully or largely compatible with the second, third, fourth, fifth and sixth aspects and vice versa.

[0024] An advantage of some embodiments is that improved or optimized performance (of the DIC, the multi-antenna receiver arrangement or the WD) is achieved.

[0025] Another advantage of some embodiments is that power consumption is reduced or optimized (for a wireless device and / or for the multi-antenna receiver arrangement).

[0026] A further advantage of some embodiments is that complexity is reduced, e.g., by utilizing a less complex baseband processor.

[0027] Yet a further advantage of some embodiments is that robustness is improved / increased.

[0028] Yet another advantage of some embodiments is that implementation is simplified. Yet another further advantage of some embodiments is that robustness of the system and / or the wireless device towards channel variations is improved / increased.

[0029] Yet an advantage of some embodiments, is an optimized / improved trade-off between performance and power consumption, e.g., based on the configuration utilized.

[0030] Yet further advantages of some embodiments are simplified circuit design, improved (energy) efficiency, and / or reduced circuit complexity.

[0031] The present disclosure will become apparent from the detailed description given below. The detailed description and specific examples disclose preferred embodiments of the disclosure by way of illustration only. Those skilled in the art understand from guidance in the detailed description that changes, and modifications may be made within the scope of the disclosure.

[0032] Hence, it is to be understood that the herein disclosed disclosure is not limited to the particular component parts of the device described or steps of the methods described since such apparatus and method may vary. It is also to be understood that the terminology used herein is for purpose of describing particular embodiments only and is not intended to be limiting. It should be noted that, as used in the specification and the appended claims, the articles "a", "an", "the", and "said" are intended to mean that there are one or more of the elements unless the context explicitly dictates otherwise. Thus, for example, reference to "a unit" or "the unit" may include several devices, and the like. Furthermore, the words "comprising", "including", "containing" and similar wordings does not exclude other elements or steps. Moreover, the term "configured" or "adapted" is intended to mean that a unit or similar is shaped, sized, connected, connectable or otherwise adjusted for a purpose. The expression "based on" may be used interchangeably with any one of the expressions "in dependence of" and "in accordance with".

[0033] Brief of the

[0034] The above objects, as well as additional objects, features, and advantages of the present disclosure, will be more fully appreciated by reference to the following illustrative and non-limiting detailed description of example embodiments of the present disclosure, when taken in conjunction with the accompanying drawings. Figure 1A is a schematic drawing illustrating a multi-antenna receiver arrangement according to some embodiments;

[0035] Figure IB is a flowchart illustrating some method steps according to some embodiments;

[0036] Figure 1C is a flowchart illustrating some method steps according to some embodiments;

[0037] Figure ID is a schematic drawing illustrating a processor according to some embodiments;

[0038] Figure IE is a schematic drawing illustrating a digital interface chip according to some embodiments;

[0039] Figure IF is a schematic drawing illustrating a multi-antenna receiver arrangement according to some embodiments;

[0040] Figure 2 is a schematic drawing illustrating a computer readable (storage) medium according to some embodiments;

[0041] Figure 3A is a flowchart illustrating actions / method steps implemented in a multiantenna (transmitter and) receiver arrangement (MARA / MATARA) and / or in a processor according to some embodiments;

[0042] Figure 3B is a flowchart illustrating actions / method steps implemented in a multiantenna (transmitter and) receiver arrangement (MARA / MATARA) and / or in a processor according to some embodiments; and

[0043] Figure 4 is a schematic drawing illustrating a system comprising wireless devices and transceiver nodes according to some embodiments.

[0044] Detailed description

[0045] The present disclosure will now be described with reference to the accompanying drawings, in which preferred example embodiments of the disclosure are shown. The disclosure may, however, be embodied in other forms and should not be construed as limited to the herein disclosed embodiments. The disclosed embodiments are provided to fully convey the scope of the disclosure to the skilled person.

[0046] Terminology

[0047] Herein is referred to a processor / processing unit. The processor may be a digital processor. Alternatively, the processor may be a microprocessor, a microcontroller, a central processing unit, a co-processor, a graphics processing unit (GPU), a digital signal processor (DSP), an image signal processor, a quantum processing unit, or an analog signal processor. The processing unit may comprise one or more processors and optionally other units, such as a control unit. Thus, the processor may be implemented as a single-processor, a dualprocessor system, or a multiprocessor system. Furthermore, the invention can also be practiced in distributed computing environments where certain tasks are performed by remote processing devices that are linked through a communications network, e.g., 5G, to one or more local processors. In a distributed computing environment, program modules can be located in both local and remote memory storage devices. Moreover, some processing (e.g., for the data plane) may be moved to a centralized node, such as a centralized transceiver node (TNode). For example, baseband processing and / or higher layer processing, such as processing at layers above the physical layer, may be moved to a cloud, such as an mmW RAN cloud (wherein processing is performed by cloud processors). Such a (mmW) cloud deployment may bring significant cost savings to the operator due to centralized processing, collaborative radio processing, and availability of cheap commodity hardware.

[0048] Herein is referred to a baseband (BB) processor / processing unit. A BB processor is a processor specifically adapted for processing baseband signals / data.

[0049] Herein is referred to a control unit. A control unit may be a processor or a processing unit.

[0050] Herein is referred to millimetre Wave (mmW) utilization, mmW communication, mmW communication capability and mmW frequency range. The mmW frequency range is from 24.25 Gigahertz (GHz) to 71 GHz or more generally from 24 to 300 GHz. The mmW frequency range may also be referred to as Frequency Range 2 (FR2).

[0051] Herein is referred to a chip. A chip is an integrated circuit (chip) or a monolithic integrated circuit (chip) and may also be referred to as an IC, or a microchip. Herein is referred to a wireless device (WD). A wireless device is any device capable of transmitting or receiving signals wirelessly. Some examples of wireless devices are user equipment (UE), mobile phones, cell phones, smart phones, Internet of Things (loT) devices, vehicle-to-everything (V2X) devices, vehicle-to-infrastructure (V2I) devices, vehicle-to-network (V2N) devices, vehicle-to-vehicle (V2V) devices, vehicle-to-pedestrian (V2P) devices, vehicle- to-device (V2D) devices, vehicle-to-grid (V2G) devices, fixed wireless access (FWA) points, and tablets.

[0052] Herein is referred to a "transceiver node" (TNode). A TNode may be a radio unit (RRU), a repeater, a wireless node, or a base station (BS), such as a radio base station (RBS), a Node B, an Evolved Node B (eNB) or a gNodeB (gNB). Thus, a TNode may be a network (NW) node. Furthermore, a TNode may be a BS for a neighbouring cell, a BS for a handover (HO) candidate cell, a radio unit (RRU), a distributed unit (DU), another WD (e.g., a remote WD) or a base station (BS) for a (active / deactivated) secondary cell (SCell) or for a serving / primary cell (PCell, e.g., associated with an active TCI state), a laptop, a wireless station, a relay, a repeater device, a reconfigurable intelligent surface, or a large intelligent surface.

[0053] Herein is referred to an antenna unit. An antenna unit may be one single antenna. However, an antenna unit may also be a dual antenna, such as a dual patch antenna with a first (e.g., horizontal) and a second (e.g., vertical) polarization, thus functioning as two separate antennas or an antenna unit having two ports. Moreover, an antenna unit may be an antenna array, e.g., if analog beamforming is performed.

[0054] The polarization of an antenna refers to the orientation of the electric field of the radio wave transmitted by it and is determined by the physical structure of the antenna and its orientation. E.g., an antenna composed of a linear conductor (such as a dipole or whip antenna) oriented vertically will result in vertical polarization; if turned on its side the same antenna's polarization will be horizontal.

[0055] Herein is referred to "bandwidth part". A bandwidth part (BWP) is a bandwidth (or a frequency range) configured for a WD. The BWP is a part / portion of the total / full transmission bandwidth and the WD may be configured to monitor only a single BWP (instead of monitoring the full transmission bandwidth), due to the fact that the WD cannot receive the full transmission bandwidth (e.g., due to reduced capability of the WD or due to the WD being in a mode of reduced complexity, or in order to save power, e.g., if the WD has capacity for the full transmission bandwidth). It is also possible for a WD to monitor more than one BWP, e.g., monitor two separate BWPs.

[0056] Herein is referred to a maximum data interface rate and to a maximum data transfer rate. An interface (or interface chip), such as a digital interface (chip), has a maximum data interface rate, which is the maximum data rate the interface can utilize, i.e., the maximum rate the interface can utilize for all data transferred. However, the interface (chip) needs to send and receive control bits to / from the circuit(s), e.g., a processor, it communicates with. As an example, the maximum data interface rate is 64 Gb / s. However, the internal data signaling and control logic signaling makes up about 4 GB / s. Thus, the remaining portion (approximately 60 GB / s) can be utilized for transferring signals other than control bits. This remaining portion is referred to herein as "max user data transfer rate" or "maximum data transfer rate".

[0057] Herein is referred to a "snapshot transfer rate" and to a "snapshot rate". Snapshot transfer rate and snapshot rate can be used interchangeably.

[0058] Basic concept

[0059] The data information that needs to be transferred / transmitted over / via a digital interface chip (compressing the data information) on the receiver side (at a wireless device) to a processor, such as a baseband (BB) processor, is: the compressed signal, e.g., a maximum of M virtual streams; and the snapshots taken of antenna / channel information (e.g., reference signals or information comprising reference signals) from all N antennas.

[0060] However, the maximum / total data transfer / transmission rate of the digital interface chip is constrained / limited. A basic concept of this invention is that the data information transmitted over the digital interface is improved / optimized for the constrained / limited maximum / total data transfer / transmission rate. This is achieved by determining a number m of streams, where m is smaller than or equal to M (m<=M) to transfer / transmit over / via the digital interface chip (to the processor) and determining a snapshot transfer / transmission rate for transferring / transmitting snapshots over / via the digital interface chip (to the processor). The determining (of m and of the snapshot transfer rate) is based on connection configuration information of a current communication (between a remote transceiver node and a wireless device comprising a multi-antenna receiver arrangement, which comprises the digital interface and the processor) and optionally based on obtained radio channel characteristics, which is obtained based on one or more snapshots obtained by extracting reference signals from received analog / digital signals (i.e., based on one or more snapshots obtained from the communication with the transceiver node).

[0061] Embodiments

[0062] In the following, embodiments will be described where figure 1A illustrates a multiantenna receiver arrangement (MARA) 400 according to some embodiments and figures 1B- 1C illustrate some method steps according to some embodiments. The method 100 is for a MARA 400. The MARA 400 comprises a first plurality (NRX) of antenna units 700, 701, ..., 715. Moreover, the MARA 400 comprises one or more receivers / transceivers 500, 501, ..., 515 (connected or connectable to the antenna units 700, 701, ..., 715). Furthermore, the MARA 400 comprises a first and a second digital interface units and / or a first and a second digital interface chip (DIG) 320A, 320B (comprising the first and the second digital interface units respectively). The first DIG 320A is connected or connectable to the one or more receivers / transceivers 500, 501, ..., 515. Moreover, the MARA 400 comprises a first and a second processing unit 930A, 930B. The first processing unit 930A is connected or connectable to the first DIG 320A and to the second DIG 320B. The second processing unit 930B is connected or connectable to the second DIG 320B. However, in some embodiments, a processor 930 comprises the first processing unit 930A and the second processing unit 930B (as illustrated in figure ID) or the first and the second processing units 930A, 930B is the same processor 930. Furthermore, in some embodiments, a DIG 320 comprises the first DIG 320A and the second DIG 320B (as illustrated in figure IE) or the first and the second DICs 320A, 320B is the same DIG 320. In some embodiments, one or more of the processor 930, the first processing unit 930A, and the second processing unit 930B is a baseband (BB) processor. The multi-antenna receiver arrangement (MARA) 400 is comprisable in a wireless device (WD) 302 (shown in figure 4), i.e., in some embodiments, the WD 302 comprises the MARA 400. The method 100 comprises obtaining 110 connection configuration information (CGI) of a current communication (or communication session) with one or more remote transceiver nodes (TNodes) 397, 398, 399. Obtaining 110 may be performed by the processor 930. Alternatively, or additionally, obtaining 110 is performed by a connection control unit (not shown). In some embodiments, the processor 930 comprises the connection control unit. The connection control unit determines a connection configuration for the connection between the WD 302 / MARA 400 and the remote Tnode 397, 398, 399. The connection configuration information is, in some embodiments, obtained from information received from the remote TNode 397, 398, 399 on / via the Radio Resource Control (RRC) layer. Alternatively, the connection configuration information is obtained from information received from the remote TNode 397, 398, 399 on / via one or more of a medium access control (MAC) layer, a physical (PHY) layer, an application layer and the RRC layer. As an example, information about selectable configurations is received via the RRC layer (e.g., with a label), and information about which one of the selectable configurations to use (or which is used) for the current communication is received via one or more of the MAC layer and the PHY layer (e.g., the label of one of the selectable configurations is received via one or more of the PHY / MAC layer). The connection configuration information indicates (directly or indirectly) a connection configuration for the WD 302 / MARA 400. The connection configuration may be associated with the bandwidth of the signal the WD 302 / MARA 400 needs to receive and process. The connection configuration is one or more of: a carrier aggregation (CA) configuration; a dual connectivity (DC) configuration; a bandwidth part (BWP) configuration; and a frequency range configuration. Furthermore, the method comprises receiving 120, by the one or more receivers / transceivers 500, 501, ..., 515 (e.g., via antennas 700, 701, ..., 715), a first plurality of analog radio signals, e.g., from one or more of the remote TNodes 397, 398, 399. Thus, in some embodiments, a first plurality of receivers / transceivers 500, 501, ..., 515 are configured to receive the first plurality of analog radio signals via the first plurality of antenna units 700, 701, ..., 715. The analog radio signals comprise or correspond / relate to the current communication. Moreover, the method 100 comprises converting 125 the first plurality of analog radio signals into a first plurality of digital signals. In some embodiments, the number of analog radio signals (of the first plurality of analog radio signals) is equal to the number of digital signals (of the first plurality of digital signals). Converting 125 may be performed by the DIC 320. The DIG 320 (or the first DIG 320A) comprises a (fourth) plurality (I) of analog to digital converters (ADCs) 600, 601, ..., 615. The ADCs 600, 601, ..., 615 are configured to convert the first plurality (NRX) of analog radio signals into a first plurality (NRX) of digital, e.g., baseband, signals. Thus, in some embodiments, converting 125 is performed by the ADCs 600, 601, ..., 615 (of the DIC 320 or of the first DIC 320A). The method 100 comprises obtaining 128 one or more snapshots (SS) of the first plurality of digital signals. Obtaining 128 is, in some embodiments, performed by the processor 930 (or by the first processing unit 930A). The processor 930 or the processing unit 930A may comprise an extraction unit 900 and the extraction unit 900 performs the obtaining 128. Alternatively, the extraction unit 900 performing the obtaining 128 is external to the processor 930, but connected or connectable to the processor 930. The obtaining 128 is performed by extracting reference signals (or synchronization signals) from each of the first plurality of digital signals at one or more time instants. Thus, each snapshot corresponds to one of the one or more time instants (and only to one of the one or more time instants). Le., each snapshot comprises information about the reference signals from each of the first plurality of digital signals at the corresponding time instant. The reference / synchronization signals may be one or more of Synchronization Signal Blocks (SSBs), channel state information reference signals (CSI-RSs), demodulation reference signals (DMRSs), and Phase Tracking Reference signals (PT-RSs). Furthermore, the method 100 comprises determining 140 a first snapshot transfer rate (STR1). The snapshot transfer rate is the rate for transfer (or transmission) of snapshots of the first plurality of digital signals over / via / from the digital interface chip (to the processor and / or other units). The snapshot transfer rate is e.g., 0.5, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 15, 20, 25 30, 35, 40, 60, or 80 ms. Determining 140 is performed by the processor 930 (or by the first processing unit 930A or by the second processing unit 930B). The determining 140 is based on the obtained connection configuration information. As an example, the first snapshot transfer rate may be set to a first value if the connection configuration information indicates that the connection configuration is a CA configuration, to a second value, e.g., different from the first value, if the connection configuration information indicates that the connection configuration is a DC configuration, to a third value, e.g., different from the first and / or second values, if the connection configuration information indicates that the connection configuration is a BWP configuration, and to a fourth value, e.g., different from the first, second, and / or third values, if the connection configuration information indicates that the connection configuration is a frequency range configuration. Alternatively, or additionally, the first snapshot transfer rate is dependent on a bandwidth (BW) of the signal. In some embodiments, this BW is a system BW. Alternatively, the BW is a UE specific channel BW. E.g., if the BW is 400 MHz (or lower than a first BW threshold) the first snapshot transfer rate is set to a fifth value (e.g., equal to the first value), and if the BW is 800 MHz (or higher than a first or second, different from the first, BW threshold) the first snapshot transfer rate is set to a sixth value, different from the fifth value (e.g., equal to the second value).

[0063] Moreover, the method comprises determining 150 a second plurality (2P) of digital signals to be transferred from the digital interface to the processor 930 based on the determined first snapshot rate. The second plurality is smaller than the first plurality, i.e., the second plurality (2P) of digital signals is smaller / lower in number than the first plurality of digital signals (or the number of digital signals of the second plurality of digital signals is smaller / lower than the number of digital signals of the first plurality of digital signals). As an example, if the first snapshot rate is high (e.g., higher than a snapshot rate threshold), the second plurality (i.e., the number of digital signals of the second plurality of digital signals) is determined to be low / small (e.g., lower than a second plurality threshold), and if the first snapshot rate is low (e.g., lower than a snapshot rate threshold), the second plurality (i.e., the number of digital signals of the second plurality of digital signals) is determined to be large / high / great (e.g., larger / higher / greater than the second plurality threshold). Thus, the second plurality of digital signals to be transferred from the digital interface to the processor 930 is determined based on the determined first snapshot rate. By basing the determining 150 on the determined first snapshot rate, it can be ensured that the combined transfer rate of snapshots and second plurality of digital signals (i.e., the total data transfer rate of both snapshots and digital signals) does not exceed the total possible data transfer rate (i.e., the maximum data transfer rate). Furthermore, in some embodiments, the MATA 400 and / or the DIG 320 (e.g., the second DIG 320B) comprises a plurality (mmax) of spatial filters or spatiotemporal filters (STFs) 800, ..., 807. The spatio-temporal filters 800, ..., 807 are utilized for compressing the first plurality of digital signals to / into a fifth plurality of digital signals. Moreover, in some embodiments, the second plurality is smaller than or equal to the fifth plurality, i.e., the number of signals of the second plurality of digital signals is smaller than or equal to the number of signals of the fifth plurality of digital signals (and / or the plurality / number of spatio-temporal filters 800, ..., 807 is equal to the number of signals of the fifth plurality of digital signals). Additionally, or alternatively, the second plurality of digital signals (i.e., the number of digital signals of the second plurality of digital signals) is determined under the constraints of a number of antennas (e.g., cannot be higher than the number of antennas utilized) and / or a maximum data interface / transfer rate (e.g., cannot be higher than the maximum data interface rate or the maximum data transfer rate). The method comprises configuring 160 the DIG 320 (e.g., the second DIG 320A) to transmit / transfer snapshots with the first snapshot rate (over a first time period). Furthermore, the method comprises configuring 170 the DIG 320 (e.g., the second DIG 320A) to transmit / transfer the second plurality of digital signals to the processor 930 over a first time period. Alternatively, or additionally, the method comprises configuring 170 the DIG 320 to transmit the second plurality of digital signals to one or more of a transform unit 940, a post-processing unit 960, and a decoder 980, e.g., over a first time period. However, in some embodiments, the processor 930 comprises one or more of the transform unit 940, the post-processing unit 960, and the decoder 980. Configuring 160, 170 is performed by the processor 930. The configuration (configuring 160 and / or configuring 170) is valid for the first time period. In some embodiments, the first time period is a pre-determined time period, such as 5, 10, 20, 30, 40 or 80 milliseconds (ms). Alternatively, the first time period is determined based on obtained radio channel characteristics (obtained as described below).

[0064] In some embodiments, the method 100 comprises obtaining 130 (for each of the first plurality of digital signals) radio channel characteristics based on the one or more snapshots. Obtaining 130 is performed by the processor 930 (e.g., the first processing unit 930A) and / or by the extraction unit 900. In some embodiments, the extraction unit 900 comprises a first plurality (NRX) of sub-extraction units 901, 902, ..., 916, i.e., one sub-extraction unit for each digital signal. Each sub-extraction unit 901, 902, ..., 916 extracts reference signals from a corresponding / associated digital signal (at the time instant of the / each snapshot). Furthermore, in some embodiments, the MARA 400 and / or the processor 930 (e.g., the processing unit 930B) comprises a channel analyser 920. The channel analyser 920 receives the extracted reference signals from the first processing unit 930A (e.g., if the processing unit 930A comprises the extraction unit 900) or directly from the extraction unit 900 (e.g., if the processor 930 comprises both the extraction unit 900 and the channel analyser 920). Furthermore, the channel analyser 920 is configured to determine / estimate or determines / estimates radio channel characteristics for each of the first plurality (NRX) of digital signals based on the extracted reference signals, i.e., the channel analyser 920 estimates the radio channel based on the extracted reference signals, and then estimates / determines / calculates radio channel characteristics based on the estimated radio channel. In some embodiments, the radio channel characteristics is determined as a function of several snapshots (e.g., consecutive in time), e.g., in order to determine the time-varying characteristics of the channel, such as a time dispersion variation, an angle of arrival (AoA) variation, and / or a Doppler rate / shift. Furthermore, in some embodiments, determining 140 the first snapshot transfer rate is further based on the obtained radio channel characteristics, i.e., determining 140 the first snapshot transfer rate is based on the obtained connection configuration information and based on the obtained radio channel characteristics. In some embodiments, the obtained radio channel characteristics is one or more of: a radio channel variation measure; an estimated doppler rate / shift; a time-dispersion measure; a frequency selectivity measure; and an AoA variation measure. As an example, assuming that the channel analyser 920 estimates the radio channel utilizing the Saleh-Valenzuela channel model (which is a common model for mmW channels exhibiting e.g., high reflectivity and / or low diffusion) as a ray / cluster channel comprising a combination of a discrete set of rays, if the radio channel characteristics indicates fast variations of a number of clusters (e.g., faster than a cluster variation threshold) and / or fast variations in AoA (e.g., faster than an AoA variation threshold) of one or more of the clusters (i.e., the variation rate is in the same order of magnitude as the currently used snapshot transfer rate for one or more of the clusters), the snapshot transfer rate may be increased, e.g., from transferring once every 40 ms to transferring once every 5 ms. However, such an increase in the snapshot transfer rate will increase the amount of data needed for transferring the snapshots, thus due to the limited data rate (i.e., the total possible data transfer rate) over the digital interface (chip), the number of digital signals to be transferred from the digital interface to the processor (i.e., the virtual streams transmitted over the digital interface) may need to be reduced, e.g., from 4 to 2 or 3 (assuming mmax =4).

[0065] As another example, if the radio channel characteristics indicate slow variations of the AoA (e.g., significantly slower than the current snapshot rate or slower than an AoA variation threshold), the snapshot transfer rate may be reduced (e.g., from transferring once every 20 ms to transferring once every 40 ms), while transferring / transmitting as many, e.g., mmax (i.e., the second plurality equals mmax or the number of digital signals of the second plurality of digital signals equals mmax), digital signals (or virtual streams) over the digital interface (chip) as possible (i.e., as long as the total data transfer rate of both snapshots and digital signals is equal to or below the total possible data transfer rate (i.e., the maximum data transfer rate of the digital interface).

[0066] As yet another example, if the radio channel characteristics indicates a Line of Sight (LoS) channel, and hence indicates only a few multi-paths and slow AoA, the channel analyser 920 may configure the digital interface to transmit / transfer snapshots once every 80 ms (or once every 40 ms), and only transmit / transfer a few, e.g., 2, digital signals (or virtual streams; the second plurality or the number of digital signals of the second plurality of digital signals equals e.g., 2) over the digital interface. Thus, the data rate over the interface may be well below the total possible data transfer rate, and hence the power consumption of the digital interface (chip) is reduced.

[0067] In some embodiments, the connection configuration (as indicated directly or implicitly by the connection configuration information) is a CA configuration. Alternatively, the connection configuration is a DC configuration. Furthermore, an aggregated bandwidth of the carrier aggregation or the DC configuration is smaller than 75 percent (%) of the full bandwidth supported by the WD 302. Alternatively, the aggregated bandwidth is smaller than 95%, 90%, 85%, 80%, 70%, 60%, 50%, 40%, 30%, 25%, 20%, 15%, 10%, or 5% of the full bandwidth supported by the WD 302. As yet another alternative, the aggregated bandwidth is smaller than a bandwidth threshold (wherein the bandwidth threshold is 95%, 90%, 85%, 80%, 75%, 70%, 60%, 50%, 40%, 30%, 25%, 20%, 15%, 10%, or 5% of the full bandwidth supported by the WD 302). If the aggregated bandwidth of the carrier aggregation or the DC configuration is smaller than 75 percent of the full bandwidth supported by the WD 302 or smaller than the bandwidth threshold, the method further comprises, in some embodiments, determining 175, by the processor 930 (or by the first processing unit 930A or by the second processing unit 930B), a second snapshot transfer rate (STR2) based on the first snapshot transfer rate and / or based on a ratio between the aggregated bandwidth and the full bandwidth supported by the WD 302. The second snapshot transfer rate is higher than the first snapshot transfer rate. In some embodiments, the second snapshot transfer rate (STR2) is equal to the first snapshot transfer rate (STR1) times the full bandwidth supported by the WD 302 (FB) divided by the aggregated bandwidth (AB).

[0068] Furthermore, if the aggregated bandwidth of the CA or the DC configuration is smaller than 75 percent of the full bandwidth supported by the WD 302 or smaller than the bandwidth threshold, the method further comprises determining 180 a third plurality of digital signals to be transferred from the digital interface to the processor 930 based on the determined second snapshot rate. The third plurality of digital signals is dependent on the determined second snapshot rate, e.g., since the total data transfer rate of both snapshots and digital signals is limited. Thus, in some embodiments, the third plurality of digital signals is determined based on a difference between the total (possible) data transfer rate and the determined second snapshot rate. Moreover, if the aggregated bandwidth of the CA or the DC configuration is smaller than 75 percent of the full bandwidth supported by the WD 302 or smaller than the bandwidth threshold, the method further comprises reconfiguring 185 the DIC 320 to transmit snapshots with the second snapshot rate (instead of with the first snapshot rate), e.g., over the first time period; and / or reconfiguring 190 the DIC 320 to transfer / transmit the third plurality of digital signals (instead of the second plurality of digital signals) to the processor 930 over the first time period. If the aggregated bandwidth of the carrier aggregation or the DC configuration is larger than (or equal to) 75 percent of the full bandwidth supported by the WD 302 or larger than (or equal to) the bandwidth threshold, the first snapshot transfer rate is utilized and the second plurality of digital signals is transferred (i.e., the steps of determining 175, determining 180, reconfiguring 185, and reconfiguring 190 are omitted).

[0069] In some embodiments, the connection configuration (as indicated directly or implicitly by the connection configuration information) is a BWP configuration. Furthermore, the BWP of the BWP configuration is set to be smaller than a threshold, such as a BWP threshold. The BWP threshold may be 10 MHz, 50 MHz, 100 MHz, or 500 MHz. Moreover, in these embodiments, the method comprises determining 176, by the processor 930 (or by the first processing unit 930A or by the second processing unit 930B), a third snapshot transfer rate (STR3) based on the first snapshot transfer rate and / or based on a ratio between the BWP and the full bandwidth supported by the WD 302. The third snapshot transfer rate is smaller than the first snapshot transfer rate. In some embodiments, the third snapshot transfer rate (STR3) is equal to the first snapshot transfer rate (STR1) times the BWP divided by the full bandwidth supported by the WD 302 (FB).

[0070] Furthermore, in these embodiments, the method comprises determining 181 a fourth plurality of digital signals to be transferred from the digital interface (chip) to the processor 930 based on the determined third snapshot rate. The fourth plurality of digital signals is dependent on the determined third snapshot rate, e.g., since the total data transfer rate of both snapshots and digital signals is limited. Thus, in some embodiments, the fourth plurality of digital signals is determined based on a difference between the total possible data transfer rate and the determined third snapshot rate. Moreover, in these embodiments, the method comprises reconfiguring 186 the DIG 320 to transfer / transmit snapshots with the third snapshot rate (instead of with the first snapshot rate), e.g., over the first time period; and reconfiguring 191 the DIG 320 to transfer / transmit the fourth plurality of digital signals (instead of the second plurality of digital signals) to the processor 930 over the first time period.

[0071] In some embodiments, the method 100 comprises repeating 195 one or more of the steps obtaining 110, receiving 120, converting 125, obtaining 128, determining 140, determining 150, configuring 160, configuring 170 and optionally one or more of the steps obtaining 130, determining 175, determining 176, determining 180, determining 181, reconfiguring 185, reconfiguring 186, reconfiguring 190, and reconfiguring 191.

[0072] Figure ID illustrates a processor 930 according to some embodiments. The processor 930 comprises the first processing unit 930A and the second processing unit 930B. The first processing unit 930A comprises the extraction unit 900. The extraction unit 900 is, in some embodiments, configured to extract reference signals from each of the first plurality of digital signals. Furthermore, the second processing unit 930B comprises a channel analyser 920. In some embodiments, the channel analyser 920 is configured to determine (radio) characteristics for each of the first plurality of digital signals based on the extracted reference signals. Moreover, in some embodiments, the second processing unit 930B comprises a transform unit 940. The transform unit 940 is configured to transform each of a (second) plurality of combined signals (received from the second DIG 320B) into a frequency domain. In some embodiments, the second processing unit 930B comprises a post-processing unit 960. The post-processing unit 960 is configured to post-process the transformed signals in the frequency domain to obtain a (seventh) plurality of frequency domain processed signals. The post-processing unit 960 is connected or connectable to the transform unit 940. Furthermore, in some embodiments, the second processing unit 930B comprises a decoder 980. The decoder 980 is configured to decode the (seventh) plurality of frequency domain processed signals. The decoder 980 is connected or connectable to the post-processing unit 960. Figure IE illustrating a digital interface chip (DIG) 320 according to some embodiments. The DIG 320 comprises the first DIG 320A and the second DIG 320B. The first DIG 320A comprises a plurality of analog to digital converters (ADCs) 600, 601, ..., 615. The ADCs 600, 601, ..., 615 are, in some embodiments, configured to convert the first plurality of analog radio signals into a first plurality of digital signals. Furthermore, the second DIC 320B comprises the plurality of spatio-temporal filters 800, ..., 807. The spatio-temporal filters 800, ..., 807 are, in some embodiments, configured to process the first plurality of digital signals to obtain a plurality of combined signals (wherein the number of combined signals of the plurality of combined signals is equal to the number of spatio-temporal filters of the plurality of spatiotemporal filters 800, ..., 807).

[0073] Figure IF illustrates a multi-antenna receiver arrangement (MARA) 400 according to some embodiments. Figure IF is identical to figure 1A except for that the first and the second DICs 320A, 320B are the same DIC 320 (or the DIC 320 comprises the first and the second DICs 320A, 320B) and that the first and the second processing units 930A, 930B are the same processor 930 (or the processor 930 comprises the first and the second processing units 930A, 930B).

[0074] In some embodiments, the MARA 400 is a multi-antenna receiver and transmitter arrangement (MATARA). In these embodiments, the MATARA comprises one or more transceivers (and not receivers) 500, 501, ..., 515, which are configured to receive and transmit analog radio signals via the first plurality of antenna units 700, 701, ..., 715 (e.g., transmit at a first time instant and receive at a second, different from the first, time instant). Furthermore, in some embodiments, the MARA 400 (or the MATARA) is a processing device.

[0075] According to some embodiments, a computer program product comprising a non- transitory computer readable medium 200, such as a punch card, a compact disc (CD) ROM, a read only memory (ROM), a digital versatile disc (DVD), an embedded drive, a plug-in card, or a universal serial bus (USB) memory, is provided. Figure 2 illustrates an example computer readable medium in the form of a compact disc (CD) ROM 200. The computer readable medium has stored thereon, a computer program comprising program instructions. The computer program is loadable into a data processor (PROC) 220, which may, for example, be comprised in a computer or a computing device or the control unit described above in connection with figures 1A-1F. When loaded into the data processor 220, the computer program may be stored in a memory (MEM) 230 associated with or comprised in the data processor 220. According to some embodiments, the computer program may, when loaded into and run by the data processor 220, cause execution of method steps according to, for example, the method illustrated in figures 1B-1C, which is described herein. Furthermore, in some embodiments, there is provided a computer program product comprising instructions, which, when executed on at least one processor of a processing device, cause the processing device to carry out the method illustrated in figure 1B-1C. Moreover, in some embodiments, there is provided a non-transitory computer-readable storage medium storing one or more programs configured to be executed by one or more processors of a processing device, the one or more programs comprising instructions which, when executed by the processing device, causes the processing device to carry out the method illustrated in figure IB and / or 1C.

[0076] Figure 3 illustrates actions / method steps caused by the processor 930 (described above) or controlling circuitry (or the control unit) thereof. The processor 930 is comprised or comprisable in the WD 302 and / or in the MARA 400 (both described above). The processor 930 is for (control of) the MARA 400 (described above). The processor 930 and / or the control circuitry thereof is configured to cause obtainment 310 of connection configuration information of a current communication with a remote transceiver node (TNode) 398, 399, 399. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a first obtaining unit (e.g., first obtaining circuitry, a first obtainer, one or more transceivers 500, 501, ..., 515, and / or antennas 700, 701, ..., 715). Furthermore, the processor 930 and / or the control circuitry thereof is configured to cause reception 320 of a first plurality of analog radio signals. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a first receiving unit (e.g., first receiving circuitry, a first receiver, one or more transceivers 500, 501, ..., 515, and / or antennas 700, 701, ..., 715). Moreover, the processor 930 and / or the control circuitry thereof is configured to cause conversion 325 of the first plurality of analog radio signals into a first plurality of digital signals. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a first converting unit (e.g., first converting circuitry, a first converter, ADCs 600, 601, ..., 615 and / or the DIC 320). The processor 930 and / or the control circuitry thereof is configured to cause obtainment 328 of one or more snapshots (SS) of the first plurality of digital signals by extracting reference signals from each of the first plurality of digital signals at one or more time instants, each snapshot corresponding to one of the one or more time instants. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a second obtaining unit (e.g., second obtaining circuitry, a second obtainer, and / or the extraction unit 900). In some embodiments, the processor 930 and / or the control circuitry thereof is configured to cause obtainment 330 of radio channel characteristics based on the one or more snapshots. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a third obtaining unit (e.g., third obtaining circuitry, a third obtainer, the channel analyser 920 and / or the extraction unit 900). Furthermore, the processor 930 and / or the control circuitry thereof is configured to cause determination 340 of a first snapshot transfer rate based on the obtained connection configuration information and optionally based on the obtained radio channel characteristics. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a first determining unit (e.g., first determining circuitry, or a first determiner). Moreover, the processor 930 and / or the control circuitry thereof is configured to cause determination 350 of a second plurality of digital signals to be transferred from the digital interface to the processor 930 based on the determined first snapshot rate, wherein the second plurality is smaller than the first plurality (i.e., the second plurality of digital signals is lower / smaller in number than the first plurality of digital signals or the number of digital signals of the second plurality of digital signals is lower / smaller than the number of digital signals of the first plurality of digital signals). To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a second determining unit (e.g., second determining circuitry, the first determiner or a second determiner). The processor 930 and / or the control circuitry thereof is configured to cause configuration 360 of the DIG 320 to transmit snapshots with the first snapshot rate (over a first time period). To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a first configuration unit (e.g., first configuring circuitry, a first configurer). Furthermore, the processor 930 and / or the control circuitry thereof is configured to cause configuration 370 of the DIG 320 to transmit the second plurality of digital signals to the processor over a first time period. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a second configuration unit (e.g., second configuring circuitry, the first configurer, or a second configurer). In some embodiments, the processor 930 and / or the control circuitry thereof is configured to cause determination 375 of a second snapshot transfer rate based on the first snapshot transfer rate and / or based on a ratio between the aggregated bandwidth and the full bandwidth supported by the WD 302. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a third determining unit (e.g., third determining circuitry, the first determiner or a third determiner). In some embodiments, the processor 930 and / or the control circuitry thereof is configured to cause determination 376 of a third snapshot transfer rate based on the first snapshot transfer rate and / or based on a ratio between the BWP and the full bandwidth supported by the WD 302. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a fourth determining unit (e.g., fourth determining circuitry, the first determiner or a fourth determiner). In some embodiments, the processor 930 and / or the control circuitry thereof is configured to cause determination 380 of a third plurality of digital signals to be transferred from the digital interface to the processor 930 based on the determined second snapshot rate. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a fifth determining unit (e.g., fifth determining circuitry, the first determiner or a fifth determiner). In some embodiments, the processor 930 and / or the control circuitry thereof is configured to cause determination 381 of a fourth plurality of digital signals to be transferred from the digital interface to the processor 930 based on the determined third snapshot rate. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a seventh determining unit (e.g., seventh determining circuitry, the first determiner or a seventh determiner). In some embodiments, the processor 930 and / or the control circuitry thereof is configured to cause reconfiguration 385 of the DIG 320 to transmit snapshots with the second snapshot rate (over the first time period); and / or reconfiguration 390 of the DIG 320 to transmit the third plurality of digital signals to the processor over the first time period. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a third configuration unit (e.g., third configuring circuitry, the first configurer, a third configurer, or a first reconfigurer). In some embodiments, the processor 930 and / or the control circuitry thereof is configured to cause reconfiguration 386 of the DIG 320 to transmit snapshots with the third snapshot rate (over the first time period); and reconfiguration 391 of the DIG 320 to transmit the fourth plurality of digital signals to the processor over the first time period. To this end, the processor 930 may be associated with (e.g., operatively connectable, or connected, to) a fourth configuration unit (e.g., fourth configuring circuitry, the first configurer, a fourth configurer, the first reconfigurer or a second reconfigurer). In some embodiments, the controlling circuitry is configured to cause repetition 395 of one or more of the steps obtainment 310, reception 320, conversion 325, obtainment 328, determination 340, determination 350, configuration 360, configuration 370 and optionally one or more of the steps obtainment 330, determination 375, determination 376, determination 380, determination 381, reconfiguration 385, reconfiguration 386, reconfiguration 390, and reconfiguration 391. To this end, the controlling circuitry may be associated with (e.g., operatively connectable, or connected, to) a repetition unit (e.g., repetition circuitry or a repeater).

[0077] Figure 4 illustrates a system 999. The system 999 may be a wireless / cellular communication system, a cellular network, a mobile network, a telecommunications network, a cellular radio system, a digital cellular network, a mobile phone network, a mobile phone cellular network, such as 1G, 2G, 3G, 4G, 5G, 6G or similar. Furthermore, the system 999 comprises one or more wireless devices (WD) 302, 303, ..., 308. Moreover, the system 999 comprises one or more transceiver nodes (TNodes) 397, 398, 399. The one or more TNodes

[0078] 397, 398, 399 may be base stations (gNBs, eNBs, RBS), remote radio units (RRUs), or remote wireless nodes. The WD 302 (as well as the WDs 303, ..., 308) is, in some embodiments, configured to communicate with (e.g., send and / or receive signals, such as radio signals, e.g., comprising baseband / information signals, to / from) one or more of the remote TNodes 397,

[0079] 398, 399. In some embodiments, the communication between the WD 302 (as well as the WDs 303, ..., 308) and the remote TNodes 397, 398, 399 is performed with radio signals in the mmW frequency range.

[0080] Herein is referred to a first plurality of analog radio signals, a first plurality of digital signals, a first plurality of antenna units 700, 701, ..., 715, a first plurality of receivers / transceivers 500, 501, ..., 515, and a first plurality of sub-extraction units 901, 902, ..., 916. In some embodiments, the first plurality of analog radio signals is equal in number (i.e., NRX) to one or more of the first plurality of digital signals, antenna units 700, 701, ..., 715, the first plurality of receivers / transceivers 500, 501, ..., 515, and the first plurality of subextraction units 901, 902, ..., 916. Furthermore, herein is referred to a second plurality of digital signals, a second plurality of spatio-temporal filters (STFs) 800, ..., 807, and a (second) plurality of combined signals. In some embodiments, the second plurality of digital signals is equal in number (i.e., mmax or 2P) to one or more of the second plurality of spatio-temporal filters (STFs) 800, ..., 807, and the (second) plurality of combined signals. Moreover, herein is referred to a third plurality of digital signals. In some embodiments, the third plurality of digital signals is smaller / lower in number than one or more of the first plurality of digital signals and the second plurality of digital signals. Herein is referred to a fourth plurality of digital signals. In some embodiments, the fourth plurality of digital signals is smaller / lower in number than one or more of the first plurality of digital signals, the second plurality of digital signals, and the third plurality of digital signals. Furthermore, herein is referred to a fifth plurality of digital signals. In some embodiments, the number of signals of the second plurality of digital signals is smaller than or equal to the number of signals of the fifth plurality of digital signals. Moreover, herein is referred to a (fourth) plurality of ADCs 600, 601, ..., 615. In some embodiments, the number of ADCs 600, 601, ..., 615 (of the plurality of ADCs 600, 601, ..., 615) is equal in number to one or more of the first plurality of analog radio signals, and the first / second / third / fourth / fifth plurality of digital signals. Herein is referred to a (seventh) plurality of frequency domain processed signals. In some embodiments, the number of frequency domain processed signals (of the plurality of frequency domain processed signals) is equal or lower / smaller in number than the combined signals (of the plurality of combined signals).

[0081] List of examples:

[0082] Example 1. A method (100) for a multi-antenna receiver arrangement (400), the multi-antenna receiver arrangement (400) comprising transceivers (500, 501, ..., 515), a digital interface chip, DIC, (320), and a processor (930), wherein the multi-antenna receiver arrangement (400) is comprisable in a wireless device, WD, (302), the method comprising: obtaining (110), by the processor (930), connection configuration information of a current communication with a remote transceiver node, TNode (398, 399, 399); receiving (120), by the transceivers (500, 501, ..., 515), a first plurality of analog radio signals; converting (125), by the DIC (320), the first plurality of analog radio signals into a first plurality of digital signals; obtaining (128), by the processor (930), one or more snapshots of the first plurality of digital signals by extracting reference signals from each of the first plurality of digital signals at one or more time instants, each snapshot corresponding to one of the time instants; determining (140), by the processor (930), a first snapshot transfer rate based on the obtained connection configuration information; determining (150) a second plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined first snapshot rate, wherein the second plurality is smaller than the first plurality; configuring (160) the DIG (320) to transfer snapshots with the first snapshot rate; and configuring (170) the DIG (320) to transfer the second plurality of digital signals to the processor over a first time period.

[0083] Example 2. The method of example 1, further comprising: obtaining (130), by the processor (930), radio channel characteristics based on the one or more snapshots; and wherein determining (140), by the processor (930), the first snapshot transfer rate is further based on the obtained radio channel characteristics.

[0084] Example 3. The method of example 1 or example 2, wherein the first time period is a pre-determined time period, such as 20 milliseconds, ms, or wherein the first time period is determined based on the obtained radio channel characteristics.

[0085] Example 4. The method of any one of examples 1-3, wherein the obtained radio channel characteristics is one or more of: a radio channel variation measure; an estimated doppler rate; a time-dispersion measure; a frequency selectivity measure; and an angle of arrival, AoA, variation measure.

[0086] Example 5. The method of any one of examples 1-4, wherein the connection configuration is one or more of: a carrier aggregation, CA, configuration; a dual connectivity, DC, configuration; a bandwidth part, BWP, configuration; and a frequency range configuration.

[0087] Example 6. The method of example 5, wherein the connection configuration is a CA configuration or a DC configuration, and wherein an aggregated bandwidth of the carrier aggregation or the DC configuration is smaller than 75 percent of the full bandwidth supported by the WD (302), the method further comprising: determining (175), by the processor (930), a second snapshot transfer rate based on the first snapshot transfer rate and / or based on a ratio between the aggregated bandwidth and the full bandwidth supported by the WD (302), wherein the second snapshot transfer rate is higher than the first snapshot transfer rate; determining (180) a fifth plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined second snapshot rate; reconfiguring (185) the DIC (320) to transfer snapshots with the second snapshot rate; and reconfiguring (190) the DIC (320) to transfer the fifth plurality of digital signals to the processor over the first time period.

[0088] Example 7. The method of example 5, wherein the connection configuration is a BWP configuration, and wherein the BWP of the BWP configuration is set to be smaller than a threshold, the method further comprising: determining (176), by the processor (930), a third snapshot transfer rate based on the first snapshot transfer rate and / or based on a ratio between the BWP and the full bandwidth supported by the WD (302), wherein the third snapshot transfer rate is smaller than the first snapshot transfer rate; determining (181) a sixth plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined third snapshot rate; reconfiguring (186) the DIG (320) to transfer snapshots with the third snapshot rate; and reconfiguring (191) the DIG (320) to transfer the sixth plurality of digital signals to the processor over the first time period.

[0089] Example 8. A computer program product comprising instructions, which, when executed on at least one processor of a processing device, cause the processing device to carry out the method according to any one of examples 1 to 7.

[0090] Example 9. A non-transitory computer-readable storage medium storing one or more programs configured to be executed by one or more processors of a processing device, the one or more programs comprising instructions which, when executed by the processing device, causes the processing device to carry out the method according to any one of examples 1-7.

[0091] Example 10. A processor for a multi-antenna receiver arrangement (400), comprising controlling circuitry configured to cause: obtainment (310) of connection configuration information of a current communication with a remote transceiver node, TNode (398, 399, 399); reception (315) of a first plurality of analog radio signals; conversion (325) of the first plurality of analog radio signals into a first plurality of digital signals; obtainment (328) of one or more snapshots of the first plurality of digital signals by extracting reference signals from each of the first plurality of digital signals at one or more time instants, each snapshot corresponding to one of the time instants; optionally obtainment (330) of radio channel characteristics based on the one or more snapshots; determination (340) of a first snapshot transfer rate based on the obtained connection configuration information and optionally based on the obtained radio channel characteristics; determination (350) of a second plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined first snapshot rate, wherein the second plurality is smaller than the first plurality; configuration (360) of the DIG (320) to transfer snapshots with the first snapshot rate; and configuration (370) of the DIG (320) to transfer the second plurality of digital signals to the processor over a first time period.

[0092] Example 11. A multi-antenna receiver arrangement (400) comprising: a first plurality (NRX) of antenna units (700, 701, ..., 715); a first plurality of receivers / transceivers (500, 501, ..., 515); a digital interface chip, DIG, (320); and the processor (930) of example 10.

[0093] Example 12. The multi-antenna receiver arrangement of example 11, wherein the first plurality of receivers / transceivers (500, 501, ..., 515) are configured to receive the first plurality of analog radio signals via the first plurality of antenna units (700, 701, ..., 715), wherein the DIG, (320) comprises: a fourth plurality of analog to digital converters (600, 601, ..., 615) configured to convert the first plurality of analog radio signals into a first plurality of digital signals; a second plurality of spatio-temporal filters (800, ..., 807) configured to process the first plurality of digital signals to obtain a second plurality of combined signals; and wherein the processor (930) comprises: an extraction unit (900) configured to extract reference signals from each of the first plurality of digital signals; a channel analyzer (920) configured to determine characteristics for each of the first plurality of digital signals based on the extracted reference signals; and optionally a transform unit (940) configured to transform each of the second plurality of combined signals into a frequency domain, a post-processing unit (960) configured to postprocess the transformed signals in the frequency domain to obtain a seventh plurality of frequency domain processed signals, and a decoder (980) configured to decode the seventh plurality of frequency domain processed signals.

[0094] Example 13. A wireless device, WD, comprising the multi-antenna receiver arrangement (400) of any one of examples 11-12.

[0095] Generally, all terms used herein are to be interpreted according to their ordinary meaning in the relevant technical field, unless a different meaning is clearly given and / or is implied from the context in which it is used. Reference has been made herein to various embodiments. However, a person skilled in the art would recognize numerous variations to the described embodiments that would still fall within the scope of the claims. For example, the method embodiments described herein discloses example methods through steps being performed in a certain order. However, it is recognized that these sequences of events may take place in another order without departing from the scope of the claims. Furthermore, some actions / method steps may be performed in parallel even though they have been described as being performed in sequence. Thus, the steps of any methods disclosed herein do not have to be performed in the exact order disclosed, unless a step is explicitly described as following or preceding another step and / or where it is implicit that a step must follow or precede another step. In the same manner, it should be noted that in the description of embodiments, the partition of functional blocks into particular units is by no means intended as limiting. Contrarily, these partitions are merely examples. Functional blocks described herein as one unit may be split into two or more units. Furthermore, functional blocks described herein as being implemented as two or more units may be merged into fewer e.g., a single) unit. Any feature of any of the embodiments / aspects disclosed herein may be applied to any other embodiment / aspect, wherever suitable. Likewise, any advantage of any of the embodiments may apply to any other embodiments, and vice versa. Hence, it should be understood that the details of the described embodiments are merely examples brought forward for illustrative purposes, and that all variations that fall within the scope of the claims are intended to be embraced therein. List of some acronyms and abbreviations that may appear in the description

[0096] 3GPP - 3rd Generation Partnership Project

[0097] 5G - fifth generation

[0098] 5G - NR (5G - New Radio) is a new RAT developed by 3GPP for the 5G mobile network

[0099] ADC - analog-to-digital converter

[0100] AGC - automatic gain controller

[0101] BB - baseband

[0102] BF - beamforming

[0103] BW - bandwidth

[0104] BWP - bandwidth part

[0105] CSI-RS - channel state information reference signal

[0106] CU - control unit

[0107] DAC - digital-to-analog converter

[0108] DCI - downlink control information

[0109] DIC - Digital Interface Chip

[0110] DL-PRS - downlink positioning reference signal

[0111] DM-RS - demodulation reference signal

[0112] DS - down-sampling

[0113] FR1 - Frequency Range 1

[0114] FR1.5 - Frequency Range 1.5

[0115] FR2 - Frequency Range 2

[0116] Fe - Front end FWA - Fixed Wireless Access

[0117] GNSS - Global navigation satellite system

[0118] GPS - Global Positioning System

[0119] IF - intermediate frequency

[0120] I / O - input / output

[0121] LI - Layer 1

[0122] LNA - Low Noise Amplifier

[0123] LO - Local Oscillator

[0124] LoS - Line of Sight

[0125] LTE - Long-Term Evolution

[0126] MAC - Medium Access Control

[0127] MATARA - multi-antenna transmitter and receiver arrangement

[0128] MIMO - multiple input, multiple output mmW - millimetre wave

[0129] NAS - Non-access Stratum nLoS - non-Line of Sight

[0130] OFDM - orthogonal frequency-division multiplexing

[0131] PA - power amplifier

[0132] PBCH - Physical Broadcast Channel

[0133] PCB - printed circuit board

[0134] PCell - primary cell

[0135] PDCCH - physical downlink control channel PDP - Power delay profile

[0136] PDSCH - physical downlink shared channel

[0137] PHY - Physical Layer

[0138] PLL - phase locked loop

[0139] PSCell - primary secondary cell

[0140] PSS - primary synchronization signal

[0141] PT-RS - Phase Tracking Reference signal

[0142] PUCCH - physical uplink control channel

[0143] PUSCH - physical uplink shared channel

[0144] QCL - quasi co-located

[0145] QoS - quality of service

[0146] RAT - radio access technology

[0147] RRC - radio resource control

[0148] RSRP - Reference Signal Received Power

[0149] RSRQ - Reference Signal Received Quality

[0150] RSSI - Received Signal Strength Indicator

[0151] SCell - Secondary Cell

[0152] SNR - Signal-to-noise ratio

[0153] SSB - Synchronization Signal Block

[0154] SRS - sounding reference signal

[0155] SSS - secondary synchronization signal

[0156] STEF - spatio-temporal filter STF - spatial transmission filter

[0157] TCI - Transmission Configuration Indicator

[0158] TNode - transceiver node

[0159] UE - user equipment

[0160] VGA - variable gain amplifier WD - wireless device

Claims

CLAIMS1. A method (100) for a multi-antenna receiver arrangement (400), the multiantenna receiver arrangement (400) comprising one or more transceivers (500, 501, ..., 515), a digital interface chip, DIC, (320), and a processor (930), wherein the multi-antenna receiver arrangement (400) is comprisable in a wireless device, WD, (302), the method comprising: obtaining (110), by the processor (930), connection configuration information of a current communication with a remote transceiver node, TNode (398, 399, 399); receiving (120), by the one or more transceivers (500, 501, ..., 515), a first plurality of analog radio signals; converting (125), by the DIC (320), the first plurality of analog radio signals into a first plurality of digital signals; obtaining (128), by the processor (930), one or more snapshots of the first plurality of digital signals by extracting reference signals from each of the first plurality of digital signals at one or more time instants, each snapshot corresponding to one of the one or more time instants; determining (140), by the processor (930), a first snapshot transfer rate based on the obtained connection configuration information; determining (150) a second plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined first snapshot transfer rate, wherein the second plurality is smaller than the first plurality; configuring (160) the DIC (320) to transfer snapshots with the first snapshot transfer rate; and configuring (170) the DIC (320) to transfer the second plurality of digital signals to the processor over a first time period.

2. The method of claim 1, further comprising: obtaining (130), by the processor (930), radio channel characteristics based on the one or more snapshots; and wherein determining (140), by the processor (930), the first snapshot transfer rate is further based on the obtained radio channel characteristics.

3. The method of claim 1 or claim 2, wherein the first time period is a predetermined time period or wherein the first time period is determined based on the obtained radio channel characteristics.

4. The method of any one of claims 1-3, wherein the obtained radio channel characteristics is one or more of: a radio channel variation measure; an estimated doppler rate; a time-dispersion measure; a frequency selectivity measure; and an angle of arrival, AoA, variation measure.

5. The method of any one of claims 1-4, wherein the connection configuration is one or more of: a carrier aggregation, CA, configuration; a dual connectivity, DC, configuration; a bandwidth part, BWP, configuration; and a frequency range configuration.

6. The method of claim 5, wherein the connection configuration is a CA configuration or a DC configuration, and wherein an aggregated bandwidth of the carrier aggregation or the DC configuration is smaller than 75 percent of the full bandwidth supported by the WD (302), the method further comprising: determining (175), by the processor (930), a second snapshot transfer rate based on the first snapshot transfer rate and / or based on a ratio between the aggregated bandwidth and the full bandwidth supported by the WD (302), wherein the second snapshot transfer rate is higher than the first snapshot transfer rate; determining (180) a third plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined second snapshot transfer rate; reconfiguring (185) the DIC (320) to transfer snapshots with the second snapshot transfer rate; and reconfiguring (190) the DIC (320) to transfer the third plurality of digital signals to the processor over the first time period.

7. The method of claim 5, wherein the connection configuration is a BWP configuration, and wherein the BWP of the BWP configuration is set to be smaller than a threshold, the method further comprising: determining (176), by the processor (930), a third snapshot transfer rate based on the first snapshot transfer rate and / or based on a ratio between the BWP and the full bandwidth supported by the WD (302), wherein the third snapshot transfer rate is smaller than the first snapshot transfer rate; determining (181) a fourth plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined third snapshot transfer rate; reconfiguring (186) the DIG (320) to transfer snapshots with the third snapshot transfer rate; and reconfiguring (191) the DIG (320) to transfer the fourth plurality of digital signals to the processor over the first time period.

8. A computer program product comprising instructions, which, when executed on at least one processor of a processing device, cause the processing device to carry out the method according to any one of claims 1 to 7.

9. A non-transitory computer-readable storage medium storing one or more programs configured to be executed by one or more processors of a processing device, the one or more programs comprising instructions which, when executed by the processing device, causes the processing device to carry out the method according to any one of claims 1- 7.

10. A processor for a multi-antenna receiver arrangement (400), comprising controlling circuitry configured to cause: obtainment (310) of connection configuration information of a current communication with a remote transceiver node, TNode (398, 399, 399); reception (315) of a first plurality of analog radio signals; conversion (325) of the first plurality of analog radio signals into a first plurality of digital signals;obtainment (328) of one or more snapshots of the first plurality of digital signals by extracting reference signals from each of the first plurality of digital signals at one or more time instants, each snapshot corresponding to one of the one or more time instants; determination (340) of a first snapshot transfer rate based on the obtained connection configuration information; determination (350) of a second plurality of digital signals to be transferred from the digital interface to the processor (930) based on the determined first snapshot transfer rate, wherein the second plurality is smaller than the first plurality; configuration (360) of the DIG (320) to transfer snapshots with the first snapshot transfer rate; and configuration (370) of the DIG (320) to transfer the second plurality of digital signals to the processor over a first time period.

11. The processor of claim 10, further comprising obtainment (330) of radio channel characteristics based on the one or more snapshots.

12. The processor of claim 11, wherein determination (340) of a first snapshot transfer rate is further based on the obtained radio channel characteristics.

13. A multi-antenna receiver arrangement (400) comprising: a first plurality (NRX) of antenna units (700, 701, ..., 715); a first plurality of receivers / transceivers (500, 501, ..., 515); a digital interface chip, DIG, (320); and the processor (930) of any one of claims 10-12.

14. The multi-antenna receiver arrangement of claim 13, wherein the first plurality of receivers / transceivers (500, 501, ..., 515) are configured to receive the first plurality of analog radio signals via the first plurality of antenna units (700, 701, ..., 715), wherein the DIG (320) comprises: a plurality of analog to digital converters (600, 601, ..., 615) configured to convert the first plurality of analog radio signals into a first plurality of digital signals;a plurality of spatio-temporal filters (800, 807) configured to process the first plurality of digital signals to obtain a plurality of combined signals; and wherein the processor (930) comprises: an extraction unit (900) configured to extract reference signals from each of the first plurality of digital signals; a channel analyzer (920) configured to determine characteristics for each of the first plurality of digital signals based on the extracted reference signals.

15. The multi-antenna receiver arrangement of claim 14, wherein the processor (930) further comprises: a transform unit (940) configured to transform each of the plurality of combined signals into a frequency domain; a post-processing unit (960) configured to post-process the transformed signals in the frequency domain to obtain a plurality of frequency domain processed signals; and a decoder (980) configured to decode the plurality of frequency domain processed signals.

16. A wireless device, WD, comprising the multi-antenna receiver arrangement (400) of any one of claims 13-15.

Images