Hazardous voltage interlock loop fault detection method and system, electric energy device, and medium

Abstract

Provided are a hazardous voltage interlock loop fault detection method and system, an electric energy device, and a medium. The hazardous voltage interlock loop fault detection method comprises: in response to a high voltage power-on request being detected, performing fault detection on a hazardous voltage interlock loop so as to determine fault information of the hazardous voltage interlock loop, wherein the fault information is used for representing whether the hazardous voltage interlock loop has failed (S101); and if the hazardous voltage interlock loop has not failed, controlling a high voltage system where the hazardous voltage interlock loop is located to be powered on, and performing fault detection on the hazardous voltage interlock loop, so as to determine fault information of the powered-on hazardous voltage interlock loop (S102), wherein the duration of the fault detection before the high voltage system is powered on is shorter than the duration of the fault detection after the high voltage system is powered on.

Description

High-voltage interlock circuit fault detection method, system, electric energy equipment and medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This disclosure claims priority to Chinese patent application number 202311289972.2, filed with the Patent Office of China on September 28, 2023, entitled “High-voltage interlock circuit fault detection method, system, electrical equipment and medium,” the entire contents of which are incorporated by reference into this disclosure. Technical Field

[0003] The present disclosure relates to the field of new energy vehicles, and in particular, to a high-voltage interlock circuit fault detection method, system, electric energy equipment, and medium. Background Art

[0004] New energy vehicles use a high-voltage system to power the vehicle's high-voltage components. A Hazardous Voltage Interlock Loop (HVIL) is installed at the high-voltage plug on the high-voltage system. The vehicle's Battery Management System (BMS) detects faults in the HVIL and determines whether to allow the high-voltage system to be powered on, ensuring power safety. However, the HVIL fault detection requirements vary under different operating conditions. Current HVIL fault detection methods lack flexibility and cannot meet the detection requirements of different operating conditions.

[0005] Summary of the Invention

[0006] The main purpose of the present disclosure is to provide a high-voltage interlock circuit fault detection method, system, electric energy equipment and medium, aiming to solve the technical problem that the existing high-voltage interlock circuit fault detection method cannot match the detection requirements of different working conditions.

[0007] According to a first aspect of an embodiment of the present disclosure, a high-voltage interlock circuit fault detection method is provided, comprising:

[0008] In response to detecting a high-voltage power-on request, performing a fault detection on the high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit, wherein the fault information is used to indicate whether a fault occurs in the high-voltage interlock circuit;

[0009] If the high-voltage interlock circuit has not failed, controlling the high-voltage system where the high-voltage interlock circuit is located to be powered on, and performing fault detection on the high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit after power-on;

[0010] The duration of the fault detection before the high-voltage system is powered on is shorter than the duration of the fault detection after the high-voltage system is powered on.

[0011] Optionally, the performing fault detection on the high-voltage interlocking circuit to determine fault information of the high-voltage interlocking circuit includes:

[0012] The high-voltage interlocking circuit is continuously subjected to multiple fault detections to determine fault information of the high-voltage interlocking circuit.

[0013] Optionally, the fault information includes a fault result and a fault type;

[0014] The continuously performing multiple fault detections on the high-voltage interlocking circuit to determine fault information of the high-voltage interlocking circuit includes:

[0015] generating a plurality of continuous first pulse signals;

[0016] For each first pulse signal, sending the first pulse signal to a high-voltage plug; collecting the first pulse signal and a second pulse signal correspondingly output by the high-voltage plug; determining a fault type of the high-voltage interlock circuit or determining that the high-voltage interlock circuit has no fault based on the first pulse signal and the second pulse signal;

[0017] According to each of the fault types, a fault result of the high-voltage interlock circuit is determined.

[0018] Optionally, a signal period of the first pulse signal generated before the high-voltage system is powered on is smaller than a signal period of the first pulse signal generated after the high-voltage system is powered on.

[0019] Optionally, the number of fault detections within a fault detection cycle before the high-voltage system is powered on is equal to or less than the number of fault detections within a fault detection cycle after the high-voltage system is powered on.

[0020] Optionally, the number of the first pulse signals generated by the high-voltage system in a fault detection cycle before power-on is smaller than the number of the first pulse signals generated by the high-voltage system in a fault detection cycle after power-on.

[0021] Optionally, a signal period of the first pulse signal generated before the high-voltage system is powered on is equal to a signal period of the first pulse signal generated after the high-voltage system is powered on.

[0022] Optionally, determining the fault type of the high-voltage interlock circuit according to the first pulse signal and the second pulse signal includes:

[0023] determining an acquisition signal period and a first pulse width of the first pulse signal, and a second pulse width of the second pulse signal;

[0024] The fault type of the high-voltage interlock circuit is determined according to the acquisition signal period, the first pulse width, and the second pulse width.

[0025] Optionally, the fault type includes open circuit, short circuit to ground, short circuit to power supply, and invalid pulse signal;

[0026] The determining the fault type of the high-voltage interlock circuit according to the acquisition signal period, the first pulse width, and the second pulse width includes:

[0027] If the acquisition signal period is the same as the generation signal period of the first pulse signal, the first pulse width is the same as the generation pulse width of the first pulse signal, and the second pulse width is zero, then the fault type of the high-voltage interlock circuit is determined to be open circuit;

[0028] If the first pulse width and the second pulse width are both equal to zero, it is determined that the fault type of the high-voltage interlock circuit is a short circuit to ground;

[0029] If the acquisition signal period is the same as the generation signal period, the first pulse width is the same as the generation pulse width, and the second pulse width is equal to the generation signal period, determining that the fault type of the high-voltage interlock circuit is a short circuit to power supply;

[0030] If the acquisition signal period is different from the generated signal period, or the first pulse width is different from the generated pulse width, and the first pulse width is not equal to zero, it is determined that the fault type of the high-voltage interlock circuit is invalid pulse signal.

[0031] Optionally, determining the fault result of the high-voltage interlock circuit according to each fault type includes:

[0032] When the ratio of the number of fault types to the number of detections is greater than a preset ratio, it is determined that a fault occurs in the high-voltage interlock circuit; wherein the number of detections is the sum of the number of fault types and the number of no-fault times.

[0033] According to a second aspect of an embodiment of the present disclosure, there is provided a high-voltage interlock circuit fault detection system, comprising: a controller;

[0034] The controller is used to:

[0035] In response to detecting a high-voltage power-on request, performing a fault detection on the high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit, wherein the fault information is used to indicate whether a fault occurs in the high-voltage interlock circuit;

[0036] If the high-voltage interlock circuit has not failed, controlling the high-voltage system where the high-voltage interlock circuit is located to be powered on, and performing fault detection on the high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit after power-on;

[0037] The duration of the fault detection before the high-voltage system is powered on is shorter than the duration of the fault detection after the high-voltage system is powered on.

[0038] Optionally, the fault information includes a fault result and a fault type;

[0039] The fault detection system further comprises: a signal generator, a signal detection unit and a signal return detection unit, wherein the signal detection unit is connected to the high-voltage plug, and the signal generator is connected to the signal return detection unit;

[0040] The controller is connected to the signal generator, the signal detection unit, and the signal checkback unit, respectively, and is used to:

[0041] controlling the signal generator to generate a plurality of continuous first pulse signals;

[0042] For each first pulse signal, the first pulse signal is sent to the high-voltage plug; the first pulse signal generated by the signal generator is collected by the signal detection unit, and the second pulse signal correspondingly output by the high-voltage plug is detected by the signal detection unit; the fault type of the high-voltage interlock circuit is determined based on the first pulse signal and the second pulse signal, or the high-voltage interlock circuit is determined to be fault-free;

[0043] According to each of the fault types, a fault result of the high-voltage interlock circuit is determined.

[0044] According to a third aspect of an embodiment of the present disclosure, a battery management system is provided, comprising the high-voltage interlock circuit fault detection system provided by the second aspect of the present disclosure.

[0045] According to a fourth aspect of an embodiment of the present disclosure, there is provided an electric energy device, comprising the battery management system provided by the third aspect of the present disclosure.

[0046] According to a fifth aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored. When the program is executed by a processing device, the steps of the high-voltage interlock circuit fault detection method provided in the first aspect of the present disclosure are implemented.

[0047] The above technical solution proposed in the embodiment of the present disclosure is that the fault detection time before the high-voltage system is powered on is shorter than the fault detection time after the high-voltage system is powered on, that is, before the high-voltage system is powered on, by performing a short fault detection on the high-voltage interlock circuit, the high-voltage interlock detection time before the high-voltage system is powered on can be shortened to reduce the high-voltage power-on waiting time of the high-voltage component; if it is determined that the high-voltage interlock circuit is not faulty, the high-voltage system is controlled to be powered on so that the high-voltage component enters a normal working state, and the high-voltage interlock circuit is continued to be fault detected for a longer time. In this way, due to the long fault detection time after the high-voltage system is powered on, the fault detection efficiency of the high-voltage system after powering on is lower than that before the high-voltage system is powered on, and the detection resources of the battery management system are consumed less. In this way, by setting different fault detection time lengths to match different detection real-time requirements, it is possible to meet the detection requirements under different working conditions, and it is also possible to reasonably allocate the detection resources of the battery management system, thereby improving the flexibility of high-voltage interlock circuit fault detection.

[0048] Other features and advantages of the present disclosure will be described in detail in the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following detailed description, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0050] FIG1 is a flow chart of a high-voltage interlock circuit fault detection method provided by an embodiment of the present disclosure;

[0051] FIG2 is a block diagram of a high-voltage interlock circuit fault detection system provided by an embodiment of the present disclosure;

[0052] FIG3 is a block diagram of an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0053] The following describes the specific embodiments of the present disclosure in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to illustrate and explain the present disclosure and are not intended to limit the present disclosure.

[0054] Figure 1 is a flow chart of a high-voltage interlock circuit fault detection method provided by an embodiment of the present disclosure. The method can be applied to a high-voltage interlock circuit fault detection system, which is a battery management system for an electrical energy device. The electrical energy device can be a vehicle, energy storage cabinet, aircraft, or other device with a high-voltage interlock circuit. As shown in Figure 1, the method may include the following steps:

[0055] S101: In response to detecting a high-voltage power-on request, performing a fault detection on a high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit, where the fault information is used to indicate whether a fault occurs in the high-voltage interlock circuit.

[0056] In the present disclosure, a high-voltage power-on request can be determined based on the high-voltage power-on signal received by the vehicle, wherein the high-voltage power-on signal includes one or more types. In other words, a high-voltage power-on request can be determined based on the high-voltage power-on signal received by the vehicle, wherein the high-voltage power-on signal includes one or more types.

[0057] For example, high-voltage power-on signals collected by multiple sensors may be received, that is, multiple high-voltage power-on signals may be collected by multiple sensors, and then the high-voltage power-on signals collected by the sensors may be received.

[0058] For example, it can be determined whether there is a driver in the driver's seat. When the presence of a driver is detected, it can be determined as a high-voltage power-on request; when the driver remotely operates the vehicle APP and requests to upgrade the non-electric drive system software, it can be determined as a high-voltage power-on request; when the driver operates the mobile phone APP to remotely turn on the air conditioner, it can be determined as a high-voltage power-on request; when the driver has a charging demand and inserts the charging gun, it can be determined as a high-voltage power-on request; when the charging is detected to be fast charging, it can be determined as a high-voltage power-on request; when a remote start charging signal is received, it can be determined as a high-voltage power-on request; when the small battery is detected to be feeding power, it can be determined as a high-voltage power-on request.

[0059] Before high voltage power is applied, the high-voltage interlock circuit fault detection system verifies fault information in the high-voltage interlock circuit through fault detection to determine whether a fault has occurred. If no fault is detected at this time, high voltage power is allowed to be applied; if a fault is detected, high voltage power is not allowed to be applied, thus avoiding dangerous situations such as leakage and thus ensuring the safety of new energy vehicles.

[0060] S102: If the high-voltage interlocking circuit has not failed, the high-voltage system where the high-voltage interlocking circuit is located is controlled to be powered on, and a fault detection is performed on the high-voltage interlocking circuit to determine fault information of the high-voltage interlocking circuit after power-on.

[0061] In the present disclosure, the duration of fault detection before the high-voltage system is powered on is shorter than the duration of fault detection after the high-voltage system is powered on.

[0062] In one embodiment, the fault detection before and after the high-voltage system is powered on can be performed as a single fault detection, and the high-voltage interlock circuit can be fault detected at preset time intervals. That is, the fault detection of the high-voltage interlock circuit is performed to determine the fault information of the high-voltage interlock circuit, including: performing a single fault detection on the high-voltage interlock circuit to determine the fault information of the high-voltage interlock circuit.

[0063] In another embodiment, the fault detection before and after the high-voltage system is powered on can be performed as multiple consecutive fault detections, wherein the multiple consecutive fault detections constitute a complete round of fault detection. That is, performing fault detection on the high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit includes: performing multiple consecutive fault detections on the high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit. The total duration of the multiple fault detections before the high-voltage system is powered on is less than the total duration of the multiple fault detections after the high-voltage system is powered on.

[0064] When it is determined that the high-voltage interlock circuit has not failed, the high-voltage system where the high-voltage interlock circuit is located is controlled to be powered on, so that the high-voltage components are successfully powered on and the battery enters a working state such as charging or discharging. After that, the high-voltage interlock circuit is continuously tested for faults. After the high-voltage system is powered on, the high-voltage interlock circuit can be tested for faults according to a preset cycle, or multiple rounds of fault testing can be performed continuously. When a fault in the high-voltage interlock circuit is detected, a fault alarm can be issued and a corresponding fault handling strategy can be implemented, such as delaying the disconnection of the high voltage or powering off the high voltage.

[0065] It should be noted that the duration of a single fault detection before the high-voltage system is powered on and the duration of a single fault detection after the high-voltage system is powered on can be the same or different; similarly, the number of fault detections before the high-voltage system is powered on and the number of fault detections in each round of fault detection after the high-voltage system is powered on can be the same or different.

[0066] Unlike S101, S102's fault detection occurs when the high-voltage system is already powered on. At this time, the high-voltage components are in normal working condition, and the total duration of the high-voltage interlock circuit fault detection is longer. However, S101's fault detection occurs before the high-voltage system is powered on, when the high-voltage components are waiting for the high voltage to be powered on. By performing a shorter fault detection on the high-voltage interlock circuit, it is possible to determine as quickly as possible whether the high-voltage interlock circuit has a fault, thereby reducing the waiting time for high-voltage power-on. In addition, the shorter the high-voltage interlock circuit fault detection time, the higher the detection efficiency, and the greater the consumption of the battery management system's detection resources. Since the battery management system has limited detection resources, different high-voltage interlock circuit fault detection durations can be set to reasonably allocate detection resources. Since fault detection after the high-voltage system is powered on has lower detection efficiency requirements, the duration of the fault detection after the high-voltage system is powered on can be set to a longer time to conserve the battery management system's detection resources.

[0067] The technical solution provided by the embodiments of the present disclosure can include the following beneficial effects: the duration of fault detection before the high-voltage system is powered on is shorter than the duration of fault detection after the high-voltage system is powered on, that is, before the high-voltage system is powered on, by performing a shorter fault detection on the high-voltage interlock circuit, the high-voltage interlock detection time before the high-voltage system is powered on can be shortened, thereby reducing the high-voltage power-on waiting time of the high-voltage components; if it is determined that the high-voltage interlock circuit is not faulty, the high-voltage system is controlled to be powered on, so that the high-voltage components enter a normal working state, and the high-voltage interlock circuit continues to perform a longer fault detection. In this way, due to the longer fault detection time after the high-voltage system is powered on, the detection efficiency of the fault detection after the high-voltage system is powered on is lower than that of the fault detection before the high-voltage system is powered on, and the detection resources of the battery management system are less consumed. In this way, by setting different fault detection time lengths to match different detection real-time requirements, the detection requirements under different working conditions can be met, and the detection resources of the battery management system can be reasonably allocated, thereby improving the flexibility of high-voltage interlock circuit fault detection.

[0068] As an optional implementation manner, the fault information includes the fault result and the fault type.

[0069] In the present disclosure, fault information includes a fault result used to characterize whether a fault occurs, and also includes a fault type, such as open circuit, short circuit to ground, open circuit to power supply, and invalid pulse signal.

[0070] At this time, the high-voltage interlocking circuit is continuously subjected to multiple fault detections to determine the fault information of the high-voltage interlocking circuit, including: generating multiple continuous first pulse signals; for each first pulse signal, sending the first pulse signal to the high-voltage plug; collecting the first pulse signal and the second pulse signal corresponding to the output of the high-voltage plug; determining the fault type of the high-voltage interlocking circuit based on the first pulse signal and the second pulse signal, or determining that the high-voltage interlocking circuit has no fault; and determining the fault result of the high-voltage interlocking circuit based on each fault type.

[0071] In one embodiment of the present disclosure, the first pulse signal may be a high-low level signal, a high-low current signal, etc. Multiple continuous first pulse signals are generated within a period of time for performing multiple consecutive fault detections, wherein each first pulse signal is used for one fault detection, thereby providing more data samples and increasing the accuracy and reliability of fault judgment.

[0072] As an optional implementation, the signal period of the first pulse signal generated before the high-voltage system is powered on is shorter than the signal period of the first pulse signal generated after the high-voltage system is powered on.

[0073] In one embodiment of the present disclosure, the signal period of the first pulse signal is adjustable. By changing the length of the signal period of the first pulse signal, the total duration of multiple fault detections before and after the high-voltage system is powered on can be adjusted, so that the total duration of multiple fault detections before the high-voltage system is powered on is shorter than the total duration of multiple fault detections after the high-voltage system is powered on, so as to match the detection requirements of different working conditions.

[0074] At this time, the number of fault detections in one fault detection cycle before the high-voltage system is powered on is equal to or less than the number of fault detections in one fault detection cycle after the high-voltage system is powered on.

[0075] As an optional implementation, the number of first pulse signals generated by the high-voltage system in a fault detection cycle before power-on is smaller than the number of first pulse signals generated by the high-voltage system in a fault detection cycle after power-on.

[0076] In one embodiment of the present disclosure, the total duration of multiple fault detections before and after the high-voltage system is powered on can be adjusted by changing the number of generated first pulse signals, so that the total duration of multiple fault detections before the high-voltage system is powered on is shorter than the total duration of multiple fault detections after the high-voltage system is powered on, so as to match the detection requirements of different working conditions.

[0077] At this time, the signal period of the first pulse signal generated before the high-voltage system is powered on is equal to the signal period of the first pulse signal generated after the high-voltage system is powered on.

[0078] In one embodiment of the present disclosure, a first pulse signal can be generated by a signal generator; thereafter, the signal generator inputs the generated first pulse signal into a high-voltage plug, and the signal output from the high-voltage plug (i.e., a second pulse signal) can be detected by a signal detection unit; at the same time, the first pulse signal generated by the signal generator can be collected by a signal backcheck unit, that is, after the signal is generated, a signal backcheck is performed; next, the collected first pulse signal and the detected second pulse signal are used to perform a high-voltage interlock circuit fault analysis to generate fault information for a single fault detection. The fault information is the type of fault that occurred in the high-voltage interlock circuit or whether the high-voltage interlock circuit has no fault, thereby obtaining fault information for each fault detection.

[0079] As an optional embodiment, the fault type of the high-voltage interlocking circuit is determined based on the first pulse signal and the second pulse signal, including: determining the acquisition signal period and the first pulse width of the first pulse signal, and the second pulse width of the second pulse signal; determining the fault type of the high-voltage interlocking circuit based on the acquisition signal period, the first pulse width and the second pulse width.

[0080] In one embodiment of the present disclosure, the fault type of the high-voltage interlocking circuit in this fault detection is determined by the collected signal parameters of the first pulse signal (i.e., the collection signal period and the first pulse width) and the signal parameters of the second pulse signal (i.e., the second pulse width).

[0081] For example, the first pulse signal and the second pulse signal are high-low level signals, and the generation signal period and generation pulse width of the first pulse signal are set. Under normal circumstances, the generation pulse width of the pulse signal is set by default to half of the generation signal period. After the first pulse signal is generated according to the above settings, the first pulse signal is backchecked to determine the signal period (i.e., the acquisition signal period) and the first pulse width (i.e., the duration of the high level in the acquired first pulse signal) of the collected first pulse signal; then, the second pulse signal output by the high-voltage plug is collected to determine the second pulse width (i.e., the duration of the high level in the second pulse signal); finally, based on the acquisition signal period, the first pulse width, and the second pulse width, the fault type of the high-voltage interlocking circuit in this fault detection is determined.

[0082] As an optional implementation, the fault types existing in the high-voltage interlock circuit include open circuit, short circuit to ground, short circuit to power supply, and invalid pulse signal. Specifically:

[0083] If the acquisition signal period is the same as the generation signal period, the first pulse width is the same as the generation pulse width, and the second pulse width is zero (for example, a continuous low level), the high-voltage interlock circuit is determined to be open; if the acquisition signal period is the same as the generation signal period, the first pulse width is the same as the generation pulse width, and the second pulse width is equal to the generation signal period (for example, a continuous high level), the high-voltage interlock circuit is determined to be short-circuited to the power supply; if the first pulse width is equal to zero (for example, a continuous low level) and the second pulse width is equal to zero, the high-voltage interlock circuit is determined to be short-circuited to the ground; if the acquisition signal period is not the same as the generation signal period or the first pulse width is not the same as the generation pulse width, and the first pulse width is not equal to zero, the pulse signal is determined to be invalid.

[0084] If the high-voltage interlock circuit is determined to be any of the above fault types based on the acquisition signal period, the first pulse width, and the second pulse width, then the high-voltage interlock circuit is determined to be faulty in this fault detection. If the fault type is blank, then the high-voltage interlock circuit is determined to be not faulty in this fault detection.

[0085] As an optional implementation, the fault result of the high-voltage interlocking circuit is determined according to each fault type, including: when the ratio of the number of fault types to the number of detection times is greater than a preset ratio, it is determined that the high-voltage interlocking circuit has a fault; wherein the number of detection times is the sum of the number of fault types and the number of no faults.

[0086] When the ratio of the number of fault information of high-voltage interlocking circuit failure (i.e. the number of fault types) to the number of detections (i.e. the sum of the number of fault types and the number of high-voltage interlocking circuit failures) among multiple fault information is greater than a preset ratio, it can be determined that the high-voltage interlocking circuit has failed.

[0087] The present disclosure also provides a high-voltage interlock circuit fault detection system 200 , wherein the fault detection system includes a controller 201 ;

[0088] The controller is used to:

[0089] In response to detecting a high-voltage power-on request, performing a fault detection on the high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit, wherein the fault information is used to indicate whether a fault occurs in the high-voltage interlock circuit;

[0090] If the high-voltage interlock circuit has not failed, controlling the high-voltage system where the high-voltage interlock circuit is located to be powered on, and performing fault detection on the high-voltage interlock circuit to determine fault information of the high-voltage interlock circuit after power-on;

[0091] The duration of the fault detection before the high-voltage system is powered on is shorter than the duration of the fault detection after the high-voltage system is powered on.

[0092] The technical solution provided by the embodiments of the present disclosure can include the following beneficial effects: the duration of fault detection before the high-voltage system is powered on is shorter than the duration of fault detection after the high-voltage system is powered on, that is, before the high-voltage system is powered on, by performing a shorter fault detection on the high-voltage interlock circuit, the high-voltage interlock detection time before the high-voltage system is powered on can be shortened, thereby reducing the high-voltage power-on waiting time of the high-voltage components; if it is determined that the high-voltage interlock circuit is not faulty, the high-voltage system is controlled to be powered on, so that the high-voltage components enter a normal working state, and the high-voltage interlock circuit continues to perform a longer fault detection. In this way, due to the longer fault detection time after the high-voltage system is powered on, the detection efficiency of the fault detection after the high-voltage system is powered on is lower than that of the fault detection before the high-voltage system is powered on, and the detection resources of the battery management system are less consumed. In this way, by setting different fault detection time lengths to match different detection real-time requirements, the detection requirements under different working conditions can be met, and the detection resources of the battery management system can be reasonably allocated, thereby improving the flexibility of high-voltage interlock circuit fault detection.

[0093] Optionally, the controller is configured to:

[0094] The high-voltage interlocking circuit is continuously subjected to multiple fault detections to determine fault information of the high-voltage interlocking circuit.

[0095] Optionally, the fault information includes a fault result and a fault type; as shown in FIG2 , the fault detection system further includes: a signal generator 202, a signal detection unit 203, and a signal return detection unit 204, wherein the signal detection unit is connected to the high-voltage plug 205, and the signal generator is connected to the signal return detection unit;

[0096] The controller is connected to the signal generator, the signal detection unit, and the signal checkback unit, respectively, and is used to:

[0097] controlling the signal generator to generate a plurality of continuous first pulse signals;

[0098] For each first pulse signal, the first pulse signal is sent to the high-voltage plug; the first pulse signal generated by the signal generator is collected by the signal detection unit, and the second pulse signal correspondingly output by the high-voltage plug is detected by the signal detection unit; the fault type of the high-voltage interlock circuit is determined based on the first pulse signal and the second pulse signal, or the high-voltage interlock circuit is determined to be fault-free;

[0099] According to each of the fault types, a fault result of the high-voltage interlock circuit is determined.

[0100] Optionally, a signal period of the first pulse signal generated before the high-voltage system is powered on is smaller than a signal period of the first pulse signal generated after the high-voltage system is powered on.

[0101] Optionally, the number of fault detections within a fault detection cycle before the high-voltage system is powered on is equal to or less than the number of fault detections within a fault detection cycle after the high-voltage system is powered on.

[0102] Optionally, the number of the first pulse signals generated by the high-voltage system in a fault detection cycle before power-on is smaller than the number of the first pulse signals generated by the high-voltage system in a fault detection cycle after power-on.

[0103] Optionally, a signal period of the first pulse signal generated before the high-voltage system is powered on is equal to a signal period of the first pulse signal generated after the high-voltage system is powered on.

[0104] Optionally, the controller is configured to:

[0105] determining an acquisition signal period and a first pulse width of the first pulse signal, and a second pulse width of the second pulse signal;

[0106] The fault type of the high-voltage interlock circuit is determined according to the acquisition signal period, the first pulse width, and the second pulse width.

[0107] Optionally, the fault type includes open circuit, short circuit to ground, short circuit to power supply, and invalid pulse signal;

[0108] The controller is used to:

[0109] If the acquisition signal period is the same as the generation signal period of the first pulse signal, the first pulse width is the same as the generation pulse width of the first pulse signal, and the second pulse width is zero, then the fault type of the high-voltage interlock circuit is determined to be open circuit;

[0110] If the first pulse width and the second pulse width are both equal to zero, it is determined that the fault type of the high-voltage interlock circuit is a short circuit to ground;

[0111] If the acquisition signal period is the same as the generation signal period, the first pulse width is the same as the generation pulse width, and the second pulse width is equal to the generation signal period, determining that the fault type of the high-voltage interlock circuit is a short circuit to power supply;

[0112] If the acquisition signal period is different from the generated signal period, or the first pulse width is different from the generated pulse width, and the first pulse width is not equal to zero, it is determined that the fault type of the high-voltage interlock circuit is invalid pulse signal.

[0113] Optionally, the controller is configured to:

[0114] When the ratio of the number of fault types to the number of detections is greater than a preset ratio, it is determined that a fault occurs in the high-voltage interlock circuit; wherein the number of detections is the sum of the number of fault types and the number of no-fault times.

[0115] Regarding the high-voltage interlock circuit fault detection system in the above embodiment, the specific manner in which the controller and other modules perform operations has been described in detail in the embodiment of the method and will not be elaborated here.

[0116] The present disclosure also provides a battery management system, including the above-mentioned high-voltage interlock circuit fault detection system provided by the present disclosure.

[0117] The present disclosure also provides an electric energy device, comprising the above-mentioned battery management system provided by the present disclosure.

[0118] The present disclosure also provides a computer-readable storage medium having a computer program stored thereon, which implements the steps of the high-voltage interlock circuit fault detection method provided by the present disclosure when the program is executed by a processing device.

[0119] Figure 3 is a block diagram of an electronic device according to an embodiment of the present disclosure. As shown in Figure 3 , the electronic device 300 may include a processor 301 and a memory 302. The electronic device 300 may also include one or more of a multimedia component 303, an input / output (I / O) interface 304, and a communication component 305.

[0120] The processor 301 is used to control the overall operation of the electronic device 300 to complete all or part of the steps in the high-voltage interlock circuit fault detection method described above. The memory 302 is used to store various types of data to support the operation of the electronic device 300. For example, these data may include instructions for any application or method operating on the electronic device 300, as well as application-related data, such as contact information, sent and received messages, pictures, audio, video, etc. The memory 302 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The multimedia component 303 may include a screen and an audio component. The screen may be, for example, a touch screen, and the audio component is used to output and / or input audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signals may be further stored in the memory 302 or transmitted via the communication component 305. The audio component also includes at least one speaker for outputting audio signals. The I / O interface 304 provides an interface between the processor 301 and other interface modules. The aforementioned other interface modules may be a keyboard, a mouse, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 305 is used for wired or wireless communication between the electronic device 300 and other devices. Wireless communication, such as Wi-Fi, Bluetooth, Near Field Communication (NFC), 2G, 3G, 4G, NB-IOT, eMTC, or other 5G, etc., or a combination of one or more thereof, is not limited here. Therefore, the corresponding communication component 305 may include: a Wi-Fi module, a Bluetooth module, an NFC module, etc.

[0121] In some embodiments, the electronic device 300 can be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to execute the above-mentioned high-voltage interlock circuit fault detection method.

[0122] In addition, in one embodiment, the present disclosure further provides a computer-readable storage medium including program instructions. When executed by a processor, the program instructions implement the steps of the above-described high-voltage interlock circuit fault detection method. For example, the computer-readable storage medium may be the aforementioned memory 302 including the program instructions. The program instructions may be executed by the processor 301 of the electronic device 300 to implement the above-described high-voltage interlock circuit fault detection method.

[0123] In addition, in one embodiment, an embodiment of the present disclosure also provides a computer program product, which is a computer program that can be executed by a programmable device, and the computer program has a code portion for executing the above-mentioned high-voltage interlock circuit fault detection method when executed by the programmable device.

[0124] The preferred embodiments of the present disclosure are described in detail above in conjunction with the accompanying drawings. However, the present disclosure is not limited to the specific details of the above embodiments. Within the technical concept of the present disclosure, various simple modifications can be made to the technical solutions of the present disclosure, and these simple modifications all fall within the scope of protection of the present disclosure.

[0125] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, the present disclosure will not further describe various possible combinations.

[0126] In addition, the various embodiments of the present disclosure may be arbitrarily combined, and as long as they do not violate the concept of the present disclosure, they should also be regarded as the contents disclosed by the present disclosure.

Claims

1. A high voltage interlock circuit fault detection method, characterized in that: include: In response to detecting a high-voltage power-on request, performing a fault detection on the high-voltage interlocking circuit to determine fault information of the high-voltage interlocking circuit, wherein the fault information is used to indicate whether a fault occurs in the high-voltage interlocking circuit (S101); If the high-voltage interlocking circuit has not failed, the high-voltage system where the high-voltage interlocking circuit is located is controlled to be powered on, and a fault detection is performed on the high-voltage interlocking circuit to determine the fault information of the high-voltage interlocking circuit after power-on (S102); The duration of the fault detection before the high-voltage system is powered on is shorter than the duration of the fault detection after the high-voltage system is powered on.

2. The method according to claim 1, characterized in that The performing fault detection on the high-voltage interlocking circuit to determine fault information of the high-voltage interlocking circuit includes: The high-voltage interlocking circuit is continuously subjected to multiple fault detections to determine fault information of the high-voltage interlocking circuit.

3. The method according to claim 2, characterized in that The fault information includes fault result and fault type; The continuously performing multiple fault detections on the high-voltage interlocking circuit to determine fault information of the high-voltage interlocking circuit includes: generating a plurality of continuous first pulse signals; For each of the first pulse signals, the first pulse signal is sent to a high-voltage plug; the first pulse signal and a second pulse signal corresponding to the output of the high-voltage plug are collected; according to the first pulse signal and the second pulse signal, the fault type of the high-voltage interlocking circuit is determined, or the high-voltage interlocking circuit is determined to be fault-free; According to each of the fault types, a fault result of the high-voltage interlocking circuit is determined.

4. The method according to claim 3, characterized in that A signal period of the first pulse signal generated before the high-voltage system is powered on is smaller than a signal period of the first pulse signal generated after the high-voltage system is powered on.

5. The method according to claim 4, characterized in that The number of fault detections within a fault detection cycle before the high-voltage system is powered on is equal to or less than the number of fault detections within a fault detection cycle after the high-voltage system is powered on.

6. The method according to claim 3, characterized in that The number of the first pulse signals generated by the high-voltage system in a fault detection cycle before power-on is smaller than the number of the first pulse signals generated by the high-voltage system in a fault detection cycle after power-on.

7. The method according to claim 6, characterized in that The signal period of the first pulse signal generated before the high-voltage system is powered on is equal to the signal period of the first pulse signal generated after the high-voltage system is powered on.

8. The method according to any one of claims 3 to 7, characterized in that: Determining the fault type of the high-voltage interlocking circuit according to the first pulse signal and the second pulse signal includes: Determining an acquisition signal period and a first pulse width of the first pulse signal, and a second pulse width of the second pulse signal; The fault type of the high-voltage interlocking circuit is determined according to the acquisition signal period, the first pulse width, and the second pulse width.

9. The method according to claim 8, characterized in that The fault types include open circuit, short circuit to ground, short circuit to power supply and invalid pulse signal; The determining the fault type of the high-voltage interlocking circuit according to the acquisition signal period, the first pulse width, and the second pulse width includes: If the acquisition signal period is the same as the generation signal period of the first pulse signal, the first pulse width is the same as the generation pulse width of the first pulse signal, and the second pulse width is zero, then it is determined that the fault type of the high-voltage interlocking circuit is open circuit; If the first pulse width and the second pulse width are both equal to zero, it is determined that the fault type of the high-voltage interlocking circuit is short circuit to ground; If the acquisition signal period is the same as the generation signal period, the first pulse width is the same as the generation pulse width, and the second pulse width is equal to the generation signal period, it is determined that the fault type of the high-voltage interlocking circuit is a short circuit to the power supply; If the acquisition signal period is different from the generated signal period, or the first pulse width is different from the generated pulse width, and the first pulse width is not equal to zero, it is determined that the fault type of the high-voltage interlocking circuit is invalid pulse signal.

10. The method according to any one of claims 3 to 9, characterized in that: Determining the fault result of the high-voltage interlocking circuit according to each of the fault types includes: When the ratio of the number of fault types to the number of detection times is greater than a preset ratio, it is determined that a fault occurs in the high-voltage interlock circuit; wherein the number of detection times is the sum of the number of fault types and the number of no-fault times.

11. A high voltage interlock circuit fault detection system (200), characterized in that: The fault detection system comprises a controller (201); The controller is used to: In response to detecting a high-voltage power-on request, performing a fault detection on the high-voltage interlocking circuit to determine fault information of the high-voltage interlocking circuit, wherein the fault information is used to indicate whether a fault occurs in the high-voltage interlocking circuit; If the high-voltage interlocking circuit has not failed, the high-voltage system where the high-voltage interlocking circuit is located is controlled to be powered on, and a fault detection is performed on the high-voltage interlocking circuit to determine the fault information of the high-voltage interlocking circuit after power-on; The duration of the fault detection before the high-voltage system is powered on is shorter than the duration of the fault detection after the high-voltage system is powered on.

12. The fault detection system according to claim 11, characterized in that: The fault information includes fault result and fault type; The fault detection system further comprises: a signal generator (202), a signal detection unit (203) and a signal checkback unit (204), wherein the signal detection unit is connected to a high voltage plug (205), and the signal generator is connected to the signal checkback unit; The controller is connected to the signal generator, the signal detection unit and the signal checkback unit respectively, and is used to: Controlling the signal generator to generate a plurality of continuous first pulse signals; For each of the first pulse signals, the first pulse signal is sent to the high-voltage plug; the first pulse signal generated by the signal generator is collected by the signal detection unit, and the second pulse signal corresponding to the output of the high-voltage plug is detected by the signal detection unit; according to the first pulse signal and the second pulse signal, the fault type of the high-voltage interlocking circuit is determined, or the high-voltage interlocking circuit is determined to be fault-free; According to each of the fault types, a fault result of the high-voltage interlocking circuit is determined.

13. A battery management system, characterized in that: Includes the high-voltage interlock circuit fault detection system as described in claim 11 or 12.

14. An electric energy device, characterized in that: Includes the battery management system as claimed in claim 13.

15. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processing device, the steps of the method described in any one of claims 1 to 10 are implemented.

Images