Direct-current transformer fault protection method and apparatus, computer device and storage medium

WO2025066077A1PCT designated stage expired Publication Date: 2025-04-03GLOBAL ENERGY INTERCONNECTION RES INST CO LTD

Patent Information

Application Number
PCT/CN2024/085312
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-27
Filing Date
2024-04-01
Publication Date
2025-04-03

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Abstract

Disclosed in the present disclosure are a direct-current transformer fault protection method and apparatus, a computer device and a storage medium. The direct-current transformer comprises at least one unit, each unit comprising a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm. The protection method comprises: acquiring a parameter of the low-voltage bridge arm, a parameter of the high-voltage bridge arm and a parameter of the common bridge arm; on the basis of respective relationships between the parameter of the low-voltage bridge arm, the parameter of the high-voltage bridge arm and the parameter of the common bridge arm and a preset protection constant value, judging the type of a short-circuit fault that has occurred; on the basis of the type of the short-circuit fault, generating a corresponding protection action signal; and on the basis of the protection action signal, generating a corresponding locking control instruction, and on the basis of the locking control instruction, locking a corresponding bridge arm. The present disclosure solves the problem of short circuit faults of direct-current transformers causing hazards to the direct current transformers and direct current systems in the prior art.
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Description

DC transformer fault protection method, device, computer equipment and storage medium

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The embodiments of the present disclosure are based on and claim priority of Chinese patent application No. 202311264379.2, filed on September 27, 2023, and entitled “DC transformer fault protection method, device, computer equipment and storage medium”. The entire contents of the Chinese patent application are hereby incorporated by reference into the present disclosure. Technical Field

[0003] The present disclosure relates to the technical field of flexible direct current transmission, and in particular to, but not limited to, a direct current transformer fault protection method, device, computer equipment, and storage medium. Background Art

[0004] Due to the intermittent and random nature of renewable energy generation, such as wind and photovoltaic power, and the inherent limitations of traditional AC grid-connected technology, there is an urgent need to accelerate research into new aggregation and transmission technologies. Compared to AC grid-connected technology, DC grid-connected technology based on flexible DC transmission offers advantages such as high transmission efficiency, reduced transmission corridors, fast and reliable regulation, and no instability issues. It is considered the most effective option for the transmission and absorption of large-scale renewable energy, and a key direction for future power grid development.

[0005] DC transformers are core components of DC power grids, interconnecting DC lines of varying voltage levels and types to form a DC grid. These transformers provide functions such as DC voltage conversion, bidirectional power transmission, power flow control, and fault isolation. DC grids are expensive to invest in and prone to widespread failures, placing extremely high demands on the reliability of DC transformers. However, current research on high-voltage, high-capacity DC transformers is still at the stage of circuit topology design, simulation analysis, and prototype verification.

[0006] When a DC transformer short-circuit fault occurs, its rapid detection and protection are directly related to the stability and reliability of the DC transformer itself and even the entire system. If left unchecked, it can cause significant overvoltage and overcurrent shocks to the DC transformer, potentially damaging it and impacting system stability. Therefore, to prevent DC transformer faults from harming the equipment itself and the DC system, and to ensure equipment and system safety, a DC transformer fault protection solution is urgently needed.

[0007] Summary of the Invention

[0008] In view of this, the present disclosure provides a DC transformer fault protection method, apparatus, computer equipment and storage medium to solve the problem in the prior art that when a DC transformer short-circuit fault occurs, the DC transformer and the DC system are damaged.

[0009] In a first aspect, the present disclosure provides a DC transformer fault protection method, wherein the DC transformer includes at least one unit; each unit includes a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm; one end of the high-voltage bridge arm is connected to one end of the low-voltage bridge arm and one end of the common bridge arm to form a common point, the other end of the low-voltage bridge arm and the other end of the common bridge arm form a low-voltage side port, and the other end of the high-voltage bridge arm and the other end of the common bridge arm form a high-voltage side port; the method includes: obtaining low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters; judging the type of short-circuit fault that occurs based on the relationship between the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters and preset protection values ​​respectively; generating a corresponding protection action signal based on the short-circuit fault type; generating a corresponding locking control instruction based on the protection action signal, and locking the corresponding bridge arm based on the locking control instruction.

[0010] The DC transformer fault protection method provided by the embodiment of the present disclosure obtains low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters, and determines the type of short-circuit fault that occurs based on the relationship between the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters and preset protection constants; generates a corresponding protection action signal based on the short-circuit fault type; generates a corresponding locking control instruction based on the protection action signal, and locks the corresponding bridge arm according to the locking control instruction, thereby achieving the purpose of quickly detecting a short-circuit fault in the DC transformer, and locking the corresponding bridge arm through the locking control instruction, thereby locking the faulty bridge arm and quickly cutting off the short-circuit fault current, protecting the entire DC transformer and DC system, so that the entire DC transformer and DC system are not affected by the short-circuit fault, and solving the problem in the prior art that a short-circuit fault in the DC transformer causes harm to the DC transformer and the DC system.

[0011] In an optional embodiment, the high-voltage bridge arm, the low-voltage bridge arm and the common bridge arm all include multiple sub-modules connected in series; the low-voltage bridge arm parameters include any one or more of the low-voltage bridge arm current, the sub-module capacitor voltage of the low-voltage bridge arm, the low-voltage side DC voltage and the low-voltage side DC pole line current; the high-voltage bridge arm parameters include any one or more of the high-voltage bridge arm current, the sub-module capacitor voltage of the high-voltage bridge arm and the high-voltage side DC voltage; the common bridge arm parameters include the common bridge arm current.

[0012] In an optional embodiment, when the DC transformer includes one unit, the low-voltage side DC pole line current is the difference between the fault pole DC current and the non-fault pole DC current; when the DC transformer includes two symmetrically arranged units, the low-voltage side DC pole line current is the difference between the low-voltage side fault pole DC current, the neutral line DC current and the common bridge arm current; when the DC transformer includes two or more low-voltage side ports, the low-voltage bridge arm parameters also include the difference current between the low-voltage side fault port DC current and the low-voltage side non-fault port DC current.

[0013] The DC transformer fault protection method provided by the embodiment of the present disclosure, the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters include key fault electrical quantities of the DC transformer, and the parameters are comprehensively collected. According to the characteristic that the fault on the low-voltage side of the DC transformer develops slowly, the low-voltage side DC pole line current is further set, and the calculation method of the low-voltage side DC pole line current is clarified. When the DC transformer includes two or more low-voltage side ports, the low-voltage bridge arm parameters also include the difference current between the DC current of the low-voltage side fault port and the DC current of the low-voltage side non-fault port, which improves the sensitivity of low-voltage side fault detection and provides a basis for subsequent judgment of short-circuit faults according to the relationship between the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters and preset protection values.

[0014] In an optional embodiment, the type of short-circuit fault that occurs is determined based on the relationship between the low-voltage bridge arm parameters, the high-voltage bridge arm parameters and the common bridge arm parameters and the preset protection constants, including: when the low-voltage bridge arm parameters are greater than or equal to the first bridge arm overcurrent protection action constant, the submodule capacitor voltage of the low-voltage bridge arm is greater than or equal to the first submodule overvoltage protection action constant, the low-voltage side DC voltage is greater than or equal to the first DC overvoltage protection action constant, and the low-voltage side DC pole line current is greater than or equal to the first DC current differential protection action constant, and the duration exceeds the first preset time, it is determined that a low-voltage side short-circuit fault occurs; when the high-voltage bridge arm parameters are greater than or equal to the second bridge arm overcurrent protection action constant, the high-voltage bridge arm submodule capacitor voltage is greater than or equal to the first submodule overvoltage protection action constant, the low-voltage side DC voltage is greater than or equal to the first DC overvoltage protection action constant, and the low-voltage side DC pole line current is greater than or equal to the first DC current differential protection action constant. When the sub-module capacitor voltage of the high-voltage bridge arm is greater than or equal to any one or more of the second sub-module overvoltage protection action value, and the high-voltage side DC voltage is greater than or equal to the second DC overvoltage protection action value, and the duration exceeds the second preset time, it is determined that a first high-voltage side short circuit fault has occurred; when the common bridge arm current is greater than or equal to the third preset overcurrent protection value, and the high-voltage bridge arm parameter is greater than or equal to the second bridge arm overcurrent protection action value, the sub-module capacitor voltage of the high-voltage bridge arm is greater than or equal to any one or more of the second sub-module overvoltage protection action value, and the high-voltage side DC voltage is greater than or equal to the second DC overvoltage protection action value, and the duration exceeds the third preset time, it is determined that a second high-voltage side short circuit fault has occurred.

[0015] The DC transformer fault protection method provided by the embodiment of the present disclosure accurately determines whether a low-voltage side short-circuit fault or a high-voltage side short-circuit fault occurs by comparing the size relationships between the low-voltage bridge arm parameters, the high-voltage bridge arm parameters and the common bridge arm current with specific preset protection values, thereby achieving rapid identification of DC transformer short-circuit faults and providing a basis for subsequently generating corresponding protection action signals according to the short-circuit fault type.

[0016] In an optional implementation, generating a corresponding protection action signal according to the short-circuit fault type includes:

[0017] When a low-voltage side short circuit fault occurs, a first low-voltage bridge arm protection action signal and a first high-voltage bridge arm protection action signal are generated; when a first high-voltage side short circuit fault occurs, a second low-voltage bridge arm protection action signal, a second high-voltage bridge arm protection action signal and a first common bridge arm protection signal are generated; when a second high-voltage side short circuit fault occurs, a third low-voltage bridge arm protection action signal, a third high-voltage bridge arm protection action signal and a second common bridge arm protection action signal are generated, the second low-voltage bridge arm protection action signal and the third low-voltage bridge arm protection action signal are the same and different from the first low-voltage bridge arm protection action signal, the second high-voltage bridge arm protection action signal and the third high-voltage bridge arm protection action signal are the same and different from the first high-voltage bridge arm protection action signal, and the first common bridge arm protection action signal and the second common bridge arm protection action signal are different.

[0018] The DC transformer fault protection method provided by the embodiment of the present disclosure generates a first low-voltage bridge arm protection action signal and a first high-voltage bridge arm protection action signal when a low-voltage side short-circuit fault occurs; generates a second low-voltage bridge arm protection action signal, a second high-voltage bridge arm protection action signal and a first common bridge arm protection signal when a first high-voltage side short-circuit fault occurs; generates a third low-voltage bridge arm protection action signal, a third high-voltage bridge arm protection action signal and a second common bridge arm protection action signal when a second high-voltage side short-circuit fault occurs, wherein the second low-voltage bridge arm protection action signal is the same as the third low-voltage bridge arm protection action signal and is different from the first low-voltage bridge arm protection action signal, the second high-voltage bridge arm protection action signal is the same as the third high-voltage bridge arm protection action signal and is different from the first high-voltage bridge arm protection action signal, and the first common bridge arm protection action signal is different from the second common bridge arm protection action signal, thereby achieving the purpose of quickly generating corresponding protection action signals according to the low-voltage side short-circuit fault or the high-voltage side short-circuit fault, and providing a basis for subsequently generating corresponding locking control instructions according to the protection action signals.

[0019] In an optional embodiment, generating a corresponding locking control instruction according to the protection action signal includes: when a low-voltage side short circuit fault occurs, using an AND logic gate to merge the first low-voltage bridge arm protection action signal and the first high-voltage bridge arm protection action signal to generate a first low-voltage bridge arm locking control instruction; when a first high-voltage side short circuit fault occurs, using an AND logic gate to merge the second low-voltage bridge arm protection action signal and the second high-voltage bridge arm protection action signal to generate a second low-voltage bridge arm locking control instruction; using an AND logic gate to merge the second high-voltage bridge arm protection action signal and the first common bridge arm protection action signal to generate a first high-voltage bridge arm locking control instruction and a first common bridge arm locking control instruction; when a second high-voltage side short circuit fault occurs, using an AND logic gate to merge the third low-voltage bridge arm protection action signal and the third high-voltage bridge arm protection action signal to generate a third low-voltage bridge arm locking control instruction; using an AND logic gate to merge the third high-voltage bridge arm protection action signal and the second common bridge arm protection action signal to generate a second high-voltage bridge arm locking control instruction and a second common bridge arm locking control instruction.

[0020] In an optional embodiment, locking the corresponding bridge arm according to the locking control instruction includes: when a low-voltage side short circuit fault occurs, locking the low-voltage bridge arm where the fault is located according to the first low-voltage bridge arm locking control instruction; when a first high-voltage side short circuit fault occurs, locking the low-voltage bridge arm according to the second low-voltage bridge arm locking control instruction; locking the high-voltage bridge arm according to the first high-voltage bridge arm locking control instruction, and locking the common bridge arm according to the first common bridge arm locking control instruction; when a second high-voltage side short circuit fault occurs, locking the low-voltage bridge arm according to the third low-voltage bridge arm locking control instruction, locking the high-voltage bridge arm according to the second high-voltage bridge arm locking control instruction, and locking the common bridge arm according to the second common bridge arm locking control instruction.

[0021] The DC transformer fault protection method provided by the embodiment of the present disclosure locks the low-voltage bridge arm where the fault is located when a short-circuit fault occurs on the low-voltage side; and locks all low-voltage bridge arms, high-voltage bridge arms and common bridge arms when a short-circuit fault occurs on the high-voltage side, that is, locks the entire DC transformer, quickly cuts off the fault current, and ensures that when a short-circuit fault occurs in the DC transformer, no harm is caused to the DC transformer and the DC system.

[0022] In a second aspect, the present disclosure provides a DC transformer fault protection device, wherein the DC transformer includes at least one unit; each unit includes a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm; one end of the high-voltage bridge arm is connected to one end of the low-voltage bridge arm and one end of the common bridge arm to form a common point, the other end of the low-voltage bridge arm and the other end of the common bridge arm form a low-voltage side port, and the other end of the high-voltage bridge arm and the other end of the common bridge arm form a high-voltage side port; the device includes: an acquisition module for acquiring low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters; a judgment module for judging the type of short-circuit fault that occurs based on the relationship between the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters and preset protection values ​​respectively; a generation module for generating a corresponding protection action signal according to the short-circuit fault type; a locking module for generating a corresponding locking control instruction according to the protection action signal, and locking the corresponding bridge arm according to the locking control instruction.

[0023] In a third aspect, the present disclosure provides a computer device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the DC transformer fault protection method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0024] In a fourth aspect, the present disclosure provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the DC transformer fault protection method of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the specific embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0026] FIG1 is a schematic flow chart of a DC transformer fault protection method according to an embodiment of the present disclosure;

[0027] FIG2 is a flow chart of another DC transformer fault protection method according to an embodiment of the present disclosure;

[0028] FIG3 is a flow chart of another DC transformer fault protection method according to an embodiment of the present disclosure;

[0029] FIG4 is a schematic diagram of a unipolar circuit topology structure of a DC transformer according to an embodiment of the present disclosure;

[0030] FIG5 is a schematic diagram of a symmetrical bipolar circuit topology structure of a DC transformer according to an embodiment of the present disclosure;

[0031] FIG6 is a schematic diagram of a multi-port topology structure on the low-voltage side of a DC transformer according to an embodiment of the present disclosure;

[0032] FIG7 is a schematic diagram of a topological structure of a half-bridge submodule in a DC transformer according to an embodiment of the present disclosure;

[0033] FIG8 is a schematic diagram of a topological structure of a full-bridge submodule in a DC transformer according to an embodiment of the present disclosure;

[0034] FIG9 is a schematic diagram of a topological structure of a hybrid submodule in a DC transformer according to an embodiment of the present disclosure;

[0035] FIG10 is a schematic diagram of the topological structure of an asymmetrical submodule in a DC transformer according to an embodiment of the present disclosure;

[0036] FIG11 is a schematic diagram of a topological structure of interleaved connected submodules in a DC transformer according to an embodiment of the present disclosure;

[0037] FIG12 is a schematic diagram of another topological structure of interleaved connected submodules in a DC transformer according to an embodiment of the present disclosure;

[0038] FIG13 is a schematic diagram of a topological structure of a clamped twin module in a DC transformer according to an embodiment of the present disclosure;

[0039] FIG14 is a schematic diagram of a topological structure of a flying capacitor submodule in a DC transformer according to an embodiment of the present disclosure;

[0040] FIG15 is a schematic diagram of a topological structure of a three-level submodule in a DC transformer according to an embodiment of the present disclosure;

[0041] FIG16 is a schematic diagram of another three-level submodule topology structure in a DC transformer according to an embodiment of the present disclosure;

[0042] FIG17 is a schematic diagram of a neutral line DC current of a unipolar circuit topology structure of a DC transformer according to an embodiment of the present disclosure;

[0043] FIG18 is a schematic diagram of a neutral line DC current of a symmetrical bipolar circuit topology structure of a DC transformer according to an embodiment of the present disclosure;

[0044] FIG19 is a schematic diagram of an action criterion for bridge arm overcurrent protection according to an embodiment of the present disclosure;

[0045] FIG20 is a schematic diagram of a submodule overvoltage protection action criterion according to an embodiment of the present disclosure;

[0046] FIG21 is a schematic diagram of a DC overvoltage protection action criterion according to an embodiment of the present disclosure;

[0047] FIG22 is a schematic diagram of a DC line current differential protection action criterion according to an embodiment of the present disclosure;

[0048] FIG23 is a schematic diagram of a DC port current differential protection action criterion according to an embodiment of the present disclosure;

[0049] FIG24 is a schematic diagram of protection action criteria for a neutral point grounding device according to an embodiment of the present disclosure;

[0050] FIG25 is a schematic diagram of the protection lockout logic of the low-voltage bridge arm of the DC transformer according to an embodiment of the present disclosure;

[0051] FIG26 is a schematic diagram of the protection lockout logic of the high-voltage bridge arm of the DC transformer according to an embodiment of the present disclosure;

[0052] FIG27 is a schematic diagram of the DC transformer common bridge arm protection lockout logic according to an embodiment of the present disclosure;

[0053] FIG28 is a structural block diagram of a DC transformer fault protection device according to an embodiment of the present disclosure;

[0054] FIG29 is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0055] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present disclosure.

[0056] According to an embodiment of the present disclosure, an embodiment of a DC transformer fault protection method is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0057] In this embodiment, a DC transformer fault protection method is provided. The topological structure diagram of the DC transformer is shown in Figures 4 and 5. The DC transformer topology can be a unipolar circuit or a symmetrical bipolar circuit. Figure 4 is a unipolar circuit topology diagram of the DC transformer, and Figure 5 is a symmetrical bipolar circuit topology diagram of the DC transformer. The DC transformer includes at least one unit; each unit includes a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm; one end of the high-voltage bridge arm is connected to one end of the low-voltage bridge arm and one end of the common bridge arm to form a common point, the other end of the low-voltage bridge arm and the other end of the common bridge arm form a low-voltage side port, and the other end of the high-voltage bridge arm and the other end of the common bridge arm form a high-voltage side port, wherein L represents the low-voltage bridge arm, and H represents the high-voltage bridge arm; Figure 1 is a flow chart of the DC transformer fault protection method according to an embodiment of the present disclosure. As shown in Figure 1, the process includes the following steps:

[0058] Step S101: Obtain low-voltage bridge arm parameters, high-voltage bridge arm parameters, and common bridge arm parameters. Specifically, when the DC transformer is operating, the parameters used for DC transformer fault diagnosis may include DC current, low-voltage bridge arm current, high-voltage bridge arm current, common bridge arm current, DC transformer low-voltage side DC voltage, and DC transformer high-voltage side DC voltage. These parameters can all be used as fault diagnosis parameters.

[0059] Step S102: Determine the type of short-circuit fault that has occurred based on the relationship between the low-voltage bridge arm parameters, the high-voltage bridge arm parameters, and the common bridge arm parameters and preset protection values. Specifically, the preset protection values ​​may be pre-set overvoltage protection values, overcurrent protection values, and differential protection values. The overvoltage protection values, overcurrent protection values, and differential protection values ​​may be determined based on the selection and tolerance levels of various components in the DC transformer. The preset protection values ​​are used as a criterion for determining the type of short-circuit fault that has occurred in the DC transformer. The type of short-circuit fault that has occurred in the DC transformer is determined by comparing the low-voltage bridge arm parameters, the high-voltage bridge arm parameters, and the common bridge arm parameters, such as the DC current, the low-voltage bridge arm current, the high-voltage bridge arm current, the common bridge arm current, the DC voltage on the low-voltage side of the DC transformer, and the DC voltage on the high-voltage side of the DC transformer, with the overvoltage protection values, the overcurrent protection values, and the differential protection values.

[0060] Step S103: Generate a corresponding protection action signal according to the fault type. Specifically, generate a protection action signal corresponding to the short-circuit fault type according to the short-circuit fault type. The short-circuit fault type and the corresponding protection action signal can be preset.

[0061] Step S104: Generate a corresponding blocking control instruction according to the protection action signal, and block the corresponding bridge arm according to the blocking control instruction.

[0062] The DC transformer fault protection method provided by the embodiment of the present disclosure obtains low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters, and determines the type of short-circuit fault that occurs based on the relationship between the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters and preset protection constants; generates a corresponding protection action signal based on the short-circuit fault type; generates a corresponding locking control instruction based on the protection action signal, and locks the corresponding bridge arm according to the locking control instruction, thereby achieving the purpose of quickly detecting a short-circuit fault in the DC transformer, and locking the corresponding bridge arm through the locking control instruction, thereby locking the faulty bridge arm and quickly cutting off the short-circuit fault current, protecting the entire DC transformer and DC system, so that the entire DC transformer and DC system are not affected by the short-circuit fault, and solving the problem in the prior art that a short-circuit fault in the DC transformer causes harm to the DC transformer and the DC system.

[0063] In this embodiment, a DC transformer fault protection method is provided. The topological structure diagram of the DC transformer is shown in Figures 4 and 5. The DC transformer topology can be a unipolar circuit or a symmetrical bipolar circuit. Figure 4 is a unipolar circuit topology diagram of the DC transformer, and Figure 5 is a symmetrical bipolar circuit topology diagram of the DC transformer. The DC transformer includes at least one unit; each unit includes a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm; one end of the high-voltage bridge arm is connected to one end of the low-voltage bridge arm and one end of the common bridge arm to form a common point, the other end of the low-voltage bridge arm and the other end of the common bridge arm form a low-voltage side port, and the other end of the high-voltage bridge arm and the other end of the common bridge arm form a high-voltage side port, wherein L represents the low-voltage bridge arm, and H represents the high-voltage bridge arm; Figure 2 is a flow chart of the DC transformer fault protection method according to an embodiment of the present disclosure. As shown in Figure 2, the process includes the following steps:

[0064] Step S201: Obtain parameters of a low-voltage bridge arm, a high-voltage bridge arm, and a common bridge arm. Specifically, the high-voltage bridge arm, the low-voltage bridge arm, and the common bridge arm each include multiple submodules connected in series; the submodules can be configured as half-bridge submodules, full-bridge submodules, hybrid submodules, asymmetric submodules, staggered submodules, clamped twin submodules, flying capacitor submodules, or three-level submodules.

[0065] FIG7 shows a half-bridge submodule structure. The half-bridge submodule includes at least one protection unit 71 and a DC link capacitor 72 . The at least one protection unit 71 is connected in series and then in parallel with the DC link capacitor 72 .

[0066] FIG8 shows a full-bridge submodule structure. The full-bridge submodule includes a DC support capacitor 81 , a protection unit 82 , a protection unit 83 , a protection unit 84 and a protection unit 85 .

[0067] FIG9 shows a hybrid submodule structure, which includes a DC support capacitor 91 , a DC support capacitor 92 , a protection unit 93 , a protection unit 94 , a protection unit 95 , a protection unit 96 , a protection unit 97 and a protection unit 98 .

[0068] FIG10 shows an asymmetric submodule structure. The asymmetric submodule includes a DC link capacitor 1001 , a DC link capacitor 1002 , a protection unit 1003 , a protection unit 1004 , a protection unit 1005 and a protection unit 1006 .

[0069] Figure 11 shows an interleaved submodule structure, which includes a DC support capacitor 111, a DC support capacitor 112, a protection unit 113, a protection unit 114, a protection unit 115, a protection unit 116, a protection unit 117, a protection unit 118, a protection unit 119 and a protection unit 1110.

[0070] Figure 12 shows another staggered connection type submodule structure, which includes a DC support capacitor 121, a DC support capacitor 122, a protection unit 123, a protection unit 124, a protection unit 125, a protection unit 126, a protection unit 127, a protection unit 128, a protection unit 129 and a protection unit 1210.

[0071] FIG13 shows a structure of a clamping twin module. The clamping twin module includes a DC link capacitor 131 , a DC link capacitor 132 , a protection unit 133 , a protection unit 134 , a protection unit 135 , a protection unit 136 , and a protection unit 137 .

[0072] FIG14 shows a flying capacitor type submodule structure. The flying capacitor type submodule includes a DC link capacitor 141 , a DC link capacitor 142 , a protection unit 143 , a protection unit 144 , a protection unit 145 and a protection unit 146 .

[0073] FIG15 shows a three-level submodule structure. A three-level submodule includes a DC link capacitor 151 , a DC link capacitor 152 , a protection unit 153 , a protection unit 154 , a protection unit 155 and a protection unit 156 .

[0074] 16 shows another three-level submodule structure, which includes a DC link capacitor 161 , a DC link capacitor 162 , a protection unit 163 , a protection unit 164 , a protection unit 165 , a protection unit 166 , a protection unit 167 , and a protection unit 168 .

[0075] The low-voltage bridge arm parameters include any one or more of the low-voltage bridge arm current, the sub-module capacitor voltage of the low-voltage bridge arm, the low-voltage side DC voltage and the low-voltage side DC pole line current; the high-voltage bridge arm parameters include any one or more of the high-voltage bridge arm current, the sub-module capacitor voltage of the high-voltage bridge arm and the high-voltage side DC voltage; the common bridge arm parameters include the common bridge arm current.

[0076] Based on the DC fault current characteristics of the DC transformer, the specific method for setting the low-voltage side DC line current difference is as follows:

[0077] When the DC transformer consists of a single unit, the low-voltage side DC pole line current is the difference between the fault pole DC current and the non-fault pole DC current. Specifically, as shown in Figure 4 , when the DC transformer consists of a single unit, i.e., a unipolar circuit, as shown in Figure 17 , the low-voltage side DC pole line current is the difference between the fault pole DC current and the non-fault pole DC current.

[0078] When the DC transformer includes two symmetrically arranged units, the low-voltage side DC pole line current is the difference between the low-voltage side fault pole DC current, the neutral line DC current, and the common bridge arm current. Specifically, when the DC transformer includes two symmetrically arranged units, it is a symmetrical bipolar circuit as shown in Figure 5. The low-voltage side DC pole line current is the difference between the low-voltage side fault pole DC current, the neutral line DC current, and the common bridge arm current, as shown in Figures 17 and 18, that is, |Idcline1-Iground_centrl1-idcW| or |Idcline2-Iground_centrl1-idcW|>Iset1. In Figures 17 and 18, Idcline1 represents the fault pole DC current or the non-fault pole DC current, Idcline2 represents the non-fault pole DC current or the fault pole DC current corresponding to Idcline1, Iground_centrl1 is the neutral line DC current, and idcW is the common bridge arm current.

[0079] When the DC transformer includes two or more low-voltage side ports, the low-voltage bridge arm parameters also include the difference between the DC current of the low-voltage side fault port and the DC current of the low-voltage side non-fault port. Specifically, a schematic diagram of the multi-port low-voltage side of the DC transformer is shown in Figure 6. When the DC transformer includes two or more low-voltage side ports, the number of low-voltage bridge arms is two or more, and the other end of each low-voltage bridge arm and the other end of the common bridge arm can form a low-voltage side port, that is, two or more low-voltage side ports are formed. In this case, the low-voltage bridge arm parameters also include the difference between the DC current of the low-voltage side fault port and the DC current of the low-voltage side non-fault port.

[0080] Step S202 : determining the type of short-circuit fault that occurs based on the relationship between the low-voltage bridge arm parameter, the high-voltage bridge arm parameter, the common bridge arm parameter, and the preset protection set values.

[0081] Specifically, the above step S202 includes:

[0082] Step S2021: When any one or more of the following conditions are met: the low-voltage bridge arm parameter is greater than or equal to the first bridge arm overcurrent protection action value; the submodule capacitor voltage of the low-voltage bridge arm is greater than or equal to the first submodule overvoltage protection action value; the low-voltage side DC voltage is greater than or equal to the first DC overvoltage protection action value; and the low-voltage side DC line current is greater than or equal to the first DC current differential protection action value, and the duration exceeds a first preset time, it is determined that a low-voltage side short-circuit fault has occurred; specifically, when any one or more of the following conditions are met, it is determined that a low-voltage side short-circuit fault has occurred as follows:

[0083] The low-voltage arm current in the DC transformer's low-voltage arm parameters is greater than or equal to the first arm overcurrent protection action value, and the duration exceeds a first preset time. The first arm overcurrent protection action value is determined based on the selection and tolerance of each component in the DC transformer. The first preset time can be set to the first detection time value, which is within 1 ms, where ms represents milliseconds. The arm overcurrent protection action criteria are shown in Figure 19.

[0084] The DC transformer's low-voltage bridge arm parameters require that the capacitor voltage of the low-voltage bridge arm submodule be greater than or equal to the first submodule overvoltage protection trigger value, and the duration exceeds a first preset time. The first submodule overvoltage protection trigger value is determined based on the selection and tolerance of each component in the DC transformer. The first preset time can be set to the second detection time value, approximately 1ms. The bridge arm submodule overvoltage protection trigger criteria are shown in Figure 20.

[0085] The DC voltage on the low-voltage side of the DC transformer's low-voltage bridge arm parameters is greater than or equal to the first DC overvoltage protection action value, and the duration exceeds the first preset time. The first DC overvoltage protection action value can be set to approximately 1.3 pu to 1.4 pu, where pu is the per-unit value. The first preset time can be set to the third detection time value, approximately 30 ms. The DC overvoltage protection action criteria are shown in Figure 21.

[0086] The low-voltage side DC line current difference in the DC transformer low-voltage bridge arm parameters is greater than or equal to the first DC current differential protection action setting, and the duration exceeds the first preset time. The first DC current differential protection action setting can be set to approximately 0.2 pu to 0.5 pu, and the first preset time can be set to the eighth detection time setting, approximately 10 ms. The low-voltage side DC line current difference protection action criteria are shown in Figure 22.

[0087] The difference between the DC current at the faulty low-voltage port and the DC current at the non-faulty port in the DC transformer's low-voltage bridge arm parameters is greater than or equal to the second DC current differential protection action setting, and the duration exceeds the first preset time. The second DC current differential protection action setting is determined based on the selection and tolerance of each component in the DC transformer. The first preset time can be set to the ninth detection time setting, which is approximately 10ms. The differential protection action criteria for the DC current at the faulty low-voltage port and the DC current at the non-faulty port are shown in Figure 23, where Idcport1 represents the DC current at the faulty low-voltage port, and Idcport2 represents the DC current at the non-faulty port.

[0088] As shown in Figure 24, considering that the DC transformer includes two symmetrically arranged units and is a symmetrical bipolar circuit, a neutral point grounding device is required. Therefore, neutral point grounding overcurrent protection is provided to protect the neutral point grounding device in the event of a DC transformer fault. Iground_centrl1 and Iground_centrl2 are both neutral point grounding currents 241. When the absolute value of the neutral point grounding currents Iground_centrl1 or Iground_centrl2 (i.e., neutral point grounding current 241) is greater than or equal to the neutral point grounding overcurrent protection action value Iset3 (i.e., neutral point grounding overcurrent protection action value 242), and the duration exceeds the fourth preset time, the neutral point grounding overcurrent protection setting is adjusted based on the overcurrent capacity of the grounding electrode. The fourth preset time can be set to the tenth detection time setting, which is set according to actual needs. The neutral point grounding overcurrent protection is a backup protection action. When the absolute value of the neutral point grounding current Iground_centrl1 or Iground_centrl2 (i.e., the neutral point grounding current 241) is greater than or equal to the neutral point grounding overcurrent protection setting Iset3 (i.e., the neutral point grounding overcurrent protection action setting 242), the neutral point grounding overcurrent protection is activated 243 to protect the neutral point grounding device. Otherwise, the neutral point grounding overcurrent protection is deactivated 244.

[0089] Step S2022: When any one or more of the following conditions are met: the high-voltage bridge arm parameter is greater than or equal to the second bridge arm overcurrent protection action value, the high-voltage bridge arm submodule capacitor voltage is greater than or equal to the second submodule overvoltage protection action value, and the high-voltage side DC voltage is greater than or equal to the second DC overvoltage protection action value, and the duration exceeds a second preset time, it is determined that a first high-voltage side short-circuit fault has occurred. Specifically, when any one or more of the following conditions are met, it is determined that a first high-voltage side short-circuit fault has occurred as follows:

[0090] The high-voltage arm current in the DC transformer's high-voltage arm parameters is greater than or equal to the second arm overcurrent protection action value, and the duration exceeds a second preset time. The second arm overcurrent protection action value is determined based on the selection and tolerance of various components in the DC transformer, and the second preset time can be set to the fourth detection time value, which is less than 1ms.

[0091] The high-voltage bridge arm submodule capacitor voltage in the DC transformer high-voltage bridge arm parameters is greater than or equal to the second submodule overvoltage protection trigger value, and the duration exceeds the second preset time. The second submodule overvoltage protection trigger value is determined based on the selection and tolerance level of each component in the DC transformer, and the second preset time can be set to the fifth detection time value, which is approximately 1ms.

[0092] The high-voltage side DC voltage in the DC transformer high-voltage bridge arm parameters is greater than or equal to the second DC overvoltage protection action value, and the duration exceeds the second preset time. The second DC overvoltage protection action value can be set to approximately 1.3 pu to 1.4 pu, and the second preset time can be set to the sixth detection time value, approximately 30 ms.

[0093] In step S2023, when the common bridge arm current is greater than or equal to a third preset overcurrent protection value, and any one or more of the following conditions are satisfied: the high-voltage bridge arm parameter is greater than or equal to the second bridge arm overcurrent protection action value, the high-voltage bridge arm submodule capacitor voltage is greater than or equal to the second submodule overvoltage protection action value, and the high-voltage side DC voltage is greater than or equal to the second DC overvoltage protection action value, and the duration exceeds a third preset time, then a second high-voltage side short circuit fault is determined to have occurred. The third bridge arm overcurrent protection action value is determined based on the selection and tolerance level of each component in the DC transformer, and the third preset time can be set to the seventh detection time value, which is less than 1 ms.

[0094] In Figure 19, |Iarm| represents the absolute value of the bridge arm current value of the low-voltage bridge arm, the high-voltage bridge arm or the common bridge arm, Iset represents the overcurrent protection action constant of the low-voltage bridge arm or the high-voltage bridge arm, the input of the size comparator 193 is the bridge arm current 191 and the bridge arm overcurrent protection action constant 192, when the absolute value of the bridge arm current 191 is greater than or equal to the bridge arm overcurrent protection action constant 192, the flag value is set to 0 and the bridge arm overcurrent protection action 194 is executed; when the absolute value of the bridge arm current 191 is less than the bridge arm overcurrent protection action constant 192, the flag value is set to 1 and the bridge arm overcurrent protection is not executed 195. In Figure 20, |Usm| represents the absolute value of the submodule capacitor voltage value in the low-voltage bridge arm or the high-voltage bridge arm, Uset represents the submodule overvoltage protection action constant value in the low-voltage bridge arm or the high-voltage bridge arm, and the input of the size comparator 2003 is the submodule capacitor voltage 2001 and the submodule overvoltage protection action constant value 2002. When the absolute value of the submodule capacitor voltage 2001 is greater than or equal to the submodule overvoltage protection action constant value 2002, the flag value is set to 0 and the submodule overvoltage protection action 2004 is executed; when the absolute value of the submodule capacitor voltage 2001 is less than the submodule overvoltage protection action constant value 2002, the flag value is set to 1 and the submodule overvoltage protection no action 2005 is executed. In Figure 21, |Udc| represents the absolute value of the low-voltage bridge arm DC voltage or the high-voltage bridge arm DC voltage, Uset1 represents the low-voltage bridge arm or the high-voltage bridge arm DC overvoltage protection action constant, the input of the size comparator 213 is the DC voltage 211 and the DC overvoltage protection action constant 212. When the absolute value of the DC voltage 211 is greater than or equal to the DC overvoltage protection action constant 212, the flag value is set to 0 and the DC overvoltage protection action 214 is executed; when the absolute value of the DC voltage 211 is less than the DC overvoltage protection action constant 212, the flag value is set to 1 and the DC overvoltage protection is not executed 215.In FIG22 , when the DC transformer includes one unit, the low-voltage DC limiting current difference 221 is the absolute value of the difference between the fault pole DC current and the non-fault pole DC current, |Idcline1-Idcline2|. When the DC transformer includes two symmetrically arranged units, the low-voltage side DC pole line current is the absolute value of the difference between the low-voltage side fault pole DC current, the neutral line DC current, and the common bridge arm current, that is, |Idcline1-Iground_centrl1-IdcW| or |Idcline2-Iground_centrl1-IdcW|, where Idcline1 represents the fault pole DC current or the non-fault pole DC current, and Idcline2 represents the non-fault pole DC current or the fault pole DC current corresponding to Idcline1. The barrier DC current, Iground_centrl1 is the neutral DC current, IdcW is the common bridge arm current, Iset1 represents the DC pole line current differential protection action value 222, that is, the first DC current differential protection action value, the input of the difference comparator 223 is the low-voltage DC limiting current difference 221 and the DC pole line current differential protection action value 222. When the absolute value of the low-voltage DC limiting current difference 221 is greater than or equal to the DC pole line current differential protection action value 222, the flag value is set to 0 and the DC pole line current differential protection action 224 is executed; when the absolute value of the low-voltage DC limiting current difference 221 is less than the DC pole line current differential protection action value 222, the flag value is set to 1 and the DC pole line current differential protection is not operated 225. In Figure 23, low-voltage DC port current difference 231 is the absolute value of the difference between the DC current of the faulted low-voltage port and the DC current of the unfaulted low-voltage port, |Idcport1-Idcport2|. Iset2 represents the DC port current differential protection action setting 232, i.e., the second DC current differential protection action setting. The inputs of difference comparator 233 are the DC port current difference 231 and the DC port current differential protection action setting 232. If the absolute value of DC port current difference 231 is greater than or equal to the DC port current differential protection action setting 232, a flag value of 0 is set and DC port current differential protection action 234 is executed. If the absolute value of DC port current difference 231 is less than the DC port current differential protection action setting 232, a flag value of 1 is set and DC port current differential protection inaction 235 is executed. In Figures 19 to 24, the values ​​at terminals A and B of the magnitude comparator are all absolute values.

[0095] Step S203: Generate a corresponding protection action signal according to the fault type. Please refer to step S103 of the embodiment shown in FIG1 for details, which will not be repeated here.

[0096] Step S204: Generate a corresponding blocking control instruction according to the protection action signal, and block the corresponding bridge arm according to the blocking control instruction. Please refer to step S104 of the embodiment shown in FIG1 for details, which will not be repeated here.

[0097] The DC transformer fault protection method provided by the embodiment of the present disclosure comprises low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters, including key fault electrical quantities of the DC transformer, and comprehensive parameter collection. Based on the characteristic that the fault on the low-voltage side of the DC transformer develops slowly, a low-voltage side DC pole line current is further set, and the calculation method of the low-voltage side DC pole line current is clarified. When the DC transformer includes two or more low-voltage side ports, the low-voltage bridge arm parameters also include the difference current between the DC current of the low-voltage side fault port and the DC current of the low-voltage side non-fault port, thereby improving the sensitivity of low-voltage side fault detection and providing a basis for subsequent judgment of short-circuit faults based on the relationship between the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters and preset protection values. By comparing the relationship between the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters and the specific preset protection values, it is possible to accurately determine whether a low-voltage side short-circuit fault or a high-voltage side short-circuit fault occurs, thereby achieving rapid identification of DC transformer short-circuit faults and providing a basis for subsequent generation of corresponding protection action signals based on the type of short-circuit fault.

[0098] In this embodiment, a DC transformer fault protection method is provided. The topological structure diagram of the DC transformer is shown in Figures 4 and 5. The DC transformer topology can be a unipolar circuit or a symmetrical bipolar circuit. Figure 4 is a unipolar circuit topology diagram of the DC transformer, and Figure 5 is a symmetrical bipolar circuit topology diagram of the DC transformer. The DC transformer includes at least one unit; each unit includes a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm; one end of the high-voltage bridge arm is connected to one end of the low-voltage bridge arm and one end of the common bridge arm to form a common point, the other end of the low-voltage bridge arm and the other end of the common bridge arm form a low-voltage side port, and the other end of the high-voltage bridge arm and the other end of the common bridge arm form a high-voltage side port, wherein L represents the low-voltage bridge arm, and H represents the high-voltage bridge arm; Figure 3 is a flow chart of the DC transformer fault protection method according to an embodiment of the present disclosure. As shown in Figure 3, the process includes the following steps:

[0099] Step S301: Obtain low-voltage bridge arm parameters, high-voltage bridge arm parameters, and common bridge arm parameters. For details, please refer to step S201 of the embodiment shown in FIG2 , which will not be described in detail here.

[0100] Step S302: Determine the type of short circuit fault according to the relationship between the low voltage bridge arm parameter, the high voltage bridge arm parameter, and the common bridge arm parameter and the preset protection setting value. For details, please refer to step S202 of the embodiment shown in FIG2 , which will not be described in detail here.

[0101] Step S303: Generate a corresponding protection action signal according to the short-circuit fault type.

[0102] Specifically, the above step S303 includes:

[0103] Step S3031: When a low-voltage side short circuit fault occurs, a first low-voltage bridge arm protection action signal and a first high-voltage bridge arm protection action signal are generated. Specifically, as shown in FIG25 , when a high-voltage side short circuit fault occurs and the low-voltage bridge arm current is greater than or equal to the first bridge arm overcurrent protection action setting value, a low-voltage bridge arm overcurrent protection action signal corresponding to the low-voltage bridge arm overcurrent protection 251 is generated;

[0104] When the capacitor voltage of the low-voltage bridge arm submodule is greater than or equal to the first submodule overvoltage protection action setting value and a low-voltage side short circuit fault occurs, a first submodule overvoltage protection action signal corresponding to the low-voltage bridge arm submodule overvoltage protection 252 is generated;

[0105] When the low-voltage side DC voltage is greater than or equal to the first DC overvoltage protection action setting value and a low-voltage side short circuit fault occurs, a first DC overvoltage protection action signal corresponding to the low-voltage side DC overvoltage protection 253 is generated;

[0106] When the low-voltage side DC line current difference is greater than or equal to the first DC current differential protection action setting value and a low-voltage side short circuit fault occurs, the low-voltage side DC line current differential protection 254 is executed, and a first DC current differential protection action signal is generated accordingly;

[0107] When the difference between the DC current of the fault port on the low voltage side and the DC current of the non-fault port is greater than or equal to the second DC current differential protection action setting value and a low voltage side short circuit fault occurs, a second DC current differential protection action signal corresponding to the low voltage side DC port current differential protection 255 is generated;

[0108] The above-mentioned low-voltage bridge arm overcurrent protection action signal, the first sub-module overvoltage protection action signal, the first DC overvoltage protection action signal, the first DC current differential protection action signal and the second DC current differential protection action signal are combined through the logic gate 256 to generate the first low-voltage bridge arm protection action signal (i.e., the low-voltage bridge arm protection action signal 257).

[0109] Specifically, all protection action signals are represented by logic values ​​"1" and "0", where logic value "1" represents protection inaction and logic value "0" represents protection action.

[0110] (1) In the initial state, all protection action signals on the high-voltage side and the low-voltage side are "1", that is, the protection is not in action.

[0111] (2) When a short circuit fault occurs on the low-voltage side, as shown in FIG25 , at least one of the low-voltage bridge arm overcurrent protection (i.e., low-voltage bridge arm overcurrent protection 251), the first submodule overvoltage protection (i.e., low-voltage bridge arm submodule overvoltage protection 252), the first DC overvoltage protection (i.e., low-voltage side DC overvoltage protection 253), the first DC current differential protection (i.e., low-voltage side DC pole line current differential protection 254), and the second DC current differential protection (i.e., low-voltage side DC port current differential protection 255) on the low-voltage side will be activated, and the protection action signal corresponding to the protection action becomes “0”, thereby the first low-voltage bridge arm protection action signal (i.e., low-voltage bridge arm protection action signal 257) generated by merging with the logic gate 256 becomes “0”.

[0112] (3) When a short circuit fault occurs on the low-voltage side, all protections on the high-voltage side do not operate, as shown in Figure 26. At this time, the first high-voltage bridge arm protection action signal is "1".

[0113] Step S3032: When a first high-voltage side short-circuit fault occurs, a second low-voltage bridge arm protection action signal, a second high-voltage bridge arm protection action signal, and a first common bridge arm protection signal are generated. Specifically, as shown in FIG26 :

[0114] When the high-voltage bridge arm current is greater than or equal to the second bridge arm overcurrent protection action setting value and a first high-voltage side short circuit fault occurs, a second bridge arm overcurrent protection action signal corresponding to the high-voltage bridge arm overcurrent protection 261 is generated;

[0115] When the capacitor voltage of the high-voltage bridge arm submodule is greater than or equal to the second submodule overvoltage protection action setting value and a first high-voltage side short circuit fault occurs, a second submodule overvoltage protection signal corresponding to the high-voltage bridge arm submodule overvoltage protection 262 is generated;

[0116] When the high-voltage side DC voltage is greater than or equal to the second DC overvoltage protection action setting value and a first high-voltage side short circuit fault occurs, a second DC overvoltage protection signal corresponding to the high-voltage side DC overvoltage protection 263 is generated;

[0117] The second bridge arm overcurrent protection action signal, the second submodule overvoltage protection signal and the second DC overvoltage protection signal are combined with the logic gate 264 to generate a second high-voltage bridge arm protection action signal (ie, the high-voltage bridge arm protection action signal 265 ).

[0118] Specifically, all protection action signals are represented by logic values ​​"1" and "0", where logic value "1" represents protection inaction and logic value "0" represents protection action.

[0119] (1) In the initial state, all protection action signals on the high-voltage side and the low-voltage side are "1", that is, the protection is not in action.

[0120] (2) When a first high-voltage side short-circuit fault occurs, as shown in FIG26 , at least one of the high-voltage side second bridge arm overcurrent protection action (i.e., high-voltage bridge arm overcurrent protection 261), the second submodule overvoltage protection (i.e., high-voltage bridge arm submodule overvoltage protection 262), and the second DC overvoltage protection (i.e., high-voltage side DC overvoltage protection 263) will be activated, and the protection action signal corresponding to the protection action becomes “0”, thereby the second high-voltage bridge arm protection action signal (i.e., high-voltage bridge arm protection action signal 265) generated by merging with the logic gate 264 becomes “0”.

[0121] (3) When a short circuit fault occurs on the first high-voltage side, the low-voltage bridge arm overcurrent protection, the first submodule overvoltage protection, the first DC overvoltage protection, the first DC current differential protection and the second DC current differential protection on the low-voltage side do not operate. As shown in FIG25 , the second low-voltage bridge arm protection action signal generated by merging with the logic gate is “1”.

[0122] (4) When a first high-voltage side short-circuit fault occurs, the common bridge arm does not operate, and the generated first common bridge arm protection signal is "1".

[0123] Step S3033, when a second high-voltage side short-circuit fault occurs, a third low-voltage bridge arm protection action signal, a third high-voltage bridge arm protection action signal and a second common bridge arm protection action signal are generated, the second low-voltage bridge arm protection action signal and the third low-voltage bridge arm protection action signal are the same, and are different from the first low-voltage bridge arm protection action signal, the second high-voltage bridge arm protection action signal and the third high-voltage bridge arm protection action signal are the same, and are different from the first high-voltage bridge arm protection action signal, and the first common bridge arm protection action signal and the second common bridge arm protection action signal are different.

[0124] Specifically, all protection action signals are represented by logic values ​​"1" and "0", where logic value "1" represents protection inaction and logic value "0" represents protection action.

[0125] (1) In the initial state, all protection action signals on the high-voltage side and the low-voltage side are "1", that is, the protection is not in action.

[0126] (2) When a short circuit fault occurs on the second high-voltage side, as shown in FIG26 , at least one of the overcurrent protection action of the second bridge arm on the high-voltage side, the overvoltage protection of the second submodule, and the second DC overvoltage protection will be activated, and the protection action signal corresponding to the protection action will become “0”, thereby generating a third high-voltage bridge arm protection action signal by merging with the logic gate and becoming “0”.

[0127] (3) When a second high-voltage side short-circuit fault occurs, the low-voltage side low-voltage bridge arm overcurrent protection, the first submodule overvoltage protection, the first DC overvoltage protection, the first DC current differential protection and the second DC current differential protection are all inoperative, as shown in FIG25 , and the third low-voltage bridge arm protection action signal generated by merging with the logic gate is “1”.

[0128] (4) When a short circuit fault occurs on the second high-voltage side, the common bridge arm is activated and the generated second common bridge arm protection signal is "0".

[0129] Step S304: Generate a corresponding blocking control instruction according to the protection action signal, and block the corresponding bridge arm according to the blocking control instruction.

[0130] Specifically, the above step S304 includes:

[0131] Step S3041: When a low-voltage side short-circuit fault occurs, the first low-voltage bridge arm protection action signal and the first high-voltage bridge arm protection action signal are combined using an AND logic gate to generate a first low-voltage bridge arm locking control instruction;

[0132] For example, all protection action signals are represented by logical values ​​of "1" and "0," where "1" indicates protection is not in effect and "0" indicates protection is in effect. The operating status of each bridge arm is also represented by logical values ​​of "1" and "0," where "1" indicates the bridge arm is unlocked and "0" indicates the bridge arm is locked.

[0133] Step a1, as shown in FIG25 , is initially set to “1” for all protection action signals on both the high-voltage and low-voltage sides, indicating that protection is not in effect. AND logic gate 259 is used to combine the first low-voltage arm protection action signal (i.e., low-voltage arm protection action signal 257) and the first high-voltage arm protection action signal (i.e., high-voltage arm protection action signal 258) to generate a first low-voltage arm blocking control instruction (i.e., low-voltage arm blocking control instruction 2510), which is also set to “1”, indicating that the high-voltage, low-voltage, and common arms of the DC transformer are unlocked.

[0134] In step a2, when a short circuit fault occurs on the low-voltage side, as shown in Figure 25, at least one of the low-voltage bridge arm overcurrent protection, first submodule overvoltage protection, first DC overvoltage protection, first DC current differential protection, and second DC current differential protection on the low-voltage side will be activated. The protection action signal corresponding to the protection action will become "0", thereby changing the first low-voltage bridge arm protection action signal generated by merging with the logic gate to "0". All protections on the high-voltage side will not be activated, as shown in Figure 26. At this time, the first high-voltage bridge arm protection action signal is "1". The first low-voltage bridge arm protection action signal and the first high-voltage bridge arm protection action signal are merged using the AND logic gate to generate the first low-voltage bridge arm lockout control command, which becomes "0" and is sent to the external valve control system of the low-voltage bridge arm.

[0135] Step a3, as shown in Figure 26, since the first high-voltage bridge arm protection action signal 265 and the common bridge arm protection action signal 266 are both "1", the high-voltage bridge arm unlocking control instruction 268 generated by merging with the "AND" logic gate 267 is also "1"; as shown in Figure 27, since the first high-voltage bridge arm protection action signal 272 and the common bridge arm protection action signal 271 are both "1", the common bridge arm unlocking control instruction 274 generated by merging with the "AND" logic gate 273 is also "1", that is, both the high-voltage bridge arm and the common bridge arm are not locked.

[0136] Step S3042: When a first high-voltage side short-circuit fault occurs, the second low-voltage bridge arm protection action signal and the second high-voltage bridge arm protection action signal are combined using an AND logic gate to generate a second low-voltage bridge arm blocking control instruction; the second high-voltage bridge arm protection action signal and the first common bridge arm protection action signal are combined using an AND logic gate to generate a first high-voltage bridge arm blocking control instruction and a first common bridge arm blocking control instruction. Specifically:

[0137] In step b1, as shown in Figure 25, in the initial state, all protection action signals on both the high-voltage and low-voltage sides are set to "1," indicating that protection is inactive. The second low-voltage arm lockout control command, generated by combining the second low-voltage arm protection action signal and the second high-voltage arm protection action signal using an AND logic gate, is also set to "1," unlocking the high-voltage, low-voltage, and common arms of the DC transformer.

[0138] Step b2, when the first high-voltage side short-circuit fault occurs, as shown in Figure 26, at least one of the high-voltage side second bridge arm overcurrent protection action, the second submodule overvoltage protection and the second DC overvoltage protection will be performed, and the protection action corresponding to the protection action signal becomes "0", thereby the second high-voltage bridge arm protection action signal generated by merging with the logic gate becomes "0".

[0139] Step b3, when the first high-voltage side short-circuit fault occurs, regardless of whether the low-voltage side protection is activated or not, as shown in Figure 25, the second low-voltage bridge arm protection action signal and the second high-voltage bridge arm protection action signal "0" are combined with the logic gate to generate the second low-voltage bridge arm locking control instruction, which will be changed to "0" and sent to the external valve control system of the low-voltage bridge arm.

[0140] Step b4, when the first high-voltage side short-circuit fault occurs, regardless of whether the common bridge arm protection is activated or not, the first common bridge arm protection action signal and the second high-voltage bridge arm protection action signal "0" are combined with the logic gate to generate the first common bridge arm locking control instruction, which will both become "0" and be sent to the external valve control system of the common bridge arm.

[0141] Step b5, as shown in Figure 26, the second high-voltage bridge arm protection action signal "0" and the first common bridge arm protection action signal are combined with the logic gate to generate the first high-voltage bridge arm locking control instruction, which is changed to "0" and sent to the external valve control system of the high-voltage bridge arm.

[0142] Step S3043: When a second high-voltage side short-circuit fault occurs, the low-voltage bridge arm is locked according to the third low-voltage bridge arm locking control instruction, the high-voltage bridge arm is locked according to the second high-voltage bridge arm locking control instruction, and the common bridge arm is locked according to the second common bridge arm locking control instruction. Specifically:

[0143] In step c1, as shown in Figure 25, in the initial state, all protection action signals on the high-voltage and low-voltage sides are "1," indicating that protection is inactive. The third low-voltage arm lockout control command, generated by combining the third low-voltage arm protection action signal and the third high-voltage arm protection action signal using an AND logic gate, is also "1," unlocking the high-voltage, low-voltage, and common arms of the DC transformer.

[0144] Step c2, when a second high-voltage side short-circuit fault occurs, as shown in Figure 26, at least one of the high-voltage side second bridge arm overcurrent protection action, the second submodule overvoltage protection and the second DC overvoltage protection will be performed, and the protection action corresponding to the protection action signal becomes "0", thereby the third high-voltage bridge arm protection action signal generated by merging with the logic gate becomes "0".

[0145] Step c3, when a second high-voltage side short-circuit fault occurs, regardless of whether the low-voltage side protection is activated or not, as shown in Figure 25, the third low-voltage bridge arm protection action signal and the third high-voltage bridge arm protection action signal "0" are combined with the logic gate to generate the third low-voltage bridge arm locking control instruction, which will be changed to "0" and sent to the external valve control system of the low-voltage bridge arm.

[0146] In step c4, when a second high-voltage side short-circuit fault occurs, the common bridge arm is actuated, and the second common bridge arm protection action signal "0" and the third high-voltage bridge arm protection action signal "0" are combined with the logic gate to generate the second common bridge arm locking control instruction, which will both become "0" and be sent to the external valve control system of the common bridge arm.

[0147] Step c5, as shown in Figure 27, the third high-voltage bridge arm protection action signal "0" and the second common bridge arm protection action signal "0" are combined with the logic gate to generate the second high-voltage bridge arm locking control instruction, which is changed to "0" and sent to the external valve control system of the high-voltage bridge arm.

[0148] Step S3044: when a low-voltage side short-circuit fault occurs, the low-voltage bridge arm where the fault occurs is locked according to the first low-voltage bridge arm locking control instruction;

[0149] Step S3045: When a first high-voltage side short-circuit fault occurs, the low-voltage bridge arm is locked according to the second low-voltage bridge arm locking control instruction; the high-voltage bridge arm is locked according to the first high-voltage bridge arm locking control instruction; and the common bridge arm is locked according to the first common bridge arm locking control instruction;

[0150] Step S3046: When a second high-voltage side short-circuit fault occurs, the low-voltage bridge arm is locked according to the third low-voltage bridge arm locking control instruction, the high-voltage bridge arm is locked according to the second high-voltage bridge arm locking control instruction, and the common bridge arm is locked according to the second common bridge arm locking control instruction.

[0151] Specifically, when a low-voltage side short-circuit fault occurs, the faulty low-voltage arm is blocked according to the first low-voltage arm blocking control instruction "0." However, according to the high-voltage arm unlocking control instruction "1" and the common arm unlocking control instruction "1," neither the high-voltage arm nor the common arm is blocked. In other words, when a low-voltage side short-circuit fault occurs, only the faulty low-voltage arm is blocked.

[0152] When a first high-voltage side short-circuit fault occurs, the low-voltage bridge arm is locked according to the second low-voltage bridge arm unlocking control instruction "0", the high-voltage bridge arm is locked according to the first high-voltage bridge arm locking control instruction "0", and the common bridge arm is locked according to the first common bridge arm locking control instruction "0".

[0153] When a second high-voltage side short-circuit fault occurs, the low-voltage bridge arm is locked according to the third low-voltage bridge arm unlocking control instruction "0", the high-voltage bridge arm is locked according to the second high-voltage bridge arm locking control instruction "0", and the common bridge arm is locked according to the second common bridge arm locking control instruction "0".

[0154] That is, when a short circuit fault occurs on the high-voltage side, all low-voltage bridge arms, high-voltage bridge arms and common bridge arms of the DC transformer are locked to quickly cut off the fault current.

[0155] The DC transformer fault protection method provided by the embodiment of the present disclosure generates a first low-voltage bridge arm protection action signal and a first high-voltage bridge arm protection action signal when a low-voltage side short-circuit fault occurs; generates a second low-voltage bridge arm protection action signal, a second high-voltage bridge arm protection action signal and a first common bridge arm protection signal when a first high-voltage side short-circuit fault occurs; generates a third low-voltage bridge arm protection action signal, a third high-voltage bridge arm protection action signal and a second common bridge arm protection action signal when a second high-voltage side short-circuit fault occurs, thereby achieving the purpose of quickly generating corresponding protection action signals according to the low-voltage side short-circuit fault or the high-voltage side short-circuit fault that occurs, and providing a basis for subsequently generating corresponding locking control instructions according to the protection action signals. When a low-voltage side short-circuit fault occurs, the low-voltage bridge arm where the fault is located is locked; when a high-voltage side short-circuit fault occurs, all low-voltage bridge arms, high-voltage bridge arms and common bridge arms are locked, that is, the entire DC transformer is locked, and the fault current is quickly cut off, ensuring that when a short-circuit fault occurs in the DC transformer, no harm is caused to the DC transformer and the DC system.

[0156] This embodiment also provides a DC transformer fault protection device, which is used to implement the above-mentioned embodiments and preferred embodiments. Details already described will not be repeated here. As used below, the term "module" may refer to a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0157] This embodiment provides a DC transformer fault protection device, as shown in Figure 28, the DC transformer includes at least one unit; each unit includes a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm; one end of the high-voltage bridge arm is connected to one end of the low-voltage bridge arm and one end of the common bridge arm to form a common point, the other end of the low-voltage bridge arm and the other end of the common bridge arm form a low-voltage side port, and the other end of the high-voltage bridge arm and the other end of the common bridge arm form a high-voltage side port; the DC transformer fault protection device includes: an acquisition module 2801, used to obtain low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters; a judgment module 2802, used to judge the type of short-circuit fault that occurs based on the relationship between the low-voltage bridge arm parameters, the high-voltage bridge arm parameters and the common bridge arm parameters and preset protection values; a generation module 2803, used to generate a corresponding protection action signal according to the short-circuit fault type; a locking module 2804, used to generate a corresponding locking control instruction according to the protection action signal, and lock the corresponding bridge arm according to the locking control instruction.

[0158] In some optional embodiments, the judgment module 2802 includes: a first judgment unit, configured to determine that a low-voltage side short-circuit fault has occurred when any one or more of the following conditions are satisfied: a low-voltage bridge arm parameter is greater than or equal to a first bridge arm overcurrent protection action value; a submodule capacitor voltage of the low-voltage bridge arm is greater than or equal to a first submodule overvoltage protection action value; a low-voltage side DC voltage is greater than or equal to a first DC overvoltage protection action value; and a low-voltage side DC line current is greater than or equal to a first DC current differential protection action value, and the duration exceeds a first preset time. A second judgment unit, configured to determine that a first high-voltage side short-circuit fault has occurred when any one or more of the following conditions are satisfied: a high-voltage bridge arm parameter is greater than or equal to a second bridge arm overcurrent protection action value; a submodule capacitor voltage of the high-voltage bridge arm is greater than or equal to a second submodule overvoltage protection action value; and a high-voltage side DC voltage is greater than or equal to a second DC overvoltage protection action value, and the duration exceeds a second preset time. The third judgment unit is used to determine that a second high-voltage side short-circuit fault occurs when the common bridge arm current is greater than or equal to a third preset overcurrent protection setting, and satisfies any one or more of the following conditions: the high-voltage bridge arm parameter is greater than or equal to the second bridge arm overcurrent protection action setting, the sub-module capacitor voltage of the high-voltage bridge arm is greater than or equal to the second sub-module overvoltage protection action setting, and the high-voltage side DC voltage is greater than or equal to the second DC overvoltage protection action setting, and the duration exceeds a third preset time.

[0159] In some optional embodiments, the generation module 2803 includes: a first generation unit for generating a first low-voltage bridge arm protection action signal and a first high-voltage bridge arm protection action signal when a low-voltage side short circuit fault occurs; a second generation unit for generating a second low-voltage bridge arm protection action signal, a second high-voltage bridge arm protection action signal, and a first common bridge arm protection signal when a first high-voltage side short circuit fault occurs; and a third generation unit for generating a third low-voltage bridge arm protection action signal, a third high-voltage bridge arm protection action signal, and a second common bridge arm protection action signal when a second high-voltage side short circuit fault occurs, wherein the second low-voltage bridge arm protection action signal and the third low-voltage bridge arm protection action signal are the same and different from the first low-voltage bridge arm protection action signal, the second high-voltage bridge arm protection action signal and the third high-voltage bridge arm protection action signal are the same and different from the first high-voltage bridge arm protection action signal, and the first common bridge arm protection action signal and the second common bridge arm protection action signal are different.

[0160] In some optional embodiments, the locking module 2804 includes: a first merging and generating unit, configured to, when a low-voltage side short circuit fault occurs, merge the first low-voltage bridge arm protection action signal and the first high-voltage bridge arm protection action signal using an AND logic gate to generate a first low-voltage bridge arm locking control instruction; a second merging and generating unit, configured to, when a first high-voltage side short circuit fault occurs, merge the second low-voltage bridge arm protection action signal and the second high-voltage bridge arm protection action signal using an AND logic gate to generate a second low-voltage bridge arm locking control instruction; and merge the second high-voltage bridge arm protection action signal and the first common bridge arm protection action signal using an AND logic gate to generate a first high-voltage bridge arm locking control instruction and a first common bridge arm locking control instruction. A third merging and generating unit, configured to, when a second high-voltage side short circuit fault occurs, merge the third low-voltage bridge arm protection action signal and the third high-voltage bridge arm protection action signal using an AND logic gate to generate a third low-voltage bridge arm locking control instruction; and merge the third high-voltage bridge arm protection action signal and the second common bridge arm protection action signal using an AND logic gate to generate a second high-voltage bridge arm locking control instruction and a second common bridge arm locking control instruction. The first locking unit is used to lock the low-voltage bridge arm where the fault occurs according to the first low-voltage bridge arm locking control instruction when a low-voltage side short-circuit fault occurs; the second locking unit is used to lock the low-voltage bridge arm according to the second low-voltage bridge arm locking control instruction when a first high-voltage side short-circuit fault occurs; lock the high-voltage bridge arm according to the first high-voltage bridge arm locking control instruction, and lock the common bridge arm according to the first common bridge arm locking control instruction; the third locking unit is used to lock the low-voltage bridge arm according to the third low-voltage bridge arm locking control instruction when a second high-voltage side short-circuit fault occurs, lock the high-voltage bridge arm according to the second high-voltage bridge arm locking control instruction, and lock the common bridge arm according to the second common bridge arm locking control instruction.

[0161] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0162] The DC transformer fault protection device in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0163] It should be noted that, in the embodiments of the present disclosure, if the above method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present disclosure is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, which is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk. In this way, the embodiments of the present disclosure are not limited to any specific hardware, software or firmware, or any combination of hardware, software and firmware.

[0164] An embodiment of the present disclosure also provides a computer device having the DC transformer fault protection device shown in FIG. 28 above.

[0165] Please refer to Figure 29, which is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present disclosure. As shown in Figure 29, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other using different buses and can be installed on a common motherboard or installed in other ways as needed. The processor can process instructions executed within the computer device, including instructions stored in or on the memory to display graphical information of a GUI on an external input / output device (such as a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, with each device providing some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 29 takes a processor 10 as an example.

[0166] The processor 10 may be a central processing unit, a network processor, or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.

[0167] The memory 20 stores instructions that can be executed by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.

[0168] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof. The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk, or a solid-state drive; the memory 20 may also include a combination of the above-mentioned types of memory.

[0169] The computer device further includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30, and the output device 40 may be connected via a bus or other means, with FIG29 taking the bus connection as an example.

[0170] The input device 30 can receive input digital or character information and generate key signal input related to user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a trackpad, a touch pad, an indicator stick, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 can include a display device, an auxiliary lighting device (e.g., an LED), and a tactile feedback device (e.g., a vibration motor). The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display, and a plasma display. In some optional embodiments, the display device can be a touch screen.

[0171] The embodiments of the present disclosure also provide a computer-readable storage medium. The above-mentioned method according to the embodiments of the present disclosure can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.

[0172] Although the embodiments of the present disclosure have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations are all within the scope defined by the appended claims.

[0173] It should be understood that “one embodiment” or “some embodiments” mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, “in one embodiment” or “in some embodiments” appearing throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned steps / processes does not mean the order of execution, and the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. The above-mentioned serial numbers of the embodiments of the present application are for description only and do not represent the advantages and disadvantages of the embodiments.

[0174] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0175] The above is only an implementation method of the present application, but the scope of protection of the present application is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in this application, which should be covered by the scope of protection of the present application. Industrial Applicability

[0176] The DC transformer fault protection method provided by the embodiment of the present disclosure obtains low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters, and determines the type of short-circuit fault that occurs based on the relationship between the low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters and preset protection constants; generates a corresponding protection action signal based on the short-circuit fault type; generates a corresponding locking control instruction based on the protection action signal, and locks the corresponding bridge arm according to the locking control instruction, thereby achieving the purpose of quickly detecting a short-circuit fault in the DC transformer, and locking the corresponding bridge arm through the locking control instruction, thereby locking the faulty bridge arm and quickly cutting off the short-circuit fault current, protecting the entire DC transformer and DC system, so that the entire DC transformer and DC system are not affected by the short-circuit fault, and solving the problem in the prior art that a short-circuit fault in the DC transformer causes harm to the DC transformer and the DC system.

Claims

1. A DC transformer fault protection method, the DC transformer comprising at least one unit; each of the units comprising a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm; one end of the high-voltage bridge arm is connected to one end of the low-voltage bridge arm and forms a common point with one end of the common bridge arm, the other end of the low-voltage bridge arm and the other end of the common bridge arm form a low-voltage side port, and the other end of the high-voltage bridge arm and the other end of the common bridge arm form a high-voltage side port; the method comprises: Obtain low voltage bridge arm parameters, high voltage bridge arm parameters and common bridge arm parameters; Determine the type of short-circuit fault that occurs according to the relationship between the low-voltage bridge arm parameter, the high-voltage bridge arm parameter and the common bridge arm parameter and the preset protection set value; Generate a corresponding protection action signal according to the short circuit fault type; A corresponding locking control instruction is generated according to the protection action signal, and the corresponding bridge arm is locked according to the locking control instruction.

2. The method according to claim 1, wherein: The high-voltage bridge arm, the low-voltage bridge arm and the common bridge arm each include a plurality of sub-modules connected in series; The low-voltage bridge arm parameters include any one or more of the low-voltage bridge arm current, the submodule capacitor voltage of the low-voltage bridge arm, the low-voltage side DC voltage and the low-voltage side DC pole line current; The high-voltage bridge arm parameters include any one or more of the high-voltage bridge arm current, the submodule capacitor voltage of the high-voltage bridge arm, and the high-voltage side DC voltage; The common bridge arm parameters include common bridge arm current.

3. The method according to claim 2, wherein: When the DC transformer includes one unit, the low voltage side DC pole line current is the difference between the fault pole DC current and the non-fault pole DC current; When the DC transformer includes two symmetrically arranged units, the low-voltage side DC pole line current is the difference between the low-voltage side fault pole DC current, the neutral line DC current and the common bridge arm current; When the DC transformer includes two or more low-voltage side ports, the low-voltage bridge arm parameter also includes the difference current between the DC current of the low-voltage side fault port and the DC current of the low-voltage side non-fault port.

4. The method according to claim 1, wherein: Judging the type of short-circuit fault according to the relationship between the low-voltage bridge arm parameter, the high-voltage bridge arm parameter and the common bridge arm parameter and the preset protection setting value includes: When any one or more of the following conditions are met: the low-voltage bridge arm parameter is greater than or equal to the first bridge arm overcurrent protection action setting value, the submodule capacitor voltage of the low-voltage bridge arm is greater than or equal to the first submodule overvoltage protection action setting value, the low-voltage side DC voltage is greater than or equal to the first DC overvoltage protection action setting value, and the low-voltage side DC pole line current is greater than or equal to the first DC current differential protection action setting value, and the duration exceeds the first preset time, it is determined that a low-voltage side short circuit fault occurs; When any one or more of the following conditions are met: the high-voltage bridge arm parameter is greater than or equal to the second bridge arm overcurrent protection action setting value, the submodule capacitor voltage of the high-voltage bridge arm is greater than or equal to the second submodule overvoltage protection action setting value, and the high-voltage side DC voltage is greater than or equal to the second DC overvoltage protection action setting value, and the duration exceeds the second preset time, it is determined that a first high-voltage side short circuit fault occurs; When the common bridge arm current is greater than or equal to the third preset overcurrent protection setting, and the high-voltage bridge arm parameter is greater than or equal to the second bridge arm overcurrent protection action setting, the sub-module capacitor voltage of the high-voltage bridge arm is greater than or equal to the second sub-module overvoltage protection action setting, and the high-voltage side DC voltage is greater than or equal to the second DC overvoltage protection action setting, and the duration exceeds the third preset time, it is determined that a second high-voltage side short circuit fault has occurred.

5. The method according to claim 4, wherein: Generating a corresponding protection action signal according to the short-circuit fault type includes: When a short circuit fault occurs on the low-voltage side, a first low-voltage bridge arm protection action signal and a first high-voltage bridge arm protection action signal are generated; When a first high-voltage side short-circuit fault occurs, a second low-voltage bridge arm protection action signal, a second high-voltage bridge arm protection action signal and a first common bridge arm protection signal are generated; When a short circuit fault occurs on the second high-voltage side, a third low-voltage bridge arm protection action signal and a third high-voltage bridge arm protection action signal are generated. The second low-voltage bridge arm protection action signal is the same as the third low-voltage bridge arm protection action signal and is different from the first low-voltage bridge arm protection action signal, the second high-voltage bridge arm protection action signal is the same as the third high-voltage bridge arm protection action signal and is different from the first high-voltage bridge arm protection action signal, and the first common bridge arm protection action signal is different from the second common bridge arm protection action signal.

6. The method according to claim 5, wherein: Generating a corresponding locking control instruction according to the protection action signal includes: When a short circuit fault occurs on the low-voltage side, the first low-voltage bridge arm protection action signal and the first high-voltage bridge arm protection action signal are combined by an AND logic gate to generate a first low-voltage bridge arm locking control instruction; When a first high-voltage side short-circuit fault occurs, the second low-voltage bridge arm protection action signal and the second high-voltage bridge arm protection action signal are combined by an AND logic gate to generate a second low-voltage bridge arm locking control instruction; the second high-voltage bridge arm protection action signal and the first common bridge arm protection action signal are combined by an AND logic gate to generate a first high-voltage bridge arm locking control instruction and a first common bridge arm locking control instruction; When a second high-voltage side short-circuit fault occurs, an AND logic gate is used to combine the third low-voltage bridge arm protection action signal and the third high-voltage bridge arm protection action signal to generate a third low-voltage bridge arm locking control instruction; an AND logic gate is used to combine the third high-voltage bridge arm protection action signal and the second common bridge arm protection action signal to generate a second high-voltage bridge arm locking control instruction and a second common bridge arm locking control instruction.

7. The method according to claim 6, wherein: Locking the corresponding bridge arm according to the locking control instruction includes: When a short circuit fault occurs on the low-voltage side, the low-voltage bridge arm where the fault occurs is locked according to the first low-voltage bridge arm locking control instruction; When a first high-voltage side short-circuit fault occurs, the low-voltage bridge arm is locked according to the second low-voltage bridge arm locking control instruction; the high-voltage bridge arm is locked according to the first high-voltage bridge arm locking control instruction, and the common bridge arm is locked according to the first common bridge arm locking control instruction; When a second high-voltage side short-circuit fault occurs, the low-voltage bridge arm is locked according to the third low-voltage bridge arm locking control instruction, the high-voltage bridge arm is locked according to the second high-voltage bridge arm locking control instruction, and the common bridge arm is locked according to the second common bridge arm locking control instruction.

8. A DC transformer fault protection device, wherein: The DC transformer comprises at least one unit; each of the units comprises a high-voltage bridge arm, a low-voltage bridge arm and a common bridge arm; one end of the high-voltage bridge arm is connected to one end of the low-voltage bridge arm and forms a common point with one end of the common bridge arm, the other end of the low-voltage bridge arm and the other end of the common bridge arm form a low-voltage side port, and the other end of the high-voltage bridge arm and the other end of the common bridge arm form a high-voltage side port; the device comprises: An acquisition module, used to acquire low-voltage bridge arm parameters, high-voltage bridge arm parameters and common bridge arm parameters; A judgment module, used for judging the type of short-circuit fault that occurs according to the relationship between the low-voltage bridge arm parameter, the high-voltage bridge arm parameter and the common bridge arm parameter and the preset protection set value; A generating module, used for generating a corresponding protection action signal according to the short-circuit fault type; The locking module is used to generate a corresponding locking control instruction according to the protection action signal, and lock the corresponding bridge arm according to the locking control instruction.

9. A computer device, wherein: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the DC transformer fault protection method according to any one of claims 1 to 7 by executing the computer instructions.

10. A computer-readable storage medium, wherein: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the DC transformer fault protection method according to any one of claims 1 to 7.

Citation Information

Patent Citations

  • Fault ride-through method of low-loss modular multilevel DC-DC converter

    CN110943615A

  • Low-loss modular multi-level direct-current / direct-current converter and sub-module thereof

    CN110994974A

  • Modularized multi-level DC / DC converter and application system

    CN114583955A

  • Bipolar modular multilevel DC / DC converter

    CN116015057A

  • Direct-current transformer fault protection method and device, computer equipment and storage medium

    CN117317976A

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