Mapping method from EDA design layout to simulation layout

Abstract

A mapping method from an EDA design layout to a simulation layout. The mapping method comprises: S1, defining design layers, layer processing functions and Boolean operators to support definition of any layer operation expression, and providing a layer expression analytical computation method to support final computation of a required simulation layout layer via an expression; S2, on the basis of characters, traversing expression character strings, removing spaces and splitting the expression into an expression list comprising parentheses, layers, the layer processing functions and the Boolean operators; S3, on the basis of a defined rule, converting the expression list into a suffix expression list; S4, traversing the expression list, and calling a Boolean operation and the layer functions, so as to compute elements in the list; and S5, outputting the result, so as to complete computation to obtain a simulation layout layer. The present invention implements flexible definition of mapping modes, thus improving the use convenience.

Description

A mapping method from EDA design layout to simulation layout Technical Field

[0001] The present invention relates to the technical field of EDA model layout simulation, and in particular to a mapping method from an EDA design layout to a simulation layout. Background Art

[0002] In layout design, graphics are typically categorized into different types, such as drawing, fill, pin, and text, based on their intended use. However, this classification is not used in actual model structures. Therefore, during simulation, it is necessary to correctly map the graphics used in the design process to the corresponding simulation layers.

[0003] In the prior art, some Boolean representation methods are used to perform operations on the corresponding layers to obtain the expression of the final simulation layer.

[0004] The methods used in the prior art have the disadvantages of being complex in expression and inflexible in use.

[0005] Summary of the Invention

[0006] In view of the above problems, the present invention is proposed to provide a method for mapping an EDA design layout to a simulation layout that overcomes the above problems or at least partially solves the above problems.

[0007] According to one aspect of the present invention, a method for mapping an EDA design layout to a simulation layout is provided, the mapping method comprising:

[0008] Step S1: By defining design layers, layer processing functions, and Boolean operators, support for arbitrary layer operation expressions is defined; a layer expression parsing and calculation method is provided to support the final calculation of the required simulation layout layer through the expression;

[0009] Step S2: traverse the expression string character by character, remove spaces, and decompose the expression into an expression list of brackets, layers, layer processing functions, and Boolean operators;

[0010] Step S3: convert the expression list into a suffix expression list according to the defined rules;

[0011] Step S4: traverse the expression list, call Boolean operations and layer functions, and calculate the elements in the list;

[0012] Step S5: Output the result and complete the calculation to obtain the simulation layout layer.

[0013] Optionally, step S1: defining support for arbitrary layer operation expressions by defining design layers, layer processing functions, and Boolean operators; and providing a layer expression parsing and calculation method to support the final calculation of the required simulation layout layers through the expression specifically includes:

[0014] Define the layer using LxTy;

[0015] Define Boolean operators: + represents layer union, * represents layer intersection, and - represents shape subtraction; define the names of the resulting layers after union, intersection, and subtraction;

[0016] Define layer processing function;

[0017] Defines the layer mapping expression.

[0018] Optionally, the defined layer processing function specifically includes: various geometric operations such as scaling and merging.

[0019] Optionally, defining the layer mapping expression specifically includes: using Boolean operators, layer definitions, and graphic processing functions to define the mapping expression.

[0020] Optionally, the step S3: converting the expression list into a suffix expression list according to the defined rules specifically includes:

[0021] The output expression list is used as input, and a blank operator stack and postfix expression list are created at the same time;

[0022] First, push the termination symbol # into the operator stack;

[0023] Traverse the expression list and check the current element in the list;

[0024] After the expression list is traversed, the top element of the operator stack is checked. If the element is not a terminator, the element is moved to the suffix expression list and the operator stack is checked again.

[0025] Output the generated list of postfix expressions.

[0026] Optionally, traversing the expression list and checking the current element in the list specifically includes:

[0027] The current element is a layer, add the current element to the suffix expression list;

[0028] The current element is a left bracket, add the current element to the operator stack;

[0029] The current element is an operator. Check the top element of the operator stack. If the element is a terminal symbol or a left parenthesis, add the current element to the operator stack. If the top element of the operator stack is not a terminal symbol or a left parenthesis, move the top element of the operator stack to the postfix expression list and then recheck the operator stack.

[0030] If the current element is a right parenthesis, check the top element of the operator stack. If it is not a left parenthesis, move the element to the postfix expression list and continue checking the operator stack. If the top element of the operator stack is a left parenthesis, remove the left parenthesis and exit the check.

[0031] The current element layer function adds the current element to the suffix expression list.

[0032] Optionally, the step S4: traversing the expression list, calling Boolean operations and layer functions, and calculating the elements in the list specifically includes:

[0033] Take a list of postfix expressions as input and create a blank calculation list;

[0034] Traverse the list of suffix expressions and check the current element in the list;

[0035] After the postfix expression has finished traversing, there will be one element in the evaluation list;

[0036] Output the last element to complete the calculation.

[0037] Optionally, traversing the suffix expression list and checking the current element in the list specifically includes:

[0038] The current element is a layer, add the element to the calculation list;

[0039] The current element is a layer function, check the parameters in the layer function;

[0040] The current element is a Boolean operator. Take out the last two elements added to the calculation list, call the corresponding Boolean operation, complete the graphics processing, and add the calculation result to the calculation list.

[0041] Optionally, the current element is a layer function, and checking parameters in the layer function specifically includes:

[0042] The current element is a layer function, and checking the parameters in the layer function specifically includes: if the parameter is a non-simple layer, calling the expression described in this patent to solve and convert it into a simple layer; when all parameters are simple layers, calling the corresponding layer function for specific solution; and adding the calculation result to the calculation list.

[0043] The present invention provides a method for mapping an EDA design layout to a simulation layout. The method comprises the following steps: Step S1: defining an expression that supports arbitrary layer operation expressions by defining design layers, layer processing functions, and Boolean operators; providing a method for parsing and calculating layer expressions to support the ultimate calculation of the required simulation layout layers through the expressions; Step S2: traversing the expression string character by character, removing spaces, and decomposing the expression into an expression list consisting of brackets, layers, layer processing functions, and Boolean operators; Step S3: converting the expression list into a suffix expression list according to defined rules; Step S4: traversing the expression list, calling Boolean operations and layer functions, and calculating the elements in the list; Step S5: outputting the results to complete the calculation and obtain the simulation layout layers. The method implements flexible mapping method definition and improves ease of use. A feasible solution method is also proposed to support the mapping of the design layout to the simulation layout.

[0044] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are specifically listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0046] FIG1 is a flow chart of an overall method for solving a layout mapping problem provided by an embodiment of the present invention;

[0047] FIG2 is a flow chart of a method for generating a suffix expression in layout mapping according to an embodiment of the present invention;

[0048] FIG3 is a flowchart of a method for solving a suffix expression in layout mapping provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0049] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0050] The terms "comprises" and "comprising" and any variations thereof in the description, embodiments, claims and drawings of the present invention are intended to cover non-exclusive inclusions, for example, including a series of steps or units.

[0051] The technical solution of the present invention is further described in detail below with reference to the accompanying drawings and embodiments.

[0052] Example 1

[0053] As shown in Figure 1, this is an expression and solution method for mapping a general design layout to the actual physical layout used for simulation. By defining design layers, layer processing functions, Boolean operators, etc., it supports the definition of arbitrary layer operation expressions.

[0054] A layer expression parsing and calculation method to support the final calculation of the required simulation layout layer through the expression, including:

[0055] The first step is to traverse the expression string character by character, remove spaces, and decompose the expression into a list of expressions of brackets, layers, layer functions, and Boolean operators;

[0056] The second step is to convert the expression list into a suffix expression list according to the defined rules;

[0057] The third step is to traverse the expression list, call Boolean operations and layer functions, and calculate the elements in the list;

[0058] The fourth step is to output the results and complete the calculation.

[0059] As shown in Figures 2 and 3, an expression and solution method for mapping between a general design layout and an actual physical layout used for simulation is shown.

[0060] Step S1: By defining design layers, layer processing functions, Boolean operators, etc., it supports the definition of arbitrary layer operation expressions; at the same time, it provides a layer expression parsing calculation method to support the final calculation of the required simulation layout layer through the expression. The detailed preparation work is as follows:

[0061] Define the layer using the LxTy method; for example, a layer with a layer ID of 1 and a data type of 0 is defined as L1T0

[0062] Define Boolean operators: + represents layer union, * represents layer intersection, and - represents shape subtraction. Define the names of the resulting layers after union, intersection, and subtraction, using "_u_", "_i_", and "_s_" to concatenate the original layer names. For example, the resulting layer of L1T0+L2T0 is labeled L1T0_u_L2T0.

[0063] Define layer processing functions, which include various geometric operations such as scaling and merging. They are usually defined as unary or binary functions, such as Func1(L1T0), Func2(L1T0, 2), etc.

[0064] Define the layer mapping expression. Use Boolean operators, layer definitions, and graphics processing functions to define the mapping expression. For example: L30T0+(L40T60*Func2(L70T80,3))-L40T0.

[0065] Step S2: traverse the expression string character by character, remove spaces, and decompose the expression into an expression list of brackets, layers, layer functions, and Boolean operators;

[0066] Step S3: convert the expression list into a suffix expression list according to the defined rules;

[0067] Step S4: traverse the expression list, call Boolean operations and layer functions, and calculate the elements in the list;

[0068] Step S5: Output the results and complete the calculation to obtain the simulation layout layer

[0069] In step S3, the specific steps for converting the expression list into a suffix expression list are:

[0070] 1) Take the expression list output in the previous step as input and create a blank operator stack and postfix expression list at the same time

[0071] 2) First, push the termination symbol # into the operator stack.

[0072] 3) Traverse the expression list and check the current element in the list

[0073] 3.1) The current element is a layer, add the current element to the suffix expression list

[0074] 3.2) If the current element is a left bracket, add the current element to the operator stack.

[0075] 3.3) The current element is an operator. Check the top element of the operator stack. If the element is a terminal symbol or a left parenthesis, add the current element to the operator stack. If the top element of the operator stack is not a terminal symbol or a left parenthesis, move the top element of the operator stack to the postfix expression list and then recheck the operator stack.

[0076] 3.4) The current element is a right parenthesis. Check the top element of the operator stack. If it is not a left parenthesis, move it to the suffix expression list and continue checking the operator stack. If the top element of the operator stack is a left parenthesis, remove the left parenthesis and exit the check.

[0077] 3.5) Current element layer function, add the current element to the suffix expression list

[0078] 4) After the expression list is traversed, check the top element of the operator stack. If the element is not a terminator, move the element to the suffix expression list and continue to check the operator stack.

[0079] 5) Output the generated suffix expression list

[0080] In step S4, the specific steps for converting the expression list into a suffix expression list are:

[0081] 1) Take the suffix expression list output in the previous step as input and create a blank calculation list

[0082] 2) Traverse the list of suffix expressions and check the current element in the list

[0083] 2.1) The current element is a layer, add the element to the calculation list

[0084] 2.2) The current element is a layer function. Check the parameters in the layer function. If the parameter is not a simple layer, call the expression described in this patent to solve it and convert it into a simple layer. If all parameters are simple layers, call the corresponding layer function to perform a specific solution. And add the calculation result to the calculation list.

[0085] 2.3) The current element is a Boolean operator. Take out the last two elements added to the calculation list, call the corresponding Boolean operation, complete the graphic processing, and add the calculation result to the calculation list.

[0086] 3) After the suffix expression is completed, there will be an element in the calculation list

[0087] 4) Output the last element to complete the calculation.

[0088] Example 2

[0089] A layer M1 is defined as the union of the layer with ID 1, type 2, and the layer with ID 1, type 4, and then the intersection with the layer with ID 3, type 2, and finally the layer with ID 5, type 2 is subtracted.

[0090] Step S1, define M1 = (L1T2 + L1T4) * L3T2 - L5T2;

[0091] Step S2, split the expression into a list of (,L1T2,+,L1T4,),*,L3T2,-,L5T2;

[0092] Step S3, convert the expression into a suffix expression list: L1T2, L1T4, +, L3T2, *, L5T2, -;

[0093] Step S4, traverse the suffix expression list and calculate:

[0094] Define a calculation list:

[0095] List of postfix expressions: L1T2, L1T4, +, L3T2, *, L5T2, -

[0096] The calculation list is empty

[0097] Traverse the suffix expression list, the first two elements are simple layers, add them to the calculation list:

[0098] Postfix expression list: +, L3T2, *, L5T2, -;

[0099] Calculation list: L1T2, L1T4

[0100] If the current element in the suffix expression list is +, then the last two elements in the calculation list, L1T2 and L1T4, are taken out and the layer union operation is performed. The layer to be unioned is added to the calculation expression, and the result is:

[0101] Postfix expression list: L3T2, *, L5T2, -;

[0102] Calculation list: L1T2_u_L1T4;

[0103] The current element of the postfix expression list is L3T2, and the result after processing is:

[0104] Postfix expression list: *, L5T2, -;

[0105] Calculation list: L1T2_u_L1T4, L3T2

[0106] If the current element in the postfix expression list is *, then the last two elements in the calculation list are taken out for calculation and then added to the calculation list. The result is:

[0107] Postfix expression list: L5T2, -

[0108] Calculation list: L1T2_u_L1T4_i_L3T2

[0109] The current element of the postfix expression list is L5T2, and the result after processing is:

[0110] List of postfix expressions:-

[0111] Calculation list: L1T2_u_L1T4_i_L3T2, L5T2

[0112] The current element of the postfix expression list is -, and the result after processing is:

[0113] The postfix expression list is empty.

[0114] Calculation list: L1T2_u_L1T4_i_L3T2_s_L5T2;

[0115] The suffix expression is empty, and finally the layers in the calculation list are output to complete the calculation.

[0116] Beneficial effects: A flexible mapping method definition is realized, which improves the convenience of use; and a feasible solution method is proposed to support the mapping from design layout to simulation layout.

[0117] The above specific implementation methods further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for mapping an EDA design layout to a simulation layout, characterized in that: The mapping method comprises: Step S1: By defining design layers, layer processing functions, and Boolean operation symbols, support for arbitrary layer operation expressions is defined; a layer expression parsing and calculation method is provided to support the final calculation of the required simulation layout layer through the expression; Step S2: traverse the expression string character by character, remove spaces, and decompose the expression into an expression list of brackets, layers, layer processing functions, and Boolean operators; Step S3: according to the defined rules, convert the expression list into a suffix expression list; Step S4: traverse the expression list, call Boolean operations and layer functions, and calculate the elements in the list; Step S5: Output the result and complete the calculation to obtain the simulation layout layer.

2. The method for mapping an EDA design layout to a simulation layout according to claim 1, characterized in that: The step S1: by defining the design layer, the layer processing function, and the Boolean operation symbol, define the support for any layer operation expression; Provides a layer expression parsing calculation method to support the final calculation of the required simulation layout layer through the expression, including: Define the layer using LxTy; Define Boolean operators, + represents layer union, * represents layer intersection, - represents graphic subtraction; define the names of the result layers after union, intersection, and subtraction; Define layer processing function; Defines the layer mapping expression.

3. The method for mapping an EDA design layout to a simulation layout according to claim 2, characterized in that: The defined layer processing function specifically includes: various geometric operations such as scaling and merging.

4. The method for mapping an EDA design layout to a simulation layout according to claim 2, characterized in that: The defining of the layer mapping expression specifically includes: using Boolean operators, layer definitions, and graphic processing functions to define the mapping expression.

5. The method for mapping an EDA design layout to a simulation layout according to claim 1, characterized in that: The step S3: converting the expression list into a suffix expression list according to the defined rules specifically includes: The output expression list is used as input, and a blank operator stack and postfix expression list are created at the same time; First, push the termination symbol # into the operator stack; Iterate over the expression list and check the current element in the list; After the expression list is traversed, check the top element of the operator stack. If the element is not a terminator, move the element to the suffix expression list and continue checking the operator stack. Output the resulting list of suffix expressions.

6. The method for mapping an EDA design layout to a simulation layout according to claim 5, characterized in that: The traversal of the expression list and checking the current element in the list specifically includes: The current element is a layer, add the current element to the suffix expression list; The current element is a left bracket, add the current element to the operator stack; The current element is an operator. Check the top element of the operator stack. If the element is a terminal symbol or a left bracket, add the current element to the operator stack. If the top element of the operator stack is not a terminal symbol or a left bracket, move the top element of the operator stack to the suffix expression list and recheck the operator stack. The current element is a right parenthesis, check the top element of the operator stack, if the element is not a left parenthesis, move the element to the suffix expression list, and continue to check the operator stack; if the top element of the operator stack is a left parenthesis, remove the left parenthesis and exit the check; The current element layer function adds the current element to the suffix expression list.

7. The method for mapping an EDA design layout to a simulation layout according to claim 1, characterized in that: The step S4: traversing the expression list, calling Boolean operations and layer functions, and calculating the elements in the list specifically includes: Take a list of suffix expressions as input and create a blank evaluation list; Traverse the list of suffix expressions and check the current element in the list; After the suffix expression is finished traversing, there will be one element in the evaluation list; Output the final element to complete the calculation.

8. The method for mapping an EDA design layout to a simulation layout according to claim 1, characterized in that: The traversing of the suffix expression list and checking the current element in the list specifically includes: The current element is a layer, add the element to the calculation list; The current element is a layer function, check the parameters in the layer function; The current element is a Boolean operator. Take out the last two elements added to the calculation list, call the corresponding Boolean operation, complete the graphics processing, and add the calculation result to the calculation list.

9. The method for mapping an EDA design layout to a simulation layout according to claim 1, characterized in that: The current element is a layer function, and the parameters in the layer function are specifically checked as follows: The current element is a layer function, and checking the parameters in the layer function specifically includes: if the parameter is a non-simple layer, calling the expression described in this patent to solve and convert it into a simple layer; when all parameters are simple layers, calling the corresponding layer function for specific solution; and adding the calculation result to the calculation list.

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