Display panel and display device

Abstract

A display panel and a display device. The display panel has a display area, an opening area, and a peripheral area. The display panel comprises: a substrate, located in the display area and the peripheral area; an inorganic insulating layer, located on one side of the substrate and extending to the peripheral area from the display area; a plurality of conductive isolation columns, located on the side of the inorganic insulating layer facing away from the substrate and located in the peripheral area, the plurality of conductive isolation columns being sequentially arranged in the direction moving away from the display area; an insulating isolation layer, located on the side of the conductive isolation columns facing away from the substrate and extending to the peripheral area from the display area, the orthographic projection of the insulating isolation layer on the substrate at least covering the orthographic projections of the conductive isolation columns on the substrate; an organic material layer, located on the side of the insulating isolation layer facing away from the substrate and extending to the peripheral area from the display area, the organic material layer being disconnected at the conductive isolation columns; and a first electrode, located on the side of the organic material layer facing away from the substrate and extending to the peripheral area from the display area, the first electrode being disconnected at the conductive isolation columns.

Description

Display panel and display device Technical Field

[0001] The embodiments of the present disclosure belong to the field of display technology, and particularly relate to a display panel and a display device. Background Art

[0002] OLED (Organic Light Emitting Diode), a new display product, boasts rich colors, fast response times, and foldability. It is gradually replacing LCD (Liquid Crystal Display) as the mainstream small and medium-sized display product. With the further development of OLED, the market is demanding higher standards for OLED in terms of lifespan, power consumption, and high-brightness mode.

[0003] Summary of the Invention

[0004] Embodiments of the present disclosure provide a display panel and a display device that can prevent a dark spot phenomenon (GDSH) from occurring at a boundary between a display area and a peripheral area.

[0005] In a first aspect, an embodiment of the present disclosure provides a display panel, comprising a display area, an opening area, and a peripheral area, wherein the peripheral area is arranged around the opening area, and the display area surrounds the peripheral area.

[0006] The display panel includes a substrate located in the display area and the peripheral area.

[0007] an inorganic insulating layer, located on one side of the substrate and extending from the display area to the peripheral area;

[0008] A plurality of conductive isolation columns are located on a side of the inorganic insulating layer away from the substrate and in the peripheral area, and the plurality of conductive isolation columns are sequentially arranged in a direction away from the display area.

[0009] an insulating isolation layer, located on a side of the conductive isolation column facing away from the substrate and extending from the display area to the peripheral area, wherein the orthographic projection of the insulating isolation layer on the substrate at least covers the orthographic projection of the conductive isolation column on the substrate;

[0010] an organic material layer located on a side of the insulating isolation layer away from the substrate and extending from the display area to the peripheral area, wherein the organic material layer is disconnected at the conductive isolation column;

[0011] The first electrode is located on a side of the organic material layer away from the substrate and extends from the display area to the peripheral area. The first electrode is disconnected at the conductive isolation column.

[0012] In some embodiments, the device further comprises a dam located in the peripheral region and between the inorganic insulating layer and the insulating isolation layer, wherein the dam surrounds the periphery of the opening region;

[0013] The plurality of conductive isolation pillars include a plurality of first conductive isolation pillars and a plurality of second conductive isolation pillars,

[0014] The plurality of first conductive isolation columns are located on a side of the dam close to the display area, and the plurality of first conductive isolation columns are sequentially spaced apart in a direction away from the display area.

[0015] The plurality of second conductive isolation columns are located on a side of the dam away from the display area, and the plurality of second conductive isolation columns are sequentially spaced apart in a direction away from the display area.

[0016] An orthographic projection of the insulating isolation layer on the substrate and an orthographic projection of the dam on the substrate at least partially do not overlap.

[0017] In some embodiments, a plurality of first grooves are formed in the inorganic insulating layer, and the plurality of first grooves are located in a region between the dam and the display area.

[0018] The plurality of first grooves are sequentially arranged in a direction away from the display area, and the orthographic projections of the plurality of first grooves on the substrate do not overlap with the orthographic projections of the first conductive isolation pillars on the substrate.

[0019] In some embodiments, a first groove is formed in the inorganic insulating layer, and the first groove is located in a region between the dam and the display area.

[0020] The orthographic projections of the plurality of first conductive isolation pillars on the substrate are located within the orthographic projection area of ​​the first groove on the substrate.

[0021] In some embodiments, a second groove is further formed in the inorganic insulating layer, and the second groove is located in the region between the dam and the opening area.

[0022] The orthographic projections of the plurality of second conductive isolation pillars on the substrate are located within the orthographic projection area of ​​the second groove on the substrate.

[0023] In some embodiments, an orthographic projection of the insulating isolation layer on the substrate covers an orthographic projection of the first groove and the second groove on the substrate.

[0024] In some embodiments, a partition structure is further included, located between the inorganic insulating layer and the insulating isolation layer, and located in a non-display area of ​​the peripheral region bordering the display area.

[0025] The partition structure includes a conductive portion and a flat layer. The conductive portion and the conductive isolation column are made of the same material and are arranged on the same layer. The flat layer is located on the side of the conductive portion away from the substrate, and the orthographic projection of the flat layer on the substrate covers the orthographic projection of the conductive portion on the substrate.

[0026] The orthographic projection of the flat layer on the substrate does not overlap with the conductive isolation column;

[0027] A separation groove is formed on the side of the planar layer facing away from the substrate, and the orthographic projection of the insulating isolation layer on the substrate covers the orthographic projection area of ​​the planar layer on the substrate other than the separation groove in the non-display area.

[0028] The cross-sectional shape of the separation groove perpendicular to the base includes a trapezoidal shape,

[0029] The organic material layer or the organic material layer and the first electrode are disconnected at the separation groove.

[0030] In some embodiments, the inorganic insulating layer includes a plurality of sub-layers, and the plurality of sub-layers are stacked in sequence.

[0031] The display panel further includes a plurality of first padding structures located in the peripheral area and between adjacent sub-layers.

[0032] The plurality of first padding structures correspond to the plurality of second conductive isolation pillars one-to-one, and an orthographic projection of the first padding structure on the substrate overlaps with an orthographic projection of the second conductive isolation pillar on the substrate.

[0033] In some embodiments, a plurality of second padding structures are further included, located in the peripheral area and between adjacent sub-layers.

[0034] The plurality of second padding structures correspond one-to-one to the plurality of first conductive isolation pillars, and the second padding structures overlap with the orthographic projections of the first conductive isolation pillars on the substrate.

[0035] In some embodiments, the inorganic insulating layer includes a first sublayer and a second sublayer, wherein the first sublayer and the second sublayer are sequentially stacked away from the substrate.

[0036] The first padding structure includes a first conductive pattern, and the second padding structure includes a second conductive pattern.

[0037] The first conductive pattern and the second conductive pattern are made of the same material and are provided in the same layer;

[0038] The first conductive pattern and the second conductive pattern are located between the first sub-layer and the second sub-layer.

[0039] In some embodiments, the inorganic insulating layer further includes a third sublayer located on a side of the second sublayer facing away from the substrate.

[0040] The first padding structure further includes a third conductive pattern, and the second padding structure further includes a fourth conductive pattern.

[0041] The third conductive pattern and the fourth conductive pattern are made of the same material and are provided in the same layer;

[0042] The third conductive pattern and the fourth conductive pattern are located between the second sub-layer and the third sub-layer.

[0043] In some embodiments, the centers of the orthographic projections of the second conductive isolation pillar, the third conductive pattern, and the first conductive pattern on the substrate coincide with each other.

[0044] Any side edge of the orthographic projection of the third conductive pattern on the substrate is retracted 0.5 to 1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the first conductive pattern on the substrate.

[0045] Any side edge of the orthographic projection of the second conductive isolation column on the substrate is retracted 0.5-1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the third conductive pattern on the substrate.

[0046] In some embodiments, the centers of the orthographic projections of the first conductive isolation pillar, the fourth conductive pattern, and the second conductive pattern on the substrate coincide with each other.

[0047] Any side edge of the orthographic projection of the fourth conductive pattern on the substrate is retracted 0.5 to 1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the second conductive pattern on the substrate.

[0048] Any side edge of the orthographic projection of the first conductive isolation column on the substrate is retracted 0.5-1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the fourth conductive pattern on the substrate.

[0049] In some embodiments, the edge end surfaces of the first conductive pattern, the second conductive pattern, the third conductive pattern, and the fourth conductive pattern are all sloped surfaces.

[0050] The slope angle of the slope is 45°±10°.

[0051] In some embodiments, a plurality of third padding structures are further included, located in the peripheral area and between the inorganic insulating layer and the conductive isolation pillars.

[0052] The plurality of third padding structures correspond one-to-one to the plurality of first conductive isolation pillars and the plurality of second conductive isolation pillars, and the third padding structures overlap with the orthographic projections of the first conductive isolation pillars on the substrate, and the third padding structures overlap with the orthographic projections of the second conductive isolation pillars on the substrate;

[0053] The orthographic projection of the insulating isolation layer on the substrate covers the orthographic projection of the third padding structure on the substrate.

[0054] In some embodiments, the cross-sectional shape of the third elevated structure perpendicular to the base includes a trapezoid.

[0055] The base angle of the trapezoid is 45°±10°.

[0056] In some embodiments, the first conductive isolation column and the third padding structure coincide with the center of their orthographic projections on the substrate.

[0057] The second conductive isolation column and the third padding structure coincide with the center of their orthographic projections on the substrate.

[0058] Any side edge of the orthographic projection of the first conductive isolation column on the substrate is retracted 0.5 to 1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the top surface of the third padding structure in contact with the first conductive isolation column on the substrate.

[0059] Any side edge of the orthographic projection of the second conductive spacer on the substrate is retracted 0.5 to 1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the top surface of the third padding structure in contact with the second conductive spacer on the substrate.

[0060] In some embodiments, the conductive isolation column includes a first conductive layer, a second conductive layer, and a third conductive layer, wherein the first conductive layer, the second conductive layer, and the third conductive layer are stacked sequentially away from the substrate.

[0061] The edge end surface of the second conductive layer is a first slope surface, and the edge end surfaces of the first conductive layer and the third conductive layer are second slope surfaces.

[0062] The slope angle of the first slope surface is smaller than the slope angle of the second slope surface;

[0063] The orthographic projections of the first conductive layer and the third conductive layer on the substrate both cover the orthographic projection of the second conductive layer on the substrate.

[0064] In some embodiments, the insulating isolation layer covers a surface of the third conductive layer facing away from the substrate and edge surfaces of the first conductive layer, the second conductive layer, and the third conductive layer.

[0065] The thickness of the insulating isolation layer ranges from 500 to 2000 angstroms.

[0066] In a second aspect, an embodiment of the present disclosure further provides a display device, which includes the above-mentioned display panel.

[0067] Beneficial effects of the present invention: The display panel provided by the embodiment of the present disclosure, by arranging an insulating isolation layer on the side of the conductive isolation column away from the substrate, and the positive projection of the insulating isolation layer on the substrate at least covers the positive projection of the conductive isolation column on the substrate. On the one hand, the arrangement of the insulating isolation layer can increase the height of the conductive isolation column, thereby helping to isolate the organic material layer and the first electrode extending from the display area to the peripheral area; on the other hand, the insulating isolation layer can block the conductive connection between the first electrode and the conductive isolation column, so that the peripheral area of ​​the display panel in the reliability test will not become a charged electrode (i.e., with the first electrode voltage), thereby avoiding the chemical substances in the polarizer in the display panel and the inorganic encapsulation layer in the encapsulation layer from reacting, i.e., avoiding the inorganic encapsulation layer from being electrochemically corroded in the chemical reaction, thereby avoiding the encapsulation failure of the encapsulation layer at the boundary between the display area and the peripheral area, and then avoiding the appearance of the display black spot phenomenon (GDSH) at the boundary between the display area and the peripheral area.

[0068] The display device provided by the embodiment of the present disclosure improves the display quality of the display device by adopting the display panel in the above embodiment. BRIEF DESCRIPTION OF THE DRAWINGS

[0069] The accompanying drawings are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing the detailed exemplary embodiments with reference to the accompanying drawings, in which:

[0070] FIG1a is a schematic structural diagram of a light-emitting unit in an OLED display panel according to an embodiment of the present disclosure.

[0071] FIG. 1 b is a partial cross-sectional view of an embodiment of a display area of ​​an OLED display panel in the related art.

[0072] FIG. 1c is a schematic top view of the structure of an OLED display panel in the related art.

[0073] FIG1d is a schematic cross-sectional view of the structure along the AA′ section line in FIG1c.

[0074] FIG1e is an enlarged schematic diagram of portion B in FIG1d.

[0075] FIG. 1f is a schematic diagram of forming a conductive channel between a cathode and an isolation column in the related art.

[0076] FIG. 2 a is a schematic top view of the peripheral area of ​​the display panel hole area in an embodiment of the present disclosure.

[0077] FIG2 b is a schematic cross-sectional view of the structure along the CC′ section line in FIG2 a .

[0078] FIG2c is an enlarged schematic diagram of portion D in FIG2b.

[0079] FIG2d is a schematic cross-sectional view of another structure along the CC' section line in FIG2a.

[0080] FIG2e is an enlarged schematic diagram of the dam position in FIG2a.

[0081] FIG2f is a schematic cross-sectional view of the structure along the EE′ section line in FIG2e.

[0082] FIG2g is a schematic cross-sectional view of another structure along the CC' section line in FIG2a.

[0083] FIG2h is another schematic cross-sectional view of the structure along the CC′ section line in FIG2a.

[0084] FIG. 2i is another schematic cross-sectional view of the structure along the CC′ section line in FIG. 2a .

[0085] FIG2j is another schematic cross-sectional view of the structure along the CC′ section line in FIG2a.

[0086] FIG. 2k is another schematic cross-sectional view of the structure along the CC′ section line in FIG. 2a .

[0087] FIG. 21 is a schematic cross-sectional view of another structure along the CC′ section line in FIG. 2a .

[0088] FIG2m is another schematic cross-sectional view of the structure along the CC′ section line in FIG2a.

[0089] FIG2n is another schematic cross-sectional view of the structure along the CC′ section line in FIG2a.

[0090] FIG2o is another schematic cross-sectional view of the structure along the CC' section line in FIG2a.

[0091] FIG2p is a schematic cross-sectional view of the structure of the first elevated structure and the second elevated structure in an embodiment of the present disclosure.

[0092] FIG2q is another schematic cross-sectional view of the first and second elevated structures in an embodiment of the present disclosure.

[0093] FIG2r is another schematic cross-sectional view of the structure along the CC' section line in FIG2a.

[0094] FIG. 2S is a partial cross-sectional view of an implementation of a display area of ​​a display panel in an embodiment of the present disclosure.

[0095] FIG2t is a schematic top view of the distribution of conductive isolation columns in a display panel according to an embodiment of the present disclosure.

[0096] FIG3 is a schematic diagram of the preparation process of the conductive isolation column and the insulating isolation layer in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0097] In order to enable those skilled in the art to better understand the technical solutions of the embodiments of the present disclosure, a display panel and a display device provided by the embodiments of the present disclosure are further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0098] The embodiments of the present disclosure will be described more fully below with reference to the accompanying drawings, but the illustrated embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully enable those skilled in the art to understand the scope of this disclosure.

[0099] The embodiments of the present disclosure are not limited to the embodiments shown in the drawings, but include modifications of the configurations formed based on the manufacturing process. Therefore, the regions illustrated in the drawings are schematic in nature, and the shapes of the regions shown in the drawings illustrate specific shapes of the regions, but are not intended to be limiting.

[0100] The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted. In addition, the drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0101] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express open-ended inclusion and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0102] In the related art, the OLED display panel includes a driving backplane and an organic material layer, wherein: the organic material layer is arranged on one side of the driving backplane and includes a plurality of light-emitting units, the light-emitting unit may include one or more light-emitting devices connected in series, the light-emitting device may adopt an organic light-emitting diode, which may include an anode, an organic material layer and a cathode stacked in sequence in a direction away from the driving backplane. By applying an electrical signal to the anode and the cathode, the organic material layer can be driven to emit light. The specific light-emitting principle of the light-emitting device will not be described in detail here.

[0103] Among them, the organic material layer of each light-emitting device can achieve color display by emitting monochromatic light or white light in conjunction with a color filter. That is, each light-emitting device shares the same continuous organic material layer, and the organic material layer can emit white light or other monochromatic light. The color filter layer has multiple filter parts that correspond one-to-one with the light-emitting units. A filter part and the corresponding light-emitting unit can constitute a sub-pixel, and multiple sub-pixels constitute a pixel. Different filter parts can transmit different colors of light, so that different sub-pixels can emit different colors. The same pixel can include multiple sub-pixels of different colors. For example, a pixel can include three sub-pixels that emit red, green, and blue colors respectively. In this way, color display can be achieved through multiple pixels.

[0104] In the related art, the organic material layer is a continuous whole-layer structure, which makes it easy for leakage to occur between a light-emitting unit and the surrounding light-emitting units, resulting in cross-color. Each light-emitting unit may include multiple light-emitting devices connected in series. The light-emitting devices of the same light-emitting unit share an anode and a cathode. There are multiple light-emitting sublayers between the anode and the cathode, and at least two adjacent light-emitting sublayers can be connected in series through a charge generation layer. Positive charges (holes) can be transferred between two adjacent light-emitting units through the charge generation layer. For example, when the light-emitting unit of the red filter part in the corresponding color filter layer emits light, due to the influence of leakage, the light-emitting unit of the green filter part in the corresponding color filter layer will also emit light, resulting in a decrease in the purity of the light emission of a single pixel and a decrease in the color gamut of the entire display panel.

[0105] In some embodiments, referring to FIG. 1 a , a schematic diagram of the structure of a light-emitting unit in an OLED display panel according to an embodiment of the present disclosure is shown. The light-emitting unit may include multiple light-emitting devices LD connected in series, each of which includes an anode ANO, a cathode CAT, and multiple light-emitting sublayers OLP between the anode ANO and the cathode CAT. The light-emitting devices LD in the same light-emitting unit may share the same anode ANO and the same cathode CAT. In other words, the same light-emitting unit may have only one anode ANO and one cathode CAT.

[0106] For example, referring to Figure 1a , the organic material layer 5 may include multiple sub-layers (OLP) connected in series, facing away from the driving backplane. At least one sub-layer (OLP) is connected in series to an adjacent sub-layer (OLP) via a charge generation layer (CGL). When an electrical signal is applied to the anode (ANO) and cathode (CAT), each sub-layer (OLP) emits light, and different sub-layers (OLP) can be used to emit light of different colors.

[0107] In some embodiments, referring to FIG. 1 a , any light-emitting sublayer OLP may include a hole injection layer HIL, a hole transport layer HTL, a light-emitting material layer EML, an electron transport layer ETL, and an electron injection layer EIL, arranged in a direction away from the driving backplane. The specific light-emitting principle is not described in detail herein. The number of hole injection layers HIL, hole transport layers HTL, electron transport layers ETL, and electron injection layers EIL is not specifically limited, and adjacent light-emitting sublayers OLP may share one or more of the hole injection layer HIL, hole transport layer HTL, electron transport layer ETL, and electron injection layer EIL. Furthermore, a charge generation layer CGL may be provided between at least two adjacent light-emitting sublayers OLP, thereby connecting the two sublayers OLP in series.

[0108] In some embodiments, referring to FIG. 1a , the organic material layer 5 may include three sublayers (OLP) of different colors: a first sublayer (OLPr) emitting red light, a second sublayer (OLPg) emitting green light, and a third sublayer (OLPb) emitting blue light. When the first, second, and third sublayers (OLPr, OLPg, and OLPb) emit light simultaneously, the organic material layer (OL) emits white light. The first and second sublayers (OLPr, OLPg) share a hole injection layer (HIL), a hole transport layer (HTL1), an electron transport layer (ETL2), and an electron injection layer (EIL). The light-emitting material layer (G-EML) of the second sublayer (OLPg) is located on the surface of the light-emitting material layer (R-EML) of the first sublayer (OLPr) facing away from the driving backplane, thereby directly connecting the first and second sublayers (OLPr, OLPg) in series without requiring a dedicated charge generation layer (CGL). A charge generation layer (CGL) may be located on the surface of the second sublayer (OLPg) facing away from the driving backplane. The third sublayer OLPb shares a common electron injection layer (EIL) with the first and second sublayers OLPr and OLPg. Its hole injection layer (HIL2) is located on the surface of the charge generation layer (CGL) facing away from the driver backplane. Its hole transport layers (HTL2 and HTL3) are stacked on the side of the charge generation layer (CGL) facing away from the driver backplane. The charge generation layer (CGL) connects the third sublayer OLPb in series with the second and first sublayers OLPg and OLPr. Furthermore, a hole first insulating layer (HBL) can be provided between the electron transport layer (HYL) and the light-emitting material layer (BEML) of the third sublayer OLPb.

[0109] The organic material layer OL structure in FIG1a is for illustrative purposes only and does not constitute a limitation on its film layer. It may include only two sub-layers OLP, or more, or only one sub-layer OLP, as long as it can cooperate with the color filter layer to achieve color display.

[0110] In some embodiments, since the light-emitting units share an organic material layer, the carriers (e.g., holes) of one light-emitting unit may move through film layers such as the charge generation layer CGL to other light-emitting units, especially to adjacent light-emitting units, causing leakage, affecting the purity of the light emission, and causing cross-color.

[0111] In the related art, as shown in FIG1b, it is a partial cross-sectional view of an embodiment of the display area of ​​the OLED display panel in the related art, wherein the OLED display panel may include a driving backplane, a plurality of anodes 7, a pixel definition layer 8, an organic material layer 5, a cathode (i.e., a first electrode 6), an encapsulation layer 9 and a polarizer 10, wherein the pixel definition layer 8 and the anode 7 are arranged on the same side of the driving backplane, a plurality of first openings are opened in the pixel definition layer 8, and the anode 7 is exposed at the first opening; the driving backplane includes a substrate 1, a pixel circuit 11, a flat layer 12 and an insulating isolation layer 4 arranged on one side of the substrate 1 in sequence, and the anode 7 is located on the side of the insulating isolation layer 4 away from the substrate 1; the pixel definition layer 8 and the anode 7 are arranged on the same side of the driving backplane, and a plurality of first openings are opened in the pixel definition layer 8, and the anode 7 is exposed at the first opening; the driving backplane includes a substrate 1, a pixel circuit 11, a flat layer 12 and an insulating isolation layer 4 arranged on one side of the substrate 1 in sequence, and the anode 7 is located on the side of the insulating isolation layer 4 away from the substrate 1; The pixel definition layer 8 is located on the side of the anode 7 away from the substrate 1; the organic material layer 5 is located on the side of the pixel definition layer 8 away from the substrate 1, and the organic material layer 5 covers the entire display area; the cathode is located on the side of the organic material layer 5 away from the substrate 1, and the cathode covers the organic material layer 5; any anode 7 in the OLED display panel and its corresponding organic material layer 5 and cathode can constitute a light-emitting unit, and the pixel definition layer 8 can separate each light-emitting unit and limit the range of each light-emitting unit; the encapsulation layer 9 is located on the side of the cathode away from the substrate 1, and is used to encapsulate the light-emitting unit; the polarizer 10 is located on the side of the encapsulation layer 9 away from the substrate 1, and is used to reduce the reflection of ambient light by the OLED display panel.

[0112] As shown in Figure 1b, a second opening is also defined in pixel definition layer 8. This second opening is located outside the region corresponding to anode 7. A recess 300 is defined in the region corresponding to insulating isolation layer 4 and planar layer 12. The cross-section of recess 300, perpendicular to the substrate, is trapezoidal. This second opening and the narrower-at-top, wider-at-bottom trapezoidal recess 300 disconnect at least a portion of the organic material layer 5 recessed therein, thereby preventing carrier migration between light-emitting units and, consequently, avoiding color crosstalk caused by leakage.

[0113] In some embodiments, as shown in Figures 1c, 1d, 1e, and 1f, Figure 1c is a schematic top view of the structure of an OLED display panel in the related art; Figure 1d is a schematic cross-sectional view of the structure along line AA' in Figure 1c; and Figure 1e is an enlarged schematic view of portion B in Figure 1d; Figure 1f is a schematic diagram of a conductive channel formed between a cathode and a spacer in the related art. A through hole 200 is provided in the display area 100 of the OLED display panel, extending through the thickness thereof. The through hole 200 is used to mount a camera. A plurality of spacer pillars 25 are provided in the peripheral area 101 of the through hole 200. The plurality of spacer pillars 25 are used to separate the organic material layer 5 extending from the display area 100 to the peripheral area 101 of the through hole 200 from the cathode layer. The spacer pillars 25 are conductive structures formed through a single patterning process with a conductive layer in the driver backplane. For example, the spacer pillars 25 may be a sandwich structure formed by stacking titanium / aluminum / titanium film layers. As can be seen from FIG. 1 d , the encapsulation layer 9 and the polarizer 10 extend from the display area 100 to the peripheral area 101 covering the through hole 200 .

[0114] As shown in Figures 1e and 1f, during the reliability test of the OLED display panel, the cathode in the area 101 surrounding the through-hole 200 is connected through the isolation column 25. That is, the cathode is indirectly conductive through the aluminum metal in the isolation column 25, making the entire area 101 surrounding the through-hole 200 a negatively charged electrode. At the same time, in a high temperature and high humidity environment, potassium ions (K+) in the polarizer 10 are transmitted along the cross-section of the organic material layer 5 with water vapor to the area where the isolation column 25 is located. Under the combined action of the negatively charged electrode and water, the chemical substances in the polarizer 10 react with the inorganic encapsulation layer (such as silicon oxynitride) in the encapsulation layer 9, causing the inorganic encapsulation layer to be electrochemically corroded and expanded, resulting in internal pores, thereby causing the encapsulation layer 9 to fail at the boundary between the through-hole 200 surrounding area 101 and the display area 100, and further causing the display black spot phenomenon (GDSH) to appear at the boundary between the display area 100 and the through-hole 200 surrounding area 101.

[0115] In order to solve the problem in the related art that the conductive isolation column makes it impossible for the cathode to be completely powered off during the reliability process, resulting in electrochemical corrosion failure of the packaging layer, thereby causing the display black spot phenomenon to appear at the boundary between the display area and the peripheral area of ​​the through-hole, on the first hand, the embodiment of the present disclosure provides a display panel, referring to Figures 2a-2c, Figure 2a is a top view schematic diagram of the peripheral area of ​​the hole area of ​​the display panel in the embodiment of the present disclosure; Figure 2b is a structural cross-sectional schematic diagram along the CC' cutting line in Figure 2a; Figure 2c is an enlarged schematic diagram of part D in Figure 2b; wherein, the display panel has a display area 100 and a hole area, the hole area includes an opening area 102 and a peripheral area 101, the peripheral area 101 is arranged around the opening area 102, the display area 100 surrounds the peripheral area 101, and the display panel includes a substrate 1, which is located in the display area 100 and the peripheral area 101; an inorganic insulating layer 2, which is located in the display area 100 and the peripheral area 101; On one side of the substrate 1, and extending from the display area 100 to the peripheral area 101; multiple conductive isolation columns 3, located on the side of the inorganic insulating layer 2 away from the substrate 1, and located in the peripheral area 101, multiple conductive isolation columns 3 are arranged in sequence along the direction away from the display area 100, an insulating isolation layer 4, located on the side of the conductive isolation column 3 away from the substrate 1, and extending from the display area 100 to the peripheral area 101, the positive projection of the insulating isolation layer 4 on the substrate 1 at least covers the positive projection of the conductive isolation column 3 on the substrate 1, an organic material layer 5, located on the side of the insulating isolation layer 4 away from the substrate 1, and extending from the display area 100 to the peripheral area 101, the organic material layer 5 is disconnected at the conductive isolation column 3, a first electrode 6, located on the side of the organic material layer 5 away from the substrate 1, and extending from the display area 100 to the peripheral area 101, the first electrode 6 is disconnected at the conductive isolation column 3.

[0116] The first electrode 6 is a cathode. Referring to Figure 2s, a partial cross-sectional view of an embodiment of the display area of ​​a display panel in the present disclosure is provided. The display panel further includes a plurality of anodes 7, a pixel definition layer 8, an encapsulation layer 9, and a polarizer 10. A pixel circuit 11 and a planarization layer 12 are sequentially disposed on one side of the substrate 1, away from the substrate 1. The pixel circuit 11 is located in the display area 100, and the planarization layer 12 extends from the display area 100 to the peripheral area 101. The pixel circuit 11 includes a transistor and a capacitor. The transistor includes an active layer 110, a gate 111, a source 112 and a drain 113 arranged in the same layer; the capacitor includes a first electrode plate 114 and a second electrode plate 115; the pixel circuit 11 also includes a conductive connection structure 116; the active layer 110, the gate 111, the source 112 and the drain 113 arranged in the same layer, and the conductive connection structure 116 are sequentially arranged away from the substrate 1; the gate 111 and the first electrode plate 114 are arranged in the same layer; the conductive connection structure 116 connects the anode 7 and the drain 113; the pixel circuit 11 also includes a buffer layer 117, a first gate insulating layer 118, a second gate insulating layer 119 and The intermediate dielectric layer 121 and the buffer layer 117 are located between the active layer 110 and the substrate 1; the first gate insulating layer 118 is located between the active layer 110 and the gate 111; the second gate insulating layer 119 is located between the first electrode 114 and the second electrode 115; the intermediate dielectric layer 121 is located between the second electrode 115 and the source 112 and drain 113 of the same layer; the flat layer 12 includes a first flat layer 122 and a second flat layer 123, the first flat layer 122 is located between the source 112 and drain 113 of the same layer and the conductive connection structure 116; the second flat layer 123 and the insulating isolation layer 4 are located between the anode 7 and the conductive connection structure 116. The inorganic insulating layer 2 includes a buffer layer 117, a first gate insulating layer 118, a second gate insulating layer 119, and an intermediate dielectric layer 121. The insulating isolation layer 4 is located on the side of the planar layer 12 facing away from the substrate 1, and the anode 7 is located on the side of the insulating isolation layer 4 facing away from the substrate 1. The pixel definition layer 8 is located on the side of the anode 7 facing away from the substrate 1. The organic material layer 5 is located on the side of the pixel definition layer 8 facing away from the substrate 1. An opening is formed in the pixel definition layer 8, and the anode 7 is exposed at the opening. The portion of the organic material layer 5 located in the opening of the pixel definition layer 8 emits light under the action of the electric field formed between the anode 7 and the first electrode 6. The encapsulation layer 9 is located on the side of the first electrode 6 facing away from the substrate 1. The polarizer 10 is located on the side of the encapsulation layer 9 facing away from the substrate 1. Anode 7 is located in display area 100; pixel definition layer 8 is located in display area 100; planarization layer 12 extends from display area 100 to the non-display area of ​​peripheral area 101 bordering display area 100; encapsulation layer 9 and polarizer 10 extend from display area 100 to cover peripheral area 101. Conductive spacer 3 and a conductive layer in pixel circuit 11 are formed through a single patterning process. Insulation isolation layer 4 extends from display area 100 to peripheral area 101.

[0117] In some embodiments, referring to Figure 2t, there is a top view schematic diagram of the distribution of conductive isolation columns in the display panel of the embodiment of the present disclosure, wherein the orthographic projections of the multiple conductive isolation columns 3 on the substrate 1 are all circular, and the orthographic projections of the multiple conductive isolation columns 3 on the substrate 1 are all around the periphery of the opening area 102, and the multiple conductive isolation columns 3 form a group of concentric rings with the opening area 102 as the center.

[0118] By setting an insulating isolation layer 4 on the side of the conductive isolation column 3 facing away from the substrate 1, and the positive projection of the insulating isolation layer 4 on the substrate 1 at least covers the positive projection of the conductive isolation column 3 on the substrate 1, on the one hand, the setting of the insulating isolation layer 4 can increase the height of the conductive isolation column 3, thereby helping to isolate the organic material layer 5 and the first electrode 6 extending from the display area 100 to the peripheral area 101; on the other hand, the insulating isolation layer 4 can block the conductive connection between the first electrode 6 and the conductive isolation column 3, so that the peripheral area 101 of the display panel in the reliability test will not become a charged electrode (i.e., with the voltage of the first electrode 6), thereby avoiding the chemical substances in the polarizer 10 in the display panel from reacting with the inorganic encapsulation layer in the encapsulation layer 9, that is, avoiding the electrochemical corrosion of the inorganic encapsulation layer in the chemical reaction, thereby avoiding the encapsulation failure of the encapsulation layer 9 at the border between the display area 100 and the peripheral area 101, and then avoiding the display black spot phenomenon (GDSH) at the border between the display area 100 and the peripheral area 101.

[0119] In some embodiments, referring to FIG. 2 b and FIG. 2 c , the orthographic projection of the insulating isolation layer 4 on the substrate 1 covers the conductive isolation pillars 3 and the area outside the conductive isolation pillars 3 in the peripheral region 101 .

[0120] In some embodiments, referring to FIG. 2 d , another schematic cross-sectional view of the structure along the CC′ section line in FIG. 2 a is shown; the orthographic projection of the insulating isolation layer 4 on the substrate 1 only covers the conductive isolation column 3 .

[0121] In some embodiments, referring to Figures 2a and 2b, the display panel also includes a dam 13, which is located in the peripheral area 101 and between the inorganic insulating layer 2 and the insulating isolation layer 4, and the dam 13 surrounds the periphery of the opening area 102; the multiple conductive isolation columns 3 include multiple first conductive isolation columns 31 and multiple second conductive isolation columns 32, the multiple first conductive isolation columns 31 are located on the side of the dam 13 close to the display area 100, and the multiple first conductive isolation columns 31 are arranged in sequence along the direction away from the display area 100, the multiple second conductive isolation columns 32 are located on the side of the dam 13 away from the display area 100, and the multiple second conductive isolation columns 32 are arranged in sequence along the direction away from the display area 100, and the positive projection of the insulating isolation layer 4 on the substrate 1 does not overlap with the positive projection of the dam 13 on the substrate 1 at least partially.

[0122] In some embodiments, the display panel also includes a first planarizing layer 14, located between the first electrode 6 and the encapsulation layer 9, and the dam 13 is formed by stacking organic film layers of the same layer and material as the planarizing layer 12, the pixel definition layer 8 and the first planarizing layer 14 in the display area 100 in sequence away from the substrate 1, and the organic film layer of the same layer and material as the pixel definition layer 8 covers the organic film layer of the same layer and material as the planarizing layer 12, and the organic film layer of the same layer and material as the first planarizing layer 14 covers the organic film layer of the same layer and material as the pixel definition layer 8. The dam 13 is formed by stacking organic material film layers, so that the dam 13 can be made higher or thicker, thereby forming a barrier to the organic encapsulation layer material in the encapsulation layer 9, preventing the organic encapsulation layer material from overflowing to the side of the dam 13 away from the display area 100 during encapsulation. That is, the organic encapsulation layer in the encapsulation layer 9 extends from the display area 100 to cover the area on the side of the dam 13 close to the display area 100, and the organic encapsulation layer does not extend beyond the dam 13; the inorganic encapsulation layer in the encapsulation layer 9 extends from the display area 100 to cover the entire peripheral area 101.

[0123] Among them, the organic material forming the dam 13 needs to release air, and the insulating isolation layer 4 uses an inorganic insulating material, such as silicon nitride, silicon oxide or silicon oxynitride material. If the insulating isolation layer 4 completely covers the dam 13, the release of air by the organic material will cause the insulating isolation layer 4 to peel off, resulting in subsequent peeling particles contaminating the display area 100 and causing defects. By ensuring that the orthographic projection of the insulating isolation layer 4 on the substrate 1 and the orthographic projection of the dam 13 on the substrate 1 do not overlap at least partially, the insulating isolation layer 4 can be prevented from blocking the release of air from the organic material, thereby preventing defects in the display panel.

[0124] In some embodiments, referring to FIG. 2 b , the orthographic projection of the insulating isolation layer 4 on the substrate 1 does not overlap with the orthographic projection of the dam 13 on the substrate 1 .

[0125] In some embodiments, referring to Figures 2e and 2f, Figure 2e is an enlarged schematic diagram of the dam position in Figure 2a; Figure 2f is a structural cross-sectional schematic diagram along the EE' section line in Figure 2e; an opening 40 is provided in the region where the insulating isolation layer 4 overlaps with the dam 13, and the dam 13 is exposed at the opening 40, thereby facilitating the degassing of organic materials from the dam 13 during the preparation process.

[0126] In some embodiments, referring to Figures 2b, 2c, 2d and 2f, a plurality of first grooves 20 are provided in the inorganic insulating layer 2, and the plurality of first grooves 20 are located in the area between the dam 13 and the display area 100. The plurality of first grooves 20 are arranged in sequence in a direction away from the display area 100, and the orthographic projections of the plurality of first grooves 20 on the substrate 1 do not overlap with the orthographic projections of the first conductive isolation columns 31 on the substrate 1.

[0127] The multiple first grooves 20 in the inorganic insulating layer 2 can block the organic encapsulation layer material in the encapsulation layer 9 , preventing the organic encapsulation layer material from overflowing to the side of the dam 13 away from the display area 100 during encapsulation.

[0128] In some embodiments, referring to Figure 2g, which is another structural cross-sectional schematic diagram along the CC' section line in Figure 2a; a first groove 20 is opened in the inorganic insulating layer 2, and the first groove 20 is located in the area between the dam 13 and the display area 100, and the orthographic projections of the plurality of first conductive isolation columns 31 on the substrate 1 are located in the orthographic projection area of ​​the first groove 20 on the substrate 1.

[0129] 2g , the first groove 20 is a large groove dug between the dam 13 and the display area 100 . The large groove can further block the organic encapsulation layer material in the encapsulation layer 9 , preventing the organic encapsulation layer material from overflowing to the side of the dam 13 away from the display area 100 during encapsulation.

[0130] In some embodiments, referring to Figure 2h, another structural cross-sectional schematic diagram along the CC' section line in Figure 2a is shown; a second groove 21 is also provided in the inorganic insulating layer 2, and the second groove 21 is located in the area between the dam 13 and the opening area 102, and the orthographic projections of the plurality of second conductive isolation columns 32 on the substrate 1 are located in the orthographic projection area of ​​the second groove 21 on the substrate 1.

[0131] 2h , the second groove 21 is a large groove dug between the dam 13 and the opening area 102 . The large groove is beneficial for reducing the thickness of the inorganic insulating layer 2 to be cut when forming the opening area 102 , thereby improving the cutting quality of the opening area 102 .

[0132] In some embodiments, referring to FIG. 2 g and FIG. 2 h , the orthographic projection of the insulating isolation layer 4 on the substrate 1 covers the orthographic projections of the first groove 20 and the second groove 21 on the substrate 1 .

[0133] In some embodiments, referring to FIG. 2i, another structural cross-sectional view along the CC' section line in FIG. 2a is shown; wherein the display panel further comprises a partition structure 15, which is located between the inorganic insulating layer 2 and the insulating isolation layer 4, and is located in the non-display area of ​​the peripheral area 101 bordering the display area 100. The partition structure 15 comprises a conductive portion 151 and a flat layer 12. The conductive portion 151 and the conductive isolation column 3 are made of the same material and are arranged on the same layer. The flat layer 12 is located on the side of the conductive portion 151 away from the substrate 1, and the flat layer 12 is located on the side of the conductive portion 151 away from the substrate 1. The orthographic projection on the substrate 1 covers the orthographic projection of the conductive part 151 on the substrate 1, and the orthographic projection of the flat layer 12 on the substrate 1 does not overlap with the conductive isolation column 3; a separation groove 120 is provided on the side of the flat layer 12 facing away from the substrate 1, and the orthographic projection of the insulating isolation layer 4 on the substrate 1 covers the orthographic projection area of ​​the flat layer 12 on the substrate 1 other than the separation groove 120 in the non-display area. The cross-sectional shape of the separation groove 120 perpendicular to the substrate 1 includes a trapezoid, and the organic material layer 5 or the organic material layer 5 and the first electrode 6 are disconnected at the separation groove 120.

[0134] Among them, the partition structure 15 can play the role of isolating the organic material layer 5 and the first electrode 6 (i.e., the cathode), thereby further blocking the conductive connection between the first electrode 6 in the peripheral area 101 and the conductive isolation column 3, thereby strengthening the power-off effect of the first electrode 6 in the peripheral area 101, and further avoiding the appearance of display black spots (GDSH) at the border between the display area 100 and the peripheral area 101.

[0135] 2s , the conductive portion 151 and the conductive connection structure 116 in the display area 100 are made of the same material and disposed in the same layer. The planar layer 12 is a portion of the planar layer 12 extending from the display area 100 to the non-display area of ​​the peripheral area 101 bordering the display area 100 .

[0136] In some embodiments, referring to Figures 2i and 2k, Figure 2k is another schematic cross-sectional view of a structure along the CC' section line in Figure 2a; no grooves are provided in the inorganic insulating layer 2. The absence of grooves in the inorganic insulating layer 2 can avoid the risk of reliability failure caused by metal residues and organic layer residues in the grooves.

[0137] In some embodiments, referring to FIG. 2j , which is a schematic cross-sectional view of another structure along the CC' section line in FIG. 2a , in addition to providing the partition structure 15, a plurality of first grooves 20 are defined in the inorganic insulating layer 2. These first grooves 20 are located in the region between the dam 13 and the display area 100. The first grooves 20 can block the organic encapsulation material in the encapsulation layer 9, preventing the organic encapsulation material from overflowing onto the side of the dam 13 away from the display area 100 during encapsulation.

[0138] In some embodiments, referring to Figures 2b, 2d, 2f, 2g, 2i, 2j, 2k and 2l, Figure 2l is another structural cross-sectional schematic diagram along the CC' cutting line in Figure 2a; the inorganic insulating layer 2 includes multiple sub-layers, and the multiple sub-layers are stacked in sequence. The display panel also includes multiple first padding structures 16, which are located in the peripheral area 101 and between adjacent sub-layers. The multiple first padding structures 16 correspond one-to-one to the multiple second conductive isolation columns 32, and the orthographic projection of the first padding structure 16 on the substrate 1 overlaps with the orthographic projection of the second conductive isolation column 32 on the substrate 1.

[0139] The first padding structure 16 can pad the second conductive isolation column 32 , which is beneficial to the subsequent deposition of the inorganic packaging layer in the packaging layer 9 and reduces the risk of fracture of the inorganic packaging layer.

[0140] In some embodiments, referring to Figures 2m, 2n and 2o, Figure 2m is another structural cross-sectional schematic diagram along the CC' section line in Figure 2a; Figure 2n is another structural cross-sectional schematic diagram along the CC' section line in Figure 2a; Figure 2o is another structural cross-sectional schematic diagram along the CC' section line in Figure 2a; wherein, the display panel also includes a plurality of second padding structures 17, located in the peripheral area 101 and between adjacent sub-layers, the plurality of second padding structures 17 correspond one-to-one to the plurality of first conductive isolation columns 31, and the second padding structures 17 overlap with the orthographic projections of the first conductive isolation columns 31 on the substrate 1.

[0141] Among them, the setting of the second raising structure 17 can raise the first conductive isolation column 31. Such a setting, on the one hand, can form a barrier to the organic encapsulation layer material in the encapsulation layer 9, preventing the organic encapsulation layer material from overflowing to the side of the dam 13 away from the display area 100 during encapsulation. On the other hand, it is conducive to the deposition of the inorganic encapsulation layer in the subsequent encapsulation layer 9, reducing the risk of breakage of the inorganic encapsulation layer.

[0142] In some embodiments, referring to Figures 2o, 2l and 2p, Figure 2p is a structural cross-sectional schematic diagram of the first and second padding structures in the embodiment of the present disclosure; the inorganic insulating layer 2 includes a first sub-layer 22 and a second sub-layer 23, and the first sub-layer 22 and the second sub-layer 23 are stacked in sequence away from the substrate 1, the first padding structure 16 includes a first conductive pattern 161, and the second padding structure 17 includes a second conductive pattern 171, and the first conductive pattern 161 and the second conductive pattern 171 are made of the same material and are arranged in the same layer; the first conductive pattern 161 and the second conductive pattern 171 are located between the first sub-layer 22 and the second sub-layer 23.

[0143] Referring to FIG. 2S , the first sublayer 22 may be the first gate insulating layer 118 in the pixel circuit 11, and the second sublayer 23 may be the second gate insulating layer 119 in the pixel circuit 11. The first conductive pattern 161 and the second conductive pattern 171 are made of the same material as the gate 111 and the first electrode 114 in the pixel circuit 11 and are formed through a single patterning process. The first conductive pattern 161 and the second conductive pattern 171 are suspended in the air and serve only to raise the second conductive isolation pillar 32 and the first conductive isolation pillar 31, respectively.

[0144] In some embodiments, referring to Figures 2b, 2d, 2f, 2g, 2i, 2j, 2k, 2m, 2o, 2n and 2q, Figure 2q is another structural cross-sectional schematic diagram of the first padding structure and the second padding structure in the embodiment of the present disclosure; the inorganic insulating layer 2 also includes a third sublayer 24, which is located on the side of the second sublayer 23 away from the substrate 1, the first padding structure 16 also includes a third conductive pattern 162, and the second padding structure 17 also includes a fourth conductive pattern 172. The third conductive pattern 162 and the fourth conductive pattern 172 are made of the same material and are arranged in the same layer; the third conductive pattern 162 and the fourth conductive pattern 172 are located between the second sublayer 23 and the third sublayer 24.

[0145] Referring to Figure 2s, the third conductive pattern 162 and the fourth conductive pattern 172 can further elevate the second conductive spacer 32 and the first conductive spacer 31. The third sublayer 24 can be the intermediate dielectric layer 121 in the pixel circuit 11. The third conductive pattern 162 and the fourth conductive pattern 172 are made of the same material as the second electrode plate 115 in the pixel circuit 11 and are formed through a single patterning process. The third conductive pattern 162 and the fourth conductive pattern 172 are suspended in the air, serving only to elevate the second conductive spacer 32 and the first conductive spacer 31, respectively.

[0146] In some embodiments, referring to Figure 2q, the centers of the orthographic projections of the second conductive isolation column 32, the third conductive pattern 162 and the first conductive pattern 161 on the substrate 1 coincide with each other, and any side edge of the orthographic projection of the third conductive pattern 162 on the substrate 1 is retracted inward s1 by 0.5 to 1 μm relative to the corresponding side edge of the orthographic projection of the first conductive pattern 161 on the substrate 1 toward the center of its orthographic projection, and any side edge of the orthographic projection of the second conductive isolation column 32 on the substrate 1 is retracted inward s2 by 0.5 to 1 μm relative to the corresponding side edge of the orthographic projection of the third conductive pattern 162 on the substrate 1 toward the center of its orthographic projection.

[0147] In some embodiments, referring to FIG. 2 q , the edge end surfaces of the first conductive pattern 161 and the third conductive pattern 162 are both sloped surfaces, and the slope angle α of the slope is 45°±10°.

[0148] Such a configuration can make the surrounding raised slopes formed by the first raising structure 16 raising the second conductive isolation column 32 relatively gentle, thereby facilitating the subsequent deposition of the inorganic encapsulation layer in the encapsulation layer 9 and reducing the risk of the inorganic encapsulation layer being broken.

[0149] In some embodiments, referring to Figure 2q, the centers of the orthographic projections of the first conductive isolation column 31, the fourth conductive pattern 172, and the second conductive pattern 171 on the substrate 1 coincide with each other, and any side edge of the orthographic projection of the fourth conductive pattern 172 on the substrate 1 is retracted inward s1 by 0.5 to 1 μm relative to the corresponding side edge of the orthographic projection of the second conductive pattern 171 on the substrate 1 toward the center of its orthographic projection, and any side edge of the orthographic projection of the first conductive isolation column 31 on the substrate 1 is retracted inward s2 by 0.5 to 1 μm relative to the corresponding side edge of the orthographic projection of the fourth conductive pattern 172 on the substrate 1 toward the center of its orthographic projection.

[0150] In some embodiments, referring to FIG. 2 q , edge end surfaces of the second conductive pattern 171 and the fourth conductive pattern 172 are both slope surfaces, and the slope angle α of the slope surface is 45°±10°.

[0151] The above-mentioned slope angle α and the inward-constricted setting can make the surrounding raised slopes formed by the second raising structure 17 raising the first conductive isolation column 31 relatively gentle, thereby facilitating the deposition of the inorganic encapsulation layer in the subsequent encapsulation layer 9 and reducing the risk of fracture of the inorganic encapsulation layer.

[0152] In some embodiments, referring to Figure 2r, which is another structural cross-sectional schematic diagram along the CC' section line in Figure 2a; the display panel also includes a plurality of third padding structures 18, located in the peripheral area 101, and located between the inorganic insulating layer 2 and the conductive isolation column 3, and the plurality of third padding structures 18 correspond one-to-one to the plurality of first conductive isolation columns 31 and the plurality of second conductive isolation columns 32, and the third padding structures 18 overlap with the orthographic projections of the first conductive isolation columns 31 on the substrate 1, and the third padding structures 18 overlap with the orthographic projections of the second conductive isolation columns 32 on the substrate 1; the orthographic projection of the insulating isolation layer 4 on the substrate 1 covers the orthographic projection of the third padding structure 18 on the substrate 1.

[0153] Among them, the third raising structure 18 can raise the second conductive isolation column 32, which is beneficial to the deposition of the inorganic encapsulation layer in the subsequent encapsulation layer 9 and reduces the risk of fracture of the inorganic encapsulation layer; the third raising structure 18 can also raise the first conductive isolation column 31, so that on the one hand, it can form a barrier to the organic encapsulation layer material in the encapsulation layer 9 to prevent the organic encapsulation layer material from overflowing to the side of the dam 13 away from the display area 100 during encapsulation; on the other hand, it is beneficial to the deposition of the inorganic encapsulation layer in the subsequent encapsulation layer 9 and reduces the risk of fracture of the inorganic encapsulation layer.

[0154] In some embodiments, referring to FIG. 2 r , a cross-sectional shape of the third elevated structure 18 perpendicular to the substrate 1 includes a trapezoid, and a base angle θ of the trapezoid is 45°±10°.

[0155] In some embodiments, referring to Figure 2r, the first conductive isolation column 31 coincides with the center of the positive projection of the third padding structure 18 on the substrate 1, the second conductive isolation column 32 coincides with the center of the positive projection of the third padding structure 18 on the substrate 1, and any side edge of the positive projection of the first conductive isolation column 31 on the substrate 1 is retracted inward s3 by 0.5 to 1 μm relative to the corresponding side edge of the positive projection of the top surface of the third padding structure 18 in contact with the first conductive isolation column 31 on the substrate 1, and any side edge of the positive projection of the second conductive isolation column 32 on the substrate 1 is retracted inward s4 by 0.5 to 1 μm relative to the corresponding side edge of the positive projection of the top surface of the third padding structure 18 in contact with the second conductive isolation column 32 on the substrate 1.

[0156] The above-mentioned bottom angle θ and the inward setting can make the surrounding raised slopes formed by the third raising structure 18 raising the first conductive isolation column 31 and the second conductive isolation column 32 relatively smooth, thereby facilitating the deposition of the inorganic packaging layer in the subsequent packaging layer 9 and reducing the risk of breakage of the inorganic packaging layer.

[0157] 2r and 2s , the third padding structure 18 is made of the same material as the source 112 and drain 113 in the pixel circuit 11 and is formed through a single patterning process. The third padding structure 18 is suspended and serves only to raise the first conductive spacer 31 and the second conductive spacer 32.

[0158] In some embodiments, the third padding structure 18 may be formed by one conductive layer or by stacking multiple conductive layers.

[0159] In some embodiments, referring to Figures 2c, 2p and 2q, the conductive isolation column 3 includes a first conductive layer 33, a second conductive layer 34 and a third conductive layer 35, and the first conductive layer 33, the second conductive layer 34 and the third conductive layer 35 are stacked in sequence away from the substrate 1, the edge end face of the second conductive layer 34 is a first slope face, and the edge end faces of the first conductive layer 33 and the third conductive layer 35 are second slope faces, and the slope angle of the first slope face is smaller than the slope angle of the second slope face; the orthographic projections of the first conductive layer 33 and the third conductive layer 35 on the substrate 1 both cover the orthographic projection of the second conductive layer 34 on the substrate 1.

[0160] The slope angle of the first slope is within the range of 45°±10°, and the slope angle of the second slope is close to 90°.

[0161] 2s, the conductive spacer 3 and the conductive connection structure 116 in the pixel circuit 11 are made of the same material and formed through a single patterning process. The conductive spacer 3 is suspended in the air and only serves to separate the organic material layer 5 and the first electrode 6 (ie, cathode).

[0162] In some embodiments, the first conductive layer 33 of the conductive spacer 3 is made of titanium, the second conductive layer 34 is made of aluminum, and the third conductive layer 35 is made of titanium.

[0163] In some embodiments, referring to Figures 2b-2r, an insulating isolation layer 4 covers the surface of the third conductive layer 35 facing away from the substrate 1, as well as the edge surfaces of the first conductive layer 33, the second conductive layer 34, and the third conductive layer 35. The thickness of the insulating isolation layer 4 ranges from 500 to 2000 angstroms. The insulating isolation layer 4 can encapsulate the conductive isolation pillars 3, thereby blocking the conductive connection between the first electrode 6 and the conductive isolation pillars 3. This prevents the peripheral area 101 of the display panel from becoming a charged electrode (i.e., carrying the voltage of the first electrode 6) during reliability testing. This prevents encapsulation failure of the encapsulation layer 9 at the boundary between the display area 100 and the peripheral area 101, and further prevents the occurrence of a display black spot phenomenon (GDSH) at the boundary between the display area 100 and the peripheral area 101.

[0164] In some embodiments, the insulating isolation layer 4 is made of silicon nitride, silicon oxide, or silicon oxynitride.

[0165] It should be noted that the above Figures 2b, 2d, 2f-2o and 2r only show the patterns of the film layers below the insulating isolation layer and the conductive isolation column in the peripheral area (i.e., to the substrate side). The film layers above the insulating isolation layer (such as the organic material layer and the first electrode) are not shown, but relevant text descriptions are given in the specification.

[0166] The embodiment of the present disclosure also provides a method for preparing a conductive isolation column and an insulating isolation layer. Referring to Figure 3, there is a schematic diagram of the preparation process of the conductive isolation column and the insulating isolation layer in the embodiment of the present disclosure, wherein the preparation method includes: Step S101: preparing an inorganic insulating layer 2, a conductive film layer 19 and a flat layer 12 on a substrate 1 in sequence.

[0167] Step S102 : performing a masking process on the conductive film layer 19 in the peripheral region 101 to form a pattern of the conductive isolation pillars 3 .

[0168] The patterning process includes coating photoresist, exposing and developing to remove the photoresist outside the conductive isolation column pattern, and then etching with an etching solution to form the pattern of the conductive isolation column 3, ultimately forming the conductive isolation column 3 with a sandwich structure.

[0169] Step S103: forming a pattern of the insulating isolation layer 4 through a patterning process.

[0170] The patterning process includes steps such as insulating film deposition, exposure, development, and etching, etc. The specific processes are relatively mature traditional technologies and will not be described in detail here.

[0171] The display panel provided in the embodiment of the present disclosure is provided with an insulating isolation layer on the side of the conductive isolation column facing away from the substrate, and the positive projection of the insulating isolation layer on the substrate at least covers the positive projection of the conductive isolation column on the substrate. On the one hand, the provision of the insulating isolation layer can increase the height of the conductive isolation column, thereby helping to isolate the organic material layer and the first electrode extending from the display area to the peripheral area. On the other hand, the insulating isolation layer can block the conductive connection between the first electrode and the conductive isolation column, so that the peripheral area of ​​the display panel in the reliability test will not become a charged electrode (i.e., with the first electrode voltage), thereby preventing the chemical substances in the polarizer in the display panel from reacting with the inorganic encapsulation layer in the encapsulation layer, i.e., preventing the inorganic encapsulation layer from being electrochemically corroded in the chemical reaction, thereby avoiding the encapsulation failure of the encapsulation layer at the boundary between the display area and the peripheral area, and then avoiding the appearance of display black spot phenomenon (GDSH) at the boundary between the display area and the peripheral area.

[0172] In a second aspect, an embodiment of the present disclosure further provides a display device, comprising the display panel in the above embodiment.

[0173] By adopting the display panel in the above embodiment, the display quality of the display device is improved.

[0174] The display device provided in the embodiments of the present disclosure may be any product or component with a display function, such as an OLED panel, an OLED TV, an OLED billboard, a display, a mobile phone, or a navigation system.

[0175] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A display panel, wherein: It has a display area, an opening area and a peripheral area, wherein the peripheral area is arranged outside the opening area, and the display area surrounds the peripheral area. The display panel includes a substrate located in the display area and the peripheral area. An inorganic insulating layer, located on one side of the substrate and extending from the display area to the peripheral area; A plurality of conductive isolation columns are located on a side of the inorganic insulating layer away from the substrate and located in the peripheral area, and the plurality of conductive isolation columns are arranged in sequence in a direction away from the display area. an insulating isolation layer, located on a side of the conductive isolation column away from the substrate and extending from the display area to the peripheral area, wherein the orthographic projection of the insulating isolation layer on the substrate at least covers the orthographic projection of the conductive isolation column on the substrate, an organic material layer, located on a side of the insulating isolation layer away from the substrate and extending from the display area to the peripheral area, wherein the organic material layer is disconnected at the conductive isolation column, The first electrode is located on a side of the organic material layer away from the substrate and extends from the display area to the peripheral area. The first electrode is disconnected at the conductive isolation column.

2. The display panel according to claim 1, wherein: It also includes a dam located in the peripheral area and between the inorganic insulating layer and the insulating isolation layer, and the dam surrounds the periphery of the opening area; The plurality of conductive spacers include a plurality of first conductive spacers and a plurality of second conductive spacers. The plurality of first conductive spacer columns are located on a side of the dam close to the display area, and the plurality of first conductive spacer columns are sequentially spaced apart in a direction away from the display area. The plurality of second conductive spacer columns are located on a side of the dam away from the display area, and the plurality of second conductive spacer columns are sequentially spaced apart in a direction away from the display area. The positive projection of the insulating isolation layer on the substrate is equal to the positive projection of the dam on the substrate. The projections do not overlap at least partially.

3. The display panel according to claim 2, wherein: The inorganic insulating layer is provided with a plurality of first grooves, and the plurality of first grooves are located in a region between the dam and the display region. The plurality of first grooves are arranged in sequence in a direction away from the display area, and the orthographic projections of the plurality of first grooves on the substrate do not overlap with the orthographic projections of the first conductive isolation pillars on the substrate.

4. The display panel according to claim 2, wherein: A first groove is formed in the inorganic insulating layer, and the first groove is located in a region between the dam and the display region. The orthographic projections of the plurality of first conductive isolation pillars on the substrate are located within the orthographic projection region of the first groove on the substrate.

5. The display panel according to claim 4, wherein: The inorganic insulating layer is further provided with a second groove, and the second groove is located in the area between the dam and the opening area. The orthographic projections of the plurality of second conductive isolation pillars on the substrate are located within the orthographic projection region of the second groove on the substrate.

6. The display panel according to claim 5, wherein: The orthographic projection of the insulating isolation layer on the substrate covers the orthographic projections of the first groove and the second groove on the substrate.

7. The display panel according to any one of claims 1 to 6, wherein: It also includes a partition structure located between the inorganic insulating layer and the insulating isolation layer and located in a non-display area of ​​the peripheral area bordering the display area. The partition structure includes a conductive part and a flat layer. The conductive part and the conductive isolation column are made of the same material and are arranged in the same layer. The flat layer is located on the side of the conductive part away from the substrate. side, and the orthographic projection of the flat layer on the substrate covers the orthographic projection of the conductive portion on the substrate, The orthographic projection of the flat layer on the substrate does not overlap with the conductive isolation column; A separation groove is formed on the side of the planar layer away from the substrate, and the orthographic projection of the insulating isolation layer on the substrate covers the orthographic projection area of ​​the planar layer on the substrate outside the separation groove in the non-display area. The cross-sectional shape of the separation groove perpendicular to the base includes a trapezoid, The organic material layer or the organic material layer and the first electrode are disconnected at the separation groove.

8. The display panel according to claim 2, wherein: The inorganic insulating layer includes a plurality of sub-layers, and the plurality of sub-layers are stacked in sequence. The display panel further includes a plurality of first padding structures located in the peripheral area and between adjacent sub-layers. The plurality of first padding structures correspond to the plurality of second conductive isolation pillars one by one, and an orthographic projection of the first padding structure on the substrate overlaps with an orthographic projection of the second conductive isolation pillar on the substrate.

9. The display panel according to claim 8, wherein: It also includes a plurality of second padding structures located in the peripheral area and between adjacent sub-layers. The plurality of second padding structures correspond to the plurality of first conductive isolation pillars one by one, and the second padding structures overlap with the orthographic projections of the first conductive isolation pillars on the substrate.

10. The display panel according to claim 9, wherein: The inorganic insulating layer includes a first sublayer and a second sublayer, wherein the first sublayer and the second sublayer are sequentially stacked away from the substrate, The first padding structure includes a first conductive pattern, and the second padding structure includes a second conductive pattern. Electrical pattern, The first conductive pattern and the second conductive pattern are made of the same material and are arranged in the same layer; The first conductive pattern and the second conductive pattern are located between the first sub-layer and the second sub-layer.

11. The display panel according to claim 10, wherein: The inorganic insulating layer further includes a third sublayer located on a side of the second sublayer away from the substrate. The first padding structure further includes a third conductive pattern, and the second padding structure further includes a fourth conductive pattern. The third conductive pattern and the fourth conductive pattern are made of the same material and are arranged in the same layer; The third conductive pattern and the fourth conductive pattern are located between the second sub-layer and the third sub-layer.

12. The display panel according to claim 11, wherein: The centers of the orthographic projections of the second conductive isolation column, the third conductive pattern and the first conductive pattern on the substrate coincide with each other, Any side edge of the orthographic projection of the third conductive pattern on the substrate is retracted 0.5 to 1 μm toward the center of its orthographic projection relative to the corresponding side edge of the orthographic projection of the first conductive pattern on the substrate. Any side edge of the orthographic projection of the second conductive isolation column on the substrate is retracted by 0.5-1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the third conductive pattern on the substrate.

13. The display panel according to claim 11, wherein: The centers of the orthographic projections of the first conductive isolation column, the fourth conductive pattern and the second conductive pattern on the substrate coincide with each other, Any side edge of the orthographic projection of the fourth conductive pattern on the substrate is inwardly shrunk toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the second conductive pattern on the substrate. 0.5~1μm, Any side edge of the orthographic projection of the first conductive isolation column on the substrate is retracted by 0.5-1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the fourth conductive pattern on the substrate.

14. The display panel according to claim 11, wherein: The edge end surfaces of the first conductive pattern, the second conductive pattern, the third conductive pattern and the fourth conductive pattern are all slope surfaces, The slope angle of the slope is 45°±10°.

15. The display panel according to claim 2, wherein: Also included are a plurality of third padding structures located in the peripheral area and between the inorganic insulating layer and the conductive isolation column. The plurality of third padding structures correspond to the plurality of first conductive isolation pillars and the plurality of second conductive isolation pillars one by one, respectively, and the third padding structure overlaps with the orthographic projection of the first conductive isolation pillar on the substrate, and the third padding structure overlaps with the orthographic projection of the second conductive isolation pillar on the substrate; The orthographic projection of the insulating isolation layer on the substrate covers the orthographic projection of the third padding structure on the substrate.

16. The display panel according to claim 15, wherein: The cross-sectional shape of the third heightening structure perpendicular to the base includes a trapezoid. The base angle of the trapezoid is 45°±10°.

17. The display panel according to claim 16, wherein: The first conductive isolation column and the third padding structure coincide with the center of the orthographic projection on the substrate, The center of the orthographic projection of the second conductive isolation column and the third padding structure on the substrate coincide, Any side edge of the orthographic projection of the first conductive spacer on the substrate is retracted by 0.5 to 1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the top surface of the third padding structure in contact with the first conductive spacer on the substrate. Any side edge of the orthographic projection of the second conductive spacer column on the substrate is retracted 0.5-1 μm toward the center of the orthographic projection relative to the corresponding side edge of the orthographic projection of the top surface of the third padding structure in contact with the second conductive spacer column on the substrate.

18. The display panel according to claim 1, wherein: The conductive isolation column comprises a first conductive layer, a second conductive layer and a third conductive layer, wherein the first conductive layer, the second conductive layer and the third conductive layer are stacked in sequence away from the substrate, The edge end surface of the second conductive layer is a first slope surface, and the edge end surfaces of the first conductive layer and the third conductive layer are second slope surfaces. The slope angle of the first slope surface is smaller than the slope angle of the second slope surface; The orthographic projections of the first conductive layer and the third conductive layer on the substrate both cover the orthographic projection of the second conductive layer on the substrate.

19. The display panel according to claim 18, wherein: The insulating isolation layer covers a surface of the third conductive layer that is away from the substrate and edge surfaces of the first conductive layer, the second conductive layer and the third conductive layer. The thickness of the insulating isolation layer ranges from 500 to 2000 angstroms.

20. A display device, wherein: A display panel comprising any one of claims 1-19.

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