Solar cell, solar module and preparation method for solar cell

Abstract

Provided in the present application are a solar cell, a solar module and a preparation method for the solar cell. The solar cell comprises: a substrate having a front substrate face and a back substrate face which are opposite each other; a first polycrystalline silicon layer located on one side of the front substrate face, the first polycrystalline silicon layer being provided with recesses, which penetrate the first polycrystalline silicon layer and are arranged at intervals; first passivation layers, which are adjacent to the side of the first polycrystalline silicon layer away from the front substrate face and which at least cover areas in the first polycrystalline silicon layer that are provided with the recesses, first areas and second areas sequentially arranged at intervals being provided on the side of the first polycrystalline silicon layer away from the front substrate face, wherein the first areas are covered by the first passivation layers, and the second areas are not covered by the first passivation layers; and a transparent electrically conductive composite layer, which is adjacent to the sides of the first passivation layers away from the first polycrystalline silicon layer, and which is in direct contact with the first polycrystalline silicon layer by means of the second areas. The solar cell provided in the present application can optimize a composite layer of the cell, thus improving the cell efficiency of the solar cell.

Description

Solar cell, solar module and method for preparing solar cell Technical Field

[0001] The present application mainly relates to the field of solar cell technology, and in particular to a solar cell, a solar module and a method for preparing a solar cell. Background Art

[0002] In the photovoltaic cell field, perovskite solar cells are currently typically stacked with HJT cells. However, since HJT mass production equipment is still in the development stage, while TOPCon solar cells have already entered stable mass production, it is currently necessary to conduct more research on TOPCon-based tandem cells for perovskite solar cells to expand the possibilities of their stacked structures. However, conventional TOPCon cells are not the most suitable cell structure for perovskite stacking due to the need for emitter passivation and the excessive thickness of the polycarbonate. Therefore, hybrid cell structures in the field still have many shortcomings.

[0003] Summary of the Invention

[0004] The technical problem to be solved by the present application is to provide a solar cell, a solar module and a method for preparing a solar cell, which can optimize the cell composite layer and improve the cell efficiency of the solar cell.

[0005] To solve the above technical problems, the present application provides a solar cell, comprising: a substrate having a front side and a back side of the substrate; a first polycrystalline silicon layer located on one side of the front side of the substrate, the first polycrystalline silicon layer having slots arranged at intervals through the first polycrystalline silicon layer; a first passivation layer located adjacent to a side of the first polycrystalline silicon layer further away from the front side of the substrate, the first passivation layer covering at least the region of the first polycrystalline silicon layer having the slots, the first polycrystalline silicon layer having a first region and a second region arranged in sequence at intervals on a side further away from the front side of the substrate, wherein the first region is covered by the first passivation layer and the second region is not covered by the first passivation layer; and a transparent conductive composite layer located adjacent to a side of the first passivation layer further away from the first polycrystalline silicon layer, the transparent conductive composite layer being in direct contact with the first polycrystalline silicon layer through the second region.

[0006] Optionally, the solar cell further comprises a hole transport layer, a perovskite layer and an electron transport layer, which are sequentially and closely located on a side of the transparent conductive composite layer further away from the substrate.

[0007] Optionally, the solar cell further includes a buffer layer located adjacent to a side of the electron transport layer further away from the substrate.

[0008] Optionally, the solar cell further includes an anti-reflection layer located adjacent to a side of the buffer layer further away from the substrate.

[0009] Optionally, the solar cell further includes a second polysilicon layer located on one side of the back side of the substrate.

[0010] Optionally, the solar cell further includes a second passivation layer located adjacent to a side of the second polysilicon layer further away from the substrate.

[0011] Optionally, the solar cell further includes one or more tunneling layers located between the substrate and the first polysilicon layer and / or between the substrate and the second polysilicon layer.

[0012] Optionally, the second polysilicon layer has a thickness of 60-700 nm.

[0013] Optionally, the solar cell further includes a plurality of metal electrodes, respectively located on one side of the front surface of the substrate and one side of the back surface of the substrate, and the plurality of metal electrodes all face the second region of the first polysilicon layer in the cross section of the solar cell.

[0014] In order to solve the above technical problems, the present application provides a solar cell assembly, comprising a plurality of solar cells as described above connected in series and / or in parallel.

[0015] To solve the above technical problems, the present application provides a method for preparing a solar cell, comprising the following steps: preparing a substrate, the substrate having a front side and a back side of the substrate; forming a first polycrystalline silicon layer on one side of the front side of the substrate; forming slots arranged at intervals through the first polycrystalline silicon layer in the first polycrystalline silicon layer by laser grooving; depositing a first passivation layer on a side of the first polycrystalline silicon layer further away from the substrate; removing a portion of the first passivation layer by laser grooving to expose a portion of the first polycrystalline silicon layer; and depositing a transparent conductive composite layer on a side of the first passivation layer further away from the substrate.

[0016] Optionally, the method for preparing a solar cell further comprises sequentially preparing a hole transport layer, a perovskite layer and an electron transport layer on the transparent conductive composite layer.

[0017] Compared with the prior art, the present application provides a transparent conductive composite layer in the cell and provides the first polysilicon layer and the first passivation layer with matching notch patterns, which is beneficial to improving the light utilization rate and cell efficiency of the solar cell.

[0018] Summary of the Figures

[0019] The accompanying drawings are included to provide a further understanding of the present application. They are incorporated into and constitute a part of this application. The accompanying drawings illustrate embodiments of the present application and, together with this specification, serve to explain the principles of the present application. In the accompanying drawings:

[0020] FIG1 is a schematic cross-sectional view of a solar cell according to an embodiment of the present application;

[0021] FIG2 is a schematic flow chart of a method for preparing a solar cell in one embodiment of the present application.

[0022] Preferred embodiments of the present invention

[0023] To more clearly illustrate the technical solutions of the embodiments of this application, the following is a brief introduction to the drawings required for describing the embodiments. Obviously, the drawings described below are merely examples or embodiments of this application. Those skilled in the art can apply this application to other similar scenarios based on these drawings without inventive effort. Unless otherwise apparent from the context or otherwise noted, the same reference numerals in the figures represent the same structure or operation.

[0024] As used in this application and the claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not intended to refer to the singular but may include the plural. Generally speaking, the terms "comprises" and "include" only indicate the inclusion of the steps and elements specifically identified, and these steps and elements do not constitute an exclusive list. A method or apparatus may also include other steps or elements.

[0025] Unless otherwise specifically stated, the relative arrangement of the parts and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the drawings are not drawn according to actual proportional relationships. The techniques, methods and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the techniques, methods and equipment should be considered as part of the authorization specification. In all examples shown and discussed here, any specific values ​​should be interpreted as being merely exemplary and not as limitations. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that similar numbers and letters represent similar items in the following figures, and therefore, once an item is defined in one figure, it does not need to be further discussed in subsequent figures.

[0026] In the description of this application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "horizontal, vertical, vertical, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction. Therefore, they cannot be understood as limiting the scope of protection of this application; the directional words "inside and outside" refer to the inside and outside relative to the outline of each component itself.

[0027] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used herein to describe the spatial positional relationship of a device or feature to other devices or features as shown in the figures. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figures. For example, if the device in the drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0028] Furthermore, it should be noted that the use of terms such as "first" and "second" to define components is solely for the purpose of distinguishing the corresponding components. Unless otherwise stated, these terms have no special meaning and therefore should not be construed as limiting the scope of protection of this application. Furthermore, while the terms used in this application are selected from commonly known and commonly used terms, some terms mentioned in this specification may have been selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant sections of this description. Furthermore, this application should be understood not only by the actual terms used, but also by the meaning implied by each term.

[0029] It should be understood that when a component is referred to as being “on another component,” “connected to another component,” “coupled to another component,” or “contacting another component,” it can be directly on, connected to, coupled to, or contacting the other component, or intervening components may be present. In contrast, when a component is referred to as being “directly on another component,” “directly connected to,” “directly coupled to,” or “directly contacting” another component, there are no intervening components. Similarly, when a first component is referred to as being “electrically in contact with” or “electrically coupled to” a second component, an electrical path exists between the first and second components that allows current to flow. This electrical path may include capacitors, coupled inductors, and / or other components that allow current to flow, even without direct contact between the conductive components.

[0030] The present application proposes a solar cell 10 (hereinafter referred to as cell 10) with reference to FIG1 . Cell 10 mainly includes a substrate 101, a first polysilicon layer 102, a first passivation layer 103, and a transparent conductive composite layer 104. Specifically, the substrate 101 is made of silicon and has a relative substrate front side 1011 and a substrate back side 1012, preferably an N-type substrate. Exemplarily, the surface of the substrate 101 can use a conventional positive pyramid velvet structure or a polished surface structure, and can be a velvet structure on one side and a polished surface structure on one side, or a velvet structure on both sides or a polished structure on both sides. The present application does not impose any restrictions on this.

[0031] Specifically, the first polysilicon layer 102 is located on one side of the substrate front surface 1011 and has slots 1021 spaced apart and extending through the first polysilicon layer 102. Preferably, the slots 1021 can be formed using laser grooving technology. The provision of the slots 1021 increases the incident area of ​​the incident light on the battery 10, thereby increasing the current density of the battery 10. In this embodiment, the first polysilicon layer 102 is preferably N-type polysilicon (Npoly).

[0032] Furthermore, the first passivation layer 103 can be made of a thin film composed of one or more layers selected from the group consisting of AlOx, SiNx, SiOxNy, SiOx, and SiCx, and is located adjacent to the side of the first polysilicon layer 102 further from the substrate front surface 1011. It can be seen that the first passivation layer 103 covers at least the region of the first polysilicon layer 102 having the notch 1021. Furthermore, the first polysilicon layer 102 has a first region 1022 and a second region 1023 spaced apart from each other on the side further from the substrate front surface 1011 (i.e., the upper surface of the first polysilicon layer 102 when positioned in the orientation shown in FIG. 1 ). The first region 1022 is covered by the first passivation layer 103, while the second region 1023 is uncovered. The first passivation layer 103 can reduce the reflectivity of the battery 10 surface while providing sufficient hydrogen H to optimize the surface and internal structure of the battery 10. In addition, the presence of the first passivation layer 103 further ensures the passivation performance of the battery and compatibility with the metal paste of the production line, thereby improving the feasibility of the battery 10.

[0033] Furthermore, the transparent conductive composite layer 104 is preferably TCO transparent conductive glass and is located adjacent to the first passivation layer 103 on a side further away from the first polysilicon layer 102. Preferably, the first passivation layer 103 can be patterned and laser-grooved using a laser grooving technique, so that the transparent conductive composite layer 104 can directly contact the first polysilicon layer 102 through the second region 1023, which facilitates carrier transport and makes the structure of the battery 10 easier to implement in the production process.

[0034] In this embodiment, the battery 10 further includes a hole transport layer 105, a perovskite layer 106, and an electron transport layer 107, which are sequentially located adjacent to each other on the side of the transparent conductive composite layer 104 further away from the substrate 101. Due to the current matching of the battery 10, it is necessary to ensure that the current of the perovskite layer 106 is consistent with the current of the first polysilicon layer 102. In this embodiment, the conductivity of the battery 10 can be increased by increasing the thickness of the Npoly film of the first polysilicon layer 102, thereby accelerating the carrier transport performance. Preferably, when the substrate 101 is prepared using a polished surface, polishing the front side 1011 of the substrate is beneficial to the uniformity of the film formation of the perovskite layer 106, which is beneficial to improving the secondary absorption of the battery 10, and polishing the back side 1012 of the substrate is beneficial to enhancing the reflectivity of the incident light on the front side 1011 of the substrate, which is beneficial to the secondary utilization of light by the battery 10.

[0035] Preferably, the cell 10 further includes a buffer layer 108, which is located adjacent to the side of the electron transport layer 107 further away from the substrate 101. The cell 10 further includes an anti-reflection layer 109, which is located adjacent to the side of the buffer layer 108 further away from the substrate 101. The buffer layer 108 and the anti-reflection layer 109 can further improve the cell's light utilization and cell efficiency.

[0036] On the other hand, cell 10 further includes a second polysilicon layer 110 on the side of substrate back surface 1012. Preferably, second polysilicon layer 110 is a P-type polysilicon layer Ppoly, with a surface concentration of 1E19-2E21 cm⁻³ and a thickness of 60-700 nm. Furthermore, cell 10 further includes a second passivation layer 111, located adjacent to second polysilicon layer 110 on the side further from substrate 101. The second passivation layer 111 can be made of one or more layers of AlOx, SiNx, SiOxNy, SiOx, or SiCx.

[0037] In this embodiment, the battery 10 further includes one or more tunneling layers 112 located between the substrate 101 and the first polysilicon layer 102 and / or between the substrate 101 and the second polysilicon layer 110 (in this embodiment, such tunneling layers 112 are provided on both sides of the substrate 101). Preferably, the tunneling layer 112 may be SiO2.

[0038] As can be seen in FIG1 , the battery 10 of this embodiment further includes multiple metal electrodes 113, located on one side of the substrate front surface 1011 and one side of the substrate back surface 1012. In this embodiment, preferably, the multiple metal electrodes 113 are all directly opposite the second region 1023 of the first polysilicon layer 102 in the cross-section of the battery 10. This approach can further improve the efficiency of the battery 10.

[0039] As described above, in the embodiment of Figure 1 , cell 10 has a double-sided doped polysilicon layer, with a pn junction on the back of the cell. On the front side 1011 of the substrate of cell 10, a laser-patterned n-type doped polysilicon layer and a first passivation layer are formed, along with a transparent conductive composite layer (TCO) deposited across the entire surface. The patterned n-type polysilicon layer facilitates light transmission and carrier transport, while the patterned passivation layer facilitates passivation of areas uncovered by the n-type doped polysilicon layer. Furthermore, the laser-grooved areas of the passivation layer allow direct contact between the TCO composite layer and the n-type polysilicon layer, further facilitating carrier transport and recombination. This structure is easier to implement in production, and the presence of the passivation film and the conventional suede / polished surface structure further ensure the cell's passivation performance and compatibility with the metal pastes used in the production line.

[0040] On this basis, the present application also proposes a solar cell assembly, comprising a plurality of solar cells proposed in any embodiment of the present application connected in series and / or in parallel.

[0041] This application provides a method 20 for preparing a solar cell (hereinafter referred to as preparation method 20) with reference to FIG2 . Preparation method 20 is suitable for preparing cell 10. A flow chart is used in this application to illustrate the operations performed by a system according to an embodiment of the present application. It should be understood that the preceding or following operations are not necessarily performed in exact sequence. Instead, various steps may be processed in reverse order or simultaneously. Furthermore, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0042] Specifically, preparation method 20 includes steps S1 to S6. Step S1 is preparing a substrate having opposite front and back surfaces; step S2 is forming a first polysilicon layer on one side of the front surface of the substrate; step S3 is laser grooving to form spaced notches extending through the first polysilicon layer; step S4 is depositing a first passivation layer on the side of the first polysilicon layer further away from the substrate; step S5 is removing a portion of the first passivation layer by laser grooving to expose a portion of the first polysilicon layer; and step S6 is depositing a transparent conductive composite layer on the side of the first passivation layer further away from the substrate. On this basis, when preparing the battery 10 shown in FIG. 1 , for example, preparation method 20 may further include sequentially forming a hole transport layer, a perovskite layer, and an electron transport layer on the transparent conductive composite layer. To more clearly explain preparation method 20, the steps of preparation method 20 and other details of the preparation method based on preparation method 20 and with reference to the structure of battery 10 shown in FIG. 1 will be used as an example to illustrate the preparation of a battery in which substrate 101 has a textured structure.

[0043] First, an n-type substrate is selected. The surface is pre-cleaned and texturized, and then cleaned with concentrated sulfuric acid, ammonia, and hydrochloric acid. Using tubular low-pressure chemical vapor deposition (LPCVD) at approximately 600°C, a 1.5nm thick tunneling layer (SiO2) is deposited on the back surface. Next, an intrinsic amorphous silicon layer (n-Si) is deposited to a thickness of approximately 300nm. The cell, having undergone these steps, is placed in a tubular diffusion furnace and boron doped at 890°C. The temperature is then raised to 950°C for push-in and high-temperature crystallization, forming the second polysilicon layer (Ppoly). After the Ppoly is formed, the cell is cleaned to remove the oxide layer on the front surface. A tank cleaner is then used to remove the Ppoly that has been plated on the front surface. Because the back surface of the cell is protected by BSG, the Ppoly on the back surface is not removed.

[0044] After this, the cell is cleaned again and then doped using low-pressure chemical vapor deposition (LPCVD) to form a front-side N-poly (polysilicon) substrate, or the first polysilicon layer, with a thickness of approximately 60nm. A chain-type single-sided deoxidation process is then used to simultaneously remove the back oxide layer and the N-poly (polysilicon) layer. Next, the cell undergoes a bath-type HF clean to remove the oxide layers on both the front and back sides. Concentrated hydrochloric acid is then used to remove surface impurities. A tubular PECVD method is used to deposit AlOx and SiNx films on the front side to form the first passivation layer, approximately 40nm thick. The cell is then flipped over, and SiNx is deposited on the back side to a thickness of approximately 60nm. This is followed by a chain-type 750°C high-temperature sintering process to activate the H ions in the SiNx and passivate the p-poly interface and the cell interior. A UV nanosecond laser can then be used to create grooves in the AlOx and SiNx layers, with a width of 60µm, similar to a normal gate pattern. Then, a transparent conductive composite layer is deposited using PVD. This allows direct contact between the transparent conductive composite layer and the underlying N-poly layer, enabling vertical carrier transport. This creates a multi-layer patterned hybrid structure of TCO composite layer, passivation layer, and N-poly layer, as shown in Figure 1.

[0045] After completing the above steps, the hole transport layer, perovskite layer, and electron transport layer are sequentially prepared. Low-temperature silver paste is then used to screen-print the cells on the front and back, with a grid line width of 26 μm. Finally, an antireflection layer of 10MgF2 is deposited on the front to complete the solar cell fabrication.

[0046] The basic concepts have been described above. It will be apparent to those skilled in the art that the above disclosures are merely examples and do not limit the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and revisions to the present application. Such modifications, improvements, and revisions are suggested in the present application and remain within the spirit and scope of the exemplary embodiments of the present application.

[0047] At the same time, this application uses specific terms to describe the embodiments of this application. For example, "one embodiment," "an embodiment," and / or "some embodiments" refer to a certain feature, structure, or characteristic related to at least one embodiment of this application. Therefore, it should be emphasized and noted that "one embodiment," "an embodiment," or "an alternative embodiment" mentioned twice or multiple times in different locations in this specification does not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of this application may be appropriately combined.

[0048] Similarly, it should be noted that, in order to simplify the description of this application and thus facilitate understanding of one or more embodiments of the application, the foregoing description of the embodiments of this application sometimes combines multiple features into a single embodiment, figure, or description thereof. However, this disclosure method does not mean that the subject matter of this application requires more features than those recited in the claims. In fact, the features of an embodiment may be fewer than all the features of the individual embodiments disclosed above.

[0049] In some embodiments, numbers are used to describe the quantity of components and attributes. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise stated, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the description and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining digits. Although the numerical domains and parameters used to confirm the breadth of their range in some embodiments of the present application are approximate values, in specific embodiments, the settings of such numerical values ​​are as accurate as possible within the feasible range.

[0050] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions can be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the scope of the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. A solar cell, characterized in that: include: a substrate having an opposing substrate front side and a substrate back side; A first polysilicon layer, located on one side of the front surface of the substrate, the first polysilicon layer having slots arranged at intervals and penetrating the first polysilicon layer; a first passivation layer, located adjacent to a side of the first polysilicon layer further away from the front surface of the substrate, the first passivation layer at least covers a region of the first polysilicon layer having the notch, the first polysilicon layer having a first region and a second region sequentially spaced apart on a side further away from the front surface of the substrate, wherein the first region is covered by the first passivation layer, and the second region is not covered by the first passivation layer; as well as The transparent conductive composite layer is located adjacent to a side of the first passivation layer further away from the first polysilicon layer, and the transparent conductive composite layer is in direct contact with the first polysilicon layer through the second region.

2. The solar cell according to claim 1, characterized in that It also includes a hole transport layer, a perovskite layer and an electron transport layer, which are successively and closely located on a side of the transparent conductive composite layer further away from the substrate.

3. The solar cell according to claim 2, characterized in that A buffer layer is also included, which is located adjacent to a side of the electron transport layer that is further away from the substrate.

4. The solar cell according to claim 3, characterized in that: The invention also includes an anti-reflection layer, which is located adjacent to a side of the buffer layer that is further away from the substrate.

5. The solar cell according to claim 1, characterized in that The invention also includes a second polysilicon layer located on one side of the back side of the substrate.

6. The solar cell according to claim 5, characterized in that The invention also includes a second passivation layer, which is located adjacent to a side of the second polysilicon layer that is further away from the substrate.

7. The solar cell according to claim 5, characterized in that It also includes one or more tunneling layers located between the substrate and the first polysilicon layer and / or between the substrate and the second polysilicon layer.

8. The solar cell according to claim 5, characterized in that The thickness of the second polysilicon layer is 60-700 nm.

9. The solar cell according to any one of claims 1 to 8, characterized in that: It also includes a plurality of metal electrodes, which are respectively located on one side of the front surface of the substrate and one side of the back surface of the substrate, and the plurality of metal electrodes are all facing the second region of the first polysilicon layer in the cross section of the solar cell.

10. A solar cell assembly comprising a plurality of solar cells according to any one of claims 1 to 9 connected in series and / or in parallel.

11. A method for preparing a solar cell, characterized in that: The steps include: preparing a substrate having an opposing substrate front side and substrate back side; forming a first polysilicon layer on one side of the front surface of the substrate; Forming slots arranged at intervals and penetrating the first polysilicon layer in the first polysilicon layer by laser grooving; Depositing a first passivation layer on a side of the first polysilicon layer further away from the substrate; Removing a portion of the first passivation layer by laser grooving to expose a portion of the first polysilicon layer; A transparent conductive composite layer is deposited on a side of the first passivation layer further away from the substrate.

12. The preparation method according to claim 11, characterized in that: The method also includes sequentially preparing a hole transport layer, a perovskite layer and an electron transport layer on the transparent conductive composite layer.

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