Preparation method for selective emitter, solar cell and preparation method therefor, and photovoltaic module
The selective emitter and tunneling layer are formed on the silicon wafer by one-step oxidation method, which solves the problems of complex preparation processes and low processing efficiency in the prior art, and achieves process simplification and efficiency improvement.
Patent Information
- Application Number
- PCT/CN2024/125993
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-10-31
- Filing Date
- 2024-10-21
- Publication Date
- 2025-05-08
AI Technical Summary
The preparation process of existing solar cells is complex and the steps are cumbersome, which leads to low processing efficiency and is difficult to promote and apply on a large scale.
A one-step oxidation method is adopted to form a selective emitter on one side of the silicon wafer while forming a tunnel layer on the other side, simplifying the preparation process flow.
The preparation process of solar cells is simplified, the preparation time is shortened, the processing efficiency is improved, and it is conducive to large-scale promotion and application.
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Figure CN2024125993_08052025_PF_FP_ABST
Abstract
Description
A method for preparing a selective emitter, a solar cell, a method for preparing the same, and a photovoltaic module Technical Field
[0001] The present invention belongs to the technical field of solar cells and relates to a method for preparing a selective emitter, in particular to a method for preparing a selective emitter, a solar cell and a preparation method thereof, and a photovoltaic module. Background Art
[0002] The back of the solar cell adopts a tunneling oxide layer structure and the front adopts a selective emitter structure, which can not only improve the open circuit voltage of the battery, but also improve the fill factor of the battery, and ultimately improve the conversion efficiency of the TOPCon solar cell.
[0003] However, in the prior art, technicians usually first prepare a selective emitter structure on the front side, then perform thermal oxidation, and then sequentially prepare a tunneling oxide layer and a doped polysilicon layer on the back side. The process is complicated and the steps are tedious.
[0004] For example, technicians generally use the following steps to prepare solar cells: (1) Clean and texturize the N-type silicon wafer; (2) During the boron diffusion, promote the formation of a P++ layer with a high boron surface concentration without performing an oxidation process; (3) Use a laser to promote doping of the gate line area; (4) After cleaning, return it to the diffusion furnace for oxidation to form a selective emitter; (5) Remove the BSG and P+ layer on the back, and prepare a tunneling oxide layer and a doped thin film silicon layer on the back; (6) Remove the polysilicon produced by the front-side plating and the BSG obtained in step (2), and deposit a passivation layer and a SiNx anti-reflection film on both sides; (7) Screen print double-sided electrodes.
[0005] Although the above preparation process can improve the conversion efficiency of TOPCon solar cells, since the selective emitter structure and the tunneling oxide layer are prepared separately, the steps are relatively complicated and the processing efficiency needs to be further improved.
[0006] Therefore, how to provide a method for preparing solar cells, simplify the process flow, and improve the processing efficiency of the cells has become an urgent problem that those skilled in the art need to solve. Summary of the Invention
[0007] The purpose of the present invention is to provide a method for preparing a selective emitter, a solar cell and its preparation method and a photovoltaic module, which forms a selective emitter on one side of a silicon wafer and a tunneling layer on the other side of the silicon wafer through a one-step oxidation, without the need to prepare a tunneling layer separately, thereby simplifying the battery preparation process, improving the battery processing efficiency, and facilitating large-scale promotion and application.
[0008] In order to achieve the purpose of the invention, the present invention adopts the following technical solutions:
[0009] In a first aspect, the present invention provides a method for preparing a selective emitter, the method comprising the following steps:
[0010] (1) Cleaning the N-type silicon wafer;
[0011] (2) Boron diffusion is performed on the silicon wafer to form a P layer on the surface of the silicon wafer;
[0012] (3) Using laser to dope the gate line area of silicon wafer;
[0013] (4) After cleaning, remove the borosilicate glass layer and P layer on the surface of the silicon wafer;
[0014] (5) The silicon wafer is subjected to high-temperature treatment to form a selective emitter on one side of the silicon wafer and a tunneling layer on the other side of the silicon wafer.
[0015] The preparation method provided by the present invention only requires one-step oxidation to form a selective emitter on one side of a silicon wafer and a tunneling layer on the other side of the silicon wafer. There is no need to prepare a tunneling layer separately, thereby simplifying the battery preparation process, shortening the battery preparation time, and improving the battery processing efficiency, which is conducive to large-scale promotion and application.
[0016] Preferably, the boron source used for the boron diffusion in step (2) includes BBr3, the carrier gas includes N2, and the carrier gas flow rate is 130-2000sccm, for example, it can be 130sccm, 200sccm, 400sccm, 600sccm, 800sccm, 1000sccm, 1200sccm, 1400sccm, 1600sccm, 1800sccm or 2000sccm, but is not limited to the listed values, and other values not listed within the numerical range are also applicable.
[0017] Preferably, the advancement temperature of the boron diffusion in step (2) is 700-1200°C, for example, it can be 700°C, 750°C, 800°C, 850°C, 900°C, 950°C, 1000°C, 1050°C, 1100°C, 1150°C or 1200°C, but is not limited to the listed values, and other values not listed within the numerical range are also applicable.
[0018] Preferably, the advancement time of the boron diffusion in step (2) is 2-10 hours, for example, it can be 2 hours, 3 hours, 4 hours, 5 hours, 6 hours, 7 hours, 8 hours, 9 hours or 10 hours, but is not limited to the listed values, and other unlisted values within the numerical range are also applicable.
[0019] Preferably, the boron diffusion in step (2) is also accompanied by oxidation.
[0020] Preferably, the laser in step (3) comprises a pulsed or continuous laser beam.
[0021] Preferably, the power of the laser in step (3) is 28-1000 W, for example, it can be 28 W, 30 W, 50 W, 100 W, 150 W, 200 W, 250 W, 300 W, 350 W, 400 W, 450 W, 500 W, 550 W, 600 W, 650 W, 700 W, 750 W, 800 W, 850 W, 900 W, 950 W or 1000 W, but is not limited to the listed values, and other values not listed within the numerical range are also applicable.
[0022] Preferably, the scanning speed of the laser in step (3) is 20-100 m / s, for example, it can be 20 m / s, 25 m / s, 30 m / s, 35 m / s, 40 m / s, 45 m / s, 50 m / s, 55 m / s, 60 m / s, 65 m / s, 70 m / s, 75 m / s, 80 m / s, 85 m / s, 90 m / s, 95 m / s or 100 m / s, but is not limited to the listed values, and other values not listed within the numerical range are also applicable.
[0023] Preferably, the wavelength of the laser in step (3) is 200-1100 nm, for example, it can be 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm, 850 nm, 900 nm, 950 nm, 1000 nm, 1050 nm or 1100 nm, but is not limited to the listed values, and other values not listed within the numerical range are also applicable.
[0024] Preferably, the O2 flow rate used in the high temperature treatment in step (5) is 30-2000sccm, for example, it can be 30sccm, 50sccm, 100sccm, 200sccm, 300sccm, 400sccm, 500sccm, 600sccm, 700sccm, 800sccm, 900sccm, 1000sccm, 1100sccm, 1200sccm, 1300sccm, 1400sccm, 1500sccm, 1600sccm, 1700sccm, 1800sccm, 1900sccm or 2000sccm, but is not limited to the listed values, and other values not listed within the numerical range are also applicable.
[0025] Preferably, the temperature of the high temperature treatment in step (5) is 700-1200°C, for example, it can be 700°C, 750°C, 800°C, 850°C, 900°C, 950°C, 1000°C, 1050°C, 1100°C, 1150°C or 1200°C, but is not limited to the listed values, and other values not listed within the numerical range are also applicable.
[0026] Preferably, the time of the high temperature treatment in step (5) is 2-10 h, for example, it can be 2 h, 2.5 h, 3 h, 3.5 h, 4 h, 4.5 h, 5 h, 5.5 h, 6 h, 6.5 h, 7 h, 7.5 h, 8 h, 8.5 h, 9 h, 9.5 h or 10 h, but is not limited to the listed values, and other values not listed within the numerical range are also applicable.
[0027] In a second aspect, the present invention provides a method for preparing a solar cell. The method is further performed on the basis of the method described in the first aspect, and comprises the following steps:
[0028] (6) Preparing a contact layer on the surface of the tunneling layer;
[0029] (7) Remove the contact layer and borosilicate glass layer produced by the plating on the front side of the silicon wafer, and deposit the passivation layer on both sides;
[0030] (8) Screen-printed double-sided electrodes.
[0031] Preferably, the contact layer in step (6) comprises a doped polysilicon layer.
[0032] Preferably, between step (7) and step (8), an anti-reflection film is further prepared on the surface of the passivation layer.
[0033] In a third aspect, the present invention provides a solar cell obtained by the preparation method described in the second aspect, wherein the solar cell comprises a selective emitter on one side of a silicon wafer and a tunneling layer on the other side of the silicon wafer, and the selective emitter and the tunneling layer are prepared synchronously.
[0034] In a fourth aspect, the present invention provides a photovoltaic module comprising the solar cell according to the third aspect.
[0035] Compared with the prior art, the present invention has the following beneficial effects:
[0036] The preparation method provided by the present invention only requires one-step oxidation to form a selective emitter on one side of a silicon wafer and a tunneling layer on the other side of the silicon wafer. There is no need to prepare a tunneling layer separately, thereby simplifying the battery preparation process, shortening the battery preparation time, and improving the battery processing efficiency, which is conducive to large-scale promotion and application. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] FIG1 is a flow chart of a method for preparing a solar cell provided by the present invention;
[0038] FIG2 is a schematic diagram of the solar cell structure provided by the present invention.
[0039] Among them: 1-N-type silicon wafer; 2-P layer; 3-high-concentration P layer; 4-tunneling layer; 5-doped polysilicon layer; 6-passivation layer; 7-SiNx anti-reflection film; 8-electrode. DETAILED DESCRIPTION
[0040] The technical solution of the present invention is further described below by way of specific embodiments. It should be understood by those skilled in the art that the embodiments are merely to help understand the present invention and should not be regarded as specific limitations of the present invention. Example
[0041] This embodiment provides a solar cell and a method for manufacturing the same. As shown in FIG1 , the method includes the following steps:
[0042] (1) Select an N-type silicon wafer 1 and clean and texture the wafer;
[0043] (2) Boron diffusion is performed on the silicon wafer at a temperature of 950°C for 6 hours to form a P layer 2 on the surface of the silicon wafer, and the P layer 2 can also be a P++ layer with a high-boron surface; the boron source used in the boron diffusion is BBr3, the carrier gas is N2, and the carrier gas flow rate is 1100 sccm; the boron diffusion is also accompanied by oxidation;
[0044] (3) A pulsed laser beam is used to dope the gate line area on the front side of the silicon wafer; the laser power is 500W, the scanning speed is 60m / s, and the wavelength is 650nm;
[0045] (4) After cleaning, remove the borosilicate glass layer and P layer 2 on the back of the silicon wafer;
[0046] (5) The silicon wafer is subjected to high-temperature treatment to form a selective emitter on the front side of the silicon wafer and a tunneling layer 4 on the back side of the silicon wafer. The high-temperature treatment uses an O2 flow rate of 1020 sccm, a temperature of 950°C, and a treatment time of 6 hours. Furthermore, the tunneling layer 4 is a thermal oxygen tunneling layer, which has better density and uniformity. Because this method prepares the tunneling layer 4 in a furnace tube, the temperature in the furnace tube is higher than the temperature of the tunneling layer 4 prepared by the CVD equipment. At the same time, in the high-temperature environment, the boron atoms will diffuse again, thereby forming a selective emitter.
[0047] (6) preparing a doped polysilicon layer 5 on the surface of the tunneling layer 4;
[0048] (7) Remove the doped polysilicon layer 5 and borosilicate glass layer produced by the plating on the front side of the silicon wafer, and deposit the passivation layer 6 and SiNx anti-reflection film 7 on both sides in sequence;
[0049] (8) Screen-printed double-sided electrodes 8.
[0050] The structure of the solar cell obtained in this embodiment is shown in FIG2 , and specifically comprises:
[0051] N-type silicon wafer 1 located in the center of the battery;
[0052] The selective emitter (composed of a P layer 2 and a high-concentration P layer 3), a passivation layer 6, and a SiNx anti-reflection film 7 are located on the front side of the silicon wafer;
[0053] Tunneling layer 4, doped polysilicon layer 5 and SiNx anti-reflection film 7 located on the back of the silicon wafer;
[0054] Electrodes 8 are located on the front and back of the silicon wafer respectively. Example
[0055] This embodiment provides a solar cell and a method for manufacturing the same. As shown in FIG1 , the method includes the following steps:
[0056] (1) Select an N-type silicon wafer 1 and clean and texture the wafer;
[0057] (2) Boron diffusion is performed on the silicon wafer at a temperature of 700°C for 10 hours to form a P layer 2 on the surface of the silicon wafer; the boron source used in the boron diffusion is BBr3, the carrier gas is N2, and the carrier gas flow rate is 130 sccm; the boron diffusion is also accompanied by oxidation;
[0058] (3) A continuous laser beam is used to dope the gate line area on the front side of the silicon wafer; the laser power is 28W, the scanning speed is 20m / s, and the wavelength is 200nm;
[0059] (4) After cleaning, remove the borosilicate glass layer and P layer 2 on the back of the silicon wafer;
[0060] (5) The silicon wafer is subjected to high-temperature treatment to form a selective emitter on the front side of the silicon wafer and a tunneling layer 4 on the back side of the silicon wafer. The high-temperature treatment uses an O2 flow rate of 30 sccm, a temperature of 700°C, and a time of 10 hours. Furthermore, the tunneling layer 4 is a thermal oxygen tunneling layer, which has better density and uniformity. Because this method prepares the tunneling layer 4 in a furnace tube, the temperature in the furnace tube is higher than the temperature of the tunneling layer 4 prepared by the CVD equipment. At the same time, in the high-temperature environment, the boron atoms will diffuse again, thereby forming a selective emitter.
[0061] (6) preparing a doped polysilicon layer 5 on the surface of the tunneling layer 4;
[0062] (7) Remove the doped polysilicon layer 5 and borosilicate glass layer produced by the plating on the front side of the silicon wafer, and deposit the passivation layer 6 and SiNx anti-reflection film 7 on both sides in sequence;
[0063] (8) Screen-printed double-sided electrodes 8.
[0064] The structure of the solar cell obtained in this embodiment is shown in FIG2 , and specifically comprises:
[0065] N-type silicon wafer 1 located in the center of the battery;
[0066] The selective emitter (composed of a P layer 2 and a high-concentration P layer 3), a passivation layer 6, and a SiNx anti-reflection film 7 are located on the front side of the silicon wafer;
[0067] Tunneling layer 4, doped polysilicon layer 5 and SiNx anti-reflection film 7 located on the back of the silicon wafer;
[0068] Electrodes 8 are located on the front and back of the silicon wafer respectively. Example
[0069] This embodiment provides a solar cell and a method for manufacturing the same. As shown in FIG1 , the method includes the following steps:
[0070] (1) Select an N-type silicon wafer 1 and clean and texture the wafer;
[0071] (2) Boron diffusion is performed on the silicon wafer at a temperature of 1200°C for a time of 2 hours to form a P layer 2 on the surface of the silicon wafer; the boron source used in the boron diffusion is BBr3, the carrier gas is N2, and the carrier gas flow rate is 2000 sccm; the boron diffusion is also accompanied by oxidation;
[0072] (3) Use a pulsed laser beam to dope the gate line area on the front side of the silicon wafer; the laser power is 1000W, the scanning speed is 100m / s, and the wavelength is 1100nm;
[0073] (4) After cleaning, remove the borosilicate glass layer and P layer 2 on the back of the silicon wafer;
[0074] (5) The silicon wafer is subjected to high-temperature treatment to form a selective emitter on the front side of the silicon wafer and a tunneling layer 4 on the back side of the silicon wafer. The high-temperature treatment uses an O2 flow rate of 2000 sccm, a temperature of 1200°C, and a treatment time of 2 hours. Furthermore, the tunneling layer 4 is a thermal oxygen tunneling layer, which has better density and uniformity. Because this method prepares the tunneling layer 4 in a furnace tube, the temperature in the furnace tube is higher than the temperature of the tunneling layer 4 prepared by the CVD equipment. At the same time, in the high-temperature environment, the boron atoms will diffuse again, thereby forming a selective emitter.
[0075] (6) preparing a doped polysilicon layer 5 on the surface of the tunneling layer 4;
[0076] (7) Remove the doped polysilicon layer 5 and borosilicate glass layer produced by the plating on the front side of the silicon wafer, and deposit the passivation layer 6 and SiNx anti-reflection film 7 on both sides in sequence;
[0077] (8) Screen-printed double-sided electrodes 8.
[0078] The structure of the solar cell obtained in this embodiment is shown in FIG2 , and specifically comprises:
[0079] N-type silicon wafer 1 located in the center of the battery;
[0080] The selective emitter (composed of a P layer 2 and a high-concentration P layer 3), a passivation layer 6, and a SiNx anti-reflection film 7 are located on the front side of the silicon wafer;
[0081] Tunneling layer 4, doped polysilicon layer 5 and SiNx anti-reflection film 7 located on the back of the silicon wafer;
[0082] Electrodes 8 are located on the front and back of the silicon wafer respectively.
[0083] This comparative example provides a solar cell and a method for preparing the same, the method comprising the following steps:
[0084] (1) Select an N-type silicon wafer and clean and texture it;
[0085] (2) Boron diffusion is performed on the silicon wafer at a temperature of 950°C for 6 hours to form a P layer on the surface of the silicon wafer; the boron source used in the boron diffusion is BBr3, the carrier gas is N2, and the carrier gas flow rate is 1100 sccm; the boron diffusion does not undergo an oxidation process;
[0086] (3) A pulsed laser beam is used to dope the gate line area on the front side of the silicon wafer; the laser power is 500W, the scanning speed is 60m / s, and the wavelength is 650nm;
[0087] (4) After cleaning, the silicon wafer is subjected to high-temperature treatment to form a selective emitter on the front side of the silicon wafer; the high-temperature treatment uses an O2 flow rate of 1020 sccm, a temperature of 950°C, and a time of 6 hours;
[0088] (5) Remove the borosilicate glass layer and P+ layer on the back of the silicon wafer, and form a tunneling layer and doped polysilicon layer on the back of the silicon wafer;
[0089] (6) Remove the doped polysilicon layer and borosilicate glass layer produced by the plating on the front side of the silicon wafer, and deposit the passivation layer and SiNx anti-reflection film on both sides in sequence;
[0090] (7) Screen-printed double-sided electrodes.
[0091] The structure of the solar cell obtained in this comparative example is similar to that of Example 1, and therefore will not be described in detail here.
[0092] However, compared with Example 1, this comparative example first prepares a selective emitter structure on the front side of the silicon wafer, then performs thermal oxidation, and then sequentially prepares a tunneling layer and a doped polysilicon layer on the back side of the silicon wafer. The process is complex and the steps are cumbersome, resulting in its processing efficiency being significantly lower than that of Example 1.
[0093] It can be seen that the preparation method provided by the present invention only requires one-step oxidation to form a selective emitter on one side of the silicon wafer and a tunneling layer on the other side of the silicon wafer. There is no need to prepare a tunneling layer separately, thereby simplifying the battery preparation process, shortening the battery preparation time, and improving the battery processing efficiency, which is conducive to large-scale promotion and application.
[0094] The applicant declares that the above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention fall within the scope of protection and disclosure of the present invention.
Claims
1. A method for preparing a selective emitter, characterized in that: The preparation method comprises the following steps: (1) Cleaning the N-type silicon wafer; (2) Boron diffusion is performed on the silicon wafer to form a P layer on the surface of the silicon wafer; (3) Using laser to dope the gate line area of silicon wafer; (4) After cleaning, the borosilicate glass layer and P layer on the surface of the silicon wafer are removed; (5) The silicon wafer is subjected to high temperature treatment to form a selective emitter on one side of the silicon wafer and a tunneling layer on the other side of the silicon wafer.
2. The preparation method according to claim 1, characterized in that: The boron source used in the boron diffusion in step (2) includes BBr3, the carrier gas includes N2, and the flow rate of the carrier gas is 130-2000 sccm; The temperature of the boron diffusion in step (2) is 700-1200°C; The boron diffusion time in step (2) is 2-10 hours.
3. The preparation method according to claim 1 or 2, characterized in that: The boron diffusion in step (2) is also accompanied by oxidation.
4. The preparation method according to any one of claims 1 to 3, characterized in that The laser in step (3) includes a pulsed or continuous laser beam; The power of the laser in step (3) is 28-1000W; The scanning speed of the laser in step (3) is 20-100 m / s; The wavelength of the laser in step (3) is 200-1100nm.
5. The preparation method according to any one of claims 1 to 4, characterized in that: The O2 flow rate used in the high temperature treatment in step (5) is 30-2000sccm; The temperature of the high temperature treatment in step (5) is 700-1200°C; The high temperature treatment time in step (5) is 2-10 hours.
6. A method for preparing a solar cell, characterized in that: The preparation method is carried out on the basis of the preparation method according to any one of claims 1 to 5, comprising the following steps: (6) Preparing a contact layer on the surface of the tunneling layer; (7) Remove the contact layer and borosilicate glass layer produced by the plating on the front side of the silicon wafer, and deposit the passivation layer on both sides; (8) Screen-printed double-sided electrodes.
7. The preparation method according to claim 6, characterized in that: The contact layer in step (6) includes a doped polysilicon layer.
8. The preparation method according to claim 6 or 7, characterized in that: The method between step (7) and step (8) also includes preparing an anti-reflection film on the surface of the passivation layer.
9. A solar cell obtained by the preparation method according to any one of claims 6 to 8, characterized in that: The solar cell comprises a selective emitter on one side of a silicon wafer and a tunneling layer on the other side of the silicon wafer, and the selective emitter and the tunneling layer are prepared synchronously.
10. A photovoltaic module, characterized in that: Comprising the solar cell as claimed in claim 9.
Citation Information
Patent Citations
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CN111640823A
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CN117219703A
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