Member for semiconductor manufacturing apparatus

Abstract

According to the present invention, a wafer placement table 10 includes: a ceramic plate 20 which has a wafer placement surface 21 in the upper surface and internally has an electrostatic electrode 22; a base plate 50 which is provided on the lower surface of the ceramic plate 20 and internally has a refrigerant flow path 52; and a gas passage 24 which is provided so as to extend from the lower surface of the base plate 50 to the wafer placement surface 21. The wafer placement table 10 also includes first to fourth internal electrodes 31 to 34. Each of the internal electrodes 31 to 34 is provided inside the ceramic plate 20 so as to surround the gas passage 24 below the electrostatic electrode 22 and not to be exposed to the inner wall of the gas passage 24, and is electrically connected to the electrostatic electrode 22. The base plate 50 also serves as a bias electrode. The bias electrode is provided electrically independently of the electrostatic electrode 22, and a bias voltage is applied when plasma is generated above the wafer placement surface 21.

Description

Semiconductor manufacturing equipment components

[0001] The present invention relates to a member for a semiconductor manufacturing device.

[0002] Conventionally, a semiconductor manufacturing equipment component has been known that includes a ceramic plate having a wafer mounting surface on its upper surface and a built-in electrode, a base plate provided on the lower surface of the ceramic plate, and a gas passageway extending from the lower surface of the base plate to the wafer mounting surface of the ceramic plate. Patent Document 1 discloses such a semiconductor manufacturing equipment component, in which a cylindrical shield electrode portion is provided around the gas passageway in the ceramic plate. The cylindrical shield electrode portion functions to shield the interior space of the gas passageway from the influence of an electric field generated around the electrostatic electrode when a DC voltage is applied to the electrostatic electrode. This prevents or reduces the occurrence of abnormal discharge in the gas passageway.

[0003] International Publication No. 2023 / 095707

[0004] However, in Patent Document 1, if the shielding by the shield electrode portion is insufficient, it may not be possible to prevent the occurrence of abnormal discharge in the gas passage.

[0005] The present invention has been made to solve the above-mentioned problems, and its main object is to prevent or reduce the occurrence of abnormal discharge in a passageway using a different principle from the conventional one.

[0006] [1] A semiconductor manufacturing equipment member of the present invention comprises: a ceramic plate having a wafer mounting surface on its upper surface and incorporating an electrostatic electrode; a base plate provided on the underside of the ceramic plate and incorporating a coolant flow path; a passage provided from the underside of the base plate to the wafer mounting surface of the ceramic plate; at least one internal electrode provided inside the ceramic plate below the electrostatic electrode, surrounding the passage and not exposed to an inner wall of the passage, and electrically connected to the electrostatic electrode; and a bias electrode provided electrically independent of the electrostatic electrode at a position equal to or lower than the lowest internal electrode of the at least one internal electrode, and to which a bias voltage is applied when plasma is generated above the wafer mounting surface.

[0007] In this semiconductor manufacturing equipment component, at least one internal electrode electrically connected to the electrostatic electrode is disposed within the ceramic plate, surrounding the passage below the electrostatic electrode and not exposed to the inner wall of the passage. When a DC voltage is applied to the electrostatic electrode and a bias voltage is applied to the bias electrode, a vertical potential gradient is generated in the interior space of the passage. In this invention, because at least one internal electrode is disposed below the electrostatic electrode, the vertical distance over which the potential gradient occurs is shorter than when no internal electrode is disposed. As a result, even if electrons ionized from atoms or molecules of the thermal conduction gas are accelerated by the potential gradient, they are not sufficiently accelerated and do not have sufficient energy, thereby preventing arc discharge. Therefore, abnormal discharge in the passage can be prevented or reduced by a different principle from the conventional principle of shielding the influence of the electric field generated around the electrostatic electrode.

[0008] In this specification, "upper" and "lower" do not represent absolute positional relationships, but rather relative positional relationships. Therefore, depending on the orientation of the semiconductor manufacturing equipment component, "upper" and "lower" may become "lower" and "upper," "left" and "right," or "front" and "rear." Furthermore, examples of "passages" include gas passages and lift pin holes. Furthermore, when there is only one "internal electrode," that "internal electrode" is the "lowest internal electrode."

[0009] [2] In the semiconductor manufacturing equipment member of the present invention (the semiconductor manufacturing equipment member described in [1] above), the base plate may also serve as the bias electrode. This eliminates the need to provide a bias electrode separately from the base plate.

[0010] [3] In the semiconductor manufacturing equipment member of the present invention (the semiconductor manufacturing equipment member described in [1] above), the bias electrode may be built into the ceramic plate.

[0011] [4] In the semiconductor manufacturing equipment member of the present invention (the semiconductor manufacturing equipment member described in [3] above), the bias electrode may be provided below the lowermost internal electrode.

[0012] [5] In the semiconductor manufacturing equipment member of the present invention (the semiconductor manufacturing equipment member described in [3] above), the bias electrode may be provided at the same height as the lowermost internal electrode and may be provided around the lowermost internal electrode.

[0013] [6] In the semiconductor manufacturing equipment member of the present invention (the semiconductor manufacturing equipment member according to any one of [1] to [3] above), the at least one internal electrode may be a ring-shaped electrode surrounding the passage, or an electrode having the same shape as the electrostatic electrode and having a through-hole through which the passage passes. When the internal electrode is a ring-shaped electrode, the amount of electrode material used can be reduced. When the internal electrode has the same shape as the electrostatic electrode, the internal electrode has a relatively large area, which increases the design freedom of the wiring electrically connecting the internal electrode and the electrostatic electrode. Note that "the same shape" means that the sizes may be the same or different as long as the shapes (e.g., circular or rectangular) are the same.

[0014] [7] In the semiconductor manufacturing equipment member of the present invention (the semiconductor manufacturing equipment member according to any one of [1] to [4] above), the passage may be connected to a heat conduction gas supply source. In this case, atoms or molecules of the heat conduction gas are ionized in the internal space of the passage to generate electrons, and these electrons are likely to collide with other atoms or molecules, making it highly significant to apply the present invention.

[0015] [8] In the semiconductor manufacturing equipment member of the present invention (the semiconductor manufacturing equipment member according to any one of [1] to [5] above), the base plate may also serve as a source electrode to which a source voltage is applied when generating plasma above the wafer-mounting surface. This eliminates the need to provide a source electrode separate from the base plate.

[0016] A plan view of the wafer mounting table 10. A perspective view with a cross-sectional view of the wafer mounting table 10. A partial cross-sectional view of the wafer mounting table 10. A perspective view showing the positional relationship between the electrostatic electrode 22 and the first to fourth internal electrodes 31 to 34. A partial cross-sectional view of another embodiment. A partial cross-sectional view of another embodiment. A perspective view showing the positional relationship between the electrodes of another embodiment. A perspective view showing the positional relationship between the electrodes of another embodiment. A perspective view showing the positional relationship between the electrodes of another embodiment.

[0017] A preferred embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a plan view of a wafer mounting table 10, Fig. 2 is a perspective view with a cross-sectional view of the wafer mounting table 10, Fig. 3 is a partial cross-sectional view of the wafer mounting table 10, and Fig. 4 is a perspective view showing the positional relationship between the electrostatic electrode 22 and the first to fourth internal electrodes 31 to 34. Note that the seal band 21a and the small circular protrusions 21b are omitted from Figs. 2 and 3. Also, the first to fourth internal electrodes 31 to 34 are omitted from Fig. 2, and the electrode terminal 26, power supply member 58, and power supply member arrangement hole 54 are omitted from Fig. 3.

[0018] The wafer mounting table 10 is an example of a semiconductor manufacturing equipment component of the present invention, and as shown in FIG. 2, includes a ceramic plate 20, a base plate 50, a bonding layer 60, a power supply member placement hole 54, and a gas passage 24.

[0019] The ceramic plate 20 is a circular ceramic plate (e.g., 300 mm in diameter and 5 mm in thickness) made of alumina sintered body, aluminum nitride sintered body, or the like. The upper surface of the ceramic plate 20 serves as a wafer mounting surface 21. The ceramic plate 20 incorporates an electrostatic electrode 22. As shown in FIG. 1 , a seal band 21a is formed along the outer edge of the wafer mounting surface 21, and a plurality of small circular protrusions 21b are formed on the entire inner surface of the seal band 21a. The seal band 21a and the small circular protrusions 21b have the same height, e.g., several micrometers to several tens of micrometers. The electrostatic electrode 22 is a circular mesh flat electrode connected to a DC power supply 70 via a power supply member 58. When a DC voltage is applied to the electrostatic electrode 22, the wafer W is attracted and fixed to the wafer mounting surface 21 (specifically, the upper surfaces of the seal band 21a and the small circular protrusions 21b) by electrostatic attraction. When the DC voltage application is released, the wafer W is released from the wafer mounting surface 21.

[0020] 3 and 4, first to fourth internal electrodes 31 to 34 are provided inside the ceramic plate 20 in this order from top to bottom, with the fourth internal electrode 34 being located at the bottom. The first to fourth internal electrodes 31 to 34 are all provided below the electrostatic electrode 22. The first to fourth internal electrodes 31 to 34 are provided inside the ceramic plate 20 so as to surround the gas passage 24 and not to be exposed to the inner wall of the gas passage 24. The first to fourth internal electrodes 31 to 34 are circular mesh planar electrodes having the same shape as the electrostatic electrode 22 and approximately the same size as the electrostatic electrode 22. The electrostatic electrode 22 and the first internal electrode 31 are electrically connected by a first via 41 extending in the vertical direction, the first internal electrode 31 and the second internal electrode 32 are electrically connected by a second via 42 extending in the vertical direction, the second internal electrode 32 and the third internal electrode 33 are electrically connected by a third via 43 extending in the vertical direction, and the third internal electrode 33 and the fourth internal electrode 34 are electrically connected by a fourth via 44 extending in the vertical direction. Therefore, the first to fourth internal electrodes 31 to 34 have the same potential as the electrostatic electrode 22. When viewed in the vertical direction, the first to fourth vias 41 to 44 are not aligned in a straight line but are aligned with a shift. As shown in FIG. 3 , the distance D1 between the electrostatic electrode 22 and the first internal electrode 31, the distance D2 between the first internal electrode 31 and the second internal electrode 32, the distance D3 between the second internal electrode 32 and the third internal electrode 33, the distance D4 between the third internal electrode 33 and the fourth internal electrode 34, and the distance Db between the fourth internal electrode 34 and the lower surface of the ceramic plate 20 are preferably at least one time the distance d between the wafer mounting surface 21 and the electrostatic electrode 22.

[0021] The base plate 50 is a circular plate (e.g., a circular plate with the same diameter as or larger than the ceramic plate 20, 25 mm thick) with good electrical and thermal conductivity, and is electrically independent from the electrostatic electrode 22 and the first to fourth internal electrodes 31 to 34. A refrigerant flow path 52 through which a refrigerant circulates is provided within the base plate 50. The refrigerant flowing through the refrigerant flow path 52 is preferably a liquid, and is preferably electrically insulating. Examples of electrically insulating liquids include a fluorine-based inert liquid. As shown in FIG. 1 , the refrigerant flow path 52 is formed in a spiral shape in a plan view across the entire base plate 50 from one end (inlet 52 in) to the other end (outlet 52 out) in a single stroke. The inlet 52 in and outlet 52 out of the refrigerant flow path 52 are connected to a supply port and a recovery port of an external refrigerant device (not shown), respectively. The coolant supplied from the supply port of the external coolant device to the inlet 52in of the coolant flow path 52 passes through the coolant flow path 52, returns from the outlet 52out of the coolant flow path 52 to the recovery port of the external coolant device, and is then temperature-adjusted before being supplied again from the supply port to the inlet 52in of the coolant flow path 52. The base plate 50 is connected to a source power supply 72 and a bias power supply 74. The source power supply 72 generates a source RF power for generating plasma above the wafer mounting surface 21. The bias power supply 74 generates a bias RF power for attracting ions to the wafer W. The bias RF power has a lower frequency and a larger amplitude than the source RF power. The bias RF power may be a sine wave (alternating positive and negative signs) or a square wave (periodically appearing negative square signs), but a square wave is preferred for sharp etching. The frequency of the source RF power is, for example, several tens to several hundreds of megahertz, and the frequency of the bias RF power is, for example, several hundred kilohertz.

[0022] Examples of materials for the base plate 50 include metal materials and metal-ceramic composite materials. Metal materials include Al, Ti, Mo, and alloys thereof. Metal-ceramic composite materials include metal matrix composites (MMCs) and ceramic matrix composites (CMCs). Specific examples of such composite materials include materials containing Si, SiC, and Ti (also known as SiSiCTi), porous SiC materials impregnated with Al and / or Si, and composite materials of Al2O3 and TiC. It is preferable to select a material for the base plate 50 that has a thermal expansion coefficient close to that of the material for the ceramic plate 20.

[0023] The bonding layer 60 is a metal bonding layer that bonds the lower surface of the ceramic plate 20 to the upper surface of the base plate 50. The metal bonding layer may be, for example, a layer formed of solder or a metal brazing material. The metal bonding layer is formed, for example, by thermal compression bonding (TCB). TCB refers to a known method in which a metal bonding material is sandwiched between two components to be joined and the two components are pressure-bonded while heated to a temperature below the solidus temperature of the metal bonding material. The bonding layer 60 may also be a resin adhesive layer. Examples of materials for the resin adhesive layer include insulating resins such as epoxy resin, acrylic resin, and silicone resin, as well as insulating resins containing fillers.

[0024] As shown in FIG. 2 , the power supply member placement hole 54 is a generally cylindrical hole that vertically penetrates the base plate 50 and the bonding layer 60 without penetrating the coolant flow path 52. An insulating tube 56 is housed in the power supply member placement hole 54. The insulating tube 56 is fixed to the power supply member placement hole 54 with adhesive. An electrode terminal 26 electrically connected to the electrostatic electrode 22 is exposed at the top of the power supply member placement hole 54. A power supply member 58 is electrically connected to the electrode terminal 26. The power supply member 58 has an upper metal terminal 58a and a lower metal terminal 58b connected by a flexible metal wire 58c, and the upper metal terminal 58a is joined to the electrode terminal 26. The lower metal terminal 58b is exposed from the lower opening of the insulating tube 56 and is connected to a DC power source 70 for electrostatic chucking. The power supply member 58 may be a metal rod.

[0025] As shown in FIG. 2 , the gas passage 24 is a substantially cylindrical hole that vertically penetrates the base plate 50, the bonding layer 60, and the ceramic plate 20, but does not penetrate the coolant flow path 52. The gas passage 24 is connected to a He gas supply source 76. The gas passage 24 is provided so as to extend from the lower surface of the base plate 50 to the wafer mounting surface 21. An insulating tube 57 is housed in the portion of the gas passage 24 that penetrates the base plate 50 and the bonding layer 60. The insulating tube 57 is fixed to the gas passage 24 with adhesive. As shown in FIG. 3 , the gas passage 24 vertically penetrates the electrostatic electrode 22 and the first to fourth internal electrodes 31 to 34. Through holes 22 a, 31 a to 34 a with a diameter larger than the diameter of the gas passage 24 are provided in the portion of the electrostatic electrode 22 through which the gas passage 24 passes and in the portions of the first to fourth internal electrodes 31 to 34 through which the gas passage 24 passes. Therefore, the electrostatic electrode 22 and the first to fourth internal electrodes 31 to 34 are not exposed to the inner wall of the gas passage 24. The length L between the gas passage 24 and the through hole 22a of the electrostatic electrode 22 is preferably at least twice the distance d between the wafer mounting surface 21 and the electrostatic electrode 22. The length between the gas passage 24 and the through holes 31a to 34a of the first to fourth internal electrodes 31 to 34 is also preferably at least twice the distance d.

[0026] Next, a brief description will be given of a manufacturing method for the ceramic plate 20 of the wafer mounting table 10. The ceramic plate 20 can be obtained by, for example, preparing six molded sheets, processing each molded sheet, stacking them, hot-pressing them, and then performing shaping (such as drilling holes). For example, the first molded sheet from the top is used as is without processing. For the second molded sheet from the top, conductive paste is printed on the top surface to form the same shape as the electrostatic electrode 22, and a via filled with conductive paste is provided at the position of the first via 44. For the third to fifth molded sheets from the top, conductive paste is printed on the top surface to form the same shapes as the first to third internal electrodes 31 to 33, respectively, and vias filled with conductive paste are provided at the positions of the second to fourth vias 42 to 44. For the sixth molded sheet from the top, conductive paste is printed on the top surface to form the same shape as the fourth internal electrode 34. Each molded sheet can be produced by tape casting or mold casting. These six sheets are then stacked and hot-press fired, and then shaped (such as drilling holes). The gas passages 24 may be formed before or after the hot-press firing.

[0027] Next, an example of how the wafer mounting table 10 configured as described above is described. First, the wafer mounting table 10 is installed in a chamber (not shown), and a wafer W is placed on the wafer mounting surface 21. The chamber is then depressurized using a vacuum pump to a predetermined vacuum level, and a DC voltage is applied to the electrostatic electrode 22 of the ceramic plate 20 to generate an electrostatic attraction force, thereby attracting and fixing the wafer W to the wafer mounting surface 21. He gas is then supplied to the gas passage 24 from a He gas supply source 76. The He gas fills the space surrounded by the seal band 21a, the small circular protrusions 21b, and the wafer W. This improves thermal conduction between the wafer W and the wafer mounting surface 21. Next, a reactive gas atmosphere at a predetermined pressure (e.g., several tens to several hundreds of Pa) is created in the chamber, and in this state, a source voltage from a source power supply 72 and a bias voltage from a bias power supply 74 are applied to the base plate 50. As a result, plasma is generated between an upper electrode (not shown) provided on the ceiling of the chamber and the wafer mounting surface 21 of the wafer mounting table 10. The surface of the wafer W is processed by the generated plasma. A coolant is circulated through the coolant flow passages 52 of the base plate 50 as needed.

[0028] Here, in the internal space of the gas passage 24, a potential gradient from positive to negative in the vertical direction is generated due to the application of a DC voltage to the electrostatic electrode 22 and the application of a bias voltage to the base plate 50, which serves as a bias electrode. In this embodiment, first to fourth internal electrodes 31 to 34, which have the same potential as the electrostatic electrode 22, are provided inside the ceramic plate 20. Therefore, no vertical potential gradient is generated between the electrostatic electrode 22 and the fourth internal electrode 34 in the internal space of the gas passage 24. On the other hand, a potential gradient from positive to negative is generated between the fourth internal electrode 34 and the base plate 50, which serves as a bias electrode. However, the vertical length over which the potential gradient is generated is short, being approximately the same as the distance between the fourth internal electrode 34 and the base plate 50. Therefore, even if electrons generated as a result of the ionization of He atoms in the internal space of the gas passage 24 accelerate and collide with other He atoms, the electrons do not gain high energy because the acceleration distance is short, and therefore, abnormal discharge does not occur even if they collide with other He atoms.

[0029] In contrast, when the first to fourth internal electrodes 31 to 34 are not provided inside the ceramic plate 20, the vertical length over which a potential gradient occurs in the internal space of the gas passage 24 is longer than in this embodiment. Therefore, if electrons generated as a result of the ionization of He atoms in the internal space of the gas passage 24 accelerate and collide with other He atoms, the electrons will have high energy due to the long acceleration distance, and these electrons will collide with other He atoms, ionizing the He atoms and generating more electrons. This phenomenon is likely to occur repeatedly, making it more likely that abnormal discharge will occur.

[0030] In the wafer mounting table 10 described above, the first to fourth internal electrodes 31 to 34 electrically connected to the electrostatic electrode 22 are disposed inside the ceramic plate 20 below the electrostatic electrode 22, surrounding the gas passage 24 and not exposed to the inner wall of the gas passage 24. The electrostatic electrode 22 assumes a positive potential when a DC voltage is applied to attract the wafer W to the wafer mounting surface 21. The base plate 50, which serves as a bias electrode, periodically assumes a negative potential when a bias voltage is applied to attract ions in the plasma. Therefore, a potential gradient from positive to negative is generated vertically in the internal space of the gas passage 24. If a thermally conductive gas such as He gas is present in the gas passage 24, electrons ionized from He atoms are accelerated by the electric field and may collide with other unionized He atoms, ultimately resulting in an arc discharge. In this embodiment, the first to fourth internal electrodes 31 to 34 are disposed below the electrostatic electrode 22, thereby shortening the vertical distance over which the potential gradient is generated. As a result, even if electrons are generated by ionization of He atoms, they are not sufficiently accelerated by the potential gradient and do not have sufficient energy, so arc discharge can be avoided, thereby preventing or reducing the occurrence of abnormal discharge in the gas passage 24.

[0031] The base plate 50 also serves as a bias electrode, eliminating the need to provide a bias electrode separate from the base plate 50.

[0032] Furthermore, the first to fourth internal electrodes 31 to 34 have the same shape (circular planar electrodes) as the electrostatic electrode 22 and have a relatively large area, which increases the degree of freedom in designing the first to fourth vias 41 to 44. The size of the first to fourth internal electrodes 31 to 34 may be the same as, slightly larger than, or slightly smaller than the electrostatic electrode 22.

[0033] Furthermore, the gas passage 24 is connected to a He gas supply source 76. Therefore, in the internal space of the gas passage 24, He atoms are ionized to generate electrons, and these electrons are likely to collide with other He atoms, making the application of the present invention highly significant.

[0034] Furthermore, the base plate 50 also serves as a source electrode, so there is no need to provide a source electrode separately from the base plate 50.

[0035] Furthermore, the first to fourth vias 41 to 44 are not aligned in a straight line when viewed in the vertical direction, but are aligned in a shifted manner. This is more preferable than when the first to fourth vias 41 to 44 are aligned in a straight line in the vertical direction, because this reduces the risk of cracks occurring at the locations where the first to fourth vias 41 to 44 are provided due to the difference in thermal expansion between ceramic and metal when manufacturing the ceramic plate 20 by firing. That is, in this embodiment, since the first to fourth vias 41 to 44 are aligned in a shifted manner when viewed in the vertical direction, the difference in thermal expansion during firing is reduced, making it less likely that cracks will occur at the locations where the first to fourth vias 41 to 44 are provided.

[0036] It goes without saying that the present invention is not limited to the above-described embodiment, and can be embodied in various forms as long as they fall within the technical scope of the present invention.

[0037] In the above-described embodiment, the base plate 50 also serves as the bias electrode, but the bias electrode may be built into the ceramic plate 20 .

[0038] For example, FIG. 5 shows an example in which a bias electrode 35 is provided instead of the fourth internal electrode 34 of the above-described embodiment. In FIG. 5, the same components as those in the above-described embodiment are denoted by the same reference numerals. The bias electrode 35 is not electrically connected to the electrostatic electrode 22 or the first to third internal electrodes 31 to 33, but is connected to a bias power supply 74. A through-hole 35a with a diameter larger than the diameter of the gas passage 24 is provided in the bias electrode 35 at a portion through which the gas passage 24 passes. Therefore, the bias electrode 35 is not exposed to the inner wall of the gas passage 24. The length between the gas passage 24 and the through-hole 35a of the bias electrode 35 is preferably at least twice the distance d between the wafer mounting surface 21 and the electrostatic electrode 22. The distance between the bias electrode 35 and the lower surface of the ceramic plate 20 is preferably at least one time the distance d. In the case of FIG. 5, because the first to third internal electrodes 31 to 33, which have the same potential as the electrostatic electrode 22, are provided below the electrostatic electrode 22, the vertical distance over which a potential gradient occurs is shorter than when the first to third internal electrodes 31 to 33 are not provided. Therefore, the occurrence of abnormal discharge in the gas passage 24 can be prevented or reduced.

[0039] 6 and 7 show an example in which a ring-shaped fourth internal electrode 134 is used instead of the fourth internal electrode 34 of the above-described embodiment, and a bias electrode 135 is embedded in the ceramic plate 20 to surround the fourth internal electrode 134. In FIGS. 6 and 7, the same components as those in the above-described embodiment are denoted by the same reference numerals. The fourth internal electrode 134 is disposed so as to surround the gas passage 24. A through-hole 134a with a diameter larger than the diameter of the gas passage 24 is provided in the fourth internal electrode 134 at a portion through which the gas passage 24 passes. Therefore, the fourth internal electrode 134 is not exposed to the inner wall of the gas passage 24. The fourth internal electrode 134 is electrically connected to the third internal electrode 33 via a via 144. Therefore, the fourth internal electrode 134 has the same potential as the electrostatic electrode 22. The bias electrode 135 is disposed on the same plane as the fourth internal electrode 134, is not electrically connected to the electrostatic electrode 22 or the first to fourth internal electrodes 31 to 33, 134, and is connected to the bias power supply 74. The bias electrode 135 has a through hole 135a spaced apart from the fourth internal electrode 134. The distance between the third internal electrode 33 and the fourth internal electrode 134 (or the bias electrode 135) is preferably at least one time the distance d between the wafer mounting surface 21 and the electrostatic electrode 22. The length between the gas passage 24 and the through hole 134a of the fourth internal electrode 134 and the distance between the outer edge of the fourth internal electrode 134 and the inner edge of the through hole 135a are preferably at least twice the distance d. In the cases of FIGS. 6 and 7 , the first to fourth internal electrodes 31 to 33, 134, which have the same potential as the electrostatic electrode 22, are provided below the electrostatic electrode 22, so the vertical distance over which a potential gradient occurs is shorter than in the case where the first to fourth internal electrodes 31 to 33, 134 are not present. This makes it possible to prevent or reduce the occurrence of abnormal discharge in the gas passage 24.

[0040] When the bias electrode is built into the ceramic plate 20, an external bias electrode electrically independent from the bias electrode may be provided around the outer periphery of the bias electrode. FIG. 8 shows an example in which an external bias electrode 136 is provided around the outer periphery of the bias electrode 135 shown in FIG. 7. In FIG. 8, the same components as in FIG. 7 are denoted by the same reference numerals. Also, in FIG. 8, the electrostatic electrode 22 and the first and second internal electrodes 31 and 32 are omitted. The external bias electrode 136 is a ring-shaped electrode provided on the same plane as the circular bias electrode 135 and is not electrically connected to the electrostatic electrode 22, the first to fourth internal electrodes 31 to 33 and 134, or the bias electrode 135. The distance between the inner edge of the external bias electrode 136 and the outer edge of the bias electrode 135 is preferably at least twice the distance d. In FIG. 8, different bias voltages can be applied to the bias electrode 135 and the external bias electrode 136, respectively. This allows for different ion attraction between the center and outer periphery of the wafer W. When the focus ring is placed on a step provided along the outer periphery of the ceramic plate 20, the degree of ion attraction between the focus ring and the wafer W can be changed.

[0041] In the above-described embodiment, the first to fourth internal electrodes 31 to 34 have the same shape as the electrostatic electrode 22. However, the first to fourth internal electrodes 31 to 34 may be ring-shaped electrodes surrounding the gas passage 24. FIG. 9 shows an example of this. In FIG. 9, the same components as those in the above-described embodiment are denoted by the same reference numerals. The first internal electrodes 31 are ring-shaped electrodes, and the number of the first internal electrodes 31 corresponds to the number of the gas passages 24 (see FIG. 1) formed on the same plane. All of the first internal electrodes 31 are electrically connected by wiring 31b, and one of the first internal electrodes 31 is connected to the electrostatic electrode 22 via a first via 41. The second internal electrodes 32 are ring-shaped electrodes, and the number of the second internal electrodes 32 corresponds to the number of the gas passages 24 formed on the same plane. All of the second internal electrodes 32 are electrically connected by wiring 32b, and one of the second internal electrodes 32 is connected to the first internal electrode 31 via a second via 42. The third internal electrodes 33 are ring-shaped electrodes, and the number of the third internal electrodes 33 corresponds to the number of the gas passages 24 formed on the same plane. All of the third internal electrodes 33 are electrically connected by wiring 33b, and one of the third internal electrodes 33 is connected to the second internal electrode 32 via a third via 43. The fourth internal electrodes 34 are ring-shaped electrodes, and the number of fourth internal electrodes 34 corresponds to the number of gas passages 24. All of the fourth internal electrodes 34 are electrically connected by wiring 34b, and one of the fourth internal electrodes 34 is connected to the third internal electrode 33 via a fourth via 44. Therefore, all of the first to fourth internal electrodes 31 to 34 have the same potential as the electrostatic electrode 22. This configuration also achieves the same effect as the above-described embodiment. Note that the first via 41 may be provided on the wiring 31b instead of on the first internal electrode 31. This also applies to the second to fourth vias 42 to 44. Furthermore, the wiring 31b may be omitted, and the first via 41 may be provided in each of the first internal electrodes 31. This also applies to the second to fourth vias 42 to 44. Also, some of the first to fourth internal electrodes 31 to 34 may be ring-shaped electrodes, and the rest may be electrodes having the same shape as the electrostatic electrode 22 .

[0042] In the above-described embodiment, the first to fourth internal electrodes 31 to 34 are provided inside the ceramic plate 20, but the number of internal electrodes may be at least 1. For example, only the fourth internal electrode 34 may be provided inside the ceramic plate 20.

[0043] In the above-described embodiment, the electrostatic electrode 22 is built into the ceramic plate 20, but this is not particularly limited. For example, in addition to the electrostatic electrode 22, a heater electrode (resistance heating element) may be built into the ceramic plate 20.

[0044] In the above-described embodiment, a porous plug (a plug that allows gas to flow in the vertical direction) may be provided in a portion of the gas passage 24 where a potential distribution occurs. Furthermore, instead of a porous plug, a dense plug having a zigzag or spiral passage (a passage that allows gas to flow in the vertical direction) may be used. This makes it easier to prevent abnormal discharge from occurring in the portion where a potential distribution occurs.

[0045] In the above-described embodiment, three gas passages 24 are provided, but the number of gas passages 24 is not particularly limited thereto and may be any number. Furthermore, although the gas passages 24 are described as passages that vertically penetrate the wafer mounting table 10, the number of gas passages 24 is not particularly limited thereto. For example, a gas channel structure may be employed instead of the gas passages 24. The gas channel structure may include a ring-shaped passage provided inside the base plate 50 and concentric with the base plate 50 in a plan view, a gas introduction passage that introduces gas from the underside of the base plate 50 into the ring-shaped passage, and multiple gas distribution passages that extend upward from the ring-shaped passage and open to the wafer mounting surface 21. The number of gas introduction passages may be fewer than the number of gas distribution passages, for example, one. Such a gas channel structure also corresponds to the "passage" of the present invention.

[0046] In the above-described embodiment, lift pin holes may be provided separately from the gas passages 24. The lift pin holes are holes that penetrate the wafer mounting table 10 in the vertical direction and allow the insertion of lift pins that move the wafer W up and down relative to the wafer mounting surface 21. When the wafer W is supported by, for example, three lift pins, three lift pin holes are provided. The configuration of the lift pin holes and their surroundings is similar to the configuration of the gas passages 24 and their surroundings. The lift pin holes are provided so as to extend from the underside of the ceramic plate 20 to the wafer mounting surface 21. Therefore, He gas also enters the lift pin holes, but, like the gas passages 24, the occurrence of abnormal discharge in the lift pin holes can be prevented or reduced. Such lift pin holes also correspond to the "passages" of the present invention.

[0047] In the above-described embodiment, the DC power supply 70 is connected to the electrostatic electrode 22, but instead the DC power supply 70 may be connected to any one of the first to fourth internal electrodes 31 to 34.

[0048] The semiconductor manufacturing equipment member of the present invention can be used, for example, in the field of processing wafers with plasma or the like.

[0049] 10 wafer mounting table, 20 ceramic plate, 21 wafer mounting surface, 21a seal band, 21b small circular protrusion, 22 electrostatic electrode, 22a through hole, 24 gas passage, 26 electrode terminal, 31 to 34 first to fourth internal electrodes, 31a to 34a through hole, 31b to 34b wiring, 35 bias electrode, 35a through hole, 41 to 44 first to fourth vias, 50 base plate, 52 coolant flow path, 52in inlet, 52out outlet, 54 power supply member placement hole, 56, 57 insulating tube, 58 power supply member, 58a upper metal terminal, 58b lower metal terminal, 58c metal wire, 60 bonding layer, 70 DC power supply, 72 source power supply, 74 bias power supply, 76 He gas supply source, 134 fourth internal electrode, 134a Through hole, 135 Bias electrode, 135a Through hole, 136 Outer bias electrode, 144 Fourth via.

Claims

1. A component for semiconductor manufacturing equipment comprising: a ceramic plate having a wafer mounting surface on its upper surface and incorporating an electrostatic electrode; a base plate provided on the underside of the ceramic plate and incorporating a coolant flow path; a passage provided from the underside of the base plate to the wafer mounting surface of the ceramic plate; at least one internal electrode provided inside the ceramic plate located below the electrostatic electrode and surrounding the passage so as not to be exposed to the inner wall of the passage, the internal electrode being electrically connected to the electrostatic electrode; and a bias electrode provided at the same height as or lower than the lowest internal electrode of the at least one internal electrode, electrically independent of the electrostatic electrode, the bias voltage being applied when plasma is generated above the wafer mounting surface.

2. The semiconductor manufacturing equipment member according to claim 1, wherein the base plate also serves as the bias electrode.

3. The semiconductor manufacturing equipment member according to claim 1, wherein the bias electrode is built into the ceramic plate.

4. The semiconductor manufacturing equipment member according to claim 3, wherein the bias electrode is provided below the lowermost internal electrode.

5. The semiconductor manufacturing equipment member according to claim 3, wherein the bias electrode is provided at the same height as the lowermost internal electrode and is provided around the lowermost internal electrode.

6. A semiconductor manufacturing equipment member according to any one of claims 1 to 3, wherein the at least one internal electrode is a ring-shaped electrode surrounding the passage, or an electrode having the same shape as the electrostatic electrode and having a through hole through which the passage passes.

7. The semiconductor manufacturing equipment member according to any one of claims 1 to 3, wherein the passage is connected to a source of heat transfer gas.

8. A member for semiconductor manufacturing equipment according to any one of claims 1 to 3, wherein the base plate also serves as a source electrode to which a source voltage is applied when generating plasma above the wafer mounting surface.

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