Semiconductor device
The semiconductor device integrates a light-emitting element and a semiconductor element to switch states based on light reception, addressing the need for miniaturized high-frequency devices by reducing parasitic inductance and capacitance.
Patent Information
- Application Number
- PCT/JP2024/038964
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-24
- Filing Date
- 2024-10-31
- Publication Date
- 2025-05-30
AI Technical Summary
There is a demand for semiconductor devices that can operate at high frequencies while being miniaturized, as the increasing data communication speeds require improved high-frequency characteristics.
A semiconductor device is designed with a light-emitting element, a semiconductor element with electrodes on its surface, and a support member that flip-chip mounts the semiconductor element. The semiconductor element receives light from the light-emitting element and switches between conductive and cutoff states based on the light reception, eliminating the need for separate wires and reducing parasitic inductance.
This configuration allows for a small semiconductor device with enhanced high-frequency characteristics, achieved by reducing parasitic inductance and capacitance, which improves signal transmission efficiency at high frequencies.
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Figure JP2024038964_30052025_PF_FP_ABST
Abstract
Description
Semiconductor Devices
[0001] The present disclosure relates to semiconductor devices.
[0002] In recent years, data communication speeds have been increasing. For example, the sixth generation (GDDR6) of GDDR (Graphics Double Data Rate), a standard for graphics memory, provides a data communication speed of 16 Gbps. Since the clock frequency is half the data communication speed, GDDR6-compliant memories operate at a clock frequency of 8 GHz. As data communication speeds increase, semiconductor devices are required to have improved high-frequency characteristics. Patent Documents 1 to 3 describe the development of semiconductor devices used for transmitting high-frequency signals.
[0003] JP 2000-340830 A JP 10-74793 A JP 2023-78547 A
[0004] Semiconductor devices are required to have not only improved high frequency characteristics but also smaller sizes.
[0005] The present disclosure provides a compact semiconductor device with improved high frequency characteristics.
[0006] A semiconductor device according to one aspect of the present disclosure comprises a light-emitting element, a semiconductor element having a first main surface, a second main surface opposite the first main surface, and a plurality of electrodes provided on the first main surface, and a support member that supports the semiconductor element that is flip-chip mounted by bonding the plurality of electrodes, wherein the plurality of electrodes include a first electrode and a second electrode that are spaced apart from each other, and the semiconductor element switches between a conductive state and a blocked state between the first electrode and the second electrode upon receiving incident light emitted from the light-emitting element and incident on the second main surface.
[0007] According to the present disclosure, it is possible to provide a small-sized semiconductor device with improved high-frequency characteristics.
[0008] FIG. 1 is a perspective view of a semiconductor device according to an embodiment. FIG. 2 is a cross-sectional view of the semiconductor device according to an embodiment. FIG. 3 is a cross-sectional view for explaining a switching operation of a semiconductor element included in the semiconductor device according to the embodiment. FIG. 4 is an energy band diagram of a light-emitting element and a semiconductor element included in the semiconductor device according to the embodiment. FIG. 5 is a diagram showing an input-output equivalent circuit for simulating high-frequency characteristics. FIG. 6A is a diagram showing a relationship between input-output capacitance and frequency characteristics of insertion loss. FIG. 6B is a diagram showing a relationship between output-side parasitic inductance and frequency characteristics of insertion loss. FIG. 7 is a diagram showing a relationship between a thickness of a substrate layer of a semiconductor element according to an embodiment and input-output capacitance. FIG. 8 is a cross-sectional view of a semiconductor device according to a first modification of the embodiment. FIG. 9 is a cross-sectional view of a semiconductor device according to a second modification of the embodiment. FIG. 10 is a diagram showing a relationship between a size of a light-emitting element and capacitance between input and output. FIG. 11A is a cross-sectional view of a semiconductor device according to a third modification of the embodiment. FIG. 11B is a cross-sectional view of a semiconductor device according to a fourth modification of the embodiment. FIG. 12A is a cross-sectional view of a semiconductor device according to a fifth modification of the embodiment. FIG. 12B is a cross-sectional view of a semiconductor device according to a sixth modification of the embodiment. FIG. 12C is a cross-sectional view of a semiconductor device according to a seventh modification of the embodiment. 12D and 12E are cross-sectional views of a semiconductor device according to Modification 8 and Modification 9 of the embodiment, respectively.
[0009] (Summary of the Present Disclosure) A semiconductor device according to a first aspect of the present disclosure includes a light-emitting element, a semiconductor element having a first main surface, a second main surface opposite the first main surface, and a plurality of electrodes provided on the first main surface, and a support member that supports the semiconductor element that is flip-chip mounted by bonding the plurality of electrodes, wherein the plurality of electrodes include a first electrode and a second electrode that are provided spaced apart from each other, and the semiconductor element switches between a conductive state and a blocked state between the first electrode and the second electrode upon receiving incident light that is emitted from the light-emitting element and enters through the second main surface.
[0010] In this way, the semiconductor element receives light and switches between a conductive state and a cut-off state. That is, in the semiconductor device according to this aspect, the light-receiving element and the switching element are integrated into a single semiconductor element. Therefore, wires connecting the light-receiving element and the switching element are not required. Furthermore, since the semiconductor element is flip-chip mounted on the support member, wires are not required to connect the semiconductor element to the support member. Therefore, parasitic inductance caused by wires can be reduced, and high-frequency characteristics can be improved. Furthermore, miniaturization can be achieved by reducing the number of elements (number of chips). Thus, according to this aspect, a compact semiconductor device with improved high-frequency characteristics can be realized.
[0011] A semiconductor device according to a second aspect of the present disclosure is the semiconductor device according to the first aspect, wherein the semiconductor element includes a first semiconductor layer and a second semiconductor layer stacked on the second main surface side of the first semiconductor layer, the second semiconductor layer having a larger band gap than the first semiconductor layer, and the first semiconductor layer generates charges by light of the incident light that is transmitted through the second semiconductor layer.
[0012] In this way, by operating the first semiconductor layer as a photoelectric conversion layer and as a conduction path, it is possible to realize light reception and switching with a single semiconductor element with a small and simple configuration. By miniaturizing the semiconductor element, it is possible to realize a miniaturized semiconductor device.
[0013] A semiconductor device according to a third aspect of the present disclosure is the semiconductor device according to the second aspect, wherein the first main surface is a main surface of the first semiconductor layer.
[0014] This allows the first electrode and the second electrode to be provided in contact with the first semiconductor layer. Since no other layers are interposed between the first semiconductor layer and the first and second electrodes, parasitic resistance, parasitic inductance, parasitic capacitance, etc., caused by the other layers can be suppressed. Therefore, the high-frequency characteristics of the semiconductor device can be improved.
[0015] A semiconductor device according to a fourth aspect of the present disclosure is the semiconductor device according to the second or third aspect, wherein the light-emitting element is provided on the second main surface.
[0016] This allows the light emitting element and the semiconductor element to be arranged in an overlapping manner, thereby reducing the area of the support member and thus enabling the miniaturization of the semiconductor device. Furthermore, since light from the light emitting element can be efficiently incident on the semiconductor element, the energy efficiency of the semiconductor device can be improved.
[0017] A semiconductor device according to a fifth aspect of the present disclosure is the semiconductor device according to the fourth aspect, wherein the second semiconductor layer is thicker than the first semiconductor layer.
[0018] This allows the distance between the input-side light-emitting element and the output-side first semiconductor layer to be increased, thereby reducing the parasitic capacitance between the input and output, thereby improving the high-frequency characteristics of the semiconductor device.
[0019] A semiconductor device according to a sixth aspect of the present disclosure is the semiconductor device according to the fourth or fifth aspect, wherein the second semiconductor layer has a thickness of 240 μm or more.
[0020] This makes it possible to sufficiently reduce the parasitic capacitance between the input and output, thereby further improving the high frequency characteristics of the semiconductor device.
[0021] A semiconductor device according to a seventh aspect of the present disclosure is the semiconductor device according to any one of the fourth to sixth aspects, wherein the capacitance between the light-emitting element and the first semiconductor layer is 0.1 pF or less.
[0022] This makes it possible to sufficiently reduce the parasitic capacitance between the input and output, thereby further improving the high frequency characteristics of the semiconductor device.
[0023] A semiconductor device according to an eighth aspect of the present disclosure is a semiconductor device according to any one of the fourth to seventh aspects, comprising an intermediate layer provided between the light-emitting element and the second semiconductor layer, the intermediate layer being translucent to light emitted by the light-emitting element.
[0024] This allows the distance between the light-emitting element on the input side and the first semiconductor layer on the output side to be increased, thereby reducing the parasitic capacitance between the input and output. This improves the high-frequency characteristics of the semiconductor device. The intermediate layer can also have one or more functions. For example, by using the intermediate layer as an adhesive layer, the mechanical connection strength between the light-emitting element and the semiconductor element can be increased. Furthermore, since the positional relationship between the light-emitting element and the semiconductor element can be fixed, light from the light-emitting element can be efficiently incident on the semiconductor element.
[0025] A semiconductor device according to a ninth aspect of the present disclosure is the semiconductor device according to the eighth aspect, wherein the intermediate layer collects or diffuses light emitted by the light-emitting element.
[0026] As a result, for example, when the intermediate layer diffuses light from the light-emitting element, the light-emitting element can be made smaller. By miniaturizing the light-emitting element, the area component of the parasitic capacitance can be reduced, thereby reducing the parasitic capacitance between the input and output. Since electron-hole pairs can be generated over a wide area of the first semiconductor layer, the concentration of electrons and holes can be increased, and the resistance in the conductive state (on-resistance) can be reduced. Furthermore, for example, when the intermediate layer collects light from the light-emitting element, the light can be efficiently collected in a desired region of the first semiconductor layer. Therefore, more electron-hole pairs can be generated in a desired region of the first semiconductor layer, thereby reducing the resistance in that region.
[0027] A semiconductor device according to a tenth aspect of the present disclosure is a semiconductor device according to the ninth aspect, wherein the first semiconductor layer includes a first region located between the first electrode and the second electrode in a planar view of the first main surface, and the intermediate layer concentrates light emitted by the light-emitting element into the first region.
[0028] This makes it possible to reduce the sheet resistance of the first semiconductor layer, thereby reducing loss due to the resistance component of the semiconductor element.
[0029] A semiconductor device according to an eleventh aspect of the present disclosure is a semiconductor device according to the ninth aspect, wherein the first semiconductor layer includes a second region that overlaps the first electrode or the second electrode in a planar view of the first main surface, and the intermediate layer concentrates light emitted by the light-emitting element into the second region.
[0030] This makes it possible to reduce the contact resistance between the first semiconductor layer and the first electrode or the second electrode, thereby reducing loss due to the contact resistance.
[0031] A semiconductor device according to a twelfth aspect of the present disclosure is a semiconductor device according to any one of the first to eleventh aspects, wherein the light-emitting element is mounted on the support member, and the semiconductor device includes a reflective member that reflects light emitted from the light-emitting element toward the second main surface.
[0032] This eliminates the need for wires for electrical connection to the light-emitting element on the input side, further reducing parasitic inductance caused by wires and further improving high-frequency characteristics.
[0033] A semiconductor device according to a thirteenth aspect of the present disclosure is a semiconductor device according to any one of the first to twelfth aspects, and includes a resin member that seals the light-emitting element, the semiconductor element, and at least a portion of the support member.
[0034] This makes it possible to protect the light emitting element and the semiconductor element.
[0035] A semiconductor device according to a fourteenth aspect of the present disclosure is the semiconductor device according to any one of the first to thirteenth aspects, wherein the support member is a substrate or a metal frame.
[0036] In this way, the specific configuration of the support member is not particularly limited, and a member that meets the specifications required for the semiconductor device can be selected as the support member.
[0037] Hereinafter, the embodiments will be specifically described with reference to the drawings.
[0038] The embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, component placement and connection configurations, steps, and step order shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, among the components in the following embodiments, components not described in the independent claims are described as optional components.
[0039] Furthermore, each figure is a schematic diagram and is not necessarily an exact illustration. Therefore, for example, the scales of the figures do not necessarily match. Furthermore, in each figure, substantially the same components are given the same reference numerals, and redundant explanations are omitted or simplified.
[0040] Furthermore, in this specification, terms indicating the relationship between elements, terms indicating the shape of elements, and numerical values are not expressions that express only strict meanings, but are expressions that also include a range of substantial equivalence, for example, a difference of a few percent.
[0041] Furthermore, in this specification, the terms "above" and "below" do not refer to the upward direction (vertically upward) and downward direction (vertically downward) in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. Furthermore, the terms "above" and "below" are applied not only to a case where two components are arranged with a gap between them and another component exists between the two components, but also to a case where two components are arranged closely together and the two components are in contact with each other.
[0042] Furthermore, in this specification, ordinal numbers such as "first" and "second" do not refer to the number or order of components unless otherwise specified, but are used for the purpose of avoiding confusion and distinguishing between components of the same type.
[0043] (Embodiment) [Configuration] First, the configuration of a semiconductor device according to an embodiment will be described with reference to Figures 1 and 2. Figures 1 and 2 are a perspective view and a cross-sectional view, respectively, of a semiconductor device 1 according to this embodiment. Figure 2 shows a cross section taken along line II-II in Figure 1. Also, in Figure 1, the bumps 40a and 40b and the electrodes 23a and 23b are omitted. Also, in Figure 2, the cross-section of the channel layer 24 and substrate layer 25 of the semiconductor element 20 is omitted from the hatching. This also applies to other cross-sectional views described later.
[0044] The semiconductor device 1 according to this embodiment is a semiconductor relay that relays an input signal and outputs it to a predetermined circuit. Specifically, the semiconductor device 1 is an optically coupled semiconductor relay. A semiconductor relay is also called an SSR (Solid-State Relay).
[0045] 1 and 2, the semiconductor device 1 includes a light emitting element 10, a semiconductor element 20, a substrate 30, and a resin member 50. Note that the resin member 50 does not necessarily have to be provided.
[0046] The light-emitting element 10 is an element that emits light. Specifically, the light-emitting element 10 is an LED (Light Emitting Diode) element. The light emitted by the light-emitting element 10 may be ultraviolet light or visible light. The light-emitting element 10 may also be an organic EL (Electroluminescence) element or a semiconductor laser element.
[0047] As shown in Fig. 1, the light-emitting element 10 has electrodes 11a and 11b. The electrodes 11a and 11b are provided on the surface of the light-emitting element 10 opposite to the light-emitting surface. A wire 44a is connected to the electrode 11a, and is electrically connected to a terminal 41c of the substrate 30. A wire 44b is connected to the electrode 11b, and is electrically connected to a terminal 41d of the substrate 30. An input signal is input to the light-emitting element 10 via the electrodes 11a and 11b. The light-emitting element 10 emits light in response to the input signal.
[0048] In the present embodiment, the light emitting element 10 is provided on the main surface 22 of the semiconductor element 20. Specifically, the light emitting element 10 is provided in contact with the main surface 22 and emits light toward the main surface 22. The light emitted from the light emitting element 10 to the main surface 22 is propagated within the semiconductor element 20 as incident light L incident from the main surface 22, as shown in FIG.
[0049] As shown in FIG. 2 , the semiconductor element 20 has main surfaces 21 and 22 and a plurality of electrodes provided on the main surface 21. The plurality of electrodes include electrodes 23a and 23b provided at a distance from each other. In response to incident light L, the semiconductor element 20 switches between a conductive state (ON) and a cut-off state (OFF) between the electrodes 23a and 23b. Specifically, the semiconductor element 20 enters a conductive state when it receives incident light L and enters a cut-off state when it does not receive incident light L. In other words, the semiconductor element 20 is a switching element controlled by the incident light L. Note that the semiconductor element 20 may be an element that enters a cut-off state when it receives incident light L and enters a conductive state when it does not receive incident light L.
[0050] The main surface 21 is an example of a first main surface and faces the substrate 30. The main surface 22 is an example of a second main surface opposite the first main surface. The electrodes 23a and 23b are examples of a first electrode and a second electrode, respectively. The electrodes 23a and 23b are formed using a conductive material such as a metal. The metal used for the electrodes 23a and 23b is, for example, copper, silver, etc., but is not particularly limited thereto.
[0051] In this embodiment, the semiconductor device 20 includes a channel layer 24 and a substrate layer 25 .
[0052] The channel layer 24 is an example of a first semiconductor layer, and serves as a path through which charges (current) flow when the semiconductor element 20 is in a conductive state. The specific function and operation of the channel layer 24 will be described later.
[0053] In this embodiment, the main surface of the channel layer 24 is the main surface 21 of the semiconductor element 20. That is, the electrodes 23a and 23b provided on the main surface 21 are in contact with the channel layer 24. Note that the main surface 21 does not have to be the main surface of the channel layer 24, and may be interposed between the channel layer 24 and the electrodes 23a and 23b.
[0054] The channel layer 24 is, for example, a GaN layer, but is not limited to this. The channel layer 24 may be formed using other nitride semiconductors such as InGaN or AlGaN, or other semiconductors such as GaAs, InGaAs, or SiC. The channel layer 24 is formed using a film formation method such as epitaxial growth on the substrate layer 25.
[0055] The substrate layer 25 is an example of a second semiconductor layer stacked on the first semiconductor layer. The substrate layer 25 is stacked on the major surface 22 side of the channel layer 24 (specifically, on the upper surface of the channel layer 24). The substrate layer 25 has a larger band gap than the channel layer 24.
[0056] Furthermore, the substrate layer 25 is thicker than the channel layer 24. For example, the thickness of the channel layer 24 is 1 nm or more and 100 μm or less, e.g., 10 μm. In contrast, the thickness of the substrate layer 25 is 10 μm or more and 1000 μm or less. The thick substrate layer 25 can improve the high-frequency characteristics of the semiconductor device 1. Details will be described later.
[0057] The substrate layer 25 is made of, for example, but not limited to, sapphire, but may also be made of AlGaN, SiC, or the like.
[0058] The substrate layer 25 has a single-layer structure and a uniform refractive index inside, which can suppress refraction and scattering of the incident light L and allow the incident light L to propagate efficiently to the channel layer 24. The substrate layer 25 may have a multi-layer structure.
[0059] The substrate 30 is an example of a support member that supports the semiconductor element 20. The substrate 30 is a ceramic substrate, a glass epoxy substrate, or the like, but is not limited to these.
[0060] As shown in FIGS. 1 and 2 , conductive terminals 41 a, 41 b, 41 c, and 41 d are provided on the mounting surface (top surface, the main surface on the semiconductor element 20 side) of the substrate 30. External terminals 43 a, 43 b, and 43 c are provided on the back surface (bottom surface, the main surface opposite the mounting surface) of the substrate 30. The external terminals 43 a, 43 b, and 43 c correspond to the terminals 41 a, 41 b, and 41 c, respectively, and are electrically connected to each other via vias that penetrate the substrate 30. Specifically, as shown in FIG. 2 , the external terminal 43 a is connected to the terminal 41 a via 42 a. The external terminal 43 b is connected to the terminal 41 b via 42 b. Although not shown in FIGS. 1 and 2 , the external terminal 43 c is connected to the terminal 41 c via a via 42 c (not shown). An external terminal 43d (not shown) corresponding to the terminal 41d is provided on the back surface of the substrate 30, and the external terminal 43d is connected to the terminal 41d through a via 42d (not shown). The vias 42c and 42d and the external terminal 43d have the same configuration as that shown in Fig. 12E, which will be described later.
[0061] The semiconductor element 20 is flip-chip mounted on the substrate 30 by bonding the electrodes 23a and 23b. Specifically, the electrode 23a and the terminal 41a are electrically and mechanically connected via the bump 40a. The electrode 23b and the terminal 41b are electrically and mechanically connected via the bump 40b.
[0062] The terminals, vias, and external terminals, as well as the bumps and wires provided on the substrate 30, are each formed using a conductive material such as a metal. The metal used for the terminals, vias, and external terminals, as well as the bumps and wires, is, for example, copper, silver, gold, or the like, but is not particularly limited.
[0063] The external terminals 43a and 43b are output terminals of the semiconductor device 1. The external terminals 43c and 43d are input terminals of the semiconductor device 1. An input signal is input to the external terminals 43c and 43d, and an output signal corresponding to the input signal is output from the external terminals 43a and 43b.
[0064] The resin member 50 seals the light emitting element 10, the semiconductor element 20, and at least a part of the substrate 30. The resin member 50 is provided to protect the light emitting element 10 and the semiconductor element 20. The resin member 50 can be made of a resin generally used for molding semiconductor elements.
[0065] [Operation] Next, the operation of the semiconductor device 1 according to this embodiment will be described with reference to FIGS.
[0066] Fig. 3 is a cross-sectional view for explaining the switching operation of the semiconductor element 20 included in the semiconductor device 1 according to the present embodiment. Fig. 4 is an energy band diagram of the light-emitting element 10 and the semiconductor element 20 included in the semiconductor device 1 according to the present embodiment.
[0067] The semiconductor device 1 according to this embodiment relays an input signal and outputs it to a predetermined circuit. Specifically, the input signal input to the external terminals 43c and 43d is supplied to the light emitting element 10, and the light emitting element 10 emits light in response to the input signal. Specifically, as shown in FIG. 4, when an input signal is supplied to the light emitting element 10, the conduction band E C Electrons in the valence band E V The light generated by this recombination is incident on the main surface 22 of the semiconductor element 20, passes through the substrate layer 25, and reaches the channel layer 24.
[0068] Upon receiving light from the light-emitting element 10 as incident light L, the semiconductor element 20 establishes a conductive state between the electrodes 23a and 23b. Specifically, as shown in FIG. 3 , the channel layer 24 generates charges due to the light L incident from the main surface 22 that has passed through the substrate layer 25. More specifically, as shown in FIG. 4 , the channel layer 24 generates electron-hole pairs upon receiving the incident light L. In this embodiment, a predetermined bias voltage is applied between the electrodes 23a and 23b, and the electrons and holes generated in the channel layer 24 flow in opposite directions. For example, in the example shown in FIG. 3 , the holes flow toward the electrode 23b, and the electrons flow toward the electrode 23a. This allows current to flow from the electrode 23a to the electrode 23b. In other words, the electrodes 23a and 23b of the semiconductor element 20 are established in a conductive state. Note that the configuration of the semiconductor element 20 is not particularly limited as long as the conductive and non-conductive states between the electrodes 23a and 23b can be switched based on the incident light L.
[0069] The output signals output from the electrodes 23a and 23b of the semiconductor element 20 in a conductive state are output via the external terminals 43a and 43b. In this way, the semiconductor device 1 can relay and output the input signals.
[0070] 4 , the band gap of the substrate layer 25 is larger than the band gap of the channel layer 24. Therefore, the energy of the incident light L is insufficient in the substrate layer 25, and electron-hole pairs are not generated in the substrate layer 25. The light generated in the light-emitting element 10 is efficiently used to generate electron-hole pairs in the channel layer 24.
[0071] When no input signal is input, the light-emitting element 10 does not emit light. As a result, no electron-hole pairs are generated in the channel layer 24, and no electrical continuity is established between the electrodes 23a and 23b. In other words, the semiconductor element 20 is in a cutoff state.
[0072] As described above, in the semiconductor device 1 according to this embodiment, the light-emitting element 10 emits light in response to an input signal, and the semiconductor element 20 enters a conductive state in response to the light from the light-emitting element 10. Since the conductive state and the cut-off state of the semiconductor element 20 are switched depending on the presence or absence of an input signal, the semiconductor device 1 can operate as a semiconductor relay. Since the semiconductor element 20 has the functions of both a light-receiving element and a switching element, the semiconductor device 1 can be made smaller than when these elements are provided separately.
[0073] [Advantages Regarding High-Frequency Characteristics] Next, advantages regarding high-frequency characteristics of the semiconductor device 1 according to this embodiment will be described.
[0074] First, the problems of the conventional semiconductor relay will be described with reference to FIGS. 5, 6A and 6B.
[0075] Fig. 5 shows an input-output equivalent circuit for simulating high-frequency characteristics. Fig. 6A shows the relationship between the coupling capacitance (capacitance C) between the input and output and the frequency characteristics of insertion loss. Fig. 6B shows the relationship between the parasitic inductance (inductor L2) on the output side and the frequency characteristics of insertion loss. In each of Figs. 6A and 6B, the horizontal axis represents the frequency (unit: GHz) of the transmission signal, and the vertical axis represents the insertion loss (unit: dB).
[0076] As disclosed in Patent Document 3, for example, a conventional semiconductor relay includes a light-emitting element, a light-receiving element having a light-receiving element that receives light output from the light-emitting element and outputs a drive signal, and a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) element that is turned on and off by the drive signal output from the light-receiving element. The light-emitting element that receives an input signal is connected to a conductive member via a wire (input wire). The light-receiving element and the MOSFET are connected to each other via a wire (output wire).
[0077] The semiconductor relay can be used in a semiconductor tester. For example, the semiconductor relay is connected between a pulse driver and a DUT (Device Under Test), which is a device under test. In this case, the semiconductor relay can affect the main transmission line TL as a stub connected to the main transmission line TL, as shown in FIG. 5 .
[0078] 5 shows an equivalent circuit of a semiconductor relay connected to the main transmission line TL, which is a series circuit of an inductor L1 on the input side, a capacitance C between the input and output, and an inductor L2 on the output side. The inductor L1 is a parasitic inductor resulting from a wire for supplying an input signal to the light-emitting element. The inductor L2 is a parasitic inductor resulting from a wire used to connect the light-receiving driving element and the MOSFET. The capacitance C is a parasitic capacitance occurring between the light-emitting element and the light-receiving element. The inductors L1 and L2 and the capacitance C cause deterioration of the pass characteristics of the main transmission line TL.
[0079] In the pass characteristic of the main transmission line TL, the absolute value of the insertion loss (the amount of drop in the pass characteristic) becomes large at a specific frequency. As shown in Figure 6A, the specific frequency at which the pass characteristic drops shifts to the higher frequency side as the capacitance C between the input and output becomes smaller, and the amount of drop also becomes smaller. Specifically, when C = 1 pF, 0.1 pF, and 0.01 pF, the specific frequencies at which the pass characteristic drops are approximately 8 GHz, approximately 16 GHz, and approximately 28 GHz, respectively.
[0080] As mentioned above, GDDR6-compliant memory operates at a clock frequency of 8 GHz, so when capacitance C = 0.1 pF, the impact of the drop in pass characteristics is sufficiently suppressed. Furthermore, when capacitance C is 0.01 pF or less, the impact of the drop in pass characteristics is essentially eliminated. As such, it can be seen that with semiconductor relays, the smaller the capacitance C, the better the high-frequency characteristics.
[0081] 6B, the specific frequency at which the pass characteristics drop shifts toward higher frequencies as the output inductor L2 decreases, and the amount of this drop also decreases. Specifically, when L2 = 0.5 nH, 0.25 nH, and 0 nH, the specific frequencies at which the pass characteristics drop are approximately 16 GHz, approximately 19 GHz, and approximately 24 GHz, respectively. Therefore, it can be seen that with a semiconductor relay, the higher the output inductor L2 decreases, the better the high-frequency characteristics become.
[0082] 1 and 2, in the semiconductor device 1 according to this embodiment, light reception and switching are achieved by the semiconductor element 20. That is, in the semiconductor device 1, a wire corresponding to the output inductor L2 shown in Fig. 5 is not provided, which corresponds to the case where L2 = 0 nH, and it can be seen that the high frequency characteristics are improved.
[0083] 7 is a diagram showing the relationship between the thickness of the substrate layer 25 of the semiconductor element 20 according to this embodiment and the capacitance between the input and output. In FIG. 7, the horizontal axis represents the thickness (unit: mm) of the substrate layer 25, and the vertical axis represents the capacitance (unit: pF) between the input and output. The capacitance between the input and output is the parasitic capacitance generated between the light-emitting element 10 and the channel layer 24 of the semiconductor element 20, and is a component corresponding to the capacitance C in FIG. 5.
[0084] FIG. 7 shows the results of a simulation of input-output capacitance. In the simulation, the light-emitting element 10 was a 10 μm-thick LED chip, the channel layer 24 was 10 μm-thick GaN, the substrate layer 25 was sapphire, and the electrodes 23a and 23b were 10 μm-thick comb-shaped electrodes. The channel layer 24 and the substrate layer 25 had the same shape and size in plan view, specifically, a 0.72 mm × 0.79 mm rectangle. The light-emitting element 10 (LED chip) was a 0.35 mm × 0.35 mm square, and was positioned so that the center of the substrate layer 25 coincided with the center of the light-emitting element 10 in plan view. The graph in FIG. 7 shows the results of calculating the input-output capacitance when the sapphire thickness was changed in the range from 10 μm to 1000 μm.
[0085] As shown in Figure 7, the capacitance between the input and output decreases as the thickness of the substrate layer 25 increases. For example, if the thickness of the substrate layer 25 is 240 μm or more, the capacitance is 0.10 pF or less. As shown in Figure 6A, if the capacitance is 0.10 pF or less, the insertion loss at 8 GHz is essentially zero. Furthermore, even in the range of approximately 15 GHz or less, the absolute value of the insertion loss is small (there is little drop in the pass characteristics), so it can be seen that good high-frequency characteristics can be obtained.
[0086] As described above, according to this embodiment, it is possible to realize a small-sized semiconductor device 1 with improved high-frequency characteristics.
[0087] [Modifications] Next, a number of modifications of the semiconductor device 1 according to the embodiment will be described. In the following description, differences from the embodiment will be mainly described, and descriptions of commonalities will be omitted or simplified.
[0088] <Modification 1> Fig. 8 is a cross-sectional view of a semiconductor device according to Modification 1 of the embodiment. Note that Fig. 8 mainly shows the light emitting element 10 and the semiconductor element 20, and omits the illustration of the substrate 30, bumps 40a, etc. This also applies to Figs. 9, 11A, and 11B, which will be described later.
[0089] 8, the semiconductor device according to this modification includes an intermediate layer 60 provided between the light emitting element 10 and the semiconductor element 20. The intermediate layer 60 is translucent to the light emitted by the light emitting element 10. The higher the transmittance of the intermediate layer 60, the more the loss of light from the light emitting element 10 is suppressed, thereby improving the energy efficiency of the semiconductor device.
[0090] The intermediate layer 60 is an adhesive layer. The intermediate layer 60 adheres the light emitting element 10 and the semiconductor element 20, thereby increasing the mechanical strength. Furthermore, the positional relationship between the light emitting element 10 and the semiconductor element 20 can be fixed, allowing light from the light emitting element 10 to be efficiently incident on the semiconductor element 20. The intermediate layer 60 is formed using a resin material such as epoxy.
[0091] The intermediate layer 60 does not have to have adhesive properties. The intermediate layer 60 functions as a spacer layer for increasing the distance between the light-emitting element 10 and the channel layer 24 of the semiconductor element 20. Increasing the distance between the light-emitting element 10 and the channel layer 24 can reduce parasitic capacitance. Therefore, the high-frequency characteristics of the semiconductor device according to this modification can be improved.
[0092] <Modification 2> FIG. 9 is a cross-sectional view of a semiconductor device according to Modification 2 of the embodiment.
[0093] 9, the semiconductor device according to this modification includes an intermediate layer 70 provided between the light emitting element 10 and the semiconductor element 20. The intermediate layer 70 is translucent to the light emitted by the light emitting element 10.
[0094] The intermediate layer 70 is a light diffusion layer. That is, the intermediate layer 70 diffuses light emitted from the light-emitting element 10. For example, the intermediate layer 70 is a Fresnel lens or a diffraction grating. Because the intermediate layer 70 diffuses light, the area of the light-emitting element 10 can be reduced. That is, even if the light-emitting surface of the light-emitting element 10 is small, the light can be diffused by the intermediate layer 70 to reach a wide area of the channel layer 24. Reducing the area of the light-emitting element 10 contributes to reducing the parasitic capacitance of the semiconductor device. For example, in a plan view, the area of the light-emitting element 10 is half or less of the area of the semiconductor element 20. Alternatively, the area of the light-emitting element 10 may be ¼ or less, 1 / 10 or less, 1 / 20 or less, 1 / 30 or less, or 1 / 50 or less of the area of the semiconductor element 20.
[0095] Fig. 10 is a diagram showing the relationship between the size of the light-emitting element 10 and the capacitance of the semiconductor element 20. In Fig. 10, the horizontal axis represents the thickness (unit: mm) of the substrate layer 25, and the vertical axis represents the capacitance (unit: pF) between the input and output. Fig. 10 shows the results of changing the size of one side of the light-emitting element 10 (LED chip) in a planar view in five steps: 0.1 mm, 0.2 mm, 0.3 mm, 0.4 mm, and 0.5 mm, based on the same simulation conditions as Fig. 7.
[0096] 10, it can be seen that even if the thickness of the substrate layer 25 is the same, the smaller the size of the light-emitting element 10, the smaller the capacitance between the input and output. In other words, it can be seen that the high-frequency characteristics can be improved by reducing the size of the light-emitting element 10.
[0097] In the semiconductor device according to this modification, the intermediate layer 70 has a light diffusing function, so that light can reach a wide area of the channel layer 24 even if the size of the light emitting element 10 is reduced. Since electron-hole pairs can be generated over a wide area of the channel layer 24, the on-resistance of the channel layer 24 can be reduced. Therefore, the semiconductor device according to this modification can achieve both reduced on-resistance and improved high-frequency characteristics.
[0098] <Modification 3> FIG. 11A is a cross-sectional view of a semiconductor device according to Modification 3 of the embodiment.
[0099] 11A, the semiconductor device according to this modification includes an intermediate layer 71 provided between the light emitting element 10 and the semiconductor element 20. The intermediate layer 71 is translucent to the light emitted by the light emitting element 10.
[0100] The intermediate layer 71 is a light collecting layer. That is, the intermediate layer 71 collects light emitted from the light-emitting element 10. Specifically, the intermediate layer 71 collects the light emitted from the light-emitting element 10 in a region between the electrode 23 a and the electrode 23 b (a first region included in the channel layer 24) in a plan view of the main surface 21. For example, the intermediate layer 71 is a Fresnel lens, a diffraction grating, or the like.
[0101] This allows many electron-hole pairs to be generated in the first region of the channel layer 24, i.e., the region between the electrode 23 a and the electrode 23 b, thereby reducing the sheet resistance of the channel layer 24 in the conductive state and, therefore, the on-resistance of the semiconductor element 20.
[0102] <Modification 4> FIG. 11B is a cross-sectional view of a semiconductor device according to Modification 4 of the embodiment.
[0103] 11B, the semiconductor device according to this modification includes an intermediate layer 72 provided between the light emitting element 10 and the semiconductor element 20. The intermediate layer 72 is translucent to the light emitted by the light emitting element 10.
[0104] The intermediate layer 72 is a light-collecting layer. That is, the intermediate layer 72 collects light emitted from the light-emitting element 10. Specifically, the intermediate layer 72 collects light emitted from the light-emitting element 10 in a region (a second region included in the channel layer 24) that overlaps with the electrode 23 a or 23 b in a planar view of the main surface 21. In the example shown in FIG. 11B , the intermediate layer 72 collects light emitted from the light-emitting element 10 in both a region of the channel layer 24 that overlaps with the electrode 23 a and a region that overlaps with the electrode 23 b in a planar view. For example, the intermediate layer 72 is a Fresnel lens, a diffraction grating, or the like.
[0105] This allows many electron-hole pairs to be generated in the second region of the channel layer 24, i.e., the region overlapping with the electrode 23 a or 23 b. Therefore, the contact resistance between the channel layer 24 and the electrode 23 a or 23 b in the conductive state can be reduced, and the on-resistance of the semiconductor element 20 can be reduced.
[0106] <Modification 5> Fig. 12A is a cross-sectional view of a semiconductor device 1A according to Modification 5 of the embodiment. Note that Fig. 12A shows a cross section equivalent to the cross section shown in Fig. 2. This also applies to Figs. 12B and 12C, which will be described later.
[0107] As shown in FIG. 12A, the semiconductor device 1A differs from the semiconductor device 1 shown in FIG. 2 in that it includes frames 45a and 45b instead of terminals 41a and 41b, vias 42a and 42b, and external terminals 43a and 43b.
[0108] The frames 45a and 45b are an example of a support member that supports the semiconductor element 20. The semiconductor element 20 is flip-chip mounted on the frames 45a and 45b by bonding the electrodes 23a and 23b.
[0109] The frames 45a and 45b are formed using a conductive material such as metal. For example, the metal may be, but is not limited to, copper. The frames 45a and 45b are formed by, for example, forming a copper plate into a predetermined shape by pressing, bending, or the like. In this modification, the frames 45a and 45b are provided so as to cover the end faces (side faces) of the substrate 30 from the top to the bottom of the substrate 30. In other words, the frames 45a and 45b are formed so as to wrap around (sandwich) the substrate 30. For example, the portion of the frame 45a that contacts the bottom surface of the substrate 30 overlaps the portion that contacts the top surface of the substrate 30 in a plan view. The same applies to the frame 45b.
[0110] As a result, in the semiconductor device 1A according to this modification, it is not necessary to provide vias in the substrate 30, which can suppress a decrease in the strength of the substrate 30. Furthermore, since the on-resistance can be reduced more easily than with vias, the high-frequency characteristics can be improved.
[0111] 12A, metal frames may be provided instead of the terminals 41c and 41d, the vias 42c and 42d, and the external terminals 43c and 43d for supplying input signals to the light-emitting element 10. The same applies to Modifications 6, 7, and 9 described below.
[0112] <Sixth Modification> FIG. 12B is a cross-sectional view of a semiconductor device 1B according to a sixth modification of the embodiment.
[0113] 12B, the semiconductor device 1B differs from the semiconductor device 1A shown in Fig. 12A in that the semiconductor device 1B does not include the substrate 30. Since the semiconductor device 1B does not include the substrate 30, it is possible to reduce the weight of the semiconductor device 1B.
[0114] <Seventh Modification> FIG. 12C is a cross-sectional view of a semiconductor device 1C according to a seventh modification of the embodiment.
[0115] As shown in FIG. 12C, the semiconductor device 1C differs from the semiconductor device 1B shown in FIG. 12B in that it includes frames 46a and 46b instead of the frames 45a and 45b.
[0116] The frames 46a and 46b are an example of a support member that supports the semiconductor element 20. The semiconductor element 20 is flip-chip mounted on the frames 46a and 46b by bonding the electrodes 23a and 23b.
[0117] The frames 46a and 46b are different in shape from the frames 45a and 45b. Specifically, the frames 46a and 46b are provided so as to protrude laterally from the resin member 50. The frames 46a and 46b are also called lead frames.
[0118] The shapes of the frames 46a and 46b are not particularly limited and can be changed as appropriate to suit the mounting mode of the semiconductor device 1C. By using a frame shape that is optimal for mounting, the reliability of the mounting of the semiconductor device 1C can be improved.
[0119] <Modification 8> FIG. 12D is a cross-sectional view of a semiconductor device 1D according to Modification 8 of the embodiment.
[0120] 12D, semiconductor device 1D differs from semiconductor device 1 shown in FIG. 2 in that it does not include substrate 30 and resin member 50. Furthermore, semiconductor device 1D does not include wires 44a and 44b for supplying input signals to light-emitting element 10. Specifically, semiconductor device 1D includes light-emitting element 10, semiconductor element 20, frames 47a and 47b, frames 48a and 48b, intermediate layer 73, and bumps 40a, 40b, 40c, and 40d. Light-emitting element 10 and semiconductor element 20 are the same as those in the above-described embodiment and modified examples, and therefore description thereof will be omitted.
[0121] The frames 47a and 47b are an example of a support member that supports the semiconductor element 20. The semiconductor element 20 is flip-chip mounted to the frames 47a and 47b by bonding the electrodes 23a and 23b, respectively.
[0122] The frames 47a and 47b have a different shape from the frames 45a and 45b. Specifically, the frames 47a and 47b are L-shaped in side view so as to support the semiconductor element 20 in a vertical position. Although not shown in Fig. 12D , the frame 47b has a portion corresponding to the horizontal bar of the L at the back of the page of Fig. 12D (behind the frame 47a).
[0123] The frames 48a and 48b are examples of support members that support the light-emitting element 10. The light-emitting element 10 is flip-chip mounted to the frames 48a and 48b by bonding the electrodes 11a and 11b. Specifically, the electrode 11a and the frame 48a are electrically and mechanically connected via the bump 40c. The electrode 11b and the frame 48b are electrically and mechanically connected via the bump 40d.
[0124] The frames 48a and 48b have, for example, the same shape as the frames 47a and 47b. Specifically, the frames 48a and 48b are formed in an L-shape in side view so as to be able to support the light-emitting element 10 in a vertical position. Although not shown in Fig. 12D , the frame 48b has a portion corresponding to the horizontal bar of the L at the back of the page of Fig. 12D (behind the frame 48a).
[0125] The intermediate layer 73 is an adhesive layer. The intermediate layer 73 is provided between the light emitting element 10 and the semiconductor element 20, and bonds and fixes them together. The intermediate layer 73 is translucent to the light emitted by the light emitting element 10. The intermediate layer 73 is the same as the intermediate layer 60 shown in FIG. 8. The intermediate layer 73 is formed using a resin material such as epoxy.
[0126] As described above, according to the semiconductor device 1D of this modification, it is not necessary to provide wires for supplying input signals to the light emitting element 10. In other words, the semiconductor device 1D can be a completely wire-bonding-free device. Since the parasitic inductance caused by wires can be eliminated, the high-frequency characteristics of the semiconductor device 1D can be improved.
[0127] The semiconductor device 1D according to this modification may include a resin member 50. The semiconductor device 1D may also include two substrates instead of the frames 47a, 47b, 48a, and 48b. The two substrates may be arranged parallel to each other, and the light emitting element 10 and the semiconductor element 20 may be flip-chip mounted on each of the substrates.
[0128] <Modification 9> FIG. 12E is a cross-sectional view of a semiconductor device 1E according to Modification 9 of the embodiment.
[0129] 12E, the semiconductor device 1E differs from the semiconductor device 1 shown in Fig. 2 in that the light emitting element 10 is flip-chip mounted on the substrate 30. In other words, the light emitting element 10 is not provided on the main surface 22 of the semiconductor element 20, but is mounted on the upper surface of the substrate 30 alongside the semiconductor element 20. For this reason, the semiconductor device 1E does not have wires 44a and 44b.
[0130] The light-emitting element 10 is flip-chip mounted on the substrate 30 by bonding the electrodes 11a and 11b. Specifically, the electrode 11a and the terminal 41c are electrically and mechanically connected via the bump 40c. The electrode 11b and the terminal 41d are electrically and mechanically connected via the bump 40d. The light-emitting element 10 emits light upward from its top surface (in the direction opposite to the substrate 30).
[0131] 12E , the semiconductor device 1E includes a transparent resin 80. The transparent resin 80 is provided to direct light from the light-emitting element 10 toward the main surface 22 of the semiconductor element 20. The transparent resin 80 is an example of a reflective member that reflects light emitted from the light-emitting element 10 toward the main surface 22.
[0132] For example, the refractive index of the transparent resin 80 is higher than the refractive index of the resin member 50. As a result, due to the difference in refractive index between the transparent resin 80 and the resin member 50, the transparent resin 80 totally reflects light at the interface with the resin member 50, and causes the light to enter the main surface 22 of the semiconductor element 20 as incident light L. The transparent resin 80 is formed using a light-transmitting resin material such as an epoxy resin.
[0133] The configuration is not particularly limited as long as the light emitted by the light emitting element 10 can be incident on the main surface 22 of the semiconductor element 20. For example, a reflective film made of metal or the like may be provided.
[0134] As described above, the semiconductor device 1E according to this modification does not require wires for supplying input signals to the light emitting element 10. In other words, the semiconductor device 1E can be a completely wire-bonding-free device. Since the parasitic inductance caused by wires can be eliminated, the high-frequency characteristics of the semiconductor device 1E can be improved.
[0135] While the semiconductor device according to one or more aspects has been described above based on the embodiments, the present disclosure is not limited to these embodiments. As long as they do not deviate from the gist of the present disclosure, various modifications conceivable by those skilled in the art to the present embodiments and configurations constructed by combining components of different embodiments are also included within the scope of the present disclosure.
[0136] Furthermore, various modifications, substitutions, additions, omissions, etc. can be made to the above-described embodiments within the scope of the claims or their equivalents.
[0137] The present disclosure can be used as a small semiconductor device with improved high-frequency characteristics, and can be used in various high-frequency devices and the like.
[0138] REFERENCE SIGNS LIST 1, 1A, 1B, 1C, 1D, 1E SEMICONDUCTOR DEVICE 10 Light-emitting element 11a, 11b, 23a, 23b Electrode 20 Semiconductor element 21, 22 Main surface 24 Channel layer 25 Substrate layer 30 Substrate 40a, 40b, 40c, 40d Bump 41a, 41b, 41c, 41d Terminal 42a, 42b, 42c, 42d Via 43a, 43b, 43c, 43d External terminal 44a, 44b Wire 45a, 45b, 46a, 46b, 47a, 47b, 48a, 48b Frame 50 Resin member 60, 70, 71, 72, 73 Intermediate layer 80 Transparent resin
Claims
1. A semiconductor device comprising: a light-emitting element; a semiconductor element having a first main surface, a second main surface opposite the first main surface, and a plurality of electrodes provided on the first main surface; and a support member supporting the semiconductor element flip-chip mounted by bonding the plurality of electrodes, wherein the plurality of electrodes include a first electrode and a second electrode spaced apart from each other, and the semiconductor element switches between a conductive state and a cut-off state between the first electrode and the second electrode in response to incident light emitted from the light-emitting element and incident on the second main surface.
2. The semiconductor device according to claim 1, wherein the semiconductor element includes a first semiconductor layer and a second semiconductor layer stacked on the second main surface side of the first semiconductor layer, the second semiconductor layer having a larger band gap than the first semiconductor layer, and the first semiconductor layer generates charges by light that is transmitted through the second semiconductor layer out of the incident light.
3. The semiconductor device according to claim 2, wherein the first main surface is a main surface of the first semiconductor layer.
4. The semiconductor device according to claim 2 or 3, wherein the light emitting element is provided on the second main surface.
5. The semiconductor device according to claim 4, wherein the second semiconductor layer is thicker than the first semiconductor layer.
6. The semiconductor device according to claim 5, wherein the second semiconductor layer has a thickness of 240 μm or more.
7. The semiconductor device according to claim 4, wherein a capacitance between said light emitting element and said first semiconductor layer is 0.1 pF or less.
8. The semiconductor device according to claim 4, further comprising an intermediate layer provided between said light emitting element and said second semiconductor layer, said intermediate layer having transparency to light emitted by said light emitting element.
9. The semiconductor device according to claim 8, wherein the intermediate layer collects or diffuses light emitted by the light emitting element.
10. The semiconductor device described in claim 9, wherein the first semiconductor layer includes a first region located between the first electrode and the second electrode in a planar view of the first main surface, and the intermediate layer concentrates light emitted by the light-emitting element into the first region.
11. The semiconductor device described in claim 9, wherein the first semiconductor layer includes a second region that overlaps the first electrode or the second electrode in a planar view of the first main surface, and the intermediate layer concentrates light emitted by the light-emitting element in the second region.
12. A semiconductor device according to any one of claims 1 to 3, wherein the light-emitting element is mounted on the support member, and the semiconductor device is provided with a reflective member that reflects light emitted from the light-emitting element toward the second main surface.
13. The semiconductor device according to any one of claims 1 to 3, further comprising a resin member that seals the light emitting element, the semiconductor element, and at least a portion of the support member.
14. The semiconductor device according to any one of claims 1 to 3, wherein the support member is a substrate or a metal frame.
Citation Information
Patent Citations
Optoelectronic coupler and manufacture of the same
JP1988092066A
Infrared detector
JP1994132550A
Photocoupler
JP1994232447A
Photoelectric converter
JP2006286825A
Optical coupling element
JP2013251410A