Semiconductor device, semiconductor module, and vehicle

Abstract

A semiconductor device according to the present invention is configured to reduce displacement of the device on a heat dissipation member. The semiconductor device comprises a first conductive layer, a first semiconductor element, a target member, and a sealing resin. The first semiconductor element is electrically connected to the first conductive layer. The sealing resin covers the first conductive layer and a portion of each of the first semiconductor element and the target member. The sealing resin has a first surface that is directed in a first direction and a first opening that opens from the first surface. The target member has a first engagement part that is exposed from the first opening.

Description

Semiconductor device, semiconductor module and vehicle

[0001] The present disclosure relates to a semiconductor device, a semiconductor module in which the semiconductor device is mounted on a heat dissipation member, and a vehicle in which the semiconductor device is mounted.

[0002] Conventionally, semiconductor devices equipped with semiconductor elements (such as MOSFETs and IGBTs) having a switching function have been widely known and are mainly used for power conversion. Patent Document 1 discloses an example of such a semiconductor device. The semiconductor device disclosed in this document includes a sealing resin that covers the semiconductor element, a heat dissipation member, and an attachment member. The attachment member is a leaf spring. The semiconductor device is attached to the heat dissipation member via the leaf spring. The sealing resin is pressed against the attachment member.

[0003] In addition to the semiconductor device disclosed in Patent Document 1, there are cases where the substrate of a semiconductor device is bonded to a heat dissipation member via a bonding layer. The substrate mounts a semiconductor element and is exposed from the sealing resin. The bonding layer is, for example, a sintered body containing metal particles. In this case, the bonding layer is formed by firing. In this case, the substrate may be misaligned with respect to the heat dissipation member. If the amount of misalignment of the substrate with respect to the heat dissipation member is large, there is a concern that it may be difficult to install a wiring board or the like on the semiconductor device.

[0004] International Publication No. 2023 / 047890

[0005] [Summary] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that can reduce misalignment of the device with respect to a heat dissipation member.

[0006] A semiconductor device according to a first aspect of the present disclosure includes a first conductive layer, a first semiconductor element electrically connected to the first conductive layer, a target member, and a sealing resin covering the first conductive layer, the first semiconductor element, and a portion of the target member. The sealing resin has a first surface facing a first direction and a first opening extending from the first surface. The target member has a first engaging portion exposed through the first opening.

[0007] A semiconductor module provided by a second aspect of the present disclosure includes a semiconductor device and a heat dissipation member. The heat dissipation member has a mounting surface facing a first surface of a sealing resin of the semiconductor device. The semiconductor device further includes a first dummy terminal that is a target member compared to the semiconductor device provided by the first aspect of the present disclosure. A heat dissipation layer of the semiconductor device is bonded to the mounting surface. The heat dissipation member has a first protrusion that protrudes from the mounting surface. The first protrusion is inserted into a first opening of the sealing resin and engages with the first engagement portion of the first dummy terminal.

[0008] A vehicle provided by a third aspect of the present disclosure includes a drive source and a semiconductor device. The semiconductor device is electrically connected to the drive source. The semiconductor device further includes a second conductive layer and a second semiconductor element, as compared to the semiconductor device provided by the first aspect of the present disclosure. The second semiconductor element is electrically connected to the second conductive layer and is electrically connected to the first semiconductor element.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1. FIG. 3 is a plan view corresponding to FIG. 2, seen through the sealing resin. FIG. 4 is a partial enlarged view of FIG. 3. FIG. 5 is a plan view corresponding to FIG. 2, with the sealing resin and second conductive member omitted. FIG. 6 is a right side view of the semiconductor device shown in FIG. 1. FIG. 7 is a left side view of the semiconductor device shown in FIG. 1. FIG. 8 is a front view of the semiconductor device shown in FIG. 1. FIG. 9 is a rear view of the semiconductor device shown in FIG. 1. FIG. 10 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 3. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 3. FIG. 13 is a partial enlarged view of the first semiconductor element and its periphery shown in FIG. 12. FIG. 14 is a partial enlarged view of the second semiconductor element and its periphery shown in FIG. 12. FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. 3. FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 3 . FIG. 17 is a partially enlarged view of FIG. 3 . FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 17 . FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 17 . FIG. 20 is a plan view of a semiconductor module according to a first embodiment of the present disclosure. FIG. 21 is a partially enlarged view of FIG. 20 . FIG. 22 is a cross-sectional view taken along line XXII-XXII in FIG. 21 . FIG. 23 is a schematic diagram of a vehicle equipped with the semiconductor device shown in FIG. 1 . FIG. 24 is a partially enlarged plan view of a semiconductor device according to a second embodiment of the present disclosure, corresponding to FIG. 17 . FIG. 25 is a partially enlarged plan view of a semiconductor module according to the second embodiment of the present disclosure, corresponding to FIG. 21 . FIG. 26 is a partially enlarged plan view of a semiconductor device according to a third embodiment of the present disclosure, corresponding to FIG. 17 . FIG. 27 is a cross-sectional view taken along line XXVII-XXVII in FIG. 26 . 28 is a partially enlarged plan view of a semiconductor device according to a fourth embodiment of the present disclosure, corresponding to FIG. 17. FIG. 29 is a cross-sectional view taken along line XXIX-XXIX in FIG. 28. FIG. 30 is a partially enlarged plan view of a semiconductor device according to a fifth embodiment of the present disclosure, corresponding to FIG. 17. FIG. 31 is a cross-sectional view taken along line XXXI-XXXI in FIG. 30. FIG. 32 is a partially enlarged plan view of a semiconductor device according to a sixth embodiment of the present disclosure, corresponding to FIG. 17.Fig. 33 is a cross-sectional view taken along line XXXIII-XXXIII in Fig. 32. Fig. 34 is a partially enlarged plan view of a semiconductor device according to a seventh embodiment of the present disclosure, and corresponds to Fig. 17. Fig. 35 is a cross-sectional view taken along line XXXV-XXXV in Fig. 34. Fig. 36 is a partially enlarged cross-sectional view of a semiconductor module according to a third embodiment of the present disclosure.

[0011] DETAILED DESCRIPTION The present disclosure will be described in detail with reference to the accompanying drawings.

[0012] First Embodiment: A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 19 . The semiconductor device A10 includes a substrate 11, a first dummy terminal 121, a second dummy terminal 122, a first terminal 13, two second terminals 14, two third terminals 15, a plurality of first semiconductor elements 21, a plurality of second semiconductor elements 22, a first conductive member 31, a second conductive member 32, and a sealing resin 50. The semiconductor device A10 also includes a first signal terminal 161, a second signal terminal 162, a third signal terminal 171, a fourth signal terminal 172, two fifth signal terminals 18, a sixth signal terminal 19, a thermistor 23, a first wiring 61, and a second wiring 62. For ease of understanding, FIGS. 3 and 4 show the sealing resin 50 in a see-through manner. In FIG. 3, the see-through sealing resin 50 is indicated by an imaginary line (double-dashed line). For ease of understanding, the sealing resin 50 and the second conductive member 32 are omitted from FIG.

[0013] In the description of the semiconductor device A10, for convenience, the normal direction to a first surface 51 of a sealing resin 50 (described later) is referred to as the "first direction z." A direction perpendicular to the first direction z is referred to as the "second direction x." A direction perpendicular to both the first direction z and the second direction x is referred to as the "third direction y."

[0014] The semiconductor device A10 converts DC power input to the first terminal 13 and two second terminals 14 into AC power using a plurality of first semiconductor elements 21 and a plurality of second semiconductor elements 22. The converted AC power is input from each of two third terminals 15 to a power supply target such as a motor.

[0015] As shown in FIGS. 12 , 15 , and 16 , the base material 11 is located on one side of each of the plurality of first semiconductor elements 21 and the plurality of second semiconductor elements 22 in the first direction z. In the semiconductor device A10, the base material 11 is formed, for example, by active metal brazing (AMB). As shown in FIGS. 11 and 12 , the base material 11 includes an insulating layer 111, a first conductive layer 112, a second conductive layer 113, and a heat dissipation layer 114. The base material 11 is covered with a sealing resin 50 except for a portion of the heat dissipation layer 114.

[0016] 11 and 12 , the insulating layer 111 includes a portion interposed between the heat dissipation layer 114 and the first and second conductive layers 112 and 113 in the first direction z. The insulating layer 111 is made of a material with relatively high thermal conductivity. For example, the insulating layer 111 is made of ceramics containing aluminum nitride (AlN). The dimension of the insulating layer 111 in the first direction z is smaller than the dimensions of each of the first and second conductive layers 112 and 113 in the first direction z.

[0017] As shown in FIGS. 12 , 15 , and 16 , the first conductive layer 112 and the second conductive layer 113 are located between the insulating layer 111 and the multiple first semiconductor elements 21 and multiple second semiconductor elements 22 in the first direction z. The first conductive layer 112 and the second conductive layer 113 are bonded to the insulating layer 111. The first conductive layer 112 and the second conductive layer 113 contain copper (Cu). The first conductive layer 112 and the second conductive layer 113 are spaced apart from each other in the second direction x. As shown in FIGS. 12 and 15 , the first conductive layer 112 has a first major surface 112A facing the first direction z. The first major surface 112A faces the multiple first semiconductor elements 21. As shown in FIGS. 12 and 16 , the second conductive layer 113 has a second major surface 113A facing the same side as the first major surface 112A in the first direction z. The second main surface 113A faces the plurality of second semiconductor elements 22. When viewed in the first direction z, each of the first conductive layer 112 and the second conductive layer 113 is located inward from a periphery 111A of the insulating layer 111.

[0018] 11 and 12 , the heat dissipation layer 114 is located on the opposite side of the insulating layer 111 in the first direction z from the first conductive layer 112 and the second conductive layer 113. As shown in FIG. 10 , the heat dissipation layer 114 is exposed from the sealing resin 50. The heat dissipation layer 114 contains copper. The dimension of the heat dissipation layer 114 in the first direction z is larger than the dimension of the insulating layer 111 in the first direction z. When viewed in the first direction z, the heat dissipation layer 114 is located inward from the periphery 111A of the insulating layer 111.

[0019] As shown in FIGS. 5 and 15 , the multiple first semiconductor elements 21 are bonded to the first main surface 112A of the first conductive layer 112. The multiple first semiconductor elements 21 are arranged along the third direction y. As shown in FIGS. 5 and 16 , the multiple second semiconductor elements 22 are bonded to the second main surface 113A of the second conductive layer 113. The multiple second semiconductor elements 22 are arranged along the third direction y. The multiple first semiconductor elements 21 and the multiple second semiconductor elements 22 are, for example, metal-oxide-semiconductor field-effect transistors (MOSFETs). Alternatively, the multiple first semiconductor elements 21 and the multiple second semiconductor elements 22 may be switching elements such as insulated gate bipolar transistors (IGBTs). Furthermore, the multiple first semiconductor elements 21 may include multiple switching elements and multiple freewheeling diodes individually connected in parallel to these switching elements. Similarly, the second semiconductor elements 22 may also include a plurality of switching elements and a plurality of freewheeling diodes individually connected in parallel to the switching elements. The freewheeling diodes may be, for example, Schottky barrier diodes. In the description of the semiconductor device A10, the first semiconductor elements 21 and the second semiconductor elements 22 are n-channel MOSFETs with a vertical structure. The first semiconductor elements 21 and the second semiconductor elements 22 include a compound semiconductor substrate. The compound semiconductor substrate contains silicon carbide (SiC).

[0020] As shown in FIGS. 5 and 13 , each of the plurality of first semiconductor elements 21 has a first electrode 211 , a second electrode 212 , a first gate electrode 213 and a first detection electrode 214 .

[0021] 13 , the first electrode 211 faces the first main surface 112A of the first conductive layer 112. A current corresponding to the power before being converted by the first semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the drain electrode of the first semiconductor element 21. The first electrode 211 is conductively bonded to the first main surface 112A via a conductive bonding layer 29. As a result, the first electrode 211 of each of the multiple first semiconductor elements 21 is electrically connected to the first conductive layer 112. The conductive bonding layer 29 is a sintered body of metal particles containing silver (Ag) or the like. Alternatively, the conductive bonding layer 29 may be solder.

[0022] 13 , the second electrode 212 is located on the opposite side of the first conductive layer 112 from the side facing the first main surface 112A in the first direction z. Therefore, the first electrode 211 and the second electrode 212 are located on opposite sides of each other in the first direction z. A current corresponding to the power converted by the first semiconductor element 21 flows through the second electrode 212. In other words, the second electrode 212 corresponds to the source electrode of the first semiconductor element 21.

[0023] 5, the first gate electrode 213 is located on the same side as the second electrode 212 in the first direction z. A gate voltage for driving the first semiconductor element 21 is applied to the first gate electrode 213. As shown in FIG. 5, the area of ​​the first gate electrode 213 is smaller than the area of ​​the second electrode 212 when viewed in the first direction z.

[0024] 5 , the first detection electrode 214 is located on the same side as the second electrode 212 and the first gate electrode 213 in the first direction z. The first detection electrode 214 is located adjacent to the first gate electrode 213 in the third direction y. A voltage equivalent to the voltage applied to the second electrode 212 is applied to the first detection electrode 214. When viewed in the first direction z, the area of ​​the first detection electrode 214 is approximately equal to the area of ​​the first gate electrode 213.

[0025] As shown in FIGS. 5 and 14 , each of the plurality of second semiconductor elements 22 has a third electrode 221 , a fourth electrode 222 , a second gate electrode 223 and a second detection electrode 224 .

[0026] 14 , the third electrode 221 faces the second main surface 113A of the second conductive layer 113. A current corresponding to the power before being converted by the second semiconductor element 22 flows through the third electrode 221. In other words, the third electrode 221 corresponds to the drain electrode of the second semiconductor element 22. The third electrode 221 is conductively bonded to the second main surface 113A via the conductive bonding layer 29. As a result, the third electrode 221 of each of the multiple second semiconductor elements 22 is electrically connected to the second conductive layer 113.

[0027] 14 , the fourth electrode 222 is located on the opposite side of the second conductive layer 113 from the side facing the second main surface 113A in the first direction z. Therefore, the third electrode 221 and the fourth electrode 222 are located on opposite sides of each other in the first direction z. A current corresponding to the power converted by the second semiconductor element 22 flows through the fourth electrode 222. In other words, the fourth electrode 222 corresponds to the source electrode of the second semiconductor element 22.

[0028] 5, the second gate electrode 223 is located on the same side as the fourth electrode 222 in the first direction z. A gate voltage for driving the second semiconductor element 22 is applied to the second gate electrode 223. As shown in FIG. 5, the area of ​​the second gate electrode 223 is smaller than the area of ​​the fourth electrode 222 when viewed in the first direction z.

[0029] 5 , the second detection electrode 224 is located on the same side as the fourth electrode 222 and the second gate electrode 223 in the first direction z. The second detection electrode 224 is located on both sides of the second gate electrode 223 in the third direction y. A voltage equivalent to the voltage applied to the fourth electrode 222 is applied to the second detection electrode 224. When viewed in the first direction z, the area of ​​the second detection electrode 224 is approximately equal to the area of ​​the second gate electrode 223.

[0030] As shown in FIGS. 5 and 12 , the first terminal 13 is located on the opposite side of the second conductive layer 113 from the first conductive layer 112 in the second direction x. The first terminal 13 is conductively bonded to the first conductive layer 112. As a result, the first terminal 13 is electrically connected to the first electrodes 211 of the multiple first semiconductor elements 21 via the first conductive layer 112. The first terminal 13 is a P terminal (positive electrode) to which DC power to be converted is input. The first terminal 13 extends from the first conductive layer 112 in the second direction x. The first terminal 13 has a covering portion 131 and an exposed portion 132. As shown in FIG. 12 , the covering portion 131 is conductively bonded to the first conductive layer 112 and is covered with sealing resin 50. The exposed portion 132 extends from the covering portion 131 in the second direction x and protrudes from the sealing resin 50.

[0031] As shown in FIGS. 5 and 11 , each of the two second terminals 14 is located on the same side as the first terminal 13 in the second direction x with respect to the first conductive layer 112 and the second conductive layer 113 as a reference, but is spaced apart from the first conductive layer 112 and the second conductive layer 113. Each of the two second terminals 14 is electrically connected to the fourth electrode 222 of each of the multiple second semiconductor elements 22. The two second terminals 14 are N terminals (negative electrodes) to which DC power to be converted is input. The second terminals 14 are spaced apart from each other in the third direction y. The first terminal 13 is located between the two second terminals 14 in the third direction y. Each of the two second terminals 14 has a covering portion 141 and an exposed portion 142. As shown in FIG. 11 , the covering portion 141 is spaced apart from the first conductive layer 112 and is covered with the sealing resin 50. The exposed portion 142 extends from the covered portion 141 in the second direction x and protrudes from the sealing resin 50 .

[0032] As shown in FIG. 5 , each of the two third terminals 15 is located on the opposite side of the first conductive layer 112 from the second conductive layer 113 in the second direction x. Each of the two third terminals 15 is conductively bonded to the second conductive layer 113. As a result, each of the two third terminals 15 is electrically connected to the third electrodes 221 of the second semiconductor elements 22 via the second conductive layer 113. AC power converted by the first semiconductor elements 21 and the second semiconductor elements 22 is output from each of the two third terminals 15. In the semiconductor device A10, the two third terminals 15 are spaced apart from each other in the third direction y. As shown in FIG. 3 , each of the two third terminals 15 has a covering portion 151 and an exposed portion 152. The covering portion 151 is conductively bonded to the second conductive layer 113 and is covered with a sealing resin 50. The exposed portion 152 extends from the covered portion 151 in the second direction x and protrudes from the sealing resin 50 .

[0033] 12 , the first wiring 61 is bonded to the first main surface 112A of the first conductive layer 112. The first wiring 61 is located on the opposite side of the plurality of second semiconductor elements 22 with respect to the plurality of first semiconductor elements 21 in the second direction x. The first wiring 61 is electrically connected to the plurality of first semiconductor elements 21 and the first conductive layer 112. As shown in FIGS. 4 and 12 , the first wiring 61 has a first mounting layer 611, a first metal layer 612, two first gate wiring layers 613, a first detection wiring layer 614, and a second detection wiring layer 616.

[0034] As shown in FIG. 4 , the first mounting layer 611 mounts two first gate wiring layers 613, a first detection wiring layer 614, and a second detection wiring layer 616. The first mounting layer 611 is an insulator. The first mounting layer 611 is made of ceramics, for example. Alternatively, the first mounting layer 611 may be made of an insulating resin sheet.

[0035] 12 , the first metal layer 612 is located on a side facing the first main surface 112A of the first conductive layer 112 with the first mounting layer 611 as a reference in the first direction z. The first metal layer 612 is bonded to the first mounting layer 611. The first metal layer 612 contains copper. The first metal layer 612 is bonded to the first main surface 112A via a first bonding layer 68. The first bonding layer 68 is, for example, solder.

[0036] As shown in FIGS. 4 and 12 , the two first gate wiring layers 613 are located on the opposite side of the first mounting layer 611 from the first metal layer 612. The two first gate wiring layers 613 are bonded to the first mounting layer 611. Of the two first gate wiring layers 613, one of the first gate wiring layers 613 is conductively bonded to a plurality of first wires 41. The plurality of first wires 41 are individually conductively bonded to the first gate electrodes 213 of the plurality of first semiconductor elements 21. Furthermore, a plurality of sixth wires 46 are conductively bonded to each of the two first gate wiring layers 613. As a result, each of the two first gate wiring layers 613 is electrically connected to the first gate electrodes 213 of the plurality of first semiconductor elements 21.

[0037] 4 and 12 , the first detection wiring layer 614 is located on the opposite side of the first metal layer 612 with respect to the first mounting layer 611. The first detection wiring layer 614 is bonded to the first mounting layer 611. A plurality of second wires 42 are conductively bonded to the first detection wiring layer 614. Furthermore, the plurality of second wires 42 are individually conductively bonded to the first detection electrodes 214 of the plurality of first semiconductor elements 21. As a result, the first detection wiring layer 614 is electrically connected to the first detection electrodes 214 of the plurality of first semiconductor elements 21.

[0038] 4 and 12 , the second detection wiring layer 616 is located on the opposite side of the first metal layer 612 with respect to the first mounting layer 611. The second detection wiring layer 616 is bonded to the first mounting layer 611. A third wire 43 is conductively bonded to the second detection wiring layer 616. The third wire 43 is further conductively bonded to the first main surface 112A of the first conductive layer 112. This provides electrical continuity between the second detection wiring layer 616 and the first conductive layer 112.

[0039] 12 , the second wiring 62 is joined to the second main surface 113A of the second conductive layer 113. The second wiring 62 is located on the opposite side of the plurality of first semiconductor elements 21 with respect to the plurality of second semiconductor elements 22 in the second direction x. The second wiring 62 is electrically connected to the plurality of second semiconductor elements 22 and the second conductive layer 113. As shown in FIGS. 4 and 12 , the second wiring 62 has a second mounting layer 621, a second metal layer 622, two second gate wiring layers 623, a third detection wiring layer 624, and two temperature detection wiring layers 625.

[0040] As shown in FIG. 4 , the second mounting layer 621 includes two second gate wiring layers 623, a third detection wiring layer 624, and two temperature detection wiring layers 625. The second mounting layer 621 is an insulator. The second mounting layer 621 is made of, for example, ceramics. Alternatively, the second mounting layer 621 may be made of an insulating resin sheet.

[0041] 12 , the second metal layer 622 is located on a side facing the second main surface 113A of the second conductive layer 113 with the second mounting layer 621 as a reference in the first direction z. The second metal layer 622 is bonded to the second mounting layer 621. The second metal layer 622 contains copper. The second metal layer 622 is bonded to the second main surface 113A via the first bonding layer 68.

[0042] As shown in FIGS. 4 and 12 , the two second gate wiring layers 623 are located on the opposite side of the second metal layer 622 with respect to the second mounting layer 621. The two second gate wiring layers 623 are bonded to the second mounting layer 621. A plurality of fourth wires 44 are conductively bonded to one of the two second gate wiring layers 623. The plurality of fourth wires 44 are individually conductively bonded to the second gate electrodes 223 of the second semiconductor elements 22. Furthermore, a plurality of seventh wires 47 are conductively bonded to each of the two second gate wiring layers 623. As a result, each of the two second gate wiring layers 623 is electrically connected to the second gate electrodes 223 of the second semiconductor elements 22.

[0043] 4 and 12 , the third detection wiring layer 624 is located on the opposite side of the second metal layer 622 with respect to the second mounting layer 621. The third detection wiring layer 624 is bonded to the second mounting layer 621. A plurality of fifth wires 45 are conductively bonded to the third detection wiring layer 624. Furthermore, the plurality of fifth wires 45 are individually conductively bonded to the second detection electrodes 224 of the plurality of second semiconductor elements 22. As a result, the third detection wiring layer 624 is electrically connected to the second detection electrodes 224 of the plurality of second semiconductor elements 22.

[0044] 4 and 12 , the two temperature detection wiring layers 625 are located on the opposite side of the second mounting layer 621 from the second metal layer 622. The two temperature detection wiring layers 625 are bonded to the second mounting layer 621. The two temperature detection wiring layers 625 are adjacent to each other in a direction perpendicular to the first direction z.

[0045] 12 , each of the multiple sleeves 63 is conductively bonded to either the first wiring 61 or the second wiring 62 via a second bonding layer 69. The second bonding layer 69 is, for example, solder. The multiple sleeves 63 are made of a conductive material such as metal. Each of the multiple sleeves 63 has a cylindrical shape extending in the first direction z.

[0046] 4, the thermistor 23 is conductively joined to the two temperature detection wiring layers 625 of the second wiring 62. The thermistor 23 is used as a temperature detection sensor for the semiconductor device A10.

[0047] As shown in FIG. 1 , the first signal terminal 161, the second signal terminal 162, the third signal terminal 171, the fourth signal terminal 172, the two fifth signal terminals 18, and the sixth signal terminal 19 are formed as metal pins extending in the first direction z. These terminals protrude from a second surface 52 of the sealing resin 50 (described later). Furthermore, these terminals are individually press-fitted into a plurality of sleeves 63. As a result, each of these terminals is supported by one of the plurality of sleeves 63 and is electrically connected to one of the first wiring 61 and the second wiring 62.

[0048] 4 , the first signal terminal 161 is press-fitted into one of the multiple sleeves 63 that is conductively joined to one of the two first gate wiring layers 613 of the first wiring 61. As a result, the first signal terminal 161 is electrically connected to the first gate electrodes 213 of the multiple first semiconductor elements 21 via the two first gate wiring layers 613. A gate voltage for driving the multiple first semiconductor elements 21 is applied to the first signal terminal 161.

[0049] 4 , the second signal terminal 162 is press-fitted into one of the multiple sleeves 63 that is conductively joined to one of the two second gate wiring layers 623 of the second wiring 62. As a result, the second signal terminal 162 is electrically connected to the second gate electrodes 223 of the multiple second semiconductor elements 22 via the two second gate wiring layers 623. A gate voltage for driving the multiple second semiconductor elements 22 is applied to the second signal terminal 162.

[0050] As shown in Fig. 2 , the third signal terminal 171 is located adjacent to the first signal terminal 161 in the third direction y. As shown in Fig. 4 and 12 , the third signal terminal 171 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the first detection wiring layer 614 of the first wiring 61. This allows the third signal terminal 171 to be electrically connected to the first detection electrodes 214 of each of the multiple first semiconductor elements 21 via the first detection wiring layer 614. A voltage equivalent to the voltage applied to the first detection electrodes 214 of each of the multiple first semiconductor elements 21 is applied to the third signal terminal 171.

[0051] As shown in Fig. 2 , the fourth signal terminal 172 is located adjacent to the second signal terminal 162 in the third direction y. As shown in Figs. 4 and 12 , the fourth signal terminal 172 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the third detection wiring layer 624 of the second wiring 62. This allows the fourth signal terminal 172 to be electrically connected to the second detection electrodes 224 of each of the multiple second semiconductor elements 22 via the third detection wiring layer 624. A voltage equivalent to the voltage applied to the second detection electrodes 224 of each of the multiple second semiconductor elements 22 is applied to the fourth signal terminal 172.

[0052] As shown in Fig. 2 , the two fifth signal terminals 18 are located on the opposite side of the second signal terminal 162 from the fourth signal terminal 172 in the third direction y. The two fifth signal terminals 18 are adjacent to each other in the third direction y. As shown in Fig. 4 , the two fifth signal terminals 18 are individually press-fitted into two of the multiple sleeves 63 that are individually conductively joined to the two temperature detection wiring layers 625 of the second wiring 62. As a result, the two fifth signal terminals 18 are electrically connected to the thermistor 23.

[0053] As shown in Fig. 2 , the sixth signal terminal 19 is located on the opposite side of the first signal terminal 161 in the third direction y with respect to the third signal terminal 171. As shown in Fig. 4 , the sixth signal terminal 19 is press-fitted into one of the multiple sleeves 63 that is conductively joined to the second detection wiring layer 616 of the first wiring 61. This provides electrical continuity between the sixth signal terminal 19 and the first conductive layer 112 via the second detection wiring layer 616. A voltage equivalent to the DC power input to the first terminal 13 and the two second terminals 14 is applied to the sixth signal terminal 19.

[0054] As shown in FIGS. 5 and 13 , the first conductive member 31 is conductively bonded to the second electrodes 212 of the multiple first semiconductor elements 21 and the second main surface 113A of the second conductive layer 113. This allows the second electrodes 212 of each of the multiple first semiconductor elements 21 to be electrically connected to the second conductive layer 113. The first conductive member 31 contains copper. The first conductive member 31 is a metal clip. As shown in FIG. 5 , the first conductive member 31 has a first main portion 311, multiple first bonding portions 312, multiple first connecting portions 313, multiple second bonding portions 314, and multiple second connecting portions 315.

[0055] The first main portion 311 forms a main portion of the first conductive member 31. As shown in Fig. 5 , the first main portion 311 extends in the third direction y. As shown in Fig. 12 , the first main portion 311 straddles between the first conductive layer 112 and the second conductive layer 113.

[0056] As shown in FIGS. 5 and 13 , each of the plurality of first bonding portions 312 is conductively bonded to the second electrode 212 of one of the plurality of first semiconductor elements 21 .

[0057] 5, the plurality of first connecting portions 313 are connected to the first main portion 311 and the plurality of first bonding portions 312. The plurality of first connecting portions 313 are spaced apart from one another in the third direction y. As shown in FIG. 13, when viewed in the third direction y, the plurality of first connecting portions 313 are inclined in a direction away from the first main surface 112A of the first conductive layer 112 as they extend from the plurality of first bonding portions 312 toward the first main portion 311.

[0058] 5 and 12, the plurality of second bonding portions 314 are conductively bonded to the second main surface 113A of the second conductive layer 113. The second bonding portions 314 are arranged along the third direction y.

[0059] 5 and 12 , one side of each of the plurality of second connecting portions 315 in the second direction x is connected to the first main portion 311. In addition, the other side of each of the plurality of second connecting portions 315 in the second direction x is individually connected to the plurality of second bonding portions 314. When viewed in the third direction y, the second connecting portion 315 is inclined in a direction away from the second main surface 113A of the second conductive layer 113 as it extends from the second bonding portion 314 toward the first main portion 311.

[0060] 13 , a conductive bonding layer 29 is located between the second electrode 212 of each of the multiple first semiconductor elements 21 and each of the multiple first bonding portions 312. The conductive bonding layer 29 conductively bonds one of the multiple first bonding portions 312 to one of the multiple first semiconductor elements 21. As shown in FIG. 12 , a conductive bonding layer 29 is located between the second main surface 113A of the second conductive layer 113 and each of the multiple second bonding portions 314. The conductive bonding layer 29 conductively bonds the second main surface 113A to the multiple second bonding portions 314.

[0061] As shown in FIGS. 11 and 14 , the second conductive member 32 is conductively bonded to the second electrodes 212 of the multiple second semiconductor elements 22 and the covering portions 141 of the two second terminals 14. As a result, the second electrodes 212 of each of the multiple second semiconductor elements 22 are electrically connected to the two second terminals 14. The second conductive member 32 contains copper. The second conductive member 32 is a metal clip. As shown in FIG. 4 , the second conductive member 32 has two second main portions 321, multiple third joint portions 322, multiple third connecting portions 323, two fourth joint portions 324, two fourth connecting portions 325, multiple intermediate portions 326, and a cross beam portion 327.

[0062] 4 , the two second main portions 321 are spaced apart from each other in the third direction y. The two second main portions 321 extend in the second direction x. As shown in FIGS. 11 and 12 , the two second main portions 321 are located on the opposite side of the first conductive layer 112 and the second conductive layer 113 from the first conductive member 31 in the first direction z.

[0063] 4, the intermediate portions 326 are located between two second main portions 321 in the third direction y. The intermediate portions 326 are arranged along the third direction y. Each of the intermediate portions 326 extends in the second direction x.

[0064] As shown in FIGS. 4 and 14 , each of the plurality of third bonding portions 322 is conductively bonded to the second electrode 212 of one of the plurality of second semiconductor elements 22 .

[0065] 4 , one side of each of the plurality of third connecting portions 323 in the third direction y is connected to one of the plurality of third joint portions 322. In addition, the other side of each of the plurality of third connecting portions 323 in the third direction y is connected to one of the two second main portions 321 and one of the plurality of intermediate portions 326. When viewed in the second direction x, each of the plurality of third connecting portions 323 is inclined in a direction away from the second main surface 113A of the second conductive layer 113 as it moves from one of the plurality of third joint portions 322 toward one of the two second main portions 321 and one of the plurality of intermediate portions 326.

[0066] As shown in FIGS. 4 and 11 , the two fourth joint portions 324 are conductively joined to the covering portions 141 of the two second terminals 14 , respectively.

[0067] 4 and 11 , one side of each of the two fourth connecting portions 325 in the second direction x is connected to two fourth joint portions 324. In addition, the other side of each of the two fourth connecting portions 325 in the second direction x is individually connected to two second main portions 321. When viewed in the third direction y, the two fourth connecting portions 325 are inclined in a direction away from the first main surface 112A of the first conductive layer 112 as they move from the two fourth joint portions 324 toward the two second main portions 321.

[0068] 4 , the cross beam portion 327 is located between the two second main portions 321 in the third direction y. The cross beam portion 327 extends in the third direction y. Both sides of the cross beam portion 327 in the third direction y are connected to the two second main portions 321. When viewed in the first direction z, the cross beam portion 327 overlaps the first conductive member 31. A plurality of intermediate portions 326 are connected to the side of the cross beam portion 327 in the second direction x where the plurality of second semiconductor elements 22 are located.

[0069] 14 , a conductive bonding layer 29 is located between the fourth electrode 222 of each of the multiple second semiconductor elements 22 and each of the multiple third bonding portions 322. The conductive bonding layer 29 conductively bonds one of the multiple third bonding portions 322 to one of the multiple second semiconductor elements 22. As shown in FIG. 11 , a conductive bonding layer 29 is located between the covering portion 141 of each of the two second terminals 14 and each of the two fourth bonding portions 324. The conductive bonding layer 29 conductively bonds the covering portion 141 of each of the two second terminals 14 to the two fourth bonding portions 324 individually.

[0070] As shown in FIGS. 11 , 12 , 15 , and 16 , the sealing resin 50 covers the insulating layer 111, the first conductive layer 112, the second conductive layer 113, the plurality of first semiconductor elements 21, the plurality of second semiconductor elements 22, the first conductive member 31, and the second conductive member 32. The sealing resin 50 also covers a portion of the heat dissipation layer 114, the first dummy terminal 121, the second dummy terminal 122, the first terminal 13, the third terminal 15, and the second terminal 14. The sealing resin 50 has electrical insulation properties. The sealing resin 50 is made of a material containing, for example, black epoxy resin. As shown in FIGS. 6 to 9 , the sealing resin 50 has a first surface 51, a second surface 52, a third surface 53, a fourth surface 54, two first recesses 55, a plurality of second recesses 56, a first opening 57, and a second opening 58.

[0071] 11 and 12 , the first surface 51 faces the opposite side to the first main surface 112A of the first conductive layer 112 in the first direction z. The second surface 52 faces the opposite side to the second surface 52 in the first direction z. As shown in FIG. 10 , the heat dissipation layer 114 of the base material 11 is exposed from the first surface 51.

[0072] 2 , 6 , and 7 , the third surface 53 and the fourth surface 54 are spaced apart from each other in the second direction x. The third surface 53 and the fourth surface 54 face opposite each other in the second direction x. The exposed portion 132 of the first terminal 13 and the exposed portion 142 of each of the two second terminals 14 protrude from the third surface 53. The exposed portion 152 of each of the two third terminals 15 protrude from the fourth surface 54.

[0073] 2 , 9 , and 10 , the two first recesses 55 are recessed from the third surface 53 in the second direction x. The two first recesses 55 extend from the second surface 52 to the first surface 51 in the first direction z. The two first recesses 55 are located on both sides of the first terminal 13 in the third direction y.

[0074] 2 and 11 , the plurality of second recesses 56 are recessed from the second surface 52. The plurality of second recesses 56 are traces of ejector pins that are used when the sealing resin 50 is formed using a mold and then released from the mold.

[0075] 10 and 18 , the first opening 57 opens from the first surface 51. The first opening 57 penetrates the sealing resin 50 from the first surface 51 to the second surface 52. As shown in FIGS. 17 and 18 , the first opening 57 is spaced apart from the insulating layer 111 when viewed in the first direction z. As shown in FIG. 10 , the first opening 57 is located inward from the periphery 511 of the first surface 51 when viewed in the first direction z.

[0076] 10 and 19 , the second opening 58 opens from the first surface 51. The second opening 58 penetrates the sealing resin 50 from the first surface 51 to the second surface 52. As shown in FIGS. 17 and 19 , the second opening 58 is spaced apart from the insulating layer 111 when viewed in the first direction z. As shown in FIG. 10 , the second opening 58 is located inward from the periphery 511 of the first surface 51 when viewed in the first direction z.

[0077] As shown in FIG. 3 , the first dummy terminal 121 and the second dummy terminal 122 are located on opposite sides of the two third terminals 15 in the third direction y. The first dummy terminal 121 and the second dummy terminal 122 are separated from the first conductive layer 112, the second conductive layer 113, the first terminal 13, the two second terminals 14, and the two third terminals 15. Therefore, the first dummy terminal 121 and the second dummy terminal 122 are not electrically connected to these. The first dummy terminal 121 and the second dummy terminal 122 are obtained from the same lead frame as the first terminal 13, the two second terminals 14, and the two third terminals 15. Therefore, the composition of each of the first dummy terminal 121 and the second dummy terminal 122 is the same as the composition of each of the first terminal 13, the two second terminals 14, and the two third terminals 15.

[0078] 17 and 18 , the first dummy terminal 121 has a first engagement portion 81. In the present disclosure, a member having the first engagement portion 81 is referred to as a "target member 80." In the semiconductor device A10, the target member 80 is the first dummy terminal 121. The first engagement portion 81 is exposed from the first opening 57 of the sealing resin 50. The first engagement portion 81 penetrates the first dummy terminal 121 in the first direction z. As viewed in the first direction z, the first engagement portion 81 is located inward from the periphery 571 of the first opening 57 and is spaced apart from the insulating layer 111. In the first direction z, the first engagement portion 81 is spaced apart from each of the first surface 51 and the second surface 52 of the sealing resin 50.

[0079] 17 and 19 , the second dummy terminal 122 has a second engaging portion 82. The second engaging portion 82 is exposed from the second opening 58 of the sealing resin 50. The second engaging portion 82 penetrates the second dummy terminal 122 in the first direction z. As viewed in the first direction z, the second engaging portion 82 is located inward from the periphery 581 of the second opening 58 and is spaced apart from the insulating layer 111. In the first direction z, the second engaging portion 82 is spaced apart from each of the first surface 51 and the second surface 52 of the sealing resin 50.

[0080] 2 and 10 , a portion of each of the first dummy terminal 121 and the second dummy terminal 122 protrudes from the fourth surface 54 of the sealing resin 50. As shown in Fig. 18 , when viewed in the first direction z, the shape of the second engagement portion 82 is different from the shape of the first engagement portion 81. In the semiconductor device A10, the first engagement portion 81 is circular, while the second engagement portion 82 is oval in shape extending in the third direction y.

[0081] Next, a semiconductor module B10 according to the first embodiment of the present disclosure will be described with reference to Figures 20 to 22. The semiconductor module B10 includes a plurality of semiconductor devices A10, a heat dissipation member 71, and a bonding layer 72.

[0082] 20, a plurality of semiconductor devices A10 are mounted on a heat dissipation member 71. The semiconductor devices A10 are arranged along the third direction y.

[0083] The heat dissipation member 71 is used to cool the multiple semiconductor devices A10. The heat dissipation member 71 contains metal. For example, the heat dissipation member 71 is made of a material containing aluminum (Al). In the semiconductor module B10, the heat dissipation member 71 is flat. Additionally, the heat dissipation member 71 may be provided with fins or the like on one side in the first direction z to improve heat dissipation.

[0084] As shown in FIGS. 21 and 22 , the heat dissipation member 71 has a mounting surface 71A, a plurality of first protrusions 711, and a plurality of second protrusions 712. The mounting surface 71A faces the first surface 51 of the sealing resin 50 of each of the semiconductor devices A10. The plurality of first protrusions 711 and the plurality of second protrusions 712 protrude from the mounting surface 71A. The number of the plurality of first protrusions 711 and the number of the plurality of second protrusions 712 are equal to the number of semiconductor devices A10. The plurality of first protrusions 711 are individually inserted into the first openings 57 of each of the semiconductor devices A10 and individually engage with the first engaging portions 81 of each of the semiconductor devices A10. The plurality of second protrusions 712 are individually inserted into the second openings 58 of each of the semiconductor devices A10 and individually engage with the second engaging portions 82 of each of the semiconductor devices A10. As a result, the semiconductor devices A10 are positioned relative to the heat dissipation member 71 in the semiconductor module B10.

[0085] 22 , the bonding layer 72 bonds the mounting surface 71A of the heat dissipation member 71 to the heat dissipation layer 114 of the semiconductor device A10. The bonding layer 72 includes a sintered body of metal particles. The metal particles include silver. Alternatively, the metal particles may include copper.

[0086] Next, a vehicle C equipped with the semiconductor device A10 will be described with reference to Fig. 23. The vehicle C is, for example, an electric vehicle (EV).

[0087] As shown in Fig. 23, vehicle C includes an on-board charger 91, a storage battery 92, and a drive system 93. Power is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 91 via a wired connection. The on-board charger 91 is equipped with a step-up DC-DC converter. The voltage of the power supplied to the on-board charger 91 is stepped up by the converter and then supplied to the storage battery 92. The stepped-up voltage is, for example, 600 V.

[0088] The drive system 93 drives the vehicle C. The drive system 93 includes an inverter 931 and a drive source 932. The semiconductor device A10 constitutes part of the inverter 931. Alternatively, the inverter 931 may include a plurality of the aforementioned inverter devices B. Power stored in the storage battery 92 is supplied to the inverter 931. The power supplied from the storage battery 92 to the inverter 931 is DC power. Unlike the power system shown in FIG. 23 , a step-up DC-DC converter may be further provided between the storage battery 92 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931, including the semiconductor device A10, is electrically connected to the drive source 932. The drive source 932 includes an AC motor and a transmission. When AC power converted by the inverter 931 is supplied to the drive source 932, the AC motor rotates, and the rotation is transmitted to the transmission. The transmission appropriately reduces the rotational speed transmitted from the AC motor and then rotates the drive shaft of vehicle C. This drives vehicle C. To drive vehicle C, it is necessary to freely control the rotational speed of the AC motor based on information such as the amount of fluctuation in the accelerator pedal. Therefore, semiconductor device A10 in inverter 931 is necessary to output AC power whose frequency has been appropriately changed to correspond to the required rotational speed of the AC motor.

[0089] Next, the effects of the semiconductor device A10 will be described.

[0090] The semiconductor device A10 includes a first conductive layer 112, a first semiconductor element 21, a target member 80, and a sealing resin 50. The sealing resin 50 has a first surface 51 facing the first direction z and a first opening 57 opening from the first surface 51. The target member 80 has a first engaging portion 81 exposed from the first opening 57. With this configuration, in the semiconductor module B10, as shown in FIGS. 21 and 22 , the first protrusion 711 of the heat dissipation member 71 can be inserted into the first opening 57 and engaged with the first engaging portion 81. This positions the semiconductor device A10 relative to the heat dissipation member 71. Therefore, with this configuration, it is possible to reduce misalignment of the semiconductor device A10 relative to the heat dissipation member 71.

[0091] When viewed in the first direction z, the first engagement portion 81 is located inward from the periphery 571 of the first opening 57 of the sealing resin 50. In the first direction z, the first engagement portion 81 is spaced apart from the first surface 51 of the sealing resin 50. The first engagement portion 81 penetrates the target member 80 in the first direction z. By adopting this configuration, an ejector pin can be inserted into the first opening 57 when forming the sealing resin 50 in the manufacture of the semiconductor device A10. This makes it possible to prevent molten resin from flowing into the first engagement portion 81 when forming the sealing resin 50.

[0092] When viewed in the first direction z, the first opening 57 of the sealing resin 50 is located inward from the periphery 511 of the first surface 51 of the sealing resin 50. By adopting this configuration, even when the target member 80 is a conductor, it is possible to reduce a decrease in the dielectric strength voltage of the semiconductor device A10.

[0093] The semiconductor device A10 further includes a first terminal 13 electrically connected to the first conductive layer 112, and a first dummy terminal 121 spaced apart from the first conductive layer 112 and the first terminal 13. The target member 80 is the first dummy terminal 121. By adopting this configuration, during the manufacture of the semiconductor device A10, the first engagement portion 81 is set based on the position of the lead frame that constitutes the first terminal 13 and the first dummy terminal 121. This makes it possible to effectively reduce misalignment between the first terminal 13 and the external connection portion in the semiconductor module B10, for example, compared to when the first engagement portion 81 is set based on the base material 11.

[0094] The sealing resin 50 has a second surface 52 facing the opposite side to the first surface 51 in the first direction z. A first opening 57 in the sealing resin 50 penetrates the sealing resin 50 from the first surface 51 to the second surface 52. In the first direction z, the first engaging portion 81 is spaced apart from the second surface 52. This configuration allows ejector pins to be inserted into both sides of the first opening 57 in the first direction z when forming the sealing resin 50 in the manufacture of the semiconductor device A10. Furthermore, in the semiconductor module B10, the dimension of the first protrusion 711 of the heat dissipation member 71 in the first direction z can be freely set.

[0095] The semiconductor device A10 further includes a second dummy terminal 122 having a second engaging portion 82. The second engaging portion 82 penetrates the second dummy terminal 122 in the first direction z. The sealing resin 50 has a second opening 58 that opens from the first surface 51. When viewed in the first direction z, the shape of the second engaging portion 82 differs from the shape of the first engaging portion 81. With this configuration, when positioning the semiconductor device A10 relative to the heat dissipation member 71, it is possible to adjust the position of the semiconductor device A10 in a direction perpendicular to the first direction z and to restrict rotation of the semiconductor device A10 around the first direction z.

[0096] Second Embodiment: A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Fig. 24. In this figure, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Fig. 24 corresponds to Fig. 17 showing the semiconductor device A10.

[0097] The semiconductor device A20 differs from the semiconductor device A10 in that it does not include the second dummy terminal 122.

[0098] 24 , when viewed in the first direction z, the region in which the second dummy terminal 122 is located in the semiconductor device A10 overlaps with both the second conductive layer 113 and the insulating layer 111. Since the semiconductor device A20 does not include the second dummy terminal 122, the sealing resin 50 does not have the second opening 58.

[0099] Next, a semiconductor module B20 according to a second embodiment of the present disclosure will be described, as shown in Fig. 25. In this figure, elements that are the same as or similar to those in the semiconductor module B10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Fig. 25 corresponds to Fig. 21, which shows the semiconductor module B10.

[0100] The semiconductor module B20 includes a plurality of semiconductor devices A20 instead of the plurality of semiconductor devices A10. As shown in Fig. 22 , when viewed in the first direction z, the plurality of second protrusions 712 of the heat dissipation member 71 are located outside the sealing resin 50 of each of the plurality of semiconductor devices A20. Each of the plurality of second protrusions 712 is in contact with the sealing resin 50 of one of the plurality of semiconductor devices A20. This allows the plurality of semiconductor devices A20 to be positioned relative to the heat dissipation member 71 in the semiconductor module B20.

[0101] Next, the effects of the semiconductor device A20 will be described.

[0102] The semiconductor device A20 includes a first conductive layer 112, a first semiconductor element 21, a target member 80, and a sealing resin 50. The sealing resin 50 has a first surface 51 facing the first direction z and a first opening 57 opening from the first surface 51. The target member 80 has a first engaging portion 81 exposed from the first opening 57. Therefore, with this configuration, the semiconductor device A20 can also reduce misalignment of the semiconductor device A20 with respect to the heat dissipation member 71. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A20 achieves the same effects as the semiconductor device A10.

[0103] The semiconductor device A20 does not include the second dummy terminal 122. However, even in this configuration, as shown in FIG. 25 , by bringing the second convex portion 712 of the heat dissipation member 71 into contact with the sealing resin 50, rotation of the semiconductor device A10 around the first direction z can be restricted.

[0104] Third Embodiment: A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 26 and 27. In this figure, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 26 corresponds to Figure 17, which shows the semiconductor device A10.

[0105] The semiconductor device A30 differs from the semiconductor device A10 in that it further includes two dummy layers 115.

[0106] As shown in FIG. 27 , the two dummy layers 115 are located on the opposite side of the insulating layer 111 from the heat dissipation layer 114 in the first direction z. The two dummy layers 115 are included in the substrate 11. Each of the two dummy layers 115 is separated from the first conductive layer 112 and the second conductive layer 113. Therefore, each of the two dummy layers 115 is not electrically connected to the first conductive layer 112 and the second conductive layer 113. The two dummy layers 115 are bonded to the insulating layer 111. The composition of each of the two dummy layers 115 is the same as the composition of the first conductive layer 112 and the second conductive layer 113. As shown in FIG. 26 , the two dummy layers 115 are located on the opposite side of the two third terminals 15 in the third direction y. The first dummy terminal 121 and the second dummy terminal 122 are individually bonded to the two dummy layers 115.

[0107] Next, the effects of the semiconductor device A30 will be described.

[0108] The semiconductor device A30 includes a first conductive layer 112, a first semiconductor element 21, a target member 80, and a sealing resin 50. The sealing resin 50 has a first surface 51 facing the first direction z and a first opening 57 opening from the first surface 51. The target member 80 has a first engaging portion 81 exposed from the first opening 57. Therefore, with this configuration, it is possible to reduce misalignment of the semiconductor device A30 with respect to the heat dissipation member 71 in the semiconductor device A30 as well. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A30 achieves the same effects as the semiconductor device A10.

[0109] The semiconductor device A30 further includes a dummy layer 115. The dummy layer 115 is spaced apart from the first conductive layer 112 and is bonded to the insulating layer 111. The first dummy terminal 121 is bonded to the dummy layer 115. This configuration more effectively reduces misalignment of the substrate 11 relative to the lead frame that forms the first terminal 13 and the first dummy terminal 121 during manufacturing of the semiconductor device A30. Furthermore, the first dummy terminal 121 can be prevented from falling off the sealing resin 50.

[0110] 28 and 29, a semiconductor device A40 according to a fourth embodiment of the present disclosure will be described. In this figure, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, FIG. 28 corresponds to FIG. 17, which shows the semiconductor device A10.

[0111] The semiconductor device A40 differs from the semiconductor device A10 in that it does not include the first dummy terminal 121 and the second dummy terminal 122 and in the configuration of the insulating layer 111.

[0112] 28 and 29 , the insulating layer 111 has a first engaging portion 81 and a second engaging portion 82. In the semiconductor device A40, the target member 80 is the insulating layer 111. The first engaging portion 81 and the second engaging portion 82 each penetrate the insulating layer 111 in the first direction z. As viewed in the first direction z, the first opening 57 and the second opening 58 of the sealing resin 50 each overlap the insulating layer 111.

[0113] Next, the effects of the semiconductor device A40 will be described.

[0114] The semiconductor device A40 includes a first conductive layer 112, a first semiconductor element 21, a target member 80, and a sealing resin 50. The sealing resin 50 has a first surface 51 facing the first direction z and a first opening 57 opening from the first surface 51. The target member 80 has a first engaging portion 81 exposed from the first opening 57. Therefore, with this configuration, it is possible to reduce misalignment of the semiconductor device A40 with respect to the heat dissipation member 71 in the semiconductor device A40 as well. Furthermore, by having a configuration in common with the semiconductor device A10, the semiconductor device A40 achieves the same effects as the semiconductor device A10.

[0115] In the semiconductor device A40, the target member 80 is the insulating layer 111. The first engaging portion 81 penetrates the insulating layer 111 in the first direction z. By adopting this configuration, the semiconductor device A40 does not require the first dummy terminal 121 exposed from the sealing resin 50. This makes it possible to reduce a decrease in the dielectric strength voltage of the semiconductor device A40.

[0116] Fifth Embodiment: A semiconductor device A50 according to a fifth embodiment of the present disclosure will be described with reference to Figures 30 and 31. In this figure, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 30 corresponds to Figure 17 showing the semiconductor device A10.

[0117] In the semiconductor device A50, the configurations of the first dummy terminals 121, the second dummy terminals 122, and the sealing resin 50 are different from those of the semiconductor device A10.

[0118] 30 and 31 , the first engagement portion 81 of the first dummy terminal 121 is recessed from the first dummy terminal 121 on the side opposite to the side toward which the first surface 51 of the sealing resin 50 faces in the first direction z. Similarly, the second engagement portion 82 of the second dummy terminal 122 is recessed from the second dummy terminal 122 on the side opposite to the side toward which the first surface 51 faces in the first direction z.

[0119] 31 , the first opening 57 of the sealing resin 50 does not reach the second surface 52 of the sealing resin 50. Therefore, the first opening 57 does not penetrate the sealing resin 50 in the first direction z. Similarly, the second opening 58 of the sealing resin 50 does not reach the second surface 52, and therefore the second opening 58 does not penetrate the sealing resin 50 in the first direction z.

[0120] The semiconductor device A50 may be configured to further include two dummy layers 115, as in the semiconductor device A30 described above. In this case, the first dummy terminal 121 and the second dummy terminal 122 are bonded to the two dummy layers 115, respectively.

[0121] Next, the effects of the semiconductor device A50 will be described.

[0122] The semiconductor device A50 includes a first conductive layer 112, a first semiconductor element 21, a target member 80, and a sealing resin 50. The sealing resin 50 has a first surface 51 facing the first direction z and a first opening 57 opening from the first surface 51. The target member 80 has a first engaging portion 81 exposed from the first opening 57. Therefore, with this configuration, it is possible to reduce misalignment of the semiconductor device A50 with respect to the heat dissipation member 71 in the semiconductor device A50 as well. Furthermore, by having a configuration in common with the semiconductor device A10, the semiconductor device A50 achieves the same effects as the semiconductor device A10.

[0123] In the semiconductor device A50, the first engagement portion 81 is recessed from the first dummy terminal 121 on the side opposite to the side toward which the first surface 51 of the sealing resin 50 faces in the first direction z. With this configuration, the first opening 57 of the sealing resin 50 does not penetrate the sealing resin 50 in the first direction z. This reduces a decrease in the dielectric strength voltage of the semiconductor device A50.

[0124] Sixth Embodiment: A semiconductor device A60 according to a sixth embodiment of the present disclosure will be described with reference to Figures 32 and 33. In this figure, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 32 corresponds to Figure 17 showing the semiconductor device A10.

[0125] The semiconductor device A60 differs from the semiconductor device A40 in that it further includes two dummy layers 115 and in the configuration of the sealing resin 50.

[0126] 32 and 33 , one of the two dummy layers 115 blocks one side in the first direction z of the first engagement portion 81. Similarly, the other of the two dummy layers 115 blocks one side in the first direction z of the second engagement portion 82. The configuration of the two dummy layers 115 is similar to the configuration of the two dummy layers 115 of the semiconductor device A30 described above.

[0127] 32 , when viewed in the first direction z, the entire first opening 57 and the entire second opening 58 of the sealing resin 50 are individually overlapped with two dummy layers 115. As a result, as shown in FIG. 33 , the first opening 57 of the sealing resin 50 does not reach the second surface 52 of the sealing resin 50. Therefore, the first opening 57 does not penetrate the sealing resin 50 in the first direction z. Similarly, the second opening 58 of the sealing resin 50 does not reach the second surface 52, and therefore the second opening 58 does not penetrate the sealing resin 50 in the first direction z.

[0128] Next, the effects of the semiconductor device A60 will be described.

[0129] The semiconductor device A60 includes a first conductive layer 112, a first semiconductor element 21, a target member 80, and a sealing resin 50. The sealing resin 50 has a first surface 51 facing the first direction z and a first opening 57 opening from the first surface 51. The target member 80 has a first engaging portion 81 exposed from the first opening 57. Therefore, with this configuration, it is possible to reduce misalignment of the semiconductor device A60 with respect to the heat dissipation member 71 in the semiconductor device A60 as well. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A60 achieves the same effects as the semiconductor device A10.

[0130] In the semiconductor device A60, the target member 80 is an insulating layer 111. The first engaging portion 81 penetrates the insulating layer 111 in the first direction z. The semiconductor device A60 further includes a dummy layer 115. The dummy layer 115 blocks one side of the first engaging portion 81 in the first direction z. With this configuration, the first opening 57 of the sealing resin 50 does not penetrate the sealing resin 50 in the first direction z. This reduces a decrease in the dielectric strength voltage of the semiconductor device A60.

[0131] Seventh Embodiment: A semiconductor device A70 according to a seventh embodiment of the present disclosure will be described with reference to Figures 34 and 35. In this figure, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 34 corresponds to Figure 17 showing the semiconductor device A10.

[0132] In the semiconductor device A70, the configurations of the first dummy terminals 121, the second dummy terminals 122, and the sealing resin 50 are different from those of the semiconductor device A30.

[0133] 35 , in the sealing resin 50, the orientation of the first surface 51 and the second surface 52 in the first direction z is opposite to that in the semiconductor device A10. Therefore, the heat dissipation layer 114 is exposed from the second surface 52.

[0134] As shown in FIG. 34 , when viewed in the first direction z, the first engaging portion 81 and the second engaging portion 82 individually overlap two dummy layers 115. In addition, the entire first opening 57 and the entire second opening 58 of the sealing resin 50 individually overlap two dummy layers 115. As a result, as shown in FIG. 35 , the first opening 57 of the sealing resin 50 does not reach the second surface 52 of the sealing resin 50. Therefore, the first opening 57 does not penetrate the sealing resin 50 in the first direction z. Similarly, the second opening 58 of the sealing resin 50 does not reach the second surface 52, and therefore the second opening 58 does not penetrate the sealing resin 50 in the first direction z.

[0135] Next, a semiconductor module B30 according to a second embodiment of the present disclosure will be described as shown in Fig. 36. In this figure, elements that are the same as or similar to those in the semiconductor module B10 described above are denoted by the same reference numerals, and duplicated descriptions will be omitted.

[0136] The semiconductor module B30 includes a plurality of semiconductor devices A70 instead of the plurality of semiconductor devices A10. As shown in Fig. 36, the heat dissipation member 71 has a plurality of fitting portions 713 instead of the plurality of first protrusions 711 and the plurality of second protrusions 712. The plurality of fitting portions 713 are recessed from the mounting surface 71A of the heat dissipation member 71.

[0137] 36 , in the semiconductor module B30, a jig 73, for example, is used to bond the multiple semiconductor devices A70 to the heat dissipation member 71 via the bonding layer 72. The jig 73 has a base 731 and pins 732. The base 731 is fitted into the fitting portion 713 of the heat dissipation member 71. The pins 732 are inserted into the first openings 57 of any of the multiple semiconductor devices A70 and engage with the first engaging portions 81 of any of the multiple semiconductor devices A70. Similarly, the pins 732 are inserted into the second openings 58 of any of the multiple semiconductor devices A70 and engage with the second engaging portions 82 of any of the multiple semiconductor devices A70. This allows the multiple semiconductor devices A70 to be positioned relative to the heat dissipation member 71 in the semiconductor module B30.

[0138] Next, the effects of the semiconductor device A70 will be described.

[0139] The semiconductor device A70 includes a first conductive layer 112, a first semiconductor element 21, a target member 80, and a sealing resin 50. The sealing resin 50 has a first surface 51 facing the first direction z and a first opening 57 opening from the first surface 51. The target member 80 has a first engaging portion 81 exposed from the first opening 57. Therefore, with this configuration, it is possible to reduce misalignment of the semiconductor device A70 with respect to the heat dissipation member 71 in the semiconductor device A70 as well. Furthermore, by having a configuration in common with the semiconductor device A10, the semiconductor device A70 achieves the same effects as the semiconductor device A10.

[0140] In the semiconductor device A70, when viewed in the first direction z, the first engagement portion 81 and the entire first opening 57 of the sealing resin 50 overlap the dummy layer 115. With this configuration, the first opening 57 of the sealing resin 50 does not penetrate the sealing resin 50 in the first direction z. This reduces the decrease in the dielectric strength voltage of the semiconductor device A70. Furthermore, compared to the semiconductor device A10, the volume of the heat dissipation layer 114 can be further increased. This improves heat dissipation.

[0141] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0142] The present disclosure includes embodiments described in the following appendices. Appendix 1. A semiconductor device comprising: a first conductive layer; a first semiconductor element conductive to the first conductive layer; a target member; and a sealing resin covering the first conductive layer, the first semiconductor element, and a portion of the target member, wherein the sealing resin has a first surface facing a first direction and a first opening opening from the first surface, and the target member has a first engaging portion exposed from the first opening. Appendix 2. The semiconductor device according to Appendix 1, wherein, when viewed in the first direction, the first engaging portion is located inward from a periphery of the first opening, and the first engaging portion is spaced apart from the first surface in the first direction. Appendix 3. The semiconductor device according to Appendix 2, wherein, when viewed in the first direction, the first opening is located inward from a periphery of the first surface. Appendix 4. The semiconductor device according to Appendix 3, further comprising an insulating layer located on the opposite side of the first semiconductor element with respect to the first conductive layer in the first direction, the first conductive layer being bonded to the insulating layer, the first semiconductor element being conductively bonded to the first conductive layer, and at least a portion of the insulating layer being covered with the sealing resin. Appendix 5. The semiconductor device according to Appendix 4, wherein the first surface faces the side on which the insulating layer is located with respect to the first conductive layer in the first direction. Appendix 6. The semiconductor device according to Appendix 5, further comprising a heat dissipation layer located on the opposite side of the insulating layer from the first conductive layer, the heat dissipation layer being bonded to the insulating layer, and the heat dissipation layer being exposed from the first surface. Appendix 7. The semiconductor device according to Appendix 6, further comprising a first terminal electrically connected to the first conductive layer, a portion of the first terminal protruding from the sealing resin. Appendix 8. The semiconductor device according to Appendix 7, further comprising a first dummy terminal spaced apart from the first conductive layer and the first terminal, wherein the target member is the first dummy terminal. Appendix 9. The semiconductor device according to Appendix 8, wherein the first engagement portion is spaced apart from the insulating layer when viewed in the first direction. Appendix 10. The semiconductor device according to Appendix 9, wherein the first engagement portion penetrates the first dummy terminal in the first direction.Appendix 11. The semiconductor device according to Appendix 9, wherein the first engagement portion is recessed from the first dummy terminal on a side opposite to a side toward which the first surface faces in the first direction. Appendix 12. The semiconductor device according to Appendix 10 or 11, further comprising a dummy layer located on the opposite side of the insulating layer from the heat dissipation layer and spaced from the first conductive layer, wherein the composition of the dummy layer is the same as that of the first conductive layer, the dummy layer is bonded to the insulating layer, and the first dummy terminal is bonded to the dummy layer. Appendix 13. The semiconductor device according to Appendix 6, wherein the target member is the insulating layer, and the first engagement portion penetrates the insulating layer in the first direction. Appendix 14. The semiconductor device according to Appendix 9, wherein the sealing resin has a second surface facing opposite to the first surface in the first direction, the first opening penetrates the sealing resin from the first surface to the second surface, and the first engagement portion is spaced from the second surface in the first direction. Appendix 15. The semiconductor device according to Appendix 14, further comprising a second dummy terminal spaced apart from the first conductive layer and the first terminal and exposed from the sealing resin, wherein the sealing resin has a second opening spaced apart from the first opening and opening from the first surface, the second dummy terminal has a second engagement portion exposed from the second opening, and the second engagement portion is located inward from a periphery of the second opening as viewed in the first direction. Appendix 16. The semiconductor device according to Appendix 15, further comprising:Supplementary Note 17. The semiconductor device according to Supplementary Note 16, further comprising: a second conductive layer located on the opposite side of the insulating layer from the heat dissipation layer and bonded to the insulating layer; a second semiconductor element conductively bonded to the second conductive layer and electrically connected to the first semiconductor element; and a third terminal electrically connected to the second conductive layer, wherein the sealing resin has a third surface and a fourth surface facing opposite each other in a second direction orthogonal to the first direction, a portion of the first terminal protruding from the third surface, a portion of the third terminal protruding from the fourth surface, and the first dummy terminal and the second dummy terminal are exposed from the fourth surface. Supplementary Note 18. A semiconductor module comprising: the semiconductor device according to Supplementary Note 9; and a heat dissipation member having a mounting surface facing the first surface, wherein the heat dissipation layer is bonded to the mounting surface, and the heat dissipation member has a first protrusion protruding from the mounting surface, the first protrusion being inserted into the first opening and engaging with the first engaging portion. Appendix 19. The semiconductor module according to Appendix 18, further comprising a bonding layer bonding the mounting surface and the heat dissipation layer, the bonding layer including a sintered body of metal particles. Appendix 20. A vehicle comprising: a drive source; and the semiconductor module according to Appendix 17, the semiconductor module being electrically connected to the drive source. Appendix 21. The semiconductor device according to Appendix 8, wherein the composition of the first dummy terminal is the same as the composition of the first terminal. Appendix 22. The semiconductor device according to Appendix 21, wherein a portion of the first dummy terminal protrudes from the sealing resin in a second direction orthogonal to the first direction. Appendix 23. The semiconductor device according to Appendix 4, wherein the first surface faces a side on which the first semiconductor element is located, with the first conductive layer as a reference, in the first direction. Appendix 24. 24. The semiconductor device according to claim 23, further comprising: a first terminal electrically connected to the first conductive layer; and a first dummy terminal spaced from the first terminal; wherein the target member is the first dummy terminal; a portion of the first terminal protrudes from the sealing resin; and when viewed in the first direction, the first engaging portion overlaps the insulating layer.Appendix 25. The semiconductor device according to Appendix 13, further comprising a dummy layer located on the opposite side of the insulating layer from the heat dissipation layer and separated from the first conductive layer, wherein the composition of the dummy layer is the same as the composition of the first conductive layer, the dummy layer is bonded to the insulating layer, and the dummy layer covers one side of the first engaging portion in the first direction. Appendix 26. The semiconductor device according to Appendix 17, wherein a portion of each of the first dummy terminal and the second dummy terminal protrudes from the fourth surface. Appendix 27. The semiconductor device according to Appendix 26, wherein the first dummy terminal and the second dummy terminal are located on opposite sides of each other with respect to the third terminal in a third direction orthogonal to each of the first direction and the second direction. Appendix 28. The semiconductor device according to claim 17, further comprising: a first signal terminal electrically connected to the first semiconductor element; and a second signal terminal electrically connected to the second semiconductor element, wherein a portion of each of the first signal terminal and the second signal terminal protrudes from the second surface. The semiconductor module according to claim 19, wherein the metal particles include silver.

[0143] A10 to A70: Semiconductor device B10 to B30: Semiconductor module C: Vehicle 11: Base material 111: Insulating layer 112, 113: First conductive layer, second conductive layer 112A, 113A: First main surface, second main surface 114: Heat dissipation layer 115: Dummy layer 13: First terminal 131: Covered portion 132: Exposed portion 14: Second terminal 141: Covered portion 142: Exposed portion 15: Third terminal 151: Covered portion 152: Exposed portion 161: First signal terminal 162: Second signal terminal 171: Third signal terminal 172: Fourth signal terminal 18: Fifth signal terminal 19: Sixth signal terminal 21: First semiconductor element 211: First electrode 212: Second electrode 213: First gate electrode 214: First detection electrode 22: Second semiconductor element 221: Third electrode 222: Fourth electrode 223: Second gate electrode 224: Second detection electrode 23: Thermistor 29: Conductive bonding layer 31: First conductive member 311: First main portion 312: First bonding portion 313: First connecting portion 314: Second bonding portion 315: Second connecting portion 32: Second conductive member 321: Second main portion 322: Third bonding portion 323: Third connecting portion 324: Fourth bonding portion 325: Fourth connecting portion 326: Middle portion 327: Horizontal beam portion 41-47: First wire to seventh wire 50: Sealing resin 51-54: First surface to fourth surface 55, 56: First recess, second recess 57, 58: First opening, second opening 61: First wiring 611: First mounting layer 612: First metal layer 613: First gate wiring layer 614: First detection wiring layer 616: Second detection wiring layer 62: Second wiring 621: Second mounting layer 622: Second metal layer 623: Second gate wiring layer 624: Third detection wiring layer 625: Temperature detection wiring layer 63: Sleeve 68, 69: First bonding layer, second bonding layer 71: Heat dissipation member 71A: Mounting surface 711, 712: First convex portion, second convex portion 713: Fitting portion 72: Bonding layer 73: Jig 731: Base 732: Pin 80: Target member 81, 82: First engaging portion, second engaging portion 91: On-board charger 92: Storage battery 93: Drive system 931: Inverter 932: Drive source z: First direction x: Second direction y: Third direction

Claims

1. A semiconductor device comprising: a first conductive layer; a first semiconductor element conductive to the first conductive layer; a target member; and a sealing resin covering the first conductive layer, the first semiconductor element, and a portion of the target member, wherein the sealing resin has a first surface facing a first direction and a first opening opening from the first surface, and the target member has a first engagement portion exposed from the first opening.

2. The semiconductor device according to claim 1, wherein, when viewed in the first direction, the first engagement portion is located inward from the periphery of the first opening, and in the first direction, the first engagement portion is spaced apart from the first surface.

3. The semiconductor device according to claim 2, wherein, when viewed in the first direction, the first opening is located inward from the periphery of the first surface.

4. The semiconductor device described in claim 3, further comprising an insulating layer located on the opposite side of the first semiconductor element with respect to the first conductive layer in the first direction, the first conductive layer being bonded to the insulating layer, the first semiconductor element being conductively bonded to the first conductive layer, and at least a portion of the insulating layer being covered with the sealing resin.

5. The semiconductor device according to claim 4, wherein said first surface faces a side on which said insulating layer is located with respect to said first conductive layer in said first direction.

6. The semiconductor device according to claim 5, further comprising a heat dissipation layer located on the opposite side of said insulating layer to said first conductive layer, said heat dissipation layer being bonded to said insulating layer, and said heat dissipation layer being exposed from said first surface.

7. The semiconductor device according to claim 6, further comprising a first terminal electrically connected to said first conductive layer, a portion of said first terminal protruding from said sealing resin.

8. The semiconductor device according to claim 7, wherein the target member includes a first dummy terminal, and the first dummy terminal is spaced apart from the first conductive layer and the first terminal.

9. The semiconductor device according to claim 8, wherein the first engagement portion is spaced apart from the insulating layer when viewed in the first direction.

10. The semiconductor device according to claim 9, wherein the first engagement portion penetrates the first dummy terminal in the first direction.

11. The semiconductor device according to claim 9, wherein said first engagement portion is recessed from said first dummy terminal on a side opposite to a side toward which said first surface faces in said first direction.

12. The semiconductor device according to claim 10 or 11, further comprising a dummy layer located on the opposite side of the insulating layer to the heat dissipation layer and separated from the first conductive layer, the composition of the dummy layer being the same as the composition of the first conductive layer, the dummy layer being bonded to the insulating layer, and the first dummy terminal being bonded to the dummy layer.

13. The semiconductor device according to claim 6, wherein the target member is the insulating layer, and the first engagement portion penetrates the insulating layer in the first direction.

14. The semiconductor device described in claim 9, wherein the sealing resin has a second surface facing opposite the first surface in the first direction, the first opening penetrates the sealing resin from the first surface to the second surface, and the first engagement portion is spaced apart from the second surface in the first direction.

15. The semiconductor device described in claim 14, further comprising a second dummy terminal spaced apart from the first conductive layer and the first terminal and exposed from the sealing resin, the sealing resin being spaced apart from the first opening and having a second opening opening from the first surface, the second dummy terminal having a second engagement portion exposed from the second opening, and when viewed in the first direction, the second engagement portion being located inward from the periphery of the second opening.

16. The semiconductor device described in claim 15, wherein the second opening penetrates the sealing resin from the first surface to the second surface, the second engagement portion penetrates the second dummy terminal in the first direction, the second engagement portion is spaced apart from the first surface and the second surface in the first direction, and the shape of the second engagement portion is different from the shape of the first engagement portion when viewed in the first direction.

17. The semiconductor device of claim 16, further comprising: a second conductive layer located on the opposite side of the insulating layer from the heat dissipation layer and bonded to the insulating layer; a second semiconductor element conductively bonded to the second conductive layer and conductive to the first semiconductor element; and a third terminal conductive to the second conductive layer, wherein the sealing resin has a third surface and a fourth surface facing opposite each other in a second direction perpendicular to the first direction, a portion of the first terminal protruding from the third surface, a portion of the third terminal protruding from the fourth surface, and the first dummy terminal and the second dummy terminal are exposed from the fourth surface.

18. A semiconductor module comprising: a semiconductor device according to claim 9; and a heat dissipation member having a mounting surface opposite to said first surface, wherein said heat dissipation layer is bonded to said mounting surface, and said heat dissipation member has a first convex portion protruding from said mounting surface, said first convex portion being inserted into said first opening and engaging with said first engagement portion.

19. The semiconductor module according to claim 18, further comprising a bonding layer that bonds said mounting surface and said heat dissipation layer, said bonding layer including a sintered body of metal particles.

20. A vehicle comprising: a driving source; and the semiconductor module according to claim 17, wherein the semiconductor module is electrically connected to the driving source.

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