System, device and method for activating transistors with different semiconductor technology in parallel

Abstract

The invention relates to a method, a device and a system for activating a plurality of transistors with different semiconductor technology in parallel by means of an application-specific integrated circuit. The method comprises the steps of: applying a supply voltage to a first transistor with a first semiconductor technology and to a second transistor with a second semiconductor technology; charging the first transistor with a first gate charging current and / or charging the second transistor with a second gate charging current; determining a switching-relevant transistor parameter of the first transistor in response to the first gate charging current and / or determining a switching-relevant transistor parameter of the second transistor in response to the second gate charging current; adapting an activation profile for switching the first transistor on the basis of the determined transistor parameter of the first transistor and adapting an activation profile for switching the second transistor on the basis of the determined transistor parameter of the first transistor and / or the determined transistor parameter of the second transistor; and activating the first transistor in accordance with the adapted activation profile for switching the first transistor and / or activating the second transistor in accordance with the adapted activation profile for switching the second transistor.

Description

[0001] Description

[0002] title

[0003] System, device and method for parallel control of transistors of different semiconductor technologies

[0004] The present invention relates to a system, a device and a method for parallel driving of transistors of different semiconductor technologies, in particular a system with parallel-connected Si-IGBTs and SiC-MOSFETs with a single application-specific integrated circuit for parallel driving of the at least two transistors.

[0005] State of the art

[0006] In conventional circuits, transistors based on different semiconductor technologies, such as Si-IGBTs (silicon-insulated-gate bipolar transistors, Si-IGBTs) or SiC-MOSFETs (silicon carbide metal-oxide-semiconductor field-effect transistors, SiC-MOSFETs), are connected in parallel to utilize the advantages of the respective semiconductor technology.

[0007] Si IGBTs are used, among other things, because they can handle high voltages and / or currents, making them useful for applications with large motor drives, for example. Si IGBTs can also exhibit low conduction losses, which can be advantageous, for example, in applications with high continuous currents.

[0008] SiC MOSFETs are used, among other things, because they can exhibit low switching losses, which makes them efficient for applications with high switching frequencies, such as motor drives. SiC MOSFETs can also operate at high switching speeds, enabling, for example, more precise control of motor drives. In certain load ranges, SiC MOSFETs can also exhibit low conduction losses. Furthermore, the high temperature tolerance of SiC MOSFETs can be advantageous, for example, due to reduced cooling requirements for a control system.

[0009] In conventional circuits, due to the different behavior of the transistors according to the different semiconductor technologies, separate controllers adapted to the respective semiconductor technology are also used to switch the transistors in parallel circuits.

[0010] DE 10 2019 218 998 A1 discloses a drive circuit and a method for driving at least one power transistor. The method comprises applying a supply voltage to a first power transistor; charging the first power transistor with a first gate charging current from a first controllable current source for the first power transistor; determining a switching-relevant transistor parameter of the first power transistor in response to the first gate charging current; adapting a drive profile for switching the first power transistor depending on the determined transistor parameter of the first power transistor, and driving the first power transistor according to the adapted drive profile.

[0011] EP 2 445 110 A1 discloses a device having two or more electrical switching devices connected in parallel or in series, each switching device having a control terminal and the device having two or more intelligent gate driver units for switching the switching devices.

[0012] JP2009225506A discloses short circuit determining means which determine a short circuit of a switching element using comparing means.

[0013] Zeng, th International Symposium on Power Semiconductor Devices and ICs (ISPSD), Prague, Czech Republic, 2016, pp. 407 to 410, disclose a method for measuring IGBT gate charge imbalances.

[0014] Disclosure of the invention The invention provides a system, a device and a method for parallel control of different semiconductor technologies with the features of the independent patent claims

[0015] Preferred embodiments are the subject of the respective subclaims.

[0016] The invention enables power semiconductor switches based on different semiconductor technologies to be controlled individually without the need for additional technology-dependent circuitry.

[0017] According to a first aspect, the invention relates to a method for parallel driving of a plurality of transistors of different semiconductor technologies with an application-specific integrated circuit, comprising the steps of: applying a supply voltage to a first transistor of a first semiconductor technology and to a second transistor of a second semiconductor technology; charging the first transistor with a first gate charging current and / or charging the second transistor with a second gate charging current; determining a switching-relevant transistor parameter of the first transistor in response to the first gate charging current and / or determining a switching-relevant transistor parameter of the second transistor in response to the second gate charging current;Adapting a control profile for switching the first transistor based on the determined transistor parameter of the first transistor and adapting a control profile for switching the second transistor based on the determined transistor parameter of the first transistor and / or the determined transistor parameter of the second transistor; and controlling the first transistor according to the adapted control profile for switching the first transistor and / or controlling the second transistor according to the adapted control profile for switching the second transistor.

[0018] According to one development, the control profile for switching the second transistor is stored in a lookup table in the form of a parameter set, and the first transistor and / or the second transistor are controlled based on the parameter set in the lookup table. According to one development, the first transistor is charged with the first gate charging current and the second transistor is charged with the second gate charging current simultaneously.

[0019] According to a further development, the determination of the switching-relevant transistor parameter of the first transistor in response to the first gate charging current and the determination of the switching-relevant transistor parameter of the second transistor in response to the second gate charging current take place simultaneously.

[0020] According to a further development, the first transistor is driven according to the adapted drive profile for switching the first transistor and the second transistor is driven according to the adapted drive profile for switching the second transistor simultaneously.

[0021] According to a further development, the method comprises: selecting the first semiconductor technology; and switching on or off the transistors of the first semiconductor technology.

[0022] According to a second aspect, the invention relates to a system for parallel driving a plurality of transistors of different semiconductor technologies using an application-specific integrated circuit; comprising: the plurality of transistors of different semiconductor technologies; and the application-specific integrated circuit, wherein the application-specific integrated circuit is configured to: apply a supply voltage to a first transistor of a first semiconductor technology and to a second transistor of a second semiconductor technology; charge the first transistor with a first gate charging current and / or charge the second transistor with a second gate charging current; determine a switching-relevant transistor parameter of the first transistor in response to the first gate charging current and / or determine a switching-relevant transistor parameter of the second transistor in response to the second gate charging current;Adapting a control profile for switching the first transistor based on the determined transistor parameter of the first transistor and adapting a control profile for switching the second transistor based on the determined transistor parameter of the first transistor and / or the determined transistor parameter of the second transistor; and controlling the first transistor according to the adapted control profile for switching the first transistor and / or controlling the second transistor according to the adapted control profile for switching the second transistor.

[0023] According to a further development, the application-specific integrated circuit is configured to: select the first semiconductor technology of the different semiconductor technologies; and turn on or off the transistors of the first semiconductor technology.

[0024] Short description of the drawings

[0025] It shows:

[0026] Figure 1 is a schematic representation of a conventional system having a plurality of devices for driving a corresponding plurality of transistors;

[0027] Figure 2 is a schematic representation of a system with a single exemplary device for driving a plurality of transistors based on different semiconductor technologies, according to an embodiment of the invention; and

[0028] Figure 3 is a schematic representation of an exemplary method for driving a plurality of transistors based on different semiconductor technologies according to an embodiment of the invention.

[0029] In all figures, identical or functionally equivalent elements and devices are provided with the same reference numerals. The numbering of process steps serves the purpose of clarity and is generally not intended to imply a specific chronological order. In particular, several process steps can be performed simultaneously. Description of the Embodiments

[0030] Figure 1 shows a schematic representation of a conventional system 1000 having a plurality of devices 1210 and 1220 for driving a corresponding plurality of transistors 1310 and 1320. Each of the transistors 1310 and 1320 is driven by a separate device 1210 or 1220

[0031] A central processing unit 1100 may be connected to the plurality of devices 1210 and 1220 for driving the corresponding plurality of transistors 1310 and 1320.

[0032] Figure 2 shows a schematic representation of a system 2000 with a single exemplary device 2200 for driving a plurality of transistors 2310 and 2320 based on different semiconductor technologies, according to an embodiment of the invention.

[0033] The device 2200 may be an application-specific integrated circuit (ASIC) configured to drive the plurality of transistors 2310 and 2320. In particular, the device 2200 may be configured to drive at least one Si-IGBT and at least one SiC-MOSFET.

[0034] A central processing unit 2100 may be connected to the device 2200 for driving the plurality of transistors 2310 and 2320.

[0035] The device 2200 can have a plurality of outputs. One, several, or all outputs can be current- or voltage-controlled. One, several, or all outputs can be individually parameterized, for example, to define a time response and / or an amplitude at a respective output. Parameters can be adjustable during operation of the device 2200 and / or the system 2000, for example, depending on an operating point of one or more components of the system, in particular an electric motor and / or a respective semiconductor technology of a transistor of the plurality of transistors 2310 and 2320.During operation, depending on a current operating state, one or more semiconductor technologies may be selected to optimize at least one of a power dissipation, a switching speed, a temperature with respect to maintaining a maximum or a minimum temperature and / or power threshold of the system and / or components thereof.

[0036] For small load currents, for example, only SiC MOSFETs can be switched on, while for larger currents, Si IGBTs, for example, can be switched on additionally or alternatively. Switching on and / or off additional or alternative transistors based on one or more semiconductor technologies can also occur during a sine period of an output current. A method for controlling the transistors can be implemented in the device 2200 itself and / or in a higher-level control unit, for example, in the central processing unit 2100.

[0037] The device 2200 may be configured to measure the performance parameters of the plurality of transistors 2310 and 2320, for example, to initially re-parameterize one, several, or all outputs of the device 2200, i.e., before operation, or during operation.

[0038] Figure 3 shows a schematic representation of an exemplary method 3000 for driving a plurality of transistors with the device 2200 described with reference to Figure 2, wherein the plurality of transistors are based on different semiconductor technologies.

[0039] The method 3000 for driving the plurality of transistors may include several steps, which are described in detail below.

[0040] In a step 3100, a first supply voltage can be applied to a first transistor of a first semiconductor technology and a second supply voltage can be applied to a second transistor of a second semiconductor technology. The first supply voltage and the second supply voltage can be identical. In a step 3200, the first transistor can be charged with a first gate charging current and / or the second transistor can be charged with a second gate charging current. The transistors can be charged simultaneously or staggered, i.e., at different times.

[0041] In a step 3300, a switching-relevant transistor parameter of the first transistor can be determined in response to the first gate charging current and / or a switching-relevant transistor parameter of the second transistor can be determined in response to the second gate charging current. The switching-relevant transistor parameter for the transistors can be determined simultaneously or in a staggered manner.

[0042] In a step 3400, a control profile for switching the first transistor can be adjusted based on the determined transistor parameter of the first transistor, and a control profile for switching the second transistor can be adjusted based on the determined transistor parameter of the first transistor and based on the determined transistor parameter of the second transistor. The adjustment of the control profile for switching the transistors can occur simultaneously or in a staggered manner.

[0043] In a further step 3500, the first transistor can be driven according to the adapted drive profile and / or the second transistor can be driven according to the adapted drive profile.

[0044] The transistor parameters can be re-determined or measured before assembly and / or after assembly, for example, at regular or irregular time intervals. In particular, the transistor parameters can be stored in a lookup table, for example, in a memory, and step 3500 can be performed based on the transistor parameters stored in the lookup table.

[0045] A first transistor can be, for example, a Si-IGBT, a second transistor can be, for example, a SiC-MOSFET, although the invention is not limited to these semiconductor technologies. A control profile can be, for example, a gate charging current-time diagram. Such a diagram can be, for example, analog or a sequence of time-discrete gate current values ​​as a function of time. Such a control profile can be variably adjustable in time intervals and can be adapted based on the respective measured transistor parameter. A switching-relevant transistor parameter can be, for example, a threshold voltage, a transconductance gm=di / dt, the capacitances Cgd, Cgs, Cds, where g denotes the gate, s the source, and d the drain, or the corresponding gate charges, although the invention is not limited to these.

Claims

Claims 1. A method (3000) for parallel driving of a plurality of transistors (2310, 2320) of different semiconductor technologies with an application-specific integrated circuit (2200), comprising the steps: Applying (3100) a supply voltage to a first transistor (2310) of a first semiconductor technology and to a second transistor (2320) of a second semiconductor technology; Charging (3200) the first transistor (2310) with a first gate charging current and / or charging (3200) the second transistor (2320) with a second gate charging current; Determining (3300) a switching-relevant transistor parameter of the first transistor (2310) in response to the first gate charging current and / or determining (3300) a switching-relevant transistor parameter of the second transistor (2320) in response to the second gate charging current; Adapting (3400) a control profile for switching the first transistor (2310) based on the determined transistor parameter of the first transistor (2310) and adapting (3400) a control profile for switching the second transistor (2320) based on the determined transistor parameter of the first transistor (2310) and / or the determined transistor parameter of the second transistor (2320); and Driving (3500) the first transistor (2310) according to the adapted driving profile for switching the first transistor (2310) and / or driving (3500) the second transistor (2320) according to the adapted driving profile for switching the second transistor (2320).

2. The method (3000) according to claim 1, wherein the control profile for switching the first transistor (2310) and the control profile for switching the second transistor (2320) are stored in the form of a parameter set in a lookup table, and the control (3500) of the first transistor (2310) and / or the control (3500) of the second transistor (2320) is carried out based on the parameter set in the lookup table.

3. The method (3000) according to claim 1 or 2, wherein the charging (3200) of the first transistor (2310) with the first gate charging current and the charging (3200) of the second transistor (2320) with the second gate charging current occur simultaneously; and / or wherein the determining (3300) of the switching-relevant transistor parameter of the first transistor (2310) in response to the first gate charging current and the determining (3300) of the switching-relevant transistor parameter of the second transistor (2320) in response to the second gate charging current occur simultaneously.

4. The method (3000) according to any one of claims 1 to 3, wherein the driving (3500) of the first transistor (2310) according to the adapted driving profile for switching the first transistor (2310) and the driving (3500) of the second transistor (2320) according to the adapted driving profile for switching the second transistor (2320) occur simultaneously.

5. The method (3000) according to any one of claims 1 to 4, wherein the method (3000) comprises: Selecting the first semiconductor technology; and turning on or off the transistors of the first semiconductor technology.

6. A system (2000) for parallel driving of a plurality of transistors (2310, 2320) of different semiconductor technologies with an application-specific integrated circuit (2200); comprising: the plurality of transistors (2310, 2320) of different semiconductor technologies; and the application-specific integrated circuit (2200), wherein the application-specific integrated circuit (2200) is configured to: apply (3100) a supply voltage to a first transistor (2310) of a first semiconductor technology and to a second transistor (2320) of a second semiconductor technology; Charging (3200) the first transistor (2310) with a first gate charging current and / or charging (3200) the second transistor (2320) with a second gate charging current; Determining (3300) a switching-relevant transistor parameter of the first transistor (2310) in response to the first gate charging current and / or determining (3300) a switching-relevant transistor parameter of the second transistor (2320) in response to the second gate charging current; Adapting (3400) a control profile for switching the first transistor (2310) based on the determined transistor parameter of the first transistor (2310) and adapting (3400) a control profile for switching the second transistor (2320) based on the determined transistor parameter of the first transistor (2310) and / or the determined transistor parameter of the second transistor (2320); and controlling (3500) the first transistor (2310) according to the adapted control profile for switching the first transistor (2310) and / or controlling (3500) the second transistor (2320) according to the adapted control profile for switching the second transistor (2320).

7. The system (2000) according to claim 6, wherein the control profile for switching the first transistor (2310) and the control profile for switching the second transistor (2320) are stored in the form of a parameter set in a lookup table, and the control (3500) of the first transistor (2310) and / or the control (3500) of the second transistor (2320) is carried out based on the parameter set in the lookup table 8. The system (2000) of claim 6 or 7, wherein charging (3200) the first transistor (2310) with the first gate charging current and charging (3200) the second transistor (2320) with the second gate charging current occur simultaneously; and / or wherein determining (3300) the switching-relevant transistor parameter of the first transistor (2310) in response to the first gate charging current and determining (3300) the switching-relevant transistor parameter of the second transistor (2320) in response to the second gate charging current occur simultaneously.

9. The system (2000) of any one of claims 6 to 8, wherein driving (3500) the first transistor (2310) according to the adapted drive profile for switching the first transistor (2310) and driving (3500) the second transistor (2320) according to the adapted control profile for switching the second transistor (2320) simultaneously.

10. The system (2000) of any one of claims 6 to 9, wherein the application-specific integrated circuit (2200) is configured to: Selecting the first semiconductor technology; and turning on or off the transistors of the first semiconductor technology.

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