Power conversion device
The power conversion device addresses size, insulation, inductance, and solder joint reliability issues by using semiconductor packages with optimized terminal configurations and a wiring board design that forms efficient conductive paths for upper and lower arm circuits.
Patent Information
- Application Number
- PCT/JP2024/037963
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-27
- Filing Date
- 2024-10-24
- Publication Date
- 2025-06-05
AI Technical Summary
Existing power conversion devices face challenges in reducing size, ensuring insulation distance, minimizing inductance, and improving the reliability of solder joints.
The power conversion device incorporates semiconductor packages with specific terminal configurations and a wiring board design that forms conductive paths for upper and lower arm circuits, ensuring insulation distance and reducing inductance, while also improving heat dissipation and solder joint reliability.
This configuration achieves a reduced size, ensures adequate insulation distance, reduces inductance, and enhances the reliability of solder joints, thereby improving the overall performance of the power conversion device.
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Figure JP2024037963_05062025_PF_FP_ABST
Abstract
Description
Power Conversion Device
[0001] The present invention relates to a power conversion device.
[0002] For example, when a structure in which terminals protruding from a semiconductor module are bent in the stacking direction is adopted for the inverter structure, the stress at the solder joints between the terminals and the wiring board can be alleviated, thereby ensuring the reliability of the solder joints. Patent Document 1 listed below discloses a configuration in which, in an inverter having the above structure, multiple semiconductor packages are simultaneously mold-sealed, thereby improving reliability and yield.
[0003] Patent No. 5370308
[0004] The structure described in Patent Document 1 ensures the reliability of the solder joints, but it also increases the size of the semiconductor module, and at the same time, it is necessary to solve the problem of ensuring an insulating distance between terminals.
[0005] The power conversion device comprises a semiconductor package having a semiconductor element and constituting upper and lower arm circuits, respectively, and a wiring board having a wiring layer and electrically connecting the wiring layer to one side of the semiconductor package, wherein the semiconductor package has a main electrode formed on one side of the semiconductor element and a first conductor connected to the high potential side of the upper and lower arm circuits, and a main electrode formed on the other side of the semiconductor element and a second conductor connected to the low potential side of the upper and lower arm circuits, and the wiring board and the semiconductor package form a conductive path of an inverter main circuit including the upper and lower arm circuits by connecting the second conductor connected to the low potential side to the wiring layer.
[0006] It is possible to provide a power conversion device that achieves reduced size, ensured insulation distance, reduced inductance, and improved reliability of solder joints.
[0007] 1 is a cross-sectional view showing a connection structure between a semiconductor package and a wiring board in a power conversion device according to one embodiment of the present invention, and a power circuit diagram showing upper and lower arm circuits; 2 is a plan view showing a configuration of a terminal provided on the first conductor side according to one embodiment of the present invention; 3 is a cross-sectional view showing a configuration in which a cooler is connected to a wiring board according to one embodiment of the present invention; and 4 is a cross-sectional view showing a double-sided cooling structure according to one embodiment of the present invention.
[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and some omissions and simplifications have been made as appropriate for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.
[0009] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.
[0010] (One embodiment of the present invention and overall configuration) (FIGS. 1 and 2) FIG. 1(a) is a diagram showing a semiconductor package mounted on a wiring board, and FIG. 1(b) is a power circuit diagram of the upper and lower arm circuits of FIG. 1(a).
[0011] The wiring board 1 has a plurality of wiring layers 2. An upper arm semiconductor package 11 and a lower arm semiconductor package 12 are mounted on the wiring board 1, and one surface of each package is electrically connected to the wiring layer 2 that is the topmost layer of the plurality of wiring layers 2 on the front surface side of the board. This forms a conductive path for the main circuit of the power conversion device including the upper and lower arm circuits. The upper arm semiconductor package 11 and the lower arm semiconductor package 12 respectively constitute the upper and lower arm circuits of the semiconductor package and include a first conductor 4, a second conductor 5, a semiconductor element 6, a high-potential side terminal 9, and a signal terminal 13, and these components are molded and sealed with a resin sealing member 3.
[0012] In each semiconductor package, the first conductor 4 is connected to the high potential side of the upper and lower arm circuits, which is the collector side in the case of an IGBT and the drain side in the case of a MOSFET. The second conductor 5 is connected to the low potential side of the upper and lower arm circuits, which is the emitter side in the case of an IGBT and the source side in the case of a MOSFET. In the explanation of this invention, the semiconductor package will be described as having a MOSFET structure.
[0013] The first conductor 4 is connected to a main electrode formed on one surface of the semiconductor element 6 and a high-potential side terminal 9. A portion of the high-potential side terminal 9 protrudes to the outside of the sealing member 3 from a surface of the sealing member 3 different from the surface on which the exposed surface of the second conductor 5 connected to the wiring layer 2 is provided. The high-potential side terminal 9 has a bent portion 9a bent in the stacking direction, which reduces the rigidity of the terminal portion and improves solder reliability.
[0014] The high-potential side terminal 9 is electrically connected at the tip of the terminal protruding outward from the sealing member 3 to the wiring layer 2 of the wiring substrate 1 via a bonding member 8. The bonding member 8 is made of a material that is thermally conductive and electrically conductive, such as solder or sintering.
[0015] The semiconductor element 6 is connected to the signal terminal 13 via a bonding wire. In the semiconductor package, the signal terminal 13 protruding from the surface opposite to the high-potential side terminal 9 to the outside of the sealing member 3 similarly has a bent portion 13a bent in the stacking direction, and the tip of the terminal is electrically connected to the wiring layer 2 of the wiring board 1 via a bonding member 8.
[0016] 2, for example, three high potential side terminals 9 and two signal terminals 13 are provided so as to protrude outward from opposing surfaces of the semiconductor package. The three high potential side terminals are adjacent to each other in the planar direction, which allows the stress load acting on the terminals to be distributed.
[0017] The signal terminal 13 protrudes from the sealing member 3 to the outside, and has a structure in which a bent portion is provided that is bent in the stacking direction, similar to the high-potential side terminal 9. The signal terminal 13 is electrically connected to the wiring board 1 via the bonding member 8 at the tip of the terminal that protrudes from the sealing member 3 to the outside.
[0018] The second conductor 5 is connected to the surface of the semiconductor element 6 opposite to the surface connected to the first conductor 4. The wiring board 1 has a first through hole 7a in the thickness direction at a portion connected to the exposed surface of the second conductor 5 provided on one surface of the semiconductor package. The first through hole 7a is provided so as to pass through the wiring board 1 in the thickness direction. The second conductor 5 is electrically and thermally connected to each wiring layer 2 of the wiring board 1 via the first through hole 7a.
[0019] In this way, by consolidating the drain side electrical connection to the first conductor 4 and the source side electrical connection to the second conductor 5, which are at the same potential and on different sides of the semiconductor package, not only can an insulation distance be ensured in advance, but noise can also be reduced because the signal terminal 13 is far from the source side. In addition, the number of drain terminals increases the number of current paths, and further, the second conductor 5, which is connected to the low potential side of the semiconductor package, is connected to the wiring board 1 to form the inverter main circuit, so that positive and negative currents flow in opposite directions within the wiring board 1, contributing to a reduction in inductance.
[0020] (FIG. 3) The first wiring board 1 is thermally connected to the first cooler 20a via an insulating heat dissipation member 10 on the surface opposite to the surface where the upper arm semiconductor package 11 and the lower arm semiconductor package 12 are connected. The heat dissipation member 10 is an insulating material such as a heat dissipating resin or a ceramic plate. This ensures insulation between the upper arm semiconductor package 11, the lower arm semiconductor package 12, and the first cooler 20a, and also dissipates heat generated by the semiconductor element 6 in the semiconductor package and the wiring board 1 to the first cooler 20a via the through holes 7, thereby reducing the temperature.
[0021] (FIG. 4) The upper arm semiconductor package 11 and the lower arm semiconductor package 12 are thermally connected to the second cooler 20b via the heat dissipation member 10 on the side opposite to the side connected to the wiring board 1. In this way, the power conversion device may have not only a single-sided cooling structure as shown in FIG. 3 but also a double-sided cooling structure.
[0022] (First Modification) (Fig. 5) In the double-sided cooling structure shown in Fig. 4, for example, the second cooler 20b (Fig. 4) may have cooling fins 22, and the upper arm semiconductor package 11 and the lower arm semiconductor package 12 may be thermally connected to the cooling fins 22 via insulating heat dissipation members 10 on the surfaces opposite to the surfaces connected to the wiring board 1. The cooling fins 22 are provided in separate sections corresponding to the upper arm semiconductor package 11 and the lower arm semiconductor package 12, and separate coolers 21 are provided between the cooling fins 22.
[0023] The divided cooler 21 has a flow path formed by the cooler cover 23, and a refrigerant flows through the interior, ensuring heat dissipation from the semiconductor package via the cooling fins 22. The divided cooler 21 also ensures airtightness of the water path by filling the connection between the upper arm semiconductor package 11 and the lower arm semiconductor package 12 with a seal member 23a. This configuration not only ensures a heat dissipation configuration that follows the individual semiconductor packages, but also enables the heat dissipation member 10 between the semiconductor package and the cooling fins 22 to be made as thin as possible, thereby reducing thermal resistance.
[0024] (Second Modification) (Fig. 6) Fig. 6(a) is a cross-sectional view showing an example in which through holes of different sizes are provided in wiring board 1, and Fig. 6(b) is a plan view illustrating the through holes of different sizes in Fig. 6(a). In addition to first through holes 7a (Fig. 1) connecting upper arm semiconductor package 11 and lower arm semiconductor package 12 to heat dissipation member 10 and first cooler 20a, wiring board 1 may have second through holes 7b provided in the thickness direction at the same positions in the stacking direction as semiconductor elements 6 are provided.
[0025] The second through hole 7b has a larger diameter than the first through hole 7a and is connected to the second conductor 5. The second through hole 7b may be filled with a highly thermally conductive bonding material 8. In this way, by separating the current path through the first through hole 7a and the heat path through the second through hole 7b and arranging the second through hole 7b in alignment with the stacking direction of the semiconductor element 6 in the semiconductor package, the heat dissipation performance of the semiconductor package can be improved.
[0026] (Third Modification) (FIG. 7) Instead of the second through-hole 7b shown in FIG. 6, the wiring board 1 may be provided with a thermally conductive conductor member 24 inserted in the thickness direction at the same position in the stacking direction as the semiconductor element 6. The conductor member 24 is, for example, a copper inlay or a metal block. In this way, the current path via the first through-hole 7a and the heat path via the conductor member 24 are separated, ensuring both electrical connection and heat dissipation, thereby further improving heat dissipation.
[0027] According to the embodiment of the present invention described above, the following advantageous effects are achieved.
[0028] (1) A power conversion device includes semiconductor packages 11 and 12 having a semiconductor element 6 and constituting upper and lower arm circuits, respectively, and a wiring board 1 having a wiring layer 2 and electrically connecting the wiring layer 2 to one surfaces of the semiconductor packages 11 and 12, wherein the semiconductor packages 11 and 12 have a first conductor 4 connected to a main electrode formed on one surface of the semiconductor element 6 and to the high-potential sides of the upper and lower arm circuits, and a second conductor 5 connected to a main electrode formed on the other surface of the semiconductor element 6 and to the low-potential sides of the upper and lower arm circuits, and the wiring board 1 and the semiconductor packages 11 and 12 form a conductive path of an inverter main circuit including the upper and lower arm circuits by connecting the second conductor 5 connected to the low-potential side to the wiring layer 2. This makes it possible to provide a power conversion device that is reduced in size, ensures insulation distance, reduces inductance, and improves the reliability of solder joints.
[0029] (2) The semiconductor packages 11 and 12 each have a high-potential side terminal 9 electrically connected to the first conductor 4, and a sealing member that seals the first conductor 4, the second conductor 5, the semiconductor element 6, and the high-potential side terminal 9, and the high-potential side terminal 9 protrudes to the outside of the sealing member 3 from a surface of the sealing member 3 that is different from the surface on which the exposed surface of the second conductor 5 is provided. This contributes to ensuring an insulation distance.
[0030] (3) The high-potential terminal 9 includes a plurality of terminals adjacent to each other in the planar direction, which allows the stress load applied to the terminals to be distributed.
[0031] (4) The wiring board 1 has first through holes 7a in the thickness direction at the portions where the second conductors 5 are connected, and the second conductors 5 are electrically and thermally connected to the wiring layers 2 of the wiring board 1 via the first through holes 7a. This contributes to improving heat dissipation.
[0032] (5) The wiring board 1 is thermally connected to the first cooler 20a via the insulating heat dissipation member 10. This contributes to improving heat dissipation.
[0033] (6) The semiconductor package is thermally connected to the second cooler 20b via the insulating heat dissipation member 10. This configuration contributes to improving heat dissipation.
[0034] (7) The second cooler 20b has cooling fins 22 provided corresponding to the upper and lower arm semiconductor packages 11, 12. This configuration can reduce thermal resistance.
[0035] (8) In the portion of the wiring board 1 connected to the second conductor 5, the wiring board 1 has a second through-hole 7b having a larger diameter than the first through-hole 7a at the same position in the stacking direction as the semiconductor element 6, and the second through-hole 7b is filled with a thermally conductive bonding member 8. This improves heat dissipation.
[0036] (9) The wiring board 1 has a thermally conductive conductor member 24 that is inserted in the thickness direction at the portion connected to the second conductor 5 and at the same position in the stacking direction as the semiconductor element 6. This improves heat dissipation.
[0037] The present invention is not limited to the above-described embodiments, and various modifications and combinations of other configurations are possible without departing from the spirit of the present invention. Furthermore, the present invention is not limited to those having all of the configurations described in the above-described embodiments, and includes those in which some of the configurations are omitted.
[0038] REFERENCE SIGNS LIST 1 wiring substrate 2 wiring layer 3 sealing member 4 first conductor 5 second conductor 6 semiconductor element 7 through hole 7a first through hole 7b second through hole 8 joining member 9 high potential side terminal 9a bent portion 10 heat dissipation member 11 upper arm semiconductor package 12 lower arm semiconductor package 13 signal terminal 13a bent portion 20 cooler 20a first cooler 20b second cooler 21 divided cooler 22 cooling fin 23 cooler cover 23a sealing member 24 conductive member
Claims
1. A power conversion device comprising: a semiconductor package having a semiconductor element and constituting upper and lower arm circuits; and a wiring board having a wiring layer and electrically connecting the wiring layer to one side of the semiconductor package, wherein the semiconductor package has a main electrode formed on one side of the semiconductor element and a first conductor connected to the high potential sides of the upper and lower arm circuits, and a main electrode formed on the other side of the semiconductor element and a second conductor connected to the low potential sides of the upper and lower arm circuits, wherein the wiring board and the semiconductor package form a conductive path of an inverter main circuit including the upper and lower arm circuits by connecting the second conductor connected to the low potential side to the wiring layer.
2. A power conversion device as described in claim 1, wherein the semiconductor package has a high-potential side terminal electrically connected to the first conductor, and a sealing member that seals the first conductor, the second conductor, the semiconductor element, and the high-potential side terminal, and the high-potential side terminal protrudes outside the sealing member from a surface of the sealing member different from a surface on which the exposed surface of the second conductor is provided.
3. A power conversion device according to claim 2, wherein the high potential side terminal includes a plurality of terminals adjacent to each other in a planar direction.
4. A power conversion device as described in claim 1, wherein the wiring board has a first through hole in the board thickness direction at a portion where the wiring board is connected to the second conductor, and the second conductor is electrically and thermally connected to each wiring layer of the wiring board via the first through hole.
5. A power conversion device according to claim 1, wherein the wiring board is thermally connected to the first cooler via an insulating heat dissipation member.
6. A power conversion device according to claim 5, wherein the semiconductor package is thermally connected to the second cooler via the insulating heat dissipation member.
7. A power conversion device according to claim 6, wherein said second cooler has cooling fins provided in correspondence with said upper and lower arm circuits in said semiconductor package.
8. A power conversion device as described in claim 4, wherein the wiring board has, in a portion connected to the second conductor, a second through hole having a larger diameter than the first through hole at the same position in the stacking direction as the semiconductor element is provided, and the inside of the second through hole is filled with a thermally conductive material.
9. A power conversion device as described in claim 1, wherein the wiring board has a thermally conductive conductor member at a portion connected to the second conductor, the thermally conductive conductor member being inserted in the thickness direction of the board at the same position in the stacking direction as the semiconductor element is provided.
Citation Information
Patent Citations
Semiconductor device and manufacturing method thereof
JP2021048183A