Method for manufacturing semiconductor device

Abstract

In this method for manufacturing a semiconductor device, a divided layer is formed on a base material of a wide bandgap semiconductor. Next, the main surface of the base material is held by a dummy substrate formed of a wide band gap semiconductor of the same or different kind as the base material (first holding step). Thereafter, a portion on the main surface side from the divided layer is separated from the base material while in a state being held on the dummy substrate as a semiconductor substrate. Then, at least a part of the semiconductor device is formed on the semiconductor substrate. Next, the surface of the semiconductor substrate is held by a holding part different from the dummy substrate. Thereafter, the dummy substrate is separated from the semiconductor substrate (separation step). When these steps are repeatedly executed, in the first holding step, the dummy substrate separated in the separation step is reused as the dummy substrate used therein.

Description

Semiconductor device manufacturing method

[0001] The present invention relates to semiconductor device manufacturing techniques.

[0002] 2. Description of the Related Art There is a semiconductor device manufacturing technology that includes a process of thinning a semiconductor wafer (for example, a wafer having a thickness of about 350 μm) to a desired thickness (for example, a thickness of 150 μm or less) by grinding it.

[0003] In recent years, wide bandgap (hereinafter abbreviated as "WBG") semiconductors such as SiC have attracted attention as semiconductor materials that enable semiconductor devices to operate normally even at temperatures reaching 250°C or higher. WBG semiconductors are also semiconductor materials that enable faster switching speeds, and for this reason, they are expected to be used as materials for semiconductor devices for high-speed communications. Furthermore, because WBG semiconductors have a dielectric strength that is more than 10 times higher than that of conventional Si semiconductor devices, they are semiconductor materials that allow for the thinning of N-type layers (drift layers) doped with low concentrations of N-type impurities. Therefore, WBG semiconductors are semiconductor materials that can possess both low resistance (low on-resistance) and high voltage resistance, and for this reason, they are also expected to be used as materials for high-voltage semiconductor devices. As such, WBG semiconductors offer various advantages as semiconductor device materials.

[0004] Japanese Patent Application Laid-Open No. 2007-250576

[0005] On the other hand, WBG semiconductors are expensive semiconductor materials, and therefore, when semiconductor wafers are thinned by grinding as in the past, the portions of the semiconductor wafer removed by grinding are wasted, resulting in a significant increase in material costs.

[0006] Furthermore, when manufacturing high-voltage semiconductor devices using WBG semiconductors, it was conventionally necessary to form an N-type semiconductor layer (N-layer) by epitaxial growth. However, epitaxial growth required a long time. Furthermore, the higher the withstand voltage required for semiconductor devices, the thicker the N-layer needed to be, and the longer the time required for epitaxial growth. For this reason, forming an N-layer by epitaxial growth was one of the causes of increased running costs required for manufacturing semiconductor devices.

[0007] SUMMARY OF THE INVENTION It is therefore an object of the present invention to significantly reduce manufacturing costs in the manufacturing technology of semiconductor devices using WBG semiconductors.

[0008] A method for manufacturing a semiconductor device according to the present invention includes a dividing layer forming step, a first holding step, a dividing step, a device forming step, a second holding step, and a separating step (Aspect 1). In the dividing layer forming step, a dividing layer is formed in a wide bandgap semiconductor substrate at a predetermined depth from the main surface of the substrate, enabling the substrate to be separated at that depth. After the dividing layer forming step, in the first holding step, the main surface of the substrate is held by a dummy substrate made of the same or a different type of wide bandgap semiconductor as the substrate. After the first holding step, in the separating step, the substrate is separated at the predetermined depth using the dividing layer, thereby separating the main surface side portion from the substrate while being held by the dummy substrate as a semiconductor substrate. After the separating step, in the device forming step, at least some of the elements that will be included in the semiconductor device are fabricated into the surface side of the semiconductor substrate opposite the main surface. After the device forming step, in the second holding step, the surface of the semiconductor substrate is held by a holder separate from the dummy substrate. After the second holding step, in the separating step, the dummy substrate is separated from the semiconductor substrate. When these steps are repeatedly performed, the dummy substrate detached in the detaching step is reused as the dummy substrate used in the first holding step.

[0009] According to the above manufacturing method, by using a dummy substrate formed from a WBG semiconductor of the same type as the semiconductor substrate to be held or a different type (specifically, a different type but with a similar thermal expansion coefficient) (for example, a WBG semiconductor with a heat resistance temperature of 1800°C or higher), the difference in thermal expansion coefficient between the dummy substrate and the semiconductor substrate can be reduced, and as a result, warping that may occur during heating in a subsequent process due to the difference in thermal expansion coefficient can be suppressed. Furthermore, even when such an expensive dummy substrate formed from a WBG semiconductor is used, the above manufacturing method makes it possible to reuse the dummy substrate, allowing it to be used repeatedly and effectively without being wasted.

[0010] The method for manufacturing a semiconductor device according to the present invention may include the device formation step, the second holding step, and the separation step, which are included in the steps of the above-mentioned aspect 1, and the manufacturing method may be carried out after the division layer formation step, the first holding step, and the division step have been carried out (aspect 2).

[0011] The method for manufacturing a semiconductor device according to the present invention may include the dividing layer forming step, the first holding step, and the dividing step, which are included in the steps of the above-mentioned aspect 1, and after the manufacturing method is performed, the device forming step, the second holding step, and the separation step may be carried out (aspect 3).

[0012] In the manufacturing method according to any one of the above aspects 1 to 3, in the first holding step, dot-like or linear fixing portions for fixing the dummy substrate may be formed in the peripheral region of the main surface of the base material (aspect 4).

[0013] According to the fourth aspect, by forming the fixing portions in a dotted or linear shape, it is possible to reduce the fixing area, which results in the detachment of the dummy substrate from the semiconductor substrate relatively easily. Furthermore, by forming the fixing portions in the peripheral region, it is possible to reduce the influence (the influence of stress and heat generated during detachment) on the region inside the peripheral region (the region that will become the semiconductor device) that may occur when the dummy substrate is detached.

[0014] In the manufacturing method according to the above aspect 4, in the first holding step, a substrate having a bonding prevention layer formed in an area inside the area that will face the peripheral area of ​​the main surface of the base material may be used as the dummy substrate (aspect 5).

[0015] According to the above-mentioned aspect 5, it is possible to prevent the dummy substrate from being bonded to an inner region of the main surface of the base material that is not intended to be bonded (a region that will become a semiconductor device).

[0016] In the manufacturing method according to any one of the above-described aspects 1 to 4, the first holding step may use, as the dummy substrate, an annular substrate that holds the peripheral region of the main surface of the base material (aspect 6).

[0017] The annular dummy substrate used in the sixth aspect can be formed by using a disk-shaped substrate and hollowing out its inner portion. The hollowed-out inner portion can then be reused as a dummy substrate in the manufacture of another semiconductor substrate of a different size. This allows for effective use of the dummy substrate.

[0018] According to the present invention, it is possible to significantly reduce manufacturing costs in the manufacturing technology of semiconductor devices using WBG semiconductors.

[0019] FIG. 1 is a conceptual diagram showing a part of a manufacturing method according to an embodiment in processing order. FIG. 2 is a conceptual diagram showing a part of a continuation of FIG. 1 in processing order. FIG. 3 is a conceptual diagram showing a part of a continuation of FIG. 2 in processing order. FIG. 4 is a conceptual diagram showing a part of a continuation of FIG. 3 in processing order. FIG. 5 is a conceptual diagram showing processing following FIG. 4. FIG. 6 is a plan view showing the shape of a fixed portion formed in an embodiment. FIG. 7 is a conceptual diagram showing a part of a manufacturing method according to a first modified example in processing order. FIG. 8 is a conceptual diagram showing a part of a manufacturing method according to a second modified example in processing order. FIG. 9 is a conceptual diagram showing a first holding step performed in a third modified example. FIG. 10 is a conceptual diagram showing a first holding step performed in a fourth modified example. FIG. 11(A) is a conceptual diagram showing some steps in the first holding step performed in a fifth modified example, and FIGS. 11(B) and 11(C) are conceptual diagrams showing two further modifications of the part of the step.

[0020] Hereinafter, embodiments and modifications of the method for manufacturing a semiconductor device according to the present invention will be specifically described. The manufacturing method described below can be realized using various well-known apparatuses.

[0021] 1 to 5 are conceptual diagrams showing a manufacturing method according to an embodiment in order of processing. In this manufacturing method, an N+ layer forming step S1, a dividing layer forming step S2, a first holding step S3, a dividing step S4, a device forming step S5, a second holding step S6, a separation step S7, an electrode layer forming step S8, a transfer step S9, and a singulation step S10 are performed in this order. Each step will be described in detail below.

[0022] <N+ Layer Formation Step S1> In the N+ layer formation step S1 (see FIG. 1), first, a substrate 1 is prepared in which a WBG semiconductor is doped with N-type impurities at a low concentration. Here, "low concentration" means that the concentration of N-type impurities in the WBG semiconductor is 1×10 １７ cm －３ The WBG semiconductors include SiC, diamond, GaN, GaO, Ga ２ O ３ Semiconductor materials such as AlN, BN, GaAs, etc. may be used. In addition, a single crystal ingot formed from a WBG semiconductor may be prepared as the substrate 1, or a semiconductor wafer (e.g., a wafer with a thickness of about 350 μm) cut from the ingot may be prepared.

[0023] Then, an N+ layer 11S doped with a high concentration of N-type impurities is formed by injecting N-type impurities into the prepared substrate 1 from the main surface 10a side of the substrate 1. Here, "high concentration" means that the concentration of N-type impurities in the WBG semiconductor is 1×10 １８ cm －３This means the above cases. Furthermore, the following surfaces are used as the main surface 10a. When the base material 1 is an ingot, a flat cut surface exposed by cutting off an end of the ingot, or a polished surface thereof, is used as the main surface 10a. When the base material 1 is a semiconductor wafer, a flat cut surface formed when the semiconductor wafer is cut out from the ingot, or a polished surface thereof, is used as the main surface 10a.

[0024] In this embodiment, when an electrode layer 4 is formed on the main surface 10a (the back surface Kb of the semiconductor substrate K) in an electrode layer forming step S8 described later, the N+ layer 11S enables an ohmic junction between the electrode layer 4 and the semiconductor substrate K. Note that such an ohmic junction is possible if the thickness Tc of the N+ layer 11S is about several microns.

[0025] <Split layer formation step S2> In the split layer formation step S2 (see FIG. 1), a split layer 12 is formed in the substrate 1 at a predetermined position Pt (predetermined depth Dt) deeper from the main surface 10a than the formation region of the N+ layer 11S. This split layer 12 enables splitting of the substrate 1 at the predetermined position Pt. Here, the split layer 12 is a layer that enables separation of a semiconductor substrate K having a thickness Td corresponding to the predetermined depth Dt from the substrate 1 (see split step S4 in FIG. 3), and can be formed by implanting hydrogen ions from the main surface 10a side of the substrate 1. By implanting hydrogen ions, the split layer 12 can be formed at a depth of about 10 μm or shallower from the main surface 10a, resulting in a semiconductor substrate K having a thickness Td corresponding to that depth.

[0026] Instead of implanting hydrogen ions, the division layer 12 can be formed by irradiating the main surface 10a with laser light from a predetermined position Pt (a predetermined depth Dt) as the focal point. This method allows the focal position to be changed in the depth direction, making it possible to form the division layer 12 at a desired depth. Therefore, the laser light irradiation method allows the division layer 12 to be formed at a deeper position (e.g., a depth of about 50 to 150 μm from the main surface 10a) than the hydrogen ion implantation method, resulting in a semiconductor substrate K with a thickness Td corresponding to that depth.

[0027] According to the division layer formation step S2, unlike conventional processes in which the WBG semiconductor is ground down to the desired thickness Td, it is possible to form a very thin semiconductor substrate K without wasting semiconductor material (here, the expensive WBG semiconductor). On the other hand, when the thickness of the semiconductor substrate K becomes very thin, it becomes difficult for the semiconductor substrate K to maintain its flat state by itself. For this reason, before separating the semiconductor substrate K from the base material 1 in the division step S4 described below, it is necessary to hold the portion of the base material 1 that will become the semiconductor substrate K with some kind of holding part so that the flat state of the semiconductor substrate K can be maintained by the holding part even after separation. Therefore, before the division step S4, the following first holding step S3 is performed.

[0028] <First Holding Step S3> In the first holding step S3 (see FIG. 2), first, a dummy substrate 2 to be used as the holding portion is prepared.

[0029] Here, the dummy substrate 2 only needs to be strong enough to maintain the flat state of the semiconductor substrate K after separation of the portion of the base material 1 that will become the semiconductor substrate K. For this reason, it is possible to use a dummy substrate 2 that is inferior in quality to the base material 1 in terms of electrical properties. On the other hand, it is preferable that the dummy substrate 2 be formed from a material whose thermal expansion coefficient is close to that of the base material 1. This is because the difference in thermal expansion coefficient between the dummy substrate 2 and the semiconductor substrate K can be reduced, and as a result, warping that may occur during heating in subsequent processes (such as the device formation step S5) due to the difference in thermal expansion coefficients can be suppressed.

[0030] Therefore, in this embodiment, a polycrystalline semiconductor wafer formed from the same type of WBG semiconductor as the base material 1 or a type of WBG semiconductor with a similar thermal expansion coefficient (for example, one of such WBG semiconductors with a heat-resistant temperature of 1800°C or higher) is prepared as the dummy substrate 2.

[0031] Then, by joining the holding surface 20 a of the dummy substrate 2 to the main surface 10 a of the base material 1 , the portion of the base material 1 that will become the semiconductor substrate K is held by the dummy substrate 2 .

[0032] Specifically, when preparing the dummy substrate 2, a metal layer 13 that enables bonding between the substrate 1 and the dummy substrate 2 is formed along the entire periphery of the region of the holding surface 20a of the dummy substrate 2 that will face the peripheral region 10r of the main surface 10a of the base material 1 when the main surface 10a of the base material 1 is held, or partially at only the location of the region that is intended to be bonded (step S31). Here, this metal layer 13 enables bonding between the base material 1 and the dummy substrate 2 by heating with irradiation of laser light, and is a layer containing a metal such as Cu, Al, Cr, Ti, Ta, or Au as its main component.

[0033] Next, the base material 1 and the dummy substrate 2 are superimposed to interpose the metal layer 13 between the peripheral region 10r of the main surface 10a and the holding surface 20a of the dummy substrate 2, and in this state, the metal layer 13 is heated by irradiation with laser light (step S32). At this time, the base material 1 and the dummy substrate 2 may be sandwiched and pressed between quartz plates or the like to increase the degree of adhesion with the metal layer 13.

[0034] By irradiating the metal layer 13 with laser light in this manner, it is possible to form, at the irradiated portion of the metal layer 13 (the portion intended for bonding), a fixing portion Q for fixing the dummy substrate 2 to the main surface 10a of the base material 1 (step S33). Specifically, at the irradiated portion of the laser light, the metal layer 13 is melted together with the base material 1 and the dummy substrate 2, or the metal that is the main component of the metal layer 13 can be diffused into the base material 1 and the dummy substrate 2. As a result, at the interfaces between the base material 1 and the metal layer 13 and the dummy substrate 2, compounds (e.g., metal silicides) or alloys (e.g., metal-Si alloys) of the main components (e.g., WBG semiconductors) of the base material 1 and the dummy substrate 2 and the metal are formed as fixing portions Q, and the base material 1 (the portion that will become the semiconductor substrate K) and the dummy substrate 2 are bonded via the fixing portions Q.

[0035] In this embodiment, the fixing portions Q are formed in the peripheral region 10r of the main surface 10a of the base material 1, and the dummy substrate 2 is bonded to the main surface 10a of the base material 1 via the fixing portions Q (step S33). In a subsequent process (such as the device formation step S5), semiconductor devices are fabricated in a region of the separated semiconductor substrate K that is inward from the peripheral region 10r. Specifically, a plurality of device regions Rd for fabricating semiconductor devices are provided in this inner region (see FIG. 6 ). Therefore, by forming the fixing portions Q in the peripheral region 10r, it is possible to reduce the influence (the influence of stress and heat generated during detachment) that may occur on the device region Rd (semiconductor device) when the dummy substrate 2 is detached from the semiconductor substrate K in the detachment step S7 described below.

[0036] Furthermore, in this embodiment, the fixing portion Q is formed in a linear shape by scanning the laser light. This is because forming the fixing portion Q in a linear shape makes it possible to reduce the fixing area, which in turn makes it possible to relatively easily detach the dummy substrate 2 from the semiconductor substrate K in the detaching step S7 described below. The example in Figure 6 shows a case where the linear fixing portion Q is formed in a ring shape around the entire periphery of the peripheral region 10r.

[0037] From the viewpoint of facilitating detachment, the fixing portion Q may be formed in a dot shape by pinpoint irradiation with laser light, and a plurality of such dot-shaped fixing portions Q may be formed so as to hold the semiconductor substrate K. Furthermore, the method of forming the fixing portion Q is not limited to the method using the metal layer 13, and may be appropriately changed to a method in which the base material 1 and the dummy substrate 2 are brought into direct surface contact without using the metal layer 13, and the fixing portion Q is formed by irradiating the interface therebetween with laser light.

[0038] By holding the portion of the base material 1 that will become the semiconductor substrate K with the dummy substrate 2 in this manner, even if the thickness Td of the semiconductor substrate K after separation is very thin, the flat state of the semiconductor substrate K can be maintained by the dummy substrate 2, facilitating subsequent handling. Therefore, when determining the predetermined position Pt for forming the division layer 12 in the division layer formation step S2, it is possible to determine the predetermined position Pt by setting the thickness Td (=predetermined depth Dt) of the portion to be separated from the base material 1 as small as possible (e.g., as small as possible within the thickness range corresponding to the required breakdown voltage). In other words, it is possible to manufacture a very thin semiconductor substrate K without performing the conventional process of grinding the WBG semiconductor down to the desired thickness Td. This makes it possible to reduce waste of the valuable WBG semiconductor (waste resulting from the manufacturing process).

[0039] <Dividing Step S4> In dividing step S4 (see FIG. 3), the dividing layer 12 is used to divide the base material 1 at a predetermined position Pt (position of a predetermined depth Dt), thereby separating the portion on the main surface 10a side (the portion that will become the semiconductor substrate K) from the base material 1 while it is still held by the dummy substrate 2. This forms a semiconductor substrate K having a thickness Td corresponding to the predetermined depth Dt. Furthermore, the semiconductor substrate K includes both an N+ layer 11S and an N- layer 11T (a semiconductor layer lightly doped with N-type impurities).

[0040] According to the above-described processes from the N+ layer formation step S1 to the division step S4, by preparing a base material 1 doped with the same concentration of N-type impurities as the concentration of N-layer 11T in the portion of semiconductor substrate K, it is possible to form a desired semiconductor substrate K including both N+ layer 11S and N-layer 11T through simple processes (processes that can be performed in a short time), such as further injecting N-type impurities into base material 1 (forming N+ layer 11S) and dividing base material 1 at the predetermined position Pt. In other words, it is possible to significantly reduce the time required to manufacture semiconductor substrate K compared to conventional manufacturing methods in which N-layer 11T is formed by epitaxial growth.

[0041] Then, the device formation step S5 described below is performed on the divided semiconductor substrate K. Furthermore, the remaining portion 1R of the base material 1 other than the semiconductor substrate K (the remaining portion after division) is reused for manufacturing new semiconductor substrates K and semiconductor devices.

[0042] <Device Formation Step S5> In the device formation step S5 (see FIG. 3), at least a portion of the elements Gd that will be included in the semiconductor device is fabricated in each of a plurality of device regions Rd (see also FIG. 6) provided in the semiconductor substrate K. Specifically, the elements Gd are fabricated in the N-layer 11T from the surface Ka (the surface exposed by division at the division layer 12 (the surface on which the N-type WBG semiconductor is exposed)) side of the semiconductor substrate K. Although not particularly limited, a MOSFET, a Schottky diode, or the like can be formed as the elements Gd in each device region Rd.

[0043] Such a device formation step S5 is often performed at a high temperature exceeding 1000° C. If there is a large difference in thermal expansion coefficient between the semiconductor substrate K and the dummy substrate 2, the difference in thermal expansion coefficient may cause the semiconductor substrate K to warp when heated to a high temperature. Such warping may cause stress to be generated within the semiconductor substrate K, and this stress may appear in the semiconductor substrate K as defects such as distortion. Furthermore, such stress may also cause defects in elements Gd, such as MOSFETs and Schottky diodes, formed on the semiconductor substrate K.

[0044] On the other hand, in this embodiment, a semiconductor wafer formed from the same type of WBG semiconductor as the base material 1 or a type of WBG semiconductor with a similar thermal expansion coefficient is used as the dummy substrate 2. Therefore, the difference in thermal expansion coefficient between the dummy substrate 2 and the semiconductor substrate K is small. Therefore, even if the semiconductor substrate K is heated to a high temperature together with the dummy substrate 2 in this device formation step S5, warping is unlikely to occur in the semiconductor substrate K. Therefore, stress is unlikely to occur in the semiconductor substrate K, and therefore defects are unlikely to occur in the elements Gd formed on the semiconductor substrate K.

[0045] <Second Holding Step S6> In the second holding step S6 (see FIG. 3 ), the surface Ka of the semiconductor substrate K is held by a holding part 3 separate from the dummy substrate 2. The holding part 3 may be the same as the dummy substrate 2, or may be a substrate formed of a material other than semiconductor (such as Si, sapphire, or quartz). When such a substrate is used as the holding part 3, the holding surface 30 a of the holding part 3 is attached to the surface Ka of the semiconductor substrate K using an adhesive member 31 (such as a heat-resistant double-sided tape).

[0046] The holder 3 may be one that can chuck the surface Ka of the semiconductor substrate K by vacuum suction. Such a holder 3 eliminates the need for the adhesive member 31 and can prevent foreign matter from adhering to the surface Ka of the semiconductor substrate K.

[0047] <Removing Step S7> In the removing step S7 (see FIG. 4), the dummy substrate 2 is removed from the semiconductor substrate K while the semiconductor substrate K is held by the holder 3.

[0048] As a first specific example, by driving a wedge between the semiconductor substrate K and the dummy substrate 2 and destroying the fixing portion Q, it is possible to separate the dummy substrate 2 from the semiconductor substrate K. As a second specific example, by irradiating the fixing portion Q with laser light and destroying the fixing portion Q, it is possible to separate the dummy substrate 2 from the semiconductor substrate K.

[0049] As a third specific example, the semiconductor substrate K may be cut into an annular shape at a position inside the fixing portion Q by irradiating the semiconductor substrate K with laser light, thereby separating the dummy substrate 2 from the semiconductor substrate K. As a fourth specific example, the bonding force of the fixing portion Q may be utilized to tear the semiconductor substrate K and the dummy substrate 2 apart from each other in the vertical direction, thereby breaking the semiconductor substrate K into an annular shape at a position inside the fixing portion Q, thereby separating the dummy substrate 2 from the semiconductor substrate K.

[0050] In this embodiment, after the dummy substrate 2 is separated from the semiconductor substrate K, the dummy substrate 2 is reused. Specifically, after separation from the semiconductor substrate K, the holding surface 20 a of the dummy substrate 2 is polished to remove the fixing portion Q and remnants of the semiconductor substrate K from the holding surface 20 a. Then, when the steps from the N+ layer forming step S1 are repeatedly performed, the dummy substrate 2 is reused in the first holding step S3.

[0051] In this embodiment, an expensive dummy substrate 2 formed from a WBG semiconductor is used, but as described above, the dummy substrate 2 can be reused, so that such an expensive dummy substrate 2 can be effectively utilized repeatedly without being wasted.

[0052] <Electrode Layer Forming Step S8> In the electrode layer forming step S8 (see FIG. 4 ), the electrode layer 4 is formed on the back surface Kb of the semiconductor substrate K exposed by removing the dummy substrate 2. As an example, a sputtering method can be used to form the electrode layer 4. At this time, since the N+ layer 11S is exposed on the back surface Kb of the semiconductor substrate K, the electrode layer 4 can be formed on the back surface Kb by ohmic contact.

[0053] <Transfer Step S9> In the transfer step S9 (see FIG. 4), the semiconductor substrate K is transferred from the holder 3 to a holding sheet 5 (such as a dicing tape). Specifically, the semiconductor substrate K is held by the holding sheet 5 from the rear surface Kb side, and then the holder 3 is detached from the semiconductor substrate K.

[0054] In this embodiment, after the holder 3 is detached from the semiconductor substrate K, the holder 3 is reused in the second holding step S6 when the steps from the N+ layer forming step S1 onwards are repeatedly performed.

[0055] <Singulation Step S10> In the singulation step S10 (see FIG. 5), the semiconductor substrate K is cut while it is held on the holding sheet 5, thereby singulating each of the device regions Rd provided on the semiconductor substrate K. Specifically, the semiconductor substrate K is cut along boundary lines Lb (see FIG. 6) that separate the device regions Rd, thereby singulating each of the device regions Rd. Examples of cutting methods that can be used in this process include blade dicing, plasma etching, and laser ablation. This produces a plurality of semiconductor devices each including an element Gd, such as a MOSFET or a Schottky diode.

[0056] According to the manufacturing method of this embodiment, as described above, the time required to manufacture the semiconductor substrate K can be significantly reduced compared to the conventional manufacturing method in which the N- layer 11T is formed by epitaxial growth. Furthermore, a thin semiconductor substrate K can be manufactured without performing the conventional process of grinding the WBG semiconductor down to the desired thickness Td, thereby reducing waste of the WBG semiconductor, which is a valuable material (waste resulting from the manufacturing process). Therefore, in the manufacturing technology for semiconductor devices using WBG semiconductors, it is possible to significantly reduce manufacturing costs.

[0057] [2] Modifications [2-1] First Modification FIG. 7 is a conceptual diagram showing a part of a manufacturing method according to the first modification in a processing order. In the manufacturing method described above, the split layer formation step S2 may be performed before the N+ layer formation step S1. In this case, in the split layer formation step S2, a substrate 1 is prepared in which a WBG semiconductor is lightly doped with N-type impurities. Then, in the split layer formation step S2, a predetermined position Pt (a position of a predetermined depth Dt) is set so that its depth from the main surface 10a is deeper than the planned formation region Rx of the N+ layer 11S, and then the split layer 12 is formed at the predetermined position Pt. Then, in the N+ layer formation step S1, N-type impurities are implanted from the main surface 10a side of the substrate 1 to form the N+ layer 11S doped with the N-type impurities at a high concentration in the planned formation region Rx.

[0058] [2-2] Second Modification Figure 8 is a conceptual diagram showing a part of a manufacturing method according to the second modification in the order of processing. In the manufacturing method described above, the electrode layer forming step S8 may be performed after the N+ layer forming step S1 and before the first holding step S3. Specifically, the electrode layer 4 is formed on the main surface 10a of the base material 1 (the surface that will become the back surface Kb of the semiconductor substrate K). In this case, too, since the N+ layer 11S is exposed on the main surface 10a of the base material 1, the electrode layer 4 can be formed on the main surface 10a by ohmic contact.

[0059] According to the second modification, by forming the electrode layer 4 before the first holding step S3, the electrode layer 4 can be used as the metal layer 13 in the first holding step S3. In other words, the electrode layer 4 can be used to form the fixing portion Q. Specifically, by overlaying the dummy substrate 2 on the electrode layer 4, the electrode layer 4 is interposed between the main surface 10 a of the base material 1 and the holding surface 20 a of the dummy substrate 2 (step S32). In this state, the electrode layer 4 is locally heated by irradiating it with laser light, thereby forming the fixing portion Q using the electrode layer 4 (step S33). At this time, by irradiating the laser light to a portion of the electrode layer 4 on the peripheral region 10 r of the main surface 10 a, the fixing portion Q can be formed in the peripheral region 10 r, which reduces the impact on the device region Rd (step S33).

[0060] Furthermore, if it is necessary to use different materials for the electrode layer 4 and the metal layer 13, both the electrode layer 4 and the metal layer 13 may be formed in the electrode layer formation step S8, and the metal layer 13 may be used to form the fixing portion Q in the first holding step S3.

[0061] [2-3] Third Modification Fig. 9 is a conceptual diagram showing the first holding step S3 executed in the third modification. In the above-described manufacturing method, in the first holding step S3, a substrate may be used as the dummy substrate 2, on which a bonding prevention layer 21 for preventing bonding between the dummy substrate 2 and the base material 1 (semiconductor substrate K) is formed in the following region. This region is a region 20x of the holding surface 20a of the dummy substrate 2, which is located inside a region (region where the metal layer 13 is formed) that faces the peripheral region 10r of the main surface 10a of the base material 1. Although not particularly limited, the bonding prevention layer 21 may be formed of, for example, SiO ２ layer and carbon (C) layer. ２ The SiO layer is formed on the holding surface 20a of the dummy substrate 2. ２ The carbon layer is formed by growing carbon on the holding surface 20a of the dummy substrate 2 by sputtering or CVD.

[0062] According to the third modification, it is possible to prevent the dummy substrate 2 from being bonded to an inner region (region that will become a semiconductor device) where bonding is not intended on the main surface 10 a of the base material 1. Furthermore, by forming the bonding prevention layer 21 to be at the same height as the metal layer 13, it is possible to fill the gap between the dummy substrate 2 and the base material 1 in the region inside the region where the metal layer 13 is formed with the bonding prevention layer 21, and as a result, it is possible to prevent distortion (distortion that may occur due to the gap) from occurring in the semiconductor substrate K that is formed subsequently.

[0063] 10 is a conceptual diagram showing the first holding step S3 performed in the fourth modification. In the manufacturing method described above, the first holding step S3 may use, as the dummy substrate 2, an annular substrate that holds the peripheral region 10r of the main surface 10a of the base material 1.

[0064] Such an annular dummy substrate 2 can be formed by using a disk-shaped substrate and hollowing out the inner portion thereof. The hollowed-out inner portion can then be reused as another dummy substrate 2 in the manufacture of another semiconductor substrate K of a different size. Thus, according to the fourth modification, the dummy substrate 2 can be effectively utilized.

[0065] 11A is a conceptual diagram showing step S31 in the first holding step S3 performed in the fifth modification. As shown in this figure, on the holding surface 20a of the dummy substrate 2, the metal layer 13 may be formed in a region shifted inward from the outer periphery of the holding surface 20a. With this configuration, even if the metal layer 13 is deformed by heat or the like in a subsequent process, the metal layer 13 is less likely to flow out.

[0066] 11(B) and 11(C) are conceptual diagrams showing two further modified examples of step S31 shown in Fig. 11(A). As shown in these figures, from the viewpoint of preventing the metal layer 13 from flowing out to the outside, an outflow prevention layer 22 may be formed on the holding surface 20a of the dummy substrate 2 between its outer periphery and the region where the metal layer 13 is formed. Here, the outflow prevention layer 22 may be formed of, for example, SiO ２layer and carbon (C) layer. ２ The SiO layer is formed on the holding surface 20a of the dummy substrate 2. ２ The carbon layer is formed by depositing carbon on the holding surface 20a of the dummy substrate 2 by sputtering or CVD. Such an outflow prevention layer 22 may also be formed on the holding surface 20a of the dummy substrate 2 together with the bonding prevention layer 21 (see FIG. 11C).

[0067] [2-6] Sixth Modification As a sixth modification, the method for manufacturing a semiconductor device may include the device formation step S5, the second holding step S6, and the separation step S7 among the steps described above, and the manufacturing method may be performed after the N+ layer formation step S1 to the division step S4 have been performed.

[0068] [2-7] Seventh Modification As a seventh modification, the method for manufacturing a semiconductor device may include the N+ layer formation step S1, the division layer formation step S2, the first holding step S3, and the division step S4 among the steps described above, and after the manufacturing method is performed, the device formation step S5 to the separation step S7 may be performed.

[0069] The above-described embodiments and modifications should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined not by the above-described embodiments and modifications, but by the claims. Furthermore, the scope of the present invention is intended to include all modifications that are equivalent to the scope of the claims and fall within the scope thereof.

[0070] Furthermore, from the above-described embodiments and modifications, some steps constituting the method for manufacturing a semiconductor device may be partially extracted as the subject of the invention, or each step may be extracted individually.

[0071] 1 Base material 1R Remaining part 2 Dummy substrate 3 Holding part 4 Electrode layer 5 Holding sheet K Semiconductor substrate Q Fixing part 10a Main surface 10r Peripheral region 11S N+ layer 11T N- layer 12 Dividing layer 13 Metal layer 20a Holding surface 20x Inner region 21 Bonding prevention layer 22 Outflow prevention layer 30a Holding surface 31 Adhesive member Dt Predetermined depth Gd Element Ka Front surface Kb Back surface Lb Boundary line Pt Predetermined position Rd Device region Rx Planned formation region Tc, Td Thickness S1 N+ layer forming step S2 Dividing layer forming step S3 First holding step S4 Dividing step S5 Device forming step S6 Second holding step S7 Separation step S8 Electrode layer forming step S9 Transfer step S10 Singulation step

Claims

1. A method for manufacturing a wide band gap semiconductor substrate, comprising: a splitting layer forming step of forming a splitting layer at a predetermined depth from a main surface of the substrate, which enables the substrate to be split at the predetermined depth; a first holding step of holding the main surface of the substrate with a dummy substrate made of the same or a different type of wide band gap semiconductor as the substrate after the splitting layer forming step; a dividing step of dividing the substrate at the predetermined depth using the splitting layer, thereby separating the main surface side portion from the substrate while being held by the dummy substrate as a semiconductor substrate; a device forming step of forming at least some of the elements that will comprise a semiconductor device on the surface side of the semiconductor substrate opposite to the main surface after the dividing step; a second holding step of holding the surface of the semiconductor substrate with a holder different from the dummy substrate after the device forming step; and a detaching step of detaching the dummy substrate from the semiconductor substrate after the second holding step. In the method for manufacturing a semiconductor device, when these steps are repeatedly performed, the dummy substrate detached in the detaching step is reused as the dummy substrate used in the first holding step.

2. A method for manufacturing a semiconductor device which is carried out after the above steps have been performed: a splitting layer forming step of forming a splitting layer at a position at a predetermined depth from a main surface of a wide band gap semiconductor substrate, which enables the substrate to be split at the position; a first holding step of holding the main surface of the substrate with a dummy substrate made of the same or a different type of wide band gap semiconductor as the substrate after the splitting layer forming step; and a dividing step of dividing the substrate at the position of the predetermined depth using the splitting layer, thereby separating the main surface side portion from the substrate while being held by the dummy substrate as a semiconductor substrate, the method comprising: a device forming step of fabricating at least some of the elements which will be included in a semiconductor device from the surface side of the semiconductor substrate opposite to the main surface; a second holding step of holding the surface of the semiconductor substrate with a holder different from the dummy substrate after the device forming step; and a detaching step of detaching the dummy substrate from the semiconductor substrate after the second holding step. In the method for manufacturing a semiconductor device, when these steps are repeatedly performed, the dummy substrate detached in the detaching step is reused as the dummy substrate used in the first holding step.

3. A method for manufacturing a semiconductor device, comprising: a splitting layer forming step of forming a splitting layer at a position at a predetermined depth from a main surface of a wide band gap semiconductor substrate, the splitting layer enabling the substrate to be split at the position; a first holding step of holding the main surface of the substrate with a dummy substrate formed from the same or a different type of wide band gap semiconductor as the substrate after the splitting layer forming step; and a dividing step of dividing the substrate at the position of the predetermined depth using the splitting layer, thereby separating the main surface side portion from the substrate while being held by the dummy substrate as a semiconductor substrate, wherein after carrying out this manufacturing method, the following steps are carried out: a device forming step of fabricating at least some of the elements that will be included in a semiconductor device into the semiconductor substrate from a surface side opposite to the main surface; a second holding step of holding the surface of the semiconductor substrate with a holder different from the dummy substrate after the device forming step; and a detaching step of detaching the dummy substrate from the semiconductor substrate after the second holding step, In the method for manufacturing a semiconductor device, when these steps are repeatedly performed, the dummy substrate obtained by separation in the separation step is reused as the dummy substrate used in the first holding step.

4. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein in the first holding step, dot-like or linear fixing portions for fixing the dummy substrate are formed in the peripheral region of the main surface.

5. A method for manufacturing a semiconductor device as described in claim 4, wherein in the first holding step, a substrate having a bonding prevention layer formed in an area inside a region that will face the peripheral region of the main surface is used as the dummy substrate.

6. A method for manufacturing a semiconductor device according to any one of claims 1 to 4, wherein in the first holding step, an annular substrate for holding the peripheral region of the main surface is used as the dummy substrate.

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