Microled with trapezoidal micro-structures
Trapezoidal micro-structures on microLEDs address the deficiencies in light extraction and directionality, significantly improving the light extraction efficiency and emission directionality of microLEDs.
Patent Information
- Application Number
- PCT/US2024/057881
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-30
- Filing Date
- 2024-11-27
- Publication Date
- 2025-06-05
AI Technical Summary
MicroLED architectures face deficiencies in light extraction efficiency, internal quantum efficiency droop, non-radiative surface recombination loss, poor angular directionality, and optical losses at sidewalls due to their small size.
The implementation of trapezoidal micro-structures on microLEDs, which include a micro lens structure with a trapezoidal shape to improve light extraction efficiency and emission directionality.
The trapezoidal micro-structures enhance light extraction efficiency and emission directionality, achieving a directional flux of up to 1.8 or more compared to microLEDs without such structures.
Smart Images

Figure US2024057881_05062025_PF_FP_ABST
Abstract
Description
MICROLED WITH TRAPEZOIDAL MICRO-STRUCTURESPRIORITY
[0001] This application claims the benefit of priority to United States Provisional Patent Application Serial No. 63 / 604,427, filed November 30, 2023, which is incorporated herein by reference in its entirety.FIELD
[0002] The present disclosure relates to light emitting diode (LED) arrays. In particular, embodiments are directed to microLED architectures.BACKGROUND
[0003] Due to the small size of microLEDs, microLED architectures can suffer from a variety of deficiencies, including those related to light extraction efficiency (ExE), internal quantum efficiency (IQE) droop and non-radiative surface recombination loss, poor angular directionality, and optical losses at sidewalls.BRIEF DESCRIPTION OF THE DRAWINGS
[0004] FIG. 1 shows an example of an illumination apparatus, in accordance with some examples.
[0005] FIG. 2A illustrates an example of a monolithic LED pixel array, in accordance with some examples.
[0006] FIG. 2B illustrates an example of a single pixel of the monolithic LED pixel array of FIG. 2A, in accordance with some examples.
[0007] FIG. 2C illustrates an example of a rendered image of an array containing multiple pixels of FIG. 2B, in accordance with some examples.
[0008] FIG. 3 illustrates an example method of fabricating an illumination device, according to some embodiments.
[0009] FIGS. 4A-4B illustrate simulations of characteristics of an illumination device, according to some embodiments.
[0010] FIG. 5 shows examples of a simulated far-field patterns for pixels with and without a micro lens structure, according to some embodiments.
[0011] FIG. 6 illustrates an example of a general device in accordance with some embodiments.
[0012] FIG. 7 illustrates an example lighting system, according to some embodiments.
[0013] FIG. 8 illustrates an example hardware arrangement for implementing the above disclosed subject matter, according to some embodiments.
[0014] FIG. 9 shows a block diagram of an example of a system, according to some embodiments.
[0015] FIG. 10 illustrates a top plan view of an example array suitable for implementing embodiments described herein.DETAILED DESCRIPTION
[0016] LED structures, especially microLED structures, may suffer from various shortcomings. To improve light extraction from a microLED pixel, a micro lens may be disposed over the pixel. The micro lens may have a shape, such as a trapezoidal shape, that provides a desired emission directionality and improves light extraction efficiency compared to a microLED pixel without the micro lens.
[0017] FIG. 1 shows an example of an illumination apparatus 100, in accordance with some examples. The illumination apparatus 100 may be, for example, a smart phone or standalone camera. Other embodiments, which may contain some or all of the components shown in FIG. 1 (as well as additional components not shown), include displays, automotive adaptive headlights, augmented-, virtual-, mixed-reality (AR / VR / MR) headsets, smart glasses and displays for mobile phones, smart watches, monitors, and TVs. The illumination apparatus 100 may include both a light source 110 and a camera 120. The camera 120 may capture an image of a scene 104 during an exposure duration of the camera 120, whether or not the scene 104 is illuminated by the light source 110. A processor 130 may be used to control various functions of the lightsource 110 and the camera 120, including whether or not a shutter is open in an opening 108 of a housing of the illumination apparatus 100.
[0018] The opening 108 may be a single opening as shown in FIG. 1 or may include multiple separate openings. Similarly, the shutter may be a single shutter that covers both the light source 110 and the camera 120 or may include multiple separate shutters that covers only one of the light source 110 or the camera 120 and are individually controllable by the processor 130.
[0019] The illumination apparatus 100 may include one or more microLED arrays 112. Each of the one or more microLED arrays 112 may include a plurality of pixels that contain microLEDs 114 that may produce light during at least a portion of the exposure duration of the camera 120. Each of the one or more microLED arrays 112 may contain segmented ones of the plurality of microLEDs 114 in which the microLEDs 114 are divided into a grid of light emitting areas (the microLED 114) and non-light emitting areas (between the microLEDs 114).
[0020] Each of the microLEDs 114 may be formed from one or more inorganic materials (e.g., binary compounds such as gallium arsenide (GaAs) or gallium nitride (GaN), ternary compounds such as indium gallium nitride (InGaN), quaternary compounds such as indium gallium arsenide phosphide (InGaAsP), or other suitable materials), usually either III-V materials (defined by columns of the Periodic Table) or II- VI materials. Each of the microLEDs 114 may emit light in the visible spectrum (about 400nm to about 800 nm) or may also emit light in the infrared spectrum (above about 800nm). In some embodiments, one or more other layers, such as a phosphor layer may be disposed on each of the one or more microLED arrays 112 to convert the light from the microLEDs 114 into white light, for example.
[0021] In some aspects, microLEDs 114 in each microLED array 112 may emit light in the visible spectrum. In other aspects, microLEDs 114 in a particular microLED array 112 that emit light in the infrared spectrum may be, for example, interspersed with microLEDs 114 that emit light in the visible spectrum, or each type of microLED (visible emitter / infrared emitter) may be disposed on different sections of the particular microLED array 112. Alternatively, each microLED array 112 may only emit light in either the visiblespectrum or the infrared spectrum; separate (one or more) microLED arrays may be used to emit light in the infrared spectrum, each of the individual ones of the microLED arrays 112, microLEDs 114 and / or microLED segments controllable by the processor 130.
[0022] Each of the one or more microLED arrays 112 may be include thousands to millions of microscopic ones of the plurality of microLEDs 114 that emit light and that may be individually controlled (individually addressable) or controlled in groups of pixels (e.g., MxN groups of pixels). The microLEDs are small (e.g., < 0.01 mm on a side) and may provide monochromatic or multi- chromatic light, typically red, green, or yellow using inorganic semiconductor material such as that indicated above. Other LEDs may have a size, for example, of about 4 mm2, 250 pm x 250 pm, or larger. In other aspects, an LED array may use LEDs of other sizes (e.g., miniLEDs that are larger than the microLEDs). That is, in general, individual pixels may have an area of few square millimeters down to few square micrometers depending on the matrix or display size and its pixel per inch requirements.
[0023] The light source 110 may include at least one optical element 116 such as a lens or reflector. The optical element 116 may direct the light emitted by the one or more microLED arrays 112 toward the scene 104 as illumination 102
[0024] The camera 120 may sense light at least the wavelength or wavelengths emitted by the one or more microLED arrays 112. Similar to the light source 110, the camera 120 may include optics (e.g., at least one camera lens 122) that are able to collect reflected light 106 of the illumination 102 that is reflected from and / or emitted by the scene 104. The camera lens 122 may direct the reflected light 106 onto a multi-pixel sensor 124 (also referred to as a light sensor) to form an image of the scene 104 on the multi-pixel sensor 124.
[0025] The processor 130 may receive a data signal that represents the image of the scene 104. The processor 130 may additionally control and drive the microLEDs 114 in the one or more microLED arrays 112 via one or more drivers 132. For example, the processor 130 may optionally control one or more microLEDs 114 in the one or more microLED arrays 112 independent of anotherone or more microLEDs 114 in the one or more microLED arrays 112, so as to illuminate the scene in a specified manner.
[0026] In addition, one or more detectors 126 may be incorporated in the camera 120. In other embodiments, instead of being incorporated in the camera 120, the one or more detectors 126 may be incorporated in one or more different areas, such as the light source 110 or elsewhere close to the camera 120. The one or more detectors 126 may include multiple different sensors to sense visible and / or infrared light (e.g., from the scene 104), and may further sense the ambient light and / or variations / flicker in the ambient light in addition to reception of the reflected light from the microLEDs 114. The multi-pixel sensor 124 of the camera 120 may be of higher resolution than the sensors of the one or more detectors 126 to obtain an image of the scene with a desired resolution. The sensors of the one or more detectors 126 may have one or more segments (that are able to sense the same wavelength / range of wavelengths or different wavelength / range of wavelengths), similar to the microLED arrays 112. In some embodiments, if multiple detectors are used, one or more of the detectors may detect visible wavelengths and one or more of the detectors may detect infrared wavelengths; like the one or more microLED arrays 112, the one or more detectors 126 may be individually controllable by the processor 130.
[0027] In some embodiments, instead of, or in addition to, being provided in the camera 120, one or more of the sensors of the one or more detectors 126 may be provided in the light source 110. In some embodiments, the light source 110 and the camera 120 may be integrated in a single module, while in other embodiments, the light source 110 and the camera 120 may be separate modules that are disposed on a printed circuit board (PCB). In other embodiments, the light source 110 and the camera 120 may be attached to different PCBs - for example, as the camera 120 may be thicker than the light source 110, which may result in design issues if the light source 110 and the camera 120 are attached to the same PCB. In the latter embodiment, multiple openings may be present in the housing at least one of which may be eliminated with the use of an integrated version of the light source 110 and camera 120.
[0028] The microLEDs 114 may be driven in an analog or digital manner, i.e., using a direct current (DC) driver or pulse width modulation(PWM). As shown, one or more drivers 132 may be used to drive the microLEDs 114 in the one or more microLED arrays 112, as well as other components, such as the actuators.
[0029] The illumination apparatus 100 may also include an input device 134, for example, a user-activated input device such as a button that is depressed to take a picture. The light source 110 and camera 120 may be disposed in a single housing.
[0030] The illumination apparatus 100 shown in FIG. 1 may be used in different types of displays, microLED matrices and light engines including automotive adaptive headlights, augmented-, virtual-, mix-reality (AR. / VR. / MR.) headsets, smart glasses and displays for mobile phones, smart watches, monitors and TVs. The individual microLED pixels in these architectures may, as above, have an area of few square millimeters down to few square micrometers depending on the matrix or display size and pixel -per-inch requirements. One approach is to create a monolithic array of microLED pixels on an epitaxial wafer and later transfer and hybridize the microLED arrays to a backplane to allow individual control of the pixels. Such monolithic arrays may use metal (e.g., aluminum (Al)- or silver (Ag)-based) side-contacts. These contacts may serve as the electrical cathode for each pixel and also provide reflective sidewalls between the pixels to reduce light scattering and propagation in lateral directions.
[0031] MicroLEDs may be formed by combining n- and p-type semiconductors (e.g., III-V semiconductors above) on a substrate of sapphire aluminum oxide (A12O3) or silicon carbide (SiC), among others. In particular, various layers may be deposited and processed on the substrate during fabrication of the microLED. The surface of the substrate may be pretreated to anneal, etch, polish, etc. the surface prior to deposition of the various layers.
[0032] In general, the various LED layers may be fabricated using epitaxial semiconductor deposition (e.g., by metal organic chemical vapor deposition) to deposit one or more semiconductor layers, metal deposition (e.g., by sputtering), oxide growth, as well as etching, liftoff, and cleaning, among other operations. The substrate may be removed from the LED structure after fabrication and after connection to contacts on a backplane via metal bondingsuch as via wire or ball bonding. The backplane may be a printed circuit board or other substrate, such as a wafer, containing integrated circuits (ICs), such as a complementary metal-oxide-semiconductor (CMOS) IC wafer. The semiconductor deposition operations may be used to create an LED with an active region in which electron-hole recombination occurs and the light from the LED is generated. The active region may include, for example, one or more quantum wells. Metal contacts may be used to drive provide current to the n- and p-type semiconductors from the ICs (such as drivers) of the backplane on which the LED is disposed. Methods of depositing materials, layers, and thin films may include, for example: sputter deposition, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma enhanced atomic layer deposition (PEALD), plasma enhanced chemical vapor deposition (PECVD), and combinations thereof.
[0033] FIG. 2A illustrates an example of a monolithic LED pixel array, in accordance with some examples. FIG. 2B illustrates an example of a single pixel of the monolithic LED pixel array of FIG. 2A, in accordance with some examples. As shown in the monolithic LED pixel array 200 of FIG. 2A, contains pixels 210 each having a sidewall and a semiconductor stack 202 (also referred to as an epitaxial microLED structure herein). Note that although an epitaxial structure is referred to, in other aspects, formation using techniques other than epitaxial growth may be used to form the semiconductor stack 202. A dielectric material 216 surrounds the sidewall of each of the pixels 210, and n- contact material 208a is positioned between adjacent pixels on the dielectric material 216. FIG. 2C illustrates an example of a rendered image of an array containing multiple pixels of FIG. 2B, in accordance with some examples.
[0034] A common cathode 208c is in electrical contact with the n-type layer of the semiconductor stack 202 and the n-contact material 208a. An anode 208b is in contact with each p-type layer of the semiconductor stack 202 and a corresponding anode 206b of a backplane 206. The n-contact material 208a is in contact with another contact 206a of the backplane 206 (shown in FIG. 2A as a CMOS IC wafer). An upper edge of each semiconductor stack 202 may be offset from upper edges of the n-contact material 208a and common cathode208c. In other aspects, the pixel 210 may be processed such that a common n- contact material 208a is used and the cathode 208c is individually addressed.
[0035] The dielectric material 216 may act as reflective sidewalls adjacent to the semiconductor stack 202. The anode 208b may contact the n- type layers of the semiconductor stack 202 and act as a current spreading layer. A micro lens structure 220 may be disposed above the semiconductor stack 202 to direct emission from the semiconductor stack 202 and improve light extraction efficiency of the semiconductor stack 202.
[0036] As shown in more detail in FIG. 2B, the semiconductor stack 202 forming the LED may be, as above, InGaN. In particular, the semiconductor stack 202 may have a thickness in the growth (z) direction of between about 1.5 pm and about 2.5 pm, for example. The semiconductor stack 202 may include an active region 202c sandwiched between n-type semiconductor 202a and p- type semiconductor 202b. In some aspects, the active region 202c may be a multiple quantum well structure. In some aspects, the active region 202c may emit visible light (i.e., about 400 nm to about 720 nm).
[0037] The semiconductor stack 202 may be processed so that sidewalls of the semiconductor stack 202 may have a non-right angle in the growth direction. The sidewall angle may extend from about 30 degrees to about 80 degrees (as shown, perpendicular to the growth direction, thus, about 10 degrees to about 60 degrees from the growth direction) so that the semiconductor stack 202 forms a frustoconical structure (shown in the cross-sectional view of FIG. 2B as a trapezoidal structure). In some aspects, the sidewall angle is about 45 degrees to about 70 degrees (about 20 degrees to about 45 degrees from the growth direction), and as shown in FIG. 2B is about 60 degrees to about 65 degrees (about 30 degrees to about 35 degrees from the growth direction).
[0038] In some embodiments, the metal side-contacts 204 (also referred to as an encapsulant) may be coupled to the n-type semiconductor 202a to drive the n-type semiconductor 202a and, while a metal contact (p-metal 214 or cathode contact) is coupled to the p-type semiconductor 202b. The thickness of the p-type semiconductor 202b may be between about 50 nm and about 180 nm. The diameter of the p-type semiconductor 202b may be between about 1.1 pm and about 1.2 pm, for example.
[0039] The metal side-contacts 204 may be isolated from the p-type semiconductor 202b and the active region 202c by a first dielectric material 216a and a second dielectric material 216b. The first dielectric material 216a may be formed on the semiconductor stack 202 and may contain silicon oxide (SiO2). The second dielectric material 216b may be formed on the first dielectric material 216a and may contain silicon nitride (SiN) having a thickness smaller than that of the first dielectric material 216a. In some aspects, the first dielectric material 216a may be about 2 to about 10 times thicker than the second dielectric material 216b. Either or both wet and dry etching may be used to form the first dielectric material 216a and the second dielectric material 216b. In some aspects, the first dielectric material 216a and the second dielectric material 216b may be a multi-layer insulating structure that forms a Bragg reflector at the wavelength of light emitted by the active region 202c.
[0040] The wafer bonding metal 212 may be configured to contact the p- metal 214 and metal side-contacts 204. In some aspects, the first dielectric material 216a and the second dielectric material 216b may be etched prior to deposition of the wafer bonding metal 212 to permit the wafer bonding metal 212 to contact the p-metal 214. The p-metal 214 and metal side-contacts 204 may be formed from aluminum or other material(s) substantially reflective (e.g., greater than about 99% reflectivity at a normal angle of incidence) to light emitted by the active region 202c. The p-metal 214 and metal side-contacts 204 may be formed from the same metal or different metals, such as one or more of aluminum (Al), titanium tungsten (TiW), and / or copper (Cu).
[0041] The common cathode 208c contacts both the n-type semiconductor 202a and the first dielectric material 216a surrounding the n-type semiconductor 202a. The common cathode 208c may be formed from a transparent conducting oxide (TCO) such as indium tin oxide (ITO) or zinc oxide (ZnO).
[0042] The overall size of the pixel 210 may be about 5 pm (each side - i.e., an area of about 25pm2), with about a 3pm thick (thinned) epitaxial layer. The micro lens structure 220 formed on the semiconductor stack 202 may include a residual layer 222 and a lens 224. The lens 224 and the residual layer 222 may be formed from one or more dielectric materials. For example asshown in FIG. 2B, the lens 224 and the residual layer 222 may be formed from the same dielectric material, SiO2.
[0043] The residual layer 222 is formed on the common cathode 208c, while the lens 224 is formed on a portion of the residual layer 222 to substantially or entirely cover the semiconductor stack 202. The size of the lens 224 may be limited by the size of the pixel 210, as well as the distance between adjacent pixels 210, whose pitch may be about 0.5 pm to about 0.7 pm. A maximum diameter of the lens 224 may be about 3 pm to about 5 pm, e.g., about 4 pm at the surface contacting the residual layer 222 (or the common cathode 208c if the residual layer 222 is not present). If the residual layer 222 is not present, the lens 224 may form substantially the entirety of the micro lens structure 220 and thus substantially the entirety of the micro lens structure 220 may have a trapezoidal cross-section.
[0044] The thickness of the lens 224 and the residual layer 222 may depend on an optimization or improvement of the emission from the pixel 210 based on a number of parameters that include an angle of the sidewalls, the thickness of the epitaxial layers forming the semiconductor stack 202, a diameter of the pixel 210, use of the array 200, and limitations based on both physical separation between adjacent pixels 210, processing, and cross-illumination, among others. In some aspects, the thickness of the lens 224 may be up to about 3 pm and the thickness of the residual layer 222 may be up to about 2 pm. In one example, the thickness of the lens 224 may be about 1 pm to about 1.5 pm, the angle of the lens 224 may be about 65 degrees to about 75 degrees (about 15 degrees to about 25 degrees from the growth direction), and the thickness of the residual layer 222 may be about 0.8 pm to about 1.2 pm. In another example, the thickness of the lens 224 may be about 3 pm, the angle of the lens 224 may be about 70 degrees to about 75 degrees (about 15 degrees to about 20 degrees from the growth direction), and the thickness of the residual layer 222 may be about 0.8 pm to about 1.2 pm. The angle of the lens 224 may be different from, but dependent on, the sidewall angle. In these examples, the ratio of thicknesses of the lens 224 to the residual layer 222 may be about 1.25 to about 3.75, although in other embodiments the ratio may vary.
[0045] The trapezoidal lens 224 may be created in multiple steps. For example, a blanket film may be initially deposited over the wafer using PECVD, for example. The film may be, for example, SiOx or SiNx. The thickness of this layer usually defines the height of the trapezoidal lens. To form the trapezoidal lens, a layer of photoresist is deposited on the film and is subsequently illuminated through a patterned lithographic mask. The photoresist can be a positive or negative photoresist. If it is a negative photoresist, the photoresist material is hardened by light and the developer applied thereafter only dissolves the regions on the photoresist that were not exposed to light. After this process, a patterned and hardened photoresist is present in which the areas that are not to be etched retain photoresist material. A plasma etching process (dry etch) may then be used to etch away exposed material of the SiOx film shaping the edges of the trapezoidal lens. This process might create some byproduct, which is removed in a cleaning process after the plasma etching process, and the photoresist removed with a chemical bath and a possible followed up high pressure spray. These steps result in a trapezoidal lens shape in the deposited SiOx / SiNx film.
[0046] One advantage of the trapezoidal shape from a process point of view, is that etching may be limited to the edges of the lens; that is, no shaping of an elliptical part of the lens occurs. Every area that is changed / dry etched introduces tolerances, especially in the shape of the remaining material. Trapezoidal lenses have less tolerances on their shape in comparison to elliptical lenses.
[0047] The lens 224 may be formed in a trapezoidal-shape in crosssection in the growth direction. The residual layer 222, on the other hand, may be an insulating layer that may extend over the entire array 200 or otherwise may not have a trapezoidal-shape in cross-section in the growth direction. The micro lens structure 220, combined with a pixel geometry improved using simulation, may improve emission directionality and light extraction efficiency. With an improved lens geometry for the specific pixel used, a directional flux of up to 1.8 or even larger can be achieved with the use of the residual layer 222 plus the trapezoidal lens 224.
[0048] In FIGS. 2A and 2B, the original substrate (e.g., Sapphire, Silicon) on which the semiconductor stack 202 and other layers are grown / deposited and processed may be removed (e.g., by liftoff) after the LED array is integrated with a backplane 206. The backplane 206 may contain a driver and controller, among others, to control the pixels 210. This offers multiple advantages such as enhanced light extraction and beam profiling. Although the p-metal 214 is shown in FIG. 2B as being the same width as the various layers of the semiconductor stack 202, in other embodiments, the p- metal 214 may be larger than the various layers of the semiconductor stack 202 (which may permit contact between the p-metal 214 and the p-type semiconductor 202b).
[0049] As above, a monolithic array of LED pixels may be fabricated on an epitaxial wafer and later transferred and hybridized to a backplane to enable control of individual pixels. One embodiment of such monolithic arrays uses metal (e.g., Al- or Ag-based) side-contacts. These contacts may serve as the electrical cathode for each pixel and also provides reflective sidewalls in between the pixels to reduce light scattering and propagation in lateral directions. In these architectures, a substrate (e.g., Sapphire, Silicon) may be removed after the LED array is integrated with the backplane driver and controller. This offers multiple advantages such as enhanced light extraction and beam profiling.
[0050] The Sapphire substrate may be removed, for example, by a laser lift-off process where a laser beam (e.g., an ultra-violet (UV) laser) is used to detach the substrate from the epitaxial layers. The epitaxial layer may be thinned down to about a 1-2 pm range, which enables a good ohmic contact formation to a TCO layer used as a common to cathode contact. Bottom anode contacts for each pixel electrically access the CMOS IC.
[0051] One issue with an array architecture that does not contain the micro lens structure 220 concerns its brightness performance, which may be limited by: (1) absorbing layers (e.g., p-metal and metal-side walls impacting the ExE), (2) lack of scattering (low ExE), and (3) broad angular radiation (e.g., Lambertian). The micro lens structure 220 may help to alleviate such issues with the emission from the pixel 210.
[0052] In some aspects, fabrication of the array 200 may start with an initial structure that includes an epitaxial layer grown on a Sapphire substrate. The epitaxial layer may include a relatively thicker n-type semiconductor layer and a relatively thinner p-type semiconductor layer surrounding a MQW active layer. A temporary substrate (e.g., glass, Sapphire, or a polycrystalline material) may be attached to the initial structure using an adhesive layer or an oxide-oxide bond.
[0053] The Sapphire substrate may be removed and the n-type semiconductor layer etched such that the remaining epitaxial layer has a thickness significantly less than the original thickness (e.g., from about 6 pm to a range of about 1 pm to about 4 pm). The epitaxial layer is then further etched using an angled photoresist during the photolithographic processes to form pixels that have a trapezoidal shape. In some aspects, a TCO layer may be used as an etch stop to limit the etching. In other cases, the TCO layer may be deposited in one or more subsequent steps.
[0054] Multiple insulating layers (SiO2 and SiN above) may then be deposited on the pixels. Openings are created in the insulating layer using photolithographic processes. The openings may be formed at the apex of each of, as well as between, the pixels. The openings expose portions of the n-type semiconductor layer and the temporary substrate underlying the insulating layers.
[0055] A metal seed layer may be deposited on the insulating layers and openings, and metal plating may subsequently be deposited on the metal seed layer. The metal plating may be planarized (e.g., through chemical-mechanical planarization (CMP)) to electrically isolate portions of the metal plating from each other. The metal plating deposited in openings at the apex of the pixels may be isolated from the metal plating on the insulating layers on the sidewalls of the pixels.
[0056] Another insulating layer may be deposited on the metal plating and the exposed insulating layers between the isolated portions of the metal plating. Openings are created in the other insulating layer to expose portions of the metal plating at the apex of the pixels. A bonding layer may be depositedand lithographically fabricated on the openings to provide bonding pads that contact exposed portions of the metal plating.
[0057] The resulting structure may be hybridized by attaching a CMOS backplane, Si submount, or other structure to operate the segmented array. The bonding layer and the CMOS backplane may have atomically smooth oxide layers. The CMOS backplane may include a substrate with contacts that are separated by a dielectric layer. The CMOS backplane may include integrated circuitry disposed thereon, for example. The temporary substrate may be removed to expose the p-type semiconductor layer and the metal plating between the pixels. A TCO layer, if not already present, may be sputtered on the p-type semiconductor layer and the metal plating between the pixels exposed after removal of the temporary substrate. The micro lens structure may be provided on the TCO layer. The micro lens structure may be formed on the temporary substrate and may remain attached to the TCO layer after removal of the temporary substrate. Alternatively, the micro lens structure may be deposited on the TCO layer on the initial substrate and then etched into the desired shape using photolithographic processes prior to attaching the temporary substrate.
[0058] FIG. 3 illustrates an example method of fabricating an illumination device, according to some embodiments. Not all of the operations may be undertaken in the method 300, and / or additional operations may be present. The operations may occur in a different order from that indicated in FIG. 3
[0059] At operation 302, a temporary substrate is attached to an initial structure that includes a Sapphire substrate and epitaxial stack (including n-type semiconductor layer, p-type semiconductor layer and active region). A TCO layer is deposited on the initial structure. A preformed micro lens structure disposed on the temporary substrate is attached to the TCO layer. Alternatively, the micro lens structure may be formed on the initial structure and fabricated prior to attachment of the temporary substrate. The micro lens structure may be formed from one or more dielectric layers and have a trapezoidal shape in crosssection (i.e., a frustoconical structure in perspective).
[0060] At operation 304, the Sapphire substrate is etched or otherwise removed and the n-type semiconductor layer is etched such that the remainingepitaxial layer has a thickness significantly less than the thickness of the initial structure.
[0061] At operation 306, the epitaxial semiconductor layers are formed into a trapezoidal emitter structure in cross-section (i.e., a frustoconical structure in perspective) via etching. Insulating layers are deposited on the trapezoidal emitter structure, which are then etched to expose the n-type semiconductor layer at the top of the pixel.
[0062] At operation 308, a metal seed layer and metal plating are deposited on the insulating layers and openings and etched to electrically isolate portions of the metal plating. One or more insulating layers are deposited on the metal plating, the openings are etched to expose portions of the metal plating, and a bonding layer is deposited and fabricated on the openings to provide bonding pads that contact exposed portions of the metal plating.
[0063] At operation 310, the resulting structure is hybridized by attaching a monolithic structure to the bonding pads.
[0064] At operation 312, the temporary substrate removed from the hybridized structure.
[0065] While only certain features of the system and method have been illustrated and described herein, many modifications and changes will occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes. Method operations may be performed substantially simultaneously or in a different order.
[0066] FIGS. 4A-4B illustrates simulations of characteristics of an illumination device, according to some embodiments. Specifically, FIGS. 4A- 4B show the relative extracted radiation enhancement over ±15 degree cone for different geometries of the trapezoidal lens placed on top of a pixel. FIG. 4A shows the absolute values, while FIG. 4B show the gain with respect to the same pixel structure without the lens. The relative extracted radiation enhancement may be, for example, the Purcell effect *Extraction efficiency*Directionality gain. The geometry of the pixel for the simulation of FIG. 4A and FIG. 4B is given by: diameter at p-side of the epitaxial layers: 1100 nm, sidewall angle: 60 degrees (about 30 degrees from the growth direction), epitaxial thickness: 1500 nm, diameter p-metal: 80% of epitaxial bottom diameter, dielectric bilayerSiO2 / SiN thickness: 250 / 100 nm, thickness of the residual layer: 800 nm, height of the trapezoidal lens: 1250 nm, lens sidewall angle: 65 degrees, bottom diameter trapezoidal lens: 4 pm, excitation vacuum wavelength: 560 nm (active region emission wavelength). As shown, the relative extracted radiation enhancement increases from a lens thickness (height) from about 1000 nm to about 4000 nm for the ±15 degree cone over the entire range of angles of the lens. Other measurements over different degree cones (e.g., ±45 degree) show similar characteristics.
[0067] FIG. 5 shows examples of a simulated far-field patterns for a pixel with and without a micro lens structure, according to some embodiments. The pixel characteristics are the same as those of FIGS. 4A and 4B. As can be seen, the emission intensity less than about 45 degrees from normal to the surface of the pixel is substantially greater (up to about 2x) with the micro lens structure than without the micro lens structure.
[0068] FIG. 6 illustrates an example of a general device in accordance with some embodiments. The device 600 may be a mobile device such as a laptop computer (PC), a tablet PC, a smart phone, or an augmented reality (AR) / virtual reality (VR), or an automotive device, for example. Various elements may be provided on the backplane indicated above, while other elements may be local or remote. Examples, as described herein, may include, or may operate on, logic or a number of components, modules, or mechanisms.
[0069] Modules and components are tangible entities (e.g., hardware) capable of performing specified operations and may be configured or arranged in a certain manner. In an example, circuits may be arranged (e.g., internally or with respect to external entities such as other circuits) in a specified manner as a module. In an example, the whole or part of one or more computer systems (e.g., a standalone, client or server computer system) or one or more hardware processors may be configured by firmware or software (e.g., instructions, an application portion, or an application) as a module that operates to perform specified operations. In an example, the software may reside on a machine readable medium. In an example, the software, when executed by the underlying hardware of the module, causes the hardware to perform the specified operations.
[0070] Accordingly, the term “module” (and “component”) is understood to encompass a tangible entity, be that an entity that is physically constructed, specifically configured (e.g., hardwired), or temporarily (e.g., transitorily) configured (e.g., programmed) to operate in a specified manner or to perform part or all of any operation described herein. Considering examples in which modules are temporarily configured, each of the modules need not be instantiated at any one moment in time. For example, where the modules comprise a general -purpose hardware processor configured using software, the general -purpose hardware processor may be configured as respective different modules at different times. Software may accordingly configure a hardware processor, for example, to constitute a particular module at one instance of time and to constitute a different module at a different instance of time.
[0071] The electronic device 600 may include a hardware processor (or equivalently processing circuitry) 602 (e.g., a central processing unit (CPU), a GPU, a hardware processor core, or any combination thereof), a memory 604 (which may include main and static memory), some or all of which may communicate with each other via an interlink (e.g., bus) 608. The memory 604 may contain any or all of removable storage and non-removable storage, volatile memory or non-volatile memory. The electronic device 600 may further include a display / light source 610 such as the LEDs described above, or a video display, an alphanumeric input device 612 (e.g., a keyboard), and a user interface (UI) navigation device 614 (e.g., a mouse). In an example, the display / light source 610, input device 612 and UI navigation device 614 may be a touch screen display. The electronic device 600 may additionally include a storage device (e.g., drive unit) 616, a signal generation device 618 (e.g., a speaker), a network interface device 620, one or more cameras 628, and one or more sensors 630, such as a global positioning system (GPS) sensor, compass, accelerometer, or other sensor such as those described herein. The electronic device 600 may further include an output controller, such as a serial (e.g., universal serial bus (USB), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate or control one or more peripheral devices (e.g., a printer, card reader, etc.).
[0072] The storage device 616 may include a non-transitory machine readable medium 622 (hereinafter simply referred to as machine readable medium) on which is stored one or more sets of data structures or instructions 624 (e.g., software) embodying or utilized by any one or more of the techniques or functions described herein. The instructions 624 may also reside, completely or at least partially, within the memory 604 and / or within the hardware processor 602 during execution thereof by the electronic device 600. While the machine readable medium 622 is illustrated as a single medium, the term "machine readable medium" may include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) configured to store the one or more instructions 624.
[0073] The term “machine readable medium” may include any medium that is capable of storing, encoding, or carrying instructions for execution by the electronic device 600 and that cause the electronic device 600 to perform any one or more of the techniques of the present disclosure, or that is capable of storing, encoding or carrying data structures used by or associated with such instructions. Non-limiting machine-readable medium examples may include solid-state memories, and optical and magnetic media. Specific examples of machine-readable media may include non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)) and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; Random Access Memory (RAM); and CD-ROM and DVD-ROM disks.
[0074] The instructions 624 may further be transmitted or received over a communications network using a transmission medium 626 via the network interface device 620 utilizing any one of a number of wireless local area network (WLAN) transfer protocols or a SPI or CAN bus. Example communication networks may include a local area network (LAN), a wide area network (WAN), a packet data network (e.g., the Internet), mobile telephone networks (e.g., cellular networks), Plain Old Telephone (POTS) networks, and wireless data networks. Communications over the networks may include one or more different protocols, such as Institute of Electrical and Electronics Engineers(IEEE) 802.11 family of standards known as Wi-Fi, IEEE 802.16 family of standards known as WiMax, IEEE 802.16.4 family of standards, a Long Term Evolution (LTE) family of standards, a Universal Mobile Telecommunications System (UMTS) family of standards, peer-to-peer (P2P) networks, a next generation (NG) / 6thgeneration (6G) standards among others. In an example, the network interface device 620 may include one or more physical jacks (e.g., Ethernet, coaxial, or phonejacks) or one or more antennas to connect to the transmission medium 626.
[0075] Note that the term “circuitry” as used herein refers to, is part of, or includes hardware components such as an electronic circuit, a logic circuit, a processor (shared, dedicated, or group) and / or memory (shared, dedicated, or group), an Application Specific Integrated Circuit (ASIC), a field-programmable device (FPD) (e.g., a field-programmable gate array (FPGA), a programmable logic device (PLD), a complex PLD (CPLD), a high-capacity PLD (HCPLD), a structured ASIC, or a programmable SoC), digital signal processors (DSPs), etc., that are configured to provide the described functionality. In some embodiments, the circuitry may execute one or more software or firmware programs to provide at least some of the described functionality. The term “circuitry” may also refer to a combination of one or more hardware elements (or a combination of circuits used in an electrical or electronic system) with the program code used to carry out the functionality of that program code. In these embodiments, the combination of hardware elements and program code may be referred to as a particular type of circuitry.
[0076] The term “processor circuitry” or “processor” as used herein thus refers to, is part of, or includes circuitry capable of sequentially and automatically carrying out a sequence of arithmetic or logical operations, or recording, storing, and / or transferring digital data. The term “processor circuitry” or “processor” may refer to one or more application processors, one or more baseband processors, a physical central processing unit (CPU), a single- or multi-core processor, and / or any other device capable of executing or otherwise operating computer-executable instructions, such as program code, software modules, and / or functional processes.
[0077] The camera 628 may sense light at least the wavelength or wavelengths emitted by the LEDs. The camera 628 may include optics (e.g., at least one camera lens) that are able to collect reflected light of illumination that is reflected from and / or emitted by an illuminated region. The camera lens may direct the reflected light onto a multi-pixel sensor (also referred to as a light sensor) to form an image of on the multi -pixel sensor.
[0078] The processor 602 may control and drive the LEDs via one or more drivers. For example, the processor 602 may optionally control one or more LEDs in LED arrays independent of another one or more LEDs in the LED arrays, so as to illuminate an area in a specified manner.
[0079] In addition, the sensors 630 may be incorporated in the camera 628 and / or the light source 610. The sensors 630 may sense visible and / or infrared light and may further sense the ambient light and / or variations / flicker in the ambient light in addition to reception of the reflected light from the LEDs. The sensors may have one or more segments (that are able to sense the same wavelength / range of wavelengths or different wavelength / range of wavelengths), similar to the LED arrays.
[0080] FIG. 7 illustrates an example lighting system, according to some embodiments. As above, some of the elements shown in the lighting system 700 may not be present, while other additional elements may be disposed in the lighting system 700. The lighting system 700 may include a controller 702 that controls illumination using a pixel array 710 that contains multiple individual pixels 712.
[0081] In some embodiments, some or all of the components described as the controller 702 may be disposed on a backplane such as, for example, a complementary metal oxide semiconductor (CMOS) backplane. The controller 702 may be coupled to or include one or more processors 704. The processor 704 may receive image data (in frames) via an interface and may process the image data to control a generator 706a, for example, controlling analog signals or PWM duty cycles and / or turn-on times for causing the lighting system 700 to produce the images indicated by the image data.
[0082] The controller 702 may further include a frame buffer 708. The frame buffer 708 may store one or more images prior the one or more processors704 and store the indications for implementation by the one or more processors704
[0083] The generator 706a may be controlled by the processor 704 and may produce driving signals in accordance with the indications. The generator 706a may be connected to a driver 706b to drive the pixel array 710 so that the pixels 712 provide desired intensities of light.
[0084] Each pixel 712 may include one or more LEDs 714. The LEDs 714 may be different colors and may be controlled individually or in groups. As shown, the pixel 712 may include, for each pixel 712 or LED 714, a PWM switch, and a current source. The pixel 712 may be driven by the driver 706b. The signal from the generator 706a may cause the switch to open and close in accordance with the value of the signal. The signal corresponding to the intensities of light may cause the current source to produce a current flow to cause the pixels 712 to produce the corresponding intensities of light.
[0085] The lighting system 700 may further include a power supply 720. In some embodiments, the power supply 720 may be a battery that produces power for the controller 702.
[0086] FIG. 8 illustrates an example hardware arrangement for implementing the above disclosed subject matter, according to some embodiments. In particular, the hardware arrangement 800 may include an LED die 802 that contains the LED array(s) and a backplane, such as a CMOS backplane 804. The LED die 802 may be coupled to the CMOS backplane 804 by one or more interconnects 810, where the interconnects 810 may provide for transmission of signals between the LED die 802 and the CMOS backplane 804. The interconnects 810 may comprise one or more solder bump joints, one or more copper pillar bump joints, other types of interconnects known in the art, or some combination thereof.
[0087] The LED die 802 may include circuitry to implement the LED array described above. In particular, the LED die 802 may include a plurality of LEDs. The LED die 802 may include a shared active layer and a shared substrate for the LED array, and thereby the LED array may be a monolithic LED array. Each LED of the LED array may include an individual segmented active layer and / or substrate. In some embodiments, the LED die 802 mayfurther include switches and current sources to drive the LED array as described above. In other embodiments, the switches and the current sources may be included in the CMOS backplane 804. The LEDs may be micro-LEDs or LEDs larger than micro-LEDs.
[0088] The CMOS backplane 804 may include circuitry to implement the control module. The CMOS backplane 804 may utilize the interconnects 810 to provide the LED array with the driving signals and the signals for the intensity for causing the LED array to produce light in accordance with the signals and the intensity.
[0089] The hardware arrangement 800 may further include a PCB 806. The PCB 806 may include circuitry to implement various functionality described herein. The PCB 806 may be coupled to the CMOS backplane 804. For example, the PCB 806 may be coupled to the CMOS backplane 804 via one or more wire bonds 812. The PCB 806 and the CMOS backplane 804 may exchange image data, power, and / or feedback via the coupling, among other signals.
[0090] As shown, the LEDs and circuitry supporting the LED array can be packaged and include a submount or printed circuit board for powering and controlling light production by the LEDs. The PCB supporting the LED array may include electrical vias, heat sinks, ground planes, electrical traces, and flip chip or other mounting systems. The submount or PCB may be formed of any suitable material, such as ceramic, silicon, aluminum, etc. If the submount material is conductive, an insulating layer may be formed over the substrate material, and a metal electrode pattern formed over the insulating layer for contact with the micro-LED array. The submount can act as a mechanical support, providing an electrical interface between electrodes on the LED array and a power supply, and also provide heat sink functionality.
[0091] In general, a variety of applications may be supported by LED arrays. Such applications may include stand-alone applications to provide general illumination (e.g., within or external to a room or vehicle) or to provide specific images. In addition to devices such as a luminaire, projector, mobile device, the system may be used to provide AR and VR-based applications. Visualization systems, such as VR and AR systems, are becoming increasinglymore common across numerous fields such as entertainment, education, medicine, and business. Various types of devices may be used to provide AR / VR to users, including headsets, glasses, and projectors. Such an AR / VR system may include components similar to those described above: the microLED array, a display or screen (which may include touchscreen elements), a micro-LED array controller, sensors, and a controller, among others. The AR / VR components can be disposed in a single structure, or one or more of the components shown can be mounted separately and connected via wired or wireless communication. Power and user data may be provided to the controller. The user data input can include information provided by audio instructions, haptic feedback, eye or pupil positioning, or connected keyboard, mouse, or game controller. The sensors may include cameras, depth sensors, audio sensors, accelerometers, two or three axis gyroscopes and other types of motion and / or environmental / wearer sensors that provide the user input data. Other sensors can include but are not limited to air pressure, stress sensors, temperature sensors, or any other suitable sensors for local or remote environmental monitoring. In some embodiments, the control input can include detected touch or taps, gestural input, or control based on headset or display position. As another example, based on the one or more measurement signals from one or more gyroscope or position sensors that measure translation or rotational movement, an estimated position of the AR / VR system relative to an initial position can be determined.
[0092] In some embodiments, the controller may control individual micro-LEDs or one or more groups of LEDs to display content (AR / VR and / or non- AR / VR) to the user while controlling other LEDs and sensors used in eye tracking to adjust the content displayed. Content display LEDs may be designed to emit light within the visible band (approximately 400 nm to 780 nm) while LEDs used for tracking may be designed to emit light in the IR band (approximately 780 nm to 2,200 nm). In some embodiments, the tracking LEDs and content LEDs may be simultaneously active. In some embodiments, the tracking LEDs may be controlled to emit tracking light during a time period that content LEDs are deactivated and are thus not displaying content to the user. The AR / VR system can incorporate optics, such as those described above, and / oran AR / VR display, for example to couple light emitted by LED array onto the AR / VR display.
[0093] In some embodiments, the AR / VR controller may use data from the sensors to integrate measurement signals received from the accelerometers over time to estimate a velocity vector and integrate the velocity vector over time to determine an estimated position of a reference point for the AR / VR system. In other embodiments, the reference point used to describe the position of the AR / VR system can be based on depth sensor, camera positioning views, or optical field flow. Based on changes in position, orientation, or movement of the AR / VR system, the system controller can send images or instructions the light emitting array controller. Changes or modification the images or instructions can also be made by user data input, or automated data input.
[0094] In general, in a VR system, a display can present to a user a view of scene, such as a three-dimensional scene. The user can move within the scene, such as by repositioning the user’s head or by walking. The VR system can detect the user’s movement and alter the view of the scene to account for the movement. For example, as a user rotates the user’s head, the system can present views of the scene that vary in view directions to match the user’s gaze. In this manner, the VR system can simulate a user’s presence in the three- dimensional scene. Further, a VR system can receive tactile sensory input, such as from wearable position sensors, and can optionally provide tactile feedback to the user.
[0095] In an AR system, on the other hand, the display can incorporate elements from the user’s surroundings into the view of the scene. For example, the AR system can add textual captions and / or visual elements to a view of the user’s surroundings. For example, a retailer can use an AR system to show a user what a piece of furniture would look like in a room of the user’s home, by incorporating a visualization of the piece of furniture over a captured image of the user’s surroundings. As the user moves around the user’s room, the visualization accounts for the user’s motion and alters the visualization of the furniture in a manner consistent with the motion. For example, the AR system can position a virtual chair in a room. The user can stand in the room on a front side of the virtual chair location to view the front side of the chair. The user canmove in the room to an area behind the virtual chair location to view a back side of the chair. In this manner, the AR system can add elements to a dynamic view of the user’s surroundings.
[0096] FIG. 9 shows a block diagram of an example of a system, according to some embodiments. The system 900 may provide AR / VR functionality using microLEDs. The system 900 can include a wearable housing 912, such as a headset or goggles. The housing 912 can mechanically support and house the elements detailed below. In some examples, one or more of the elements detailed below can be included in one or more additional housings that can be separate from the wearable housing 912 and couplable to the wearable housing 912 wirelessly and / or via a wired connection. For example, a separate housing can reduce the weight of wearable goggles, such as by including batteries, radios, and other elements. The housing 912 can include one or more batteries 914, which can electrically power any or all of the elements detailed below. The housing 912 can include circuitry that can electrically couple to an external power supply, such as a wall outlet, to recharge the batteries 914. The housing 912 can include one or more radios 916 to communicate wirelessly with a server or network via a suitable protocol, such as WiFi.
[0097] The system 900 can include one or more sensors 918, such as optical sensors, audio sensors, tactile sensors, thermal sensors, gyroscopic sensors, time-of-flight sensors, triangulation-based sensors, and others. In some examples, one or more of the sensors can sense a location, a position, and / or an orientation of a user. In some examples, one or more of the sensors 918 can produce a sensor signal in response to the sensed location, position, and / or orientation. The sensor signal can include sensor data that corresponds to a sensed location, position, and / or orientation. For example, the sensor data can include a depth map of the surroundings. In some examples, such as for an AR system, one or more of the sensors 918 can capture a real-time video image of the surroundings proximate a user.
[0098] The system 900 can include one or more video generation processors 920. The one or more video generation processors 920 can receive scene data that represents a three-dimensional scene, such as a set of position coordinates for objects in the scene or a depth map of the scene. This data maybe received from a server and / or a storage medium. The one or more video generation processors 920 can receive one or more sensor signals from the one or more sensors 918. In response to the scene data, which represents the surroundings, and at least one sensor signal, which represents the location and / or orientation of the user with respect to the surroundings, the one or more video generation processors 920 can generate at least one video signal that corresponds to a view of the scene. In some examples, the one or more video generation processors 920 can generate two video signals, one for each eye of the user, that represent a view of the scene from a point of view of the left eye and the right eye of the user, respectively. In some examples, the one or more video generation processors 920 can generate more than two video signals and combine the video signals to provide one video signal for both eyes, two video signals for the two eyes, or other combinations.
[0099] The system 900 can include one or more light sources 922 that can provide light for a display of the system 900. Suitable light sources 922 can include the microLEDs above, for example. The one or more light sources 922 can include light-producing elements having different colors or wavelengths. For example, a light source can include a red light-emitting diode that can emit red light, a green light-emitting diode that can emit green light, and a blue lightemitting diode that can emit blue right. The red, green, and blue light combine in specified ratios to produce any suitable color that is visually perceptible in a visible portion of the electromagnetic spectrum.
[0100] The system 900 can include one or more modulators 924. The modulators 924 can be implemented in one of at least two configurations. In a first configuration, the modulators 924 can include circuitry that can modulate the light sources 922 directly. For example, the light sources 922 can include an array of light-emitting diodes, and the modulators 924 can directly modulate the electrical power, electrical voltage, and / or electrical current directed to each light-emitting diode in the array to form modulated light. The modulation can be performed in an analog manner and / or a digital manner. In some examples, the light sources 922 can include an array of red light-emitting diodes, an array of green light-emitting diodes, and an array of blue light-emitting diodes, and the modulators 924 can directly modulate the red light-emitting diodes, the greenlight-emitting diodes, and the blue light-emitting diodes to form the modulated light to produce a specified image.
[0101] In a second configuration, the modulators 924 can include a modulation panel, such as a liquid crystal panel. The light sources 922 can produce uniform illumination, or nearly uniform illumination, to illuminate the modulation panel. The modulation panel can include pixels. Each pixel can selectively attenuate a respective portion of the modulation panel area in response to an electrical modulation signal to form the modulated light. In some examples, the modulators 924 can include multiple modulation panels that can modulate different colors of light. For example, the modulators 924 can include a red modulation panel that can attenuate red light from a red light source such as a red light-emitting diode, a green modulation panel that can attenuate green light from a green light source such as a green light-emitting diode, and a blue modulation panel that can attenuate blue light from a blue light source such as a blue light-emitting diode.
[0102] In some examples of the second configuration, the modulators 924 can receive uniform white light or nearly uniform white light from a white light source, such as a white-light light-emitting diode. The modulation panel can include wavelength-selective filters on each pixel of the modulation panel. The panel pixels can be arranged in groups (such as groups of three or four), where each group can form a pixel of a color image. For example, each group can include a panel pixel with a red color filter, a panel pixel with a green color filter, and a panel pixel with a blue color filter. Other suitable configurations can also be used.
[0103] The system 900 can include one or more modulation processors 926, which can receive a video signal, such as from the one or more video generation processors 920, and, in response, can produce an electrical modulation signal. For configurations in which the modulators 924 directly modulate the light sources 922, the electrical modulation signal can drive the modulators 924. For configurations in which the modulators 924 include a modulation panel, the electrical modulation signal can drive the modulation panel.
[0104] The system 900 can include one or more beam combiners 928 (also known as beam splitters), which can combine light beams of different colors to form a single multi-color beam. For configurations in which the light sources 922 can include multiple light-emitting diodes of different colors, the system 900 can include one or more wavelength-sensitive (e.g., dichroic) beam combiners 928 that can combine the light of different colors to form a single multi-color beam.
[0105] The system 900 can direct the modulated light toward the eyes of the viewer in one of at least two configurations. In a first configuration, the system 900 can function as a projector, and can include suitable projection optics 930 that can project the modulated light onto one or more screens 932. The screens 932 can be located a suitable distance from an eye of the user. The system 900 can optionally include one or more lenses 934 that can locate a virtual image of a screen 932 at a suitable distance from the eye, such as a closefocus distance, such as 500 mm, 750 mm, or another suitable distance. In some examples, the system 900 can include a single screen 932, such that the modulated light can be directed toward both eyes of the user. In some examples, the system 900 can include two screens 932, such that the modulated light from each screen 932 can be directed toward a respective eye of the user. In some examples, the system 900 can include more than two screens 932. In a second configuration, the system 900 can direct the modulated light directly into one or both eyes of a viewer. For example, the projection optics 930 can form an image on a retina of an eye of the user, or an image on each retina of the two eyes of the user.
[0106] For some configurations of AR systems, the system 900 can include at least a partially transparent display, such that a user can view the user’s surroundings through the display. For such configurations, the AR system can produce modulated light that corresponds to the augmentation of the surroundings, rather than the surroundings itself. For example, in the example of a retailer showing a chair, the AR system can direct modulated light, corresponding to the chair but not the rest of the room, toward a screen or toward an eye of a user.
[0107] FIG. 10 illustrates a top plan view of an example array suitable for implementing embodiments described herein. The example hybridized device illustrated in FIG. 10 includes an LED die 1010 that includes LEDs 1012, such as those described herein. Projected patterned light may define images that may include light emitted from the LEDs 1012. Each LED 1012 (or group of LEDs) of the array may correspond to a projector picture element or projector pixel. In embodiments described herein, the LEDs 1012. Suitable hybridized devices may include monolithic LED arrays, micro LED arrays, etc. Each LED 1012 in LED die 1010 may be individually addressable.Alternatively, groups or subsets of LEDs 1012 may be addressable. In embodiments described herein, each array may comprise micro LEDs. Each LED 1012 may have a size in the range of micrometers (i.e., between 1 micrometer (pm) and 100 pm). For example, LED 1012 may have dimensions of approximately (within 10 pm by 10 pm) 40 pm by 40 pm in some embodiments. An LED 1012 may have a lateral dimension of less than 100 pm in some embodiments.
[0108] LEDs 1012 may be arranged as a matrix comprising one or more rows and one or more columns to define a rectangle. In other embodiments, LEDs 1012 may be arranged to define other shapes. Each micro-LED included in the LED die 1010 may encompass thousands or millions of projector pixels or LEDs. For example, an LED die 1010 that contains a pLED may include within 5,000 pixels, 20,000 pixels or more - such as millions of pixels. Each pixel may include an emitter. An LED die 1010 that contains the pLED can support high- density pixels having a lateral dimension less than 150pm by 150pm. In some embodiments, a pLED die can have dimensions of about 50 pm in diameter or width. In some embodiments, the height dimension of an array including the LEDs 1012, their supporting substrate and electrical traces, and associated micro-optics may be less than 5 millimeters.
[0109] An exploded view of a 3x3 sub-array 1016 of LEDs 1012 included in LED die 1010 is also shown in FIG. 10. Sub-array 1016 may include LEDs 1012, each defined by a width wl. In some example embodiments, width wl can be approximately 100pm or less (e.g., 40pm). As shown in the sub-array 1016, lanes 1014 may be defined extending horizontally and verticallyto define rows and columns of LEDs 1012. Lanes 1014 between the LEDs 1012 may have a width, w2, wide. In some embodiments, the width w2 may be approximately 20pm or less (e.g., 5 m). In some embodiments, the width w2 may be as small as 1pm. The lanes 1014 may provide an air gap between adjacent emitters or may contain other material. A distance dl from the center of one LED 1012 to the center of an adjacent LED 1012 may be approximately 120pm or less (e.g., 45pm). It will be understood that the widths and distances provided herein are examples of one of many possible embodiments in which widths and / or other dimensions may vary.
[0110] In some example embodiments, lanes 1014 may be defined by a width w2 that can be approximately 20pm or less (e.g., 5pm). In some example embodiments, width w2 can be as small as 1pm. Lanes 1014 can serve to provide an air gap between adjacent LEDs 1012 and may contain material other than light emitting material. In some example embodiments, a distance dl from the center of one LED 1012 to the center of an adjacent LED 1012 can be approximately 120pm or less (e.g., 45pm). It will be understood that the LED and lane widths and distances between LEDs are intended as examples. Persons of ordinary skill reading the disclosure herein will appreciate a range of widths and / or dimensions will be suitable for various implementations, and those embodiments will fall within the scope of the disclosure.
[0111] For the convenience of illustration, LED 1012 that are included in the LED die 1010 are depicted herein as having a rectangular shape. However, as persons of ordinary skill will appreciate, a variety of other emitter shapes would be suitable for implementing the LED 1012 and LED die 1010 in various applications, and those would fall within the scope of the embodiments described herein. Likewise, LED die 1010 is depicted in FIG. 10 as a symmetric matrix of LEDs 1012 (and / or other emitters). However, various other implementations of the LED die 1010 may be suitable for implementing embodiments described herein, depending on application and design considerations. For example, in some implementations, LED die 1010 can comprise a linear array of LED 1012, and in other implementations a rectangular array of LEDs 1012. In some implementations, the LED die 1010 can comprise a symmetric or asymmetric matrix of LEDs 1012. LED die 1010 can comprisean array or matrix defined by a dimension or order that differs from the array dimensions or orders depicted herein.
[0112] For example, in some practical applications, the LED die 1010 depicted in FIG. 10 may include over 20,000 LEDs 1012 in asymmetric or symmetric arrangements in a wide range of array dimensions and orders (e.g., a 200x100 array, a symmetric matrix, or a non-symmetric matrix). For example, in some practical applications, two or more LED dies 1010 can be stacked such that LEDs 1012 are arranged to define rows and columns that extend in three spatial directions or dimensions. It will also be understood that the LED die 1010 can itself be a subarray of a larger array (not shown) of LEDs 1012.
[0113] LED die 1010 may have a surface area of 90 mm2or greater and may require significant power to drive the array. In some applications, this power can be as much as 60 watts or more. The LED die 1010 may include hundreds, thousands, or even millions of LEDs or emitters arranged within a centimeter-scale area substrate or smaller. A micro LED may include an array of individual emitters provided on a substrate or may be a single silicon wafer or die partially or fully divided into light-emitting segments that form the LEDs 1012. In some embodiments, the emitters may have distinct non-white colors. For example, at least four of the emitters may be RGBY groupings of emitters.
[0114] Examples
[0115] Example 1 is a light emitting diode (LED) array comprising: a plurality of pixels, each pixel containing a semiconductor stack having a trapezoidal cross-section with respect to a growth direction of the semiconductor stack, the semiconductor stack including: an n-type semiconductor layer; a p- type semiconductor layer; and an active region between the n-type semiconductor layer and the p-type semiconductor layer; and for each pixel, a micro lens structure disposed on the semiconductor stack of the pixel, at least a portion of the micro lens structure having a trapezoidal cross-section with respect to the growth direction, the micro lens structure formed from a dielectric material.
[0116] In Example 2, the subject matter of Example 1 includes, wherein the micro lens structure comprises a lens formed from the dielectric material and a residual layer formed from the dielectric material.
[0117] In Example 3, the subject matter of Example 2 includes, wherein the lens has the trapezoidal cross-section and the residual layer does not have a trapezoidal cross-section in the growth direction.
[0118] In Example 4, the subject matter of Examples 2-3 includes, wherein a ratio of thicknesses of the lens to the residual layer in the growth direction may be about 1.25 to about 3.75.
[0119] In Example 5, the subject matter of Examples 1-4 includes, wherein the dielectric material is silicon dioxide (SiO2).
[0120] In Example 6, the subject matter of Examples 1-5 includes, a transparent conducting oxide (TCO) layer configured to provide a common cathode to a set of the pixels, the TCO layer disposed between the micro lens structure and the semiconductor stack.
[0121] In Example 7, the subject matter of Examples 1-6 includes, wherein an angle of sidewalls of the semiconductor stack is about 20 degrees to about 45 degrees from the growth direction, and an angle of the trapezoidal cross-section of the micro lens structure is about 15 degrees to about 25 degrees from the growth direction.
[0122] In Example 8, the subject matter of Examples 1-7 includes, wherein substantially an entirety of the micro lens structure has the trapezoidal cross-section.
[0123] In Example 9, the subject matter of Examples 1-8 includes, wherein each pixel further comprises insulating layers formed from different dielectric materials on sidewalls of the semiconductor stack.
[0124] In Example 10, the subject matter of Examples 1-9 includes, wherein a thickness of the at least the portion of the micro lens structure having the trapezoidal cross-section is from about 1000 nm to about 3000 nm.
[0125] Example 11 is an electronic apparatus, comprising a complementary metal oxide semiconductor (CMOS) backplane that includes, elements comprising: a light emitting diode (LED) array comprising: a plurality of pixels, each pixel containing a semiconductor stack having a trapezoidal cross-section with respect to a growth direction of the semiconductor stack, the semiconductor stack including: an n-type semiconductor layer; a p-type semiconductor layer; and an active region between the n-type semiconductorlayer and the p-type semiconductor layer; and for each pixel, a micro lens structure disposed on the semiconductor stack of the pixel, at least a portion of the micro lens structure having a trapezoidal cross-section with respect to the growth direction, the micro lens structure formed from a dielectric material; drivers to provide current to the LED array; and a controller configured to control the drivers to individually drive the pixels.
[0126] In Example 12, the subject matter of Example 11 includes, wherein the micro lens structure comprises a lens formed from the dielectric material and a residual layer formed from the dielectric material.
[0127] In Example 13, the subject matter of Example 12 includes, wherein the lens has the trapezoidal cross-section and the residual layer does not have a trapezoidal cross-section in the growth direction.
[0128] In Example 14, the subject matter of Examples 11-13 includes, wherein the dielectric material is silicon oxide (SiO2).
[0129] In Example 15, the subject matter of Examples 11-14 includes, a transparent conducting oxide (TCO) layer configured to provide a common cathode to a set of the pixels, the TCO layer disposed between the micro lens structure and the semiconductor stack.
[0130] In Example 16, the subject matter of Examples 11-15 includes, wherein an angle of sidewalls of the semiconductor stack is about 20 degrees to about 45 degrees from the growth direction, and an angle of the trapezoidal cross-section of the micro lens structure is about 15 degrees to about 25 degrees from the growth direction.
[0131] In Example 17, the subject matter of Examples 11-16 includes, wherein substantially an entirety of the micro lens structure has the trapezoidal cross-section.
[0132] In Example 18, the subject matter of Examples 11-17 includes, wherein each pixel further comprises insulating layers formed from different dielectric materials on sidewalls of the semiconductor stack.
[0133] Example 19 is a method of forming an electronic apparatus, the method comprising: disposing a micro lens structure on each pixel of light emitting diode (LED) array to form a monolithic structure, each pixel containing a semiconductor stack having a trapezoidal cross-section with respect to agrowth direction of the semiconductor stack, at least a portion of the micro lens structure having a trapezoidal cross-section with respect to the growth direction, the micro lens structure formed from a dielectric material; and hybridizing the monolithic structure by attaching the monolithic structure to bonding pads of a backplane.
[0134] In Example 20, the subject matter of Example 19 includes, wherein the micro lens structure comprises a lens formed from the dielectric material and a residual layer formed from the dielectric material.
[0135] In Example 21, the subject matter of Example 19 includes, wherein the backplane is a complementary metal oxide semiconductor (CMOS) backplane.
[0136] Example 22 is at least one machine-readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations to implement of any of Examples 1-21.
[0137] Example 23 is an apparatus comprising means to implement of any of Examples 1-20.
[0138] Example 24 is a system to implement of any of Examples 1-21.
[0139] Example 25 is a method to implement of any of Examples 1-21.
[0140] Although an embodiment has been described with reference to specific example embodiments, it will be evident that various modifications and changes may be made to these embodiments without departing from the broader scope of the present disclosure. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense. The accompanying drawings that form a part hereof show, by way of illustration, and not of limitation, specific embodiments in which the subject matter may be practiced. The embodiments illustrated are described in sufficient detail to enable those skilled in the art to practice the teachings disclosed herein. Other embodiments may be utilized and derived therefrom, such that structural and logical substitutions and changes may be made without departing from the scope of this disclosure. This Detailed Description, therefore, is not to be taken in a limiting sense, and the scope of various embodiments is defined only by the appended claims, along with the full range of equivalents to which such claims are entitled.
[0141] The subject matter may be referred to herein, individually and / or collectively, by the term “embodiment” merely for convenience and without intending to voluntarily limit the scope of this application to any single inventive concept if more than one is in fact disclosed. Thus, although specific embodiments have been illustrated and described herein, it should be appreciated that any arrangement calculated to achieve the same purpose may be substituted for the specific embodiments shown. This disclosure is intended to cover any and all adaptations or variations of various embodiments. Combinations of the above embodiments, and other embodiments not specifically described herein, will be apparent to those of skill in the art upon reviewing the above description.
[0142] In this document, the terms "a" or "an" are used, as is common in patent documents, to include one or more than one, independent of any other instances or usages of "at least one" or "one or more." In this document, the term "or" is used to refer to a nonexclusive or, such that "A or B" includes "A but not B," "B but not A," and "A and B," unless otherwise indicated. In this document, the terms "including" and "in which" are used as the plain-English equivalents of the respective terms "comprising" and "wherein." Also, in the following claims, the terms "including" and "comprising" are open-ended, that is, a system, UE, article, composition, formulation, or process that includes elements in addition to those listed after such a term in a claim are still deemed to fall within the scope of that claim. Moreover, in the following claims, the terms "first," "second," and "third," etc. are used merely as labels, and are not intended to impose numerical requirements on their objects.
[0143] The Abstract of the Disclosure is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing Detailed Description, it may be seen that various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus, the following claims are hereby incorporated into theDetailed Description, with each claim standing on its own as a separate embodiment.
Claims
WHAT IS CLAIMED IS:
1. A light emitting diode (LED) array comprising: a plurality of pixels, each pixel containing a semiconductor stack having a trapezoidal cross-section with respect to a growth direction of the semiconductor stack, the semiconductor stack including: an n-type semiconductor layer; a p-type semiconductor layer; and an active region between the n-type semiconductor layer and the p-type semiconductor layer; and for each pixel, a micro lens structure disposed on the semiconductor stack of the pixel, at least a portion of the micro lens structure having a trapezoidal cross-section with respect to the growth direction, the micro lens structure formed from a dielectric material.
2. The LED array of claim 1, wherein the micro lens structure comprises a lens formed from the dielectric material and a residual layer formed from the dielectric material.
3. The LED array of claim 2, wherein the lens has the trapezoidal crosssection and the residual layer does not have a trapezoidal cross-section in the growth direction.
4. The LED array of claim 2, wherein a ratio of thicknesses of the lens to the residual layer in the growth direction may be about 1.25 to about 3.75.
5. The LED array of claim 1, wherein the dielectric material is silicon dioxide (SiO2).
6. The LED array of claim 1, further comprising a transparent conducting oxide (TCO) layer configured to provide a common cathode to a set of the pixels, the TCO layer disposed between the micro lens structure and the semiconductor stack.
7. The LED array of claim 1, wherein an angle of sidewalls of the semiconductor stack is about 20 degrees to about 45 degrees from the growth direction, and an angle of the trapezoidal cross-section of the micro lens structure is about 15 degrees to about 25 degrees from the growth direction.
8. The LED array of claim 1, wherein substantially an entirety of the micro lens structure has the trapezoidal cross-section.
9. The LED array of claim 1, wherein each pixel further comprises insulating layers formed from different dielectric materials on sidewalls of the semiconductor stack.
10. The LED array of claim 1, wherein a thickness of the at least the portion of the micro lens structure having the trapezoidal cross-section is from about 1000 nm to about 3000 nm.
11. An electronic apparatus, comprising a complementary metal oxide semiconductor (CMOS) backplane that includes elements comprising: a light emitting diode (LED) array comprising: a plurality of pixels, each pixel containing a semiconductor stack having a trapezoidal cross-section with respect to a growth direction of the semiconductor stack, the semiconductor stack including: an n-type semiconductor layer; a p-type semiconductor layer; and an active region between the n-type semiconductor layer and the p-type semiconductor layer; for each pixel, a micro lens structure disposed on the semiconductor stack of the pixel, at least a portion of the micro lens structure having a trapezoidal cross-section with respect to the growth direction, the micro lens structure formed from a dielectric material;drivers to provide current to the LED array; and a controller configured to control the drivers to individually drive the pixels.
12. The electronic apparatus of claim 11, wherein the micro lens structure comprises a lens formed from the dielectric material and a residual layer formed from the dielectric material.
13. The electronic apparatus of claim 12, wherein the lens has the trapezoidal cross-section and the residual layer does not have a trapezoidal cross-section in the growth direction.
14. The electronic apparatus of claim 11, wherein the dielectric material is silicon oxide (SiO2).
15. The electronic apparatus of claim 11, further comprising a transparent conducting oxide (TCO) layer configured to provide a common cathode to a set of the pixels, the TCO layer disposed between the micro lens structure and the semiconductor stack.
16. The electronic apparatus of claim 11, wherein an angle of sidewalls of the semiconductor stack is about 20 degrees to about 45 degrees from the growth direction, and an angle of the trapezoidal cross-section of the micro lens structure is about 15 degrees to about 25 degrees from the growth direction.
17. The electronic apparatus of claim 11, wherein substantially an entirety of the micro lens structure has the trapezoidal cross-section.
18. The electronic apparatus of claim 11, wherein each pixel further comprises insulating layers formed from different dielectric materials on sidewalls of the semiconductor stack.
19. A method of forming an electronic apparatus, the method comprising:disposing a micro lens structure on each pixel of light emitting diode (LED) array to form a monolithic structure, each pixel containing a semiconductor stack having a trapezoidal cross-section with respect to a growth direction of the semiconductor stack, at least a portion of the micro lens structure having a trapezoidal cross-section with respect to the growth direction, the micro lens structure formed from a dielectric material; and hybridizing the monolithic structure by attaching the monolithic structure to bonding pads of a backplane.
20. The method of claim 19, wherein the micro lens structure comprises a lens formed from the dielectric material and a residual layer formed from the dielectric material.
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