Interleaving method and communication apparatus

Abstract

An interleaving method in channel coding, and a communication apparatus, wherein the degree of a variable node is taken into consideration when interleaving is performed on a codeword sequence to be interleaved. On the basis of the concept of degree-based interleaving, bits in a codeword sequence obtained after interleaving and energy levels of bit positions included in a QAM symbol meet conditions whereby a column having a relatively great column weight corresponds to a bit position in the QAM symbol that has a low energy level and a column having a relatively small column weight corresponds to a bit position in the QAM symbol that has a high energy level. By means of the interleaving method, the hardware complexity of interleaving can be reduced, and an interleaving performance superior to row and column interleaving can also be obtained.

Description

Interleaving method and communication device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on December 4, 2023, with application number 202311665402.9 and invention name “Interleaving Method and Communication Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of channel coding, and more specifically, to an interleaving method in channel coding and a related communication device. Background Art

[0003] Low-density parity check (LDPC) is a channel coding scheme very close to the Shannon limit, with the advantages of good performance and low complexity. It has been identified by the 3rd Generation Partnership Project (3GPP) as the data channel coding scheme for the 5th generation (5G) mobile networks.

[0004] To improve decoding performance, LDPC currently uses row-column bit interleaving, mapping the LDPC systematic bits onto high-energy bits of quadrature amplitude modulation (QAM), thereby protecting the LDPC systematic bits. Even if the final LDPC decoding fails to achieve overall coded bit accuracy, row-column interleaving can still improve the accuracy of the information bits. However, the hardware implementation of the row-column interleaving process is complex, and in high-throughput scenarios, it will severely impact the overall decoding rate, becoming a bottleneck in system decoding throughput. Summary of the Invention

[0005] The present application provides an interleaving method and a communication device, which can reduce the hardware complexity of interleaving while maintaining the interleaving performance basically unchanged.

[0006] In a first aspect, an interleaving method is provided, the method comprising: obtaining a first codeword sequence to be interleaved, the first codeword sequence corresponding to a base matrix of a low-density parity-check code (LDPC), the column weights of columns included in the base matrix being related to energy levels of bit positions included in a quadrature amplitude modulation (QAM) symbol, the first codeword sequence comprising X groups, where X is greater than or equal to 2 and is a positive integer; interleaving the first codeword sequence to obtain a second codeword sequence; mapping the second codeword sequence onto a quadrature amplitude modulation (QAM) symbol; and outputting the modulated QAM symbol.

[0007] In the technical solution of this application, the first codeword sequence is interleaved according to the "degree" so that the column weight of the basis matrix (or the degree of the Tanner graph) is related to the energy level of the bit position contained in the QAM symbol, which can reduce the hardware complexity of the interleaving. In addition, it can also improve the interleaving performance.

[0008] In conjunction with the first aspect, in certain implementations of the first aspect, the column weight of the base matrix is ​​related to the energy level of the bit position included in the QAM symbol, including: the column weight of the base matrix includes at least two intervals, the minimum column weight in a first interval of the at least two intervals is greater than the maximum column weight in a second interval of the at least two intervals, and the energy level corresponding to the first interval is less than the energy level corresponding to the second interval. Alternatively, the average column weight of the first interval is greater than the average column weight of the second interval, and the energy level corresponding to the first interval is less than the energy level of the second interval.

[0009] In combination with the first aspect, in certain implementations of the first aspect, each of the at least two intervals includes one or more column weights, wherein the at least two intervals include a third interval, and the column weights included in the third interval change non-continuously and monotonically.

[0010] In this implementation, if the column weights within the interval are non-monotonically changing, the degree distribution is freer and the decoding threshold is better.

[0011] In combination with the first aspect, in certain implementations of the first aspect, the columns contained in the base matrix correspond to at least two subsets; the interleaving of the first codeword sequence to obtain the second codeword sequence includes: interleaving the bits in the first codeword sequence corresponding to the first subset of the at least two subsets to obtain the second codeword sequence, wherein the first subset is the information column with the smallest degree in the base matrix, and the bits in the first subset are located in the first A bit positions of the QAM symbol in order from high to low energy level after interleaving, and A is a positive integer.

[0012] In this implementation, the degree and whether the information bit is present are considered simultaneously, allowing for rapid convergence while also protecting the information bit. For example, by always mapping the information bit to a bit position with a high energy level, it is possible to still have a correct information bit even if the overall decoding fails.

[0013] In combination with the first aspect, in some implementations of the first aspect, the number N of variable nodes with the smallest degree in the A and the base matrix is min And the length E of the first codeword sequence satisfies the following relationship:

[0014] Among them, round represents the rounding function.

[0015] In combination with the first aspect, in certain implementations of the first aspect, the columns contained in the base matrix correspond to at least two subsets; the interleaving of the first codeword sequence to obtain the second codeword sequence includes: interleaving a second subset of the at least two subsets to obtain the second codeword sequence, the second subset being the information column with the largest degree among the at least two subsets, the bits in the second subset corresponding to the first A bit positions of the QAM symbol in order from low to high energy level, where A is a positive integer.

[0016] In this implementation, the degree and whether it is an information bit are considered at the same time, so that information bit protection can be taken into account on the basis of fast convergence.

[0017] In combination with the first aspect, in some implementations of the first aspect, the number N of variable nodes with the largest degree in the A and the base matrix is max And the length E of the first codeword sequence satisfies the following relationship:

[0018] Among them, round represents the rounding function.

[0019] In combination with the first aspect, in certain implementations of the first aspect, the columns contained in the base matrix correspond to at least two subsets; the interleaving of the first codeword sequence to obtain the second codeword sequence includes: interleaving the bits in a first subset of the at least two subsets to obtain the second codeword sequence, the first subset being the information column with the smallest degree among the at least two subsets, and the bits in the first subset corresponding to A bit positions of energy levels other than the lowest energy level of the QAM symbol.

[0020] In this implementation, the degree and whether it is an information bit are considered at the same time, so that information bit protection can be taken into account on the basis of fast convergence.

[0021] In combination with the first aspect, in some implementations of the first aspect, the number N of variable nodes with the smallest degree in the A and the base matrix is min And the length E of the first codeword sequence satisfies the following relationship:

[0022] Here, round represents a rounding function.

[0023] In combination with the first aspect, in certain implementations of the first aspect, the columns contained in the base matrix correspond to at least two subsets; the interleaving of the first codeword sequence to obtain the second codeword sequence includes: interleaving the bits in the second subset of the at least two subsets to obtain the second codeword sequence, the second subset being the information column with the largest degree in the at least two subsets, and the bits in the second subset corresponding to A bits of other energy levels other than the highest energy level of the QAM symbol, where A is a positive integer.

[0024] In this implementation, the degree and whether it is an information bit are considered at the same time, so that information bit protection can be taken into account on the basis of fast convergence.

[0025] In combination with the first aspect, in some implementations of the first aspect, the number N of variable nodes with the largest degree in the A and the base matrix is max And the length E of the first codeword sequence satisfies the following relationship:

[0026] Among them, round represents the rounding function.

[0027] In combination with the first aspect, in some implementations of the first aspect, the at least two intervals include interval [1], interval [4,7] and interval [8,11], wherein the interval [8,11] corresponds to energy levels other than the highest energy level.

[0028] In combination with the first aspect, in some implementations of the first aspect, X=2, the QAM symbol includes Q m bits; the Q m A bits out of the bits come from the first of the X groups, and the Q m The remaining Q m - A bits from the second group of the X groups, the A bits corresponding to the first interval of the at least two intervals in descending order of column weight, the A bits being located in the Q m The energy levels of the bits are the first A bit positions in order from low to high, where A is a positive integer.

[0029] In this implementation, the node with the highest priority is assigned to the lowest energy level, which can ensure the performance of LDPC at a higher code rate (no extended check node and many high-degree nodes) and accelerate the convergence speed of decoding.

[0030] In combination with the first aspect, in some implementations of the first aspect, the value of A is determined based on the number N of variable nodes with the largest degree in the base matrix. max and the length E of the first codeword sequence is determined, N maxand E are positive integers.

[0031] In conjunction with the first aspect, in certain implementations of the first aspect, the A, N max and E satisfy the following relationship:

[0032] Among them, round represents the rounding function.

[0033] In combination with the first aspect, in some implementations of the first aspect, X=2, the QAM symbol includes Q m bits; the Q m A bits out of the bits come from the first of the X groups, and the Q m The remaining Q m - A bits from the second group of the X groups, the A bits corresponding to the first interval of the at least two intervals in descending order of column weight, the A bits being located in the Q m The energy levels of the bits are the first A bit positions in descending order, where A is a positive integer.

[0034] In this implementation, priority is given to ensuring that the node with the smallest degree corresponds to the highest energy level, which can ensure the performance of LDPC under low and medium code rates. More check nodes are expanded, and there are more low-degree nodes, which can speed up the convergence of decoding.

[0035] In combination with the first aspect, in some implementations of the first aspect, the value of A is determined based on the number N of variable nodes with the smallest degree in the base matrix. min and the length E of the first codeword sequence is determined, N min and E are positive integers.

[0036] In conjunction with the first aspect, in certain implementations of the first aspect, the A, N min and E satisfy the following relationship:

[0037] Among them, round represents the rounding function.

[0038] In combination with the first aspect, in some implementations of the first aspect, X=2, the QAM symbol includes Q m bits; the Q m A bits out of the bits come from the first of the X groups, and the Q m The remaining Q m - A bits from the second group of the X groups, the A bits corresponding to the first interval of the at least two intervals in descending order of column weight, the A bits being located in the Q mThere are A bit positions corresponding to energy levels other than the highest energy level in the bits, where A is a positive integer.

[0039] In this implementation, priority is given to ensuring that the maximum degree does not correspond to the highest energy level, ensuring the performance of LDPC under high code rates, without expanding the check nodes, and with many high-degree nodes, which can speed up the convergence of decoding.

[0040] In combination with the first aspect, in some implementations of the first aspect, the value of A is determined based on the number N of variable nodes with the largest degree in the base matrix. max and the length E of the first codeword sequence is determined, N max and E are positive integers.

[0041] In conjunction with the first aspect, in certain implementations of the first aspect, the A, N max and E satisfy the following relationship:

[0042] Among them, round represents the rounding function.

[0043] In combination with the first aspect, in some implementations of the first aspect, X=2, the QAM symbol includes Q m bits; the Q m A bits out of the bits come from the first of the X groups, and the Q m The remaining Q m - A bits from the second group of the X groups, the A bits corresponding to the first interval of the at least two intervals in descending order of column weight, the A bits being located in the Q m There are A bit positions corresponding to energy levels other than the lowest energy level in the bits, where A is a positive integer.

[0044] In this implementation, priority is given to ensuring that the minimum degree does not correspond to the lowest energy level, ensuring the performance of LDPC at low code rates, and expanding the number of check nodes and low-degree nodes to accelerate the convergence of decoding.

[0045] In combination with the first aspect, in some implementations of the first aspect, the value of A is determined based on the number N of variable nodes with the smallest degree in the base matrix. min and the length E of the first codeword sequence is determined, N min and E are positive integers.

[0046] In conjunction with the first aspect, in certain implementations of the first aspect, the A, N min and E satisfy the following relationship:

[0047] Among them, round represents the rounding function.

[0048] In combination with the first aspect, in some implementations of the first aspect, X=3, the QAM symbol includes Q m bits; the Q m A bits out of the bits come from the first of the X groups, and the Q m The other B bits of the bits that are different from the A bits are from the second group of the X groups, and the Q m The remaining Q in the bits m -AB bits are from the third group of the X groups, wherein the A bits correspond to the first interval of the at least two intervals in descending order of column weight, the B bits correspond to the first interval of the at least two intervals in descending order of column weight, and the A bits are located in the Q m The first A bits in the order of energy from low to high are located in the Q m The first B bit positions in the bits are in descending order of energy level, and A and B are positive integers.

[0049] In this implementation, the more groups the first codeword sequence has, the more strictly low-degree nodes correspond to high energy levels, and the faster the convergence speed.

[0050] In conjunction with the first aspect, in certain implementations of the first aspect, A and B respectively satisfy the following relationship:

[0051] Among them, round represents the rounding function, N max Indicates the number of variable nodes with the largest degree in the basis matrix, N min represents the number of variable nodes with the smallest degree in the base matrix, and E represents the length of the first codeword sequence.

[0052] In a second aspect, a deinterleaving method is provided, the method comprising: obtaining a QAM symbol to be demodulated; demodulating the QAM symbol to obtain a first information sequence; deinterleaving the first information sequence to obtain a second information sequence, wherein the second information sequence corresponds to an LDPC basis matrix, the column weights of the columns contained in the basis matrix are related to the energy levels of the bit positions contained in the QAM symbol, the second information sequence includes X groups, X is greater than or equal to 2, and X is a positive integer; and outputting the second information sequence.

[0053] The beneficial technical effects of the method of the second aspect can be referred to the description of the first aspect and will not be elaborated on here.

[0054] In the second aspect or any implementation thereof, those skilled in the art will appreciate that the bits (which may include information bits and check bits) sent by the encoding device are reflected as LLR information at the decoding device. m The LLR information can correspond to the Q contained in the QAM symbol m bit positions, and each LLR information indicates the probability that the bit at the corresponding bit position is 0 or 1. This description is also applicable to the second aspect or any implementation thereof, and will not be repeated below.

[0055] The decoding device performs deinterleaving according to the correspondence between the column weight of the base matrix and the energy level of the bit position contained in the QAM symbol, which is the same as that of the encoding device, to obtain a deinterleaved sequence. The deinterleaving process is not described in detail here. Furthermore, the decoding device can decode the deinterleaved sequence.

[0056] In a third aspect, a communication device is provided, wherein the communication device has the function of implementing the method of the first aspect or the second aspect, or the method in any possible implementation of the first aspect or the second aspect. The function can be implemented by hardware, or by hardware executing corresponding software implementation. The hardware or software includes one or more units corresponding to the above-mentioned functions.

[0057] In a fourth aspect, the present application provides a communication device comprising at least one processor, wherein the at least one processor is coupled to at least one memory, wherein the at least one memory is used to store a computer program or instruction, and the at least one processor is used to call and run the computer program or instruction from the at least one memory, so that the communication device executes the method in the first aspect or any possible implementation thereof, or executes the method in the second aspect or any possible implementation thereof.

[0058] In one example, the communication device described in the third aspect or the fourth aspect may be an encoding device or a decoding device.

[0059] In a fifth aspect, the present application provides a communication device, comprising a communication interface and a circuit, wherein the communication interface is used to receive a first codeword sequence to be interleaved and input the first codeword sequence to the circuit; the circuit interleaves the first codeword sequence based on the interleaving method provided by the present application and maps the obtained second codeword sequence to a QAM symbol; the communication interface is also used to output the modulated QAM symbol. Exemplarily, the communication device of the fifth aspect is an encoding device

[0060] In a sixth aspect, a communication device is provided, comprising a communication interface and a circuit, wherein the communication interface is configured to receive QAM symbols to be demodulated and input the QAM symbols into the circuit; the circuit demodulates the QAM symbols based on the deinterleaving method provided in this application to obtain a first information sequence, and deinterleaves the first information sequence to obtain a second information sequence; the communication interface is further configured to output the second information sequence. Furthermore, the circuit can also be configured to determine information bits based on the second information sequence; and the communication interface is further configured to output the information bits. Exemplarily, the communication device of the sixth aspect is a decoding device.

[0061] In a seventh aspect, the present application provides a computer-readable storage medium, which stores computer program code or instructions. When the computer instructions are executed on a computer, the method in the first aspect or any possible implementation thereof is implemented, or the method in the second aspect or any possible implementation thereof is implemented.

[0062] In an eighth aspect, the present application provides a computer program product, comprising computer program code or instructions, which, when the computer program code or instructions are run on a computer, enables the method in the first aspect or any possible implementation thereof to be implemented, or the method in the second aspect or any possible implementation thereof to be implemented.

[0063] In a ninth aspect, the present application provides a wireless communication system, comprising a communication device as described in any one of the third to sixth aspects, such as an encoding device and / or a decoding device. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 shows an example of an LDPC basis matrix.

[0065] FIG2 is a schematic diagram of extracting different matrix regions from a base matrix based on different coding rates.

[0066] FIG3 is an example of information bit protection of LDPC.

[0067] FIG4 is a schematic diagram of row-column interleaved reading and writing.

[0068] FIG5 is a schematic diagram of implementing row-column interleaving through memory splicing.

[0069] FIG6 is a schematic diagram of a system architecture applicable to an embodiment of the present application.

[0070] FIG7 is a schematic flowchart of the interleaving method and the deinterleaving method provided in this application.

[0071] FIG8 is a schematic diagram of the corresponding relationship between energy levels and column weights of a basis matrix provided in this application.

[0072] FIG9 is a schematic diagram of Scheme 1 provided in this application.

[0073] FIG10 is a schematic diagram of Scheme 2 provided in this application.

[0074] FIG11 is a schematic diagram of an example of Solution 5 provided in this application.

[0075] FIG12 is a schematic diagram of an example of Scheme 7 provided in this application.

[0076] FIG13 is a comparison diagram of BLER performance simulations of the interleaving method provided in this application.

[0077] FIG14 is a schematic structural diagram of a communication device provided in this application.

[0078] FIG15 is a schematic structural diagram of another communication device provided in this application.

[0079] FIG16 is a schematic structural diagram of another communication device provided in this application. DETAILED DESCRIPTION

[0080] The technical solution in this application will be described below with reference to the accompanying drawings.

[0081] In order to facilitate understanding of the technical solutions provided by this application, a brief introduction is given to the relevant technologies or concepts involved in the embodiments of this application.

[0082] Low-density parity-check codes (LDPC) are a channel coding scheme. The mainstream LDPC has a quasi-cyclic (QC) structure. The Tanner graph corresponding to the basis matrix is ​​called the basegraph (BG). The BG graph model of QC-LDPC is BG = (X, Y, F), where X corresponds to the variable, Y corresponds to the checksum equation, and F is the edge relationship. After the expansion factor is z, C After the QC expansion of , we get the Tanner graph, which is a bipartite graph G = (V, C, E), where V is the variable node, C is the check node, and E is the edge relationship. The variable nodes correspond one-to-one to the codeword bits, so the codeword bits are mapped to the column weight of the matrix or the degree of the variable node in the Tanner graph by their corresponding variable nodes. The corresponding number of columns in the check matrix N = |V| = Z C |X|, the number of check matrix rows M = |C| = Z C|Y|, the number of non-zero elements in the check matrix is ​​|E|=Z|F|. The base graph of 5G's LDPC includes BG1 and BG2, which have a common matrix structure, as shown in Figure 1. Part A corresponds to the high-code rate information column area, and part B corresponds to the high-code rate core check area. Part C is the zero matrix, and area D is the incremental redundancy area of ​​the matrix, corresponding to the low-code rate matrix. Part E is the incremental redundancy area and has a unit matrix structure. The value of the base matrix is ​​0 or 1. A value of 0 indicates an empty element, and a value of 1 indicates an edge in the base graph, or an association between the corresponding check node and the corresponding variable node.

[0083] Figure 2 is a schematic diagram of extracting different matrix areas from the base matrix based on different code rates. Among them, area A and area B constitute the highest code rate matrix, which is completely implemented by BG1 in the peak throughput scenario of 5G (for example, the code length is long, and the number of information bits in different scenarios can be 1,000 to 2,000, or greater than 8,000, etc.). The number of columns in area A of BG1 is 22, the number of columns in area B is 4, and the number of punctured columns is 2. The supported code rate is 22 / (22+4-2)=11 / 12≈0.917, or a code rate slightly higher than this can be supported by additional puncturing. The entire base matrix is ​​designed according to the lowest code rate. When it is necessary to support different code rates, part of the area in the upper left corner of the matrix is ​​intercepted for use.

[0084] The 5G communication protocol supports high-order modulation schemes, such as quadrature amplitude modulation (QAM). Under good channel conditions and high bit rates, the transmitter modulates the bits to be transmitted into a high-order symbol and sends the modulation symbol. The receiver receives the modulation symbol, demodulates it, and then decodes it. In the QAM modulation scheme, one QAM symbol corresponds to multiple bits, and these multiple bits have different energy levels. Taking QAM64 as an example, each symbol corresponds to log264 = 6 bits, with 3 different energy levels. By default, the first and second bits correspond to energy level 1, the highest energy, the third and fourth bits correspond to energy level 2, the second highest energy, and the fifth and sixth bits correspond to energy level 3, the lowest energy. Each QAM256 symbol corresponds to log2256=8 bits, corresponding to 4 energy levels, where the first and second bits correspond to energy level 1, the third and fourth bits correspond to energy level 2, the fifth and sixth bits correspond to energy level 3, and the seventh and eighth bits correspond to energy level 4. The energy decreases from energy level 1 to energy level 4.

[0085] In 5G communication protocols, LDPC currently uses row-column interleaving to interleave the coded bits to be transmitted. This aims to protect the LDPC information bits under QAM modulation. For example, LDPC information bits are mapped to high-energy bit positions in the QAM symbol whenever possible. Information bits can be either information bits or information bits that include CRC check bits.

[0086] Figure 3 shows an example of information bit protection in LDPC. In this example, the LDPC information length is 8448 and the transmission length is 12672, resulting in an LDPC code rate of 2 / 3. In the new radio (NR) coding protocol, BG1 coding is used, and the selected lifting size is 384, resulting in 22 information columns, each containing 384 bits. The NR protocol stipulates that the first two columns are punctured, so the number of parity columns should be 12672 / 384-(22-2)=13, as shown in Figure 3. The core parity columns include 4 columns, and the extended parity columns include 9 columns. These 13 columns serve as the parity columns for this LDPC. After the first two columns are punctured and not transmitted, there are 20 columns of systematic bits remaining. Adding the 13 parity columns, the resulting 33 columns are transmitted. The column indices of these 33 transmitted columns are shown in Figure 3 as 3 to 35. 22 information columns / 33 transmitted columns = 2 / 3, which is the code rate of this LDPC.

[0087] 5G stipulates that rate matching is performed after LDPC encoding to obtain the bit sequence to be sent. The bit sequence to be sent usually needs to be interleaved to obtain the bit sequence to be modulated, and then modulated and sent.

[0088] The most commonly used interleaving method is row-column interleaving, which rearranges the bit order by writing rows and reading columns. Assume that the bit sequence to be transmitted after rate matching is represented as e, and the bit sequence to be modulated after interleaving is represented as sequence f. If row-column interleaving is used, the relationship between sequence f and sequence e can be as follows:

[0089] Among them, E represents the sending length, Q m Indicates the number of bits contained in each modulation symbol, j represents the index of the QAM symbol, and i represents the index of the bit position contained in each QAM symbol. For a bit sequence of length E, the number of QAM symbols is E / Q m Therefore, the value of j ranges from 0 to E / Q m -1. If the number of bits contained in a QAM symbol is Q m , then the value of i ranges from 0 to Q m -1.

[0090] From the relationship between sequence e and sequence f, we can see that the position index in sequence e is i·E / Q m After bit interleaving, the position index of the bit i+j·Q in sequence f is i+j·Q m The bits in the sequence f are then mapped onto QAM symbols in sequence.

[0091] Taking the above QAM64 as an example, Q m = 6, corresponding to three energy levels. According to the relationship between sequence f and sequence e, columns 3 through 13 of the systematic bits are mapped to the first and second bit positions of each QAM symbol, which are the two bit positions with the highest energy. Columns 14 through 22 of the systematic bits, as well as columns 1 and 2 of the extended parity bits, are mapped to the third and fourth bit positions of the QAM symbol, which are the two bit positions with the second highest energy. Columns 3 and 4 of the core parity bits, as well as all columns of the extended parity bits, are mapped to the fifth and sixth bit positions of the QAM symbol, which are the two bit positions with the lowest energy.

[0092] Figure 4 illustrates the read and write process for row-column interleaving. As shown in Figure 4, when the transmitter performs interleaving, it writes data row by row in the order of address 0, address 1, address 2, ..., address 7, and then reads data column by column. Specifically, the bit at the first bit position of each address is read first, followed by the bit at the second bit position of each address, and so on. As can be seen, the transmitter writes 8 bits and reads 1 bit during interleaving. This approach is relatively complex to implement in memory. When the receiver performs deinterleaving, it inputs 8 log-likelihood ratios (LLRs) and outputs 1 LLR. This slows down the deinterleaving process, impacting the overall decoding rate. This can shift the decoder's throughput bottleneck from decoding to deinterleaving, especially in ultra-high throughput scenarios. Furthermore, high-order modulation schemes complicate the deinterleaving process, creating a system bottleneck. Improving the deinterleaving speed requires significant hardware resources. For example, to support 8-bit write and 8-bit read parallelism, the bit width of the memory needs to be expanded, as shown in FIG5 .

[0093] Figure 5 shows a schematic diagram of row-column interleaving achieved through memory splicing. For example, by splicing eight memories together, 8-bit writes and 8-bit reads can be achieved. However, this approach significantly increases hardware costs. For example, if 24 LLRs need to be read and written in parallel, assuming each LLR has an 8-bit quantization bit width, a total bit width of 24 × 8 × 8 = 1536 bits is required, which is very expensive.

[0094] Based on the above technical status, the present application provides an interleaving method, a deinterleaving method and a corresponding communication device in channel coding, so as to reduce the complexity of bit interleaving while keeping the interleaving performance basically unchanged.

[0095] Figure 6 is a schematic diagram of a system architecture applicable to an embodiment of the present application. As shown in Figure 6, the system architecture may include an encoding device and a decoding device. The encoding device is not limited to one or more, and the decoding device is not limited to one or more. For example, one of the encoding device and the decoding device may be a network device, and the other may be a terminal device.

[0096] The terminal devices in the embodiments of the present application include various communication kits with wireless communication functions (the communication kits may include, for example, antennas, power supply templates, cables, and wireless fidelity (WiFi) modules), handheld devices, vehicle-mounted devices, or other processing devices connected to a wireless modem. Specifically, they may refer to user equipment (UE), users, access terminals, user units, user stations, mobile stations, mobile stations, remote stations, remote terminals, mobile devices, user terminals, terminals, wireless communication devices, user agents, user devices, wireless modems, machine type communication devices, or other processing devices connected to a wireless modem. They may also be virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, wireless terminals in industrial control, terminals in self-driving, terminals in remote medical care, terminals in smart grids, terminals in transportation safety, terminals in smart cities, terminals in smart homes, or terminal devices in future communication networks. Of course, the terminal device in this application may also refer to a chip, modem, system on a chip (SoC) or a communication platform that may include a radio frequency (RF) part, which is mainly responsible for the relevant communication functions in the device.

[0097] The network devices in the embodiments of the present application may include, but are not limited to, next-generation base stations (gNodeBs, gNBs) in fifth-generation (5G) communication systems, base stations in sixth-generation (6G) mobile communication systems, base stations in future mobile communication systems, access points (APs), wireless relay nodes, wireless backhaul nodes, transmission points (TPs) or transmission reception points (TRPs) in wireless fidelity (WiFi) systems, evolved node Bs (eNBs) in long-term evolution (LTE) systems, and network devices in non-terrestrial network (NTN) communication systems. The network device may also be one or a group (i.e., multiple) antenna panels of a base station. In addition, the network device may also be a network node constituting a gNB or TP, such as a baseband unit (BBU), a centralized unit (CU), a distributed unit (DU), or a radio unit (RU). Alternatively, the network device may also be a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an Internet of Things (IoT), an Internet of Vehicles communication system, or a device that performs network-side functions in other communication systems, without limitation.

[0098] In the embodiments of the present application, the device for implementing the terminal function may be a terminal, or a device capable of supporting the terminal to implement the corresponding function, such as a chip (or chip system) or a circuit, which may be installed in the terminal. In addition, the device for implementing the function of a network device may be a network device, or a device capable of supporting the network device to implement the corresponding function, such as a chip (or chip system) or a circuit, which may be installed in the network device. Optionally, the chip system may include a chip, or include a chip and other discrete devices.

[0099] In the system architecture shown in Figure 6, in uplink communication, the encoding device is the terminal device and the decoding device is the network device. In downlink communication, the encoding device is the network device and the decoding device is the terminal device.

[0100] Figure 7 is a schematic flow chart of the interleaving method and deinterleaving method provided by this application. S210 to S240 in method 200 can be performed by an encoding device or by an apparatus (e.g., a chip, a chip system, or a circuit) applied to the encoding device; S250 to S280 can be performed by a decoding device or by an apparatus (e.g., a chip, a chip system, or a circuit) applied to the decoding device. The following description uses encoding devices and decoding devices as examples.

[0101] In addition, the technical solution of the present application can be applied to QAM modulation, but is also applicable to some other modulation methods, such as pulse amplitude modulation (PAM) and phase shift keying (PSK).

[0102] In summary, the technical solution of this application proposes the concept of interleaving by "degree," which can refer to taking the degree of variable nodes into account when interleaving the codeword sequence to be interleaved. Based on the concept of interleaving by degree, the energy levels of the bits in the interleaved codeword sequence and the bit positions contained in the QAM symbol satisfy a corresponding correspondence, which can simplify the hardware complexity of interleaving. In addition, the interleaving performance of this application's interleaving by "degree" is better than that of row-column interleaving.

[0103] S210: The encoding device obtains a first codeword sequence to be interleaved, where the first codeword sequence corresponds to an LDPC basis matrix. The column weights of the columns of the basis matrix are related to the energy levels of the bit positions in the QAM symbols. The first codeword sequence includes X groups, where X is greater than or equal to 2 and is a positive integer.

[0104] In the field of channel coding, the column weight of a matrix can refer to the number of 1s in its columns. In LDPC, column weight also represents the degree of a variable node. Therefore, the correspondence between column weight and energy level in each embodiment is also the correspondence between the degree of a variable node and energy level, and the two are essentially the same.

[0105] In an embodiment of the present application, the column weight of the columns included in the base matrix is ​​related to the energy level of the bit position included in the QAM symbol. In one example, it can be specifically: the column weight of the base matrix includes at least two intervals, and the at least two intervals include a first interval and a second interval, wherein the minimum column weight in the first interval is greater than the maximum column weight in the second interval, and the energy level corresponding to the first interval is less than the energy level corresponding to the second interval. In another example, the average column weight of the first interval is greater than the average column weight of the second interval, and the energy level corresponding to the first interval is less than the energy level corresponding to the second interval. As for how to divide the correspondence between intervals (such as the first interval and / or the second interval) and energy levels, it can be a priority relationship between intervals (such as the first interval and / or the second interval) and energy levels, rather than an absolute relationship, that is, the first interval corresponds to a low energy level first, and the second interval corresponds to a high energy level first. Therefore, in actual situations, when using regions with different code rates and matrices, it may be the case that the energy level of some bits corresponding to the first interval is the same as that of the second interval.

[0106] The first interval and the second interval are examples of any two intervals of the at least two intervals. Therefore, in comparison, if the column weight in an interval is larger, the energy level corresponding to the interval is lower, and if the column weight in an interval is smaller, the energy level corresponding to the interval is higher.

[0107] In an embodiment of the present application, an interval may include one or more column weights, without limitation. Furthermore, when an interval contains two or more column weights, the column weights within the interval may be monotonically changing or non-monotonic, and this application does not limit this. For example, the at least two intervals include a third interval, and the column weights contained in the third interval vary monotonically discontinuously. The third interval refers to any one of the at least two intervals. For example, the third interval may be the first interval or the second interval mentioned above, or it may be any other interval of the at least two intervals. The third interval may be one or more, without limitation. Among them, if the column weights within the interval vary monotonically, the hardware implementation is relatively simple and the correspondence with the energy level is clearer. If the column weights within the interval vary non-monotonically, the degree distribution is freer and the decoding threshold is better.

[0108] Therefore, the column weights of the columns included in the base matrix are numerically continuous or discontinuous. In the case where the column weights of the columns included in the base matrix are discontinuous, after the columns included in the base matrix are divided into the at least two intervals, the column weights included in any interval may be continuous or discontinuous. As an example, the column weights of the columns included in the base matrix include the values ​​1, 4, 7, 8, and 11. If the column weights are divided into three intervals, namely interval [1], interval [4,7], and interval [8,11], these three intervals are monotonically increasing in order from small to large column weights. Within the intervals [4,7] and [8,11], the column weights are discontinuous.

[0109] In another example, the correspondence between the column weights of the columns included in the base matrix and the energy levels of the bit positions included in the QAM symbol can be: the energy level corresponding to the first column in the base matrix is ​​higher than the energy level corresponding to the second column, wherein the column weight of the first column is smaller than the column weight of the second column. The first column and the second column are examples of any two columns in the base matrix. In other words, the column with a smaller column weight corresponds to a higher energy level, while the column with a larger column weight corresponds to a lower energy level.

[0110] FIG8 is a schematic diagram of the correspondence between the energy level and the column weight of the base matrix provided by the present application. FIG8 shows only a schematic correspondence. That is, columns with smaller column weights correspond to bit positions of lower energy levels of QAM symbols, and columns with larger column weights correspond to bit positions of higher energy levels of QAM symbols. Therefore, by interleaving, the order of the bits in the first codeword sequence is reordered to obtain a second codeword sequence, and then the bits in the second codeword sequence are mapped to the QAM symbols in sequence, thereby achieving the purpose of interleaving by "degree". According to the simulation results of the present application, the interleaving method of interleaving by "degree" provided by the present application can reduce the hardware complexity of interleaving. In addition, the interleaving performance is also better than that of row-column interleaving.

[0111] S220: The encoding device interleaves the first codeword sequence to obtain a second codeword sequence.

[0112] In the present application, as an example, the degree-based interleaving itself can be achieved by relying on row-column interleaving. One implementation method may be to interleave the rate-matched codeword sequence (e.g., the first codeword sequence) through quasi-cyclic (QC)-LDPC cyclic block-level interleaving, so that when the codeword sequence obtained after interleaving (e.g., the second codeword sequence) is mapped to the QAM symbol, the energy levels of the bits in the second codeword sequence and the bit positions of the QAM symbol have a corresponding relationship as shown in Figure 8, and then the effect of degree-based interleaving is achieved based on row-column interleaving. Another implementation method may be to design a base matrix so that the energy levels of the bits in the codeword sequence obtained by encoding based on the base matrix and the bit positions of the QAM symbol have a corresponding relationship as shown in Figure 8, and then rely on row-column interleaving to achieve the effect of degree-based interleaving.

[0113] S230: The encoding device maps the second codeword sequence to QAM symbols.

[0114] S240: Output the modulated QAM symbols.

[0115] After the encoding device completes interleaving and modulation, it outputs the modulated QAM symbols.

[0116] Accordingly, the decoding device may execute the following S250 to S280 .

[0117] S250: The decoding device obtains the QAM symbol to be demodulated.

[0118] S260: The decoding device demodulates the QAM symbol to obtain a first information sequence to be deinterleaved.

[0119] The first information sequence is a sequence of LLR information obtained after demodulation, wherein each LLR information represents the probability that the bit at the corresponding bit position is 0 or 1.

[0120] S270: The decoding device deinterleaves the first information sequence to obtain a second information sequence.

[0121] The second information sequence is a sequence of LLR information.

[0122] S280. The decoding device outputs a second information sequence.

[0123] S240 to S280 describe the process of demodulation and deinterleaving. In addition, the decoding device can also determine the information bits according to the second information sequence to complete decoding.

[0124] In S250 to S280, the demodulation and deinterleaving processes performed by the decoding device are the inverse of the modulation and interleaving processes performed by the encoding device, respectively, and the principles are the same as those of the encoding device. On the decoding device side, the correspondence between the column weight of the basis matrix and the energy level of the bit position contained in the QAM symbol is the same as that of the encoding device side. Based on the method description on the encoding device side, those skilled in the art can understand how the decoding device side performs demodulation and deinterleaving, and will not be described in detail here.

[0125] The correspondence between the base matrix and the energy level shown in FIG8 is the interleaving effect that degree-based interleaving in this application aims to achieve. The degree-based interleaving scheme shown in FIG8 can also be simplified to achieve a compromise between hardware complexity and interleaving performance. For example, under the premise of acceptable interleaving performance, a simplified interleaving scheme may further reduce hardware complexity.

[0126] Some simplified degree-based interleaving schemes are provided below, such as Scheme 1 to Scheme 4 below.

[0127] In the following example, it is assumed that the I path and Q path in the QAM symbol each contain q bits, so each QAM symbol contains 2q bits, Q m =2q, q is a positive integer. It should be noted that all implementations in this application can be used according to the I path and the Q path respectively, or it can be assumed that the symbols of the same energy level of the I path and the Q path are bound for operation without limitation.

[0128] Solution 1

[0129] The node with the largest degree corresponds to the lowest energy level.

[0130] Specifically, the bits in the first codeword sequence are divided into two groups, that is, X=2. The first A bits in order of energy level from low to high are divided into one group (for example, called the first group), and the remaining bits are divided into one group (for example, called the second group). When mapping the bits in the first codeword sequence to QAM symbols, the Q corresponding to each QAM symbol is m The A bits with lower energy among the bits come from the first group of the first codeword sequence, and the remaining Q m -A bits are from the second group of the first codeword sequence, where A is a positive integer.

[0131] As an example, the value of A is determined by the number of variable nodes with the largest degree, N. max and the length E of the first codeword sequence. The lengths of the first codeword sequence and the second codeword sequence are equal, that is, the lengths of the codeword sequences remain unchanged before and after interleaving.

[0132] For example, A, N max and E satisfy the following relationship (1):

[0133] Wherein, round represents a rounding function. Optionally, round can also be replaced by the ceil function or the floor function, which are used for rounding up and rounding down, respectively. The description of the round function and that the round function can be replaced by the ceil function or the floor function also applies to other embodiments related to the round function below and will not be repeated below.

[0134] FIG9 is a schematic diagram of the solution 1 provided by the present application. In which, address 0_0 represents the 0th bit position of address 0, address 0_1 represents the 1st bit position of address 0, and so on. The meanings of the addresses involved in other embodiments below are similar and will not be repeated here. In this example, A=2, Q m =6.

[0135] As an example, the pseudo code of the interleaving process of Scheme 1 may be as follows:

[0136] In the above pseudo code, sequence f is the second codeword sequence, and sequence e is the first codeword sequence.

[0137] In addition, in the embodiments of the pseudocode of the present application, it is assumed that the first codeword sequence is a sequence that has been arranged by degree, and the degrees corresponding to the sequence elements are from large to small, that is, a larger degree corresponds to an element with a smaller sequence index, and a smaller degree corresponds to an element with a larger sequence index. The following embodiments will not repeat the description.

[0138] Option 2

[0139] The node with the smallest degree corresponds to the highest energy level.

[0140] Specifically, the bits in the first codeword sequence are divided into two groups, that is, X=2. The first A bits in descending order of energy level are divided into one group (called the first group), and the remaining bits are divided into another group (called the second group). When mapping the bits in the first codeword sequence to QAM symbols, the Q corresponding to each QAM symbol is m A bits out of the 1 bits come from the first group of the first codeword sequence, and the remaining Q m - A bits are from the second group of the first codeword sequence.

[0141] As an example, the value of A is determined by the number of variable nodes with the smallest degree N. min and the length E of the first codeword sequence.

[0142] For example, A, N min and E satisfy the following relationship (2):

[0143] Where round represents a rounding function. Optionally, the round function can also be replaced by the ceil function or the floor function.

[0144] Figure 10 is a schematic diagram of Solution 2 provided by this application. In this example, A=2, Q m =6.

[0145] As an example, the pseudo code of the interleaving process of Scheme 2 may be as follows:

[0146] In the above pseudo code, sequence f is the second codeword sequence, and sequence e is the first codeword sequence.

[0147] Option 3

[0148] The node with the largest degree does not correspond to the highest energy level

[0149] The bits in the first codeword sequence are divided into two groups, wherein the A bits corresponding to the non-highest energy level are divided into one group (called the first group), and the remaining bits are divided into another group (called the second group). When mapping the bits in the first codeword sequence to QAM symbols, the Q corresponding to each QAM symbol is m The first A bits in the order of energy levels from high to low come from the second group of the first codeword sequence, and the remaining Q m - A bits are from the first group of the first codeword sequence.

[0150] As an example, the value of A is determined by the number of variable nodes with the largest degree, N. max and the length E of the first codeword sequence.

[0151] For example, A, N max and E satisfy the following relationship (3):

[0152] Where round represents a rounding function. Alternatively, round can also be a ceil function or a floor function.

[0153] As an example, the pseudo code of the interleaving process of Scheme 3 may be as follows:

[0154] In the above pseudo code, sequence f is the second codeword sequence, and sequence e is the first codeword sequence.

[0155] Option 4

[0156] The node with the smallest degree does not correspond to the lowest energy level.

[0157] The bits in the first codeword sequence are divided into two groups, wherein the A bits corresponding to the non-lowest energy level are divided into one group (called the first group), and the remaining bits are divided into another group (called the second group). When mapping the bits in the first codeword sequence to QAM symbols, the Q corresponding to each QAM symbol is m The first A bits in the order of energy levels from low to high come from the first group of the first codeword sequence, and the remaining Q m The bits in the -A bit positions are from the second group of the first codeword sequence.

[0158] As an example, the A values ​​are based on the number N of variable nodes with the smallest degree. min and the length E of the first codeword sequence.

[0159] For example, A, N min and E satisfy the following relationship (4):

[0160] As an example, the pseudo code of the interleaving algorithm of Scheme 4 may be as follows:

[0161] In the above pseudo code, sequence f is the second codeword sequence, and sequence e is the first codeword sequence.

[0162] The above schemes 1 to 4 are examples of dividing the first codeword sequence into two groups, i.e., X=2, for QAM mapping. In other implementations, the bits in the first codeword sequence may be divided into two or more groups, for example, three or more groups, with X equal to or greater than 3, as shown in the following scheme 5.

[0163] Option 5

[0164] In the case where the first codeword sequence is divided into three or more groups, X ≥ 3, when performing QAM symbol mapping, it can be combined with one or more of the above-mentioned schemes 1 to 4. For example, the variable node with the greatest satisfaction corresponds to the lowest energy level (combined with scheme 1), or the variable node with the least satisfaction corresponds to the highest energy level (combined with scheme 2), or both correspondences are satisfied at the same time, that is, combined with schemes 1 and 2 at the same time. On this basis, those skilled in the art will understand that, in the case of X ≥ 3, it can also be combined with any one or more of the above-mentioned schemes 1 to 4, which will result in a variety of specific implementations, which will not be listed one by one in this article. An example of scheme 5 is given below.

[0165] As an example, the bits in the first codeword sequence are divided into three groups, and the above-mentioned schemes 1 and 2 are combined. In this example, the bits corresponding to the variable node with the smallest degree (that is, the column with the smallest column weight, which may be one column or multiple columns) are divided into one group (called the first group), the bits corresponding to the variable node with the largest degree (that is, the column with the largest column weight, which may be one column or multiple columns) are divided into one group (called the second group), and the remaining bits are divided into one group (called the third group). At the same time, the bits of the first group are mapped to the first A bit positions of each QAM symbol in order from high to low energy level, the bits of the second group are mapped to the first B bit positions of each QAM symbol in order from low to high energy level, and the remaining bits in the first codeword sequence except the first and second groups are mapped to the remaining Q bit positions of each QAM symbol. m -AB bit positions. A and B are positive integers. A is calculated by referring to the method for calculating A in equation (1) in solution 1 above, and B is calculated by referring to the method for calculating A in equation (2) in solution 2 above.

[0166] FIG11 is a schematic diagram of an example of Solution 5 provided in this application. In this example, A=2, B=2, Q m =8.

[0167] As an example, the pseudo code of the interleaving algorithm of Scheme 5 may be as follows:

[0168] In the above pseudo code, sequence f is the second codeword sequence, and sequence e is the first codeword sequence.

[0169] As another example, the bits in the first codeword sequence are divided into three groups, and the above-mentioned schemes 3 and 4 are combined. In this example, the bits corresponding to the variable node with the largest degree in the first codeword sequence are divided into the first group, the bits corresponding to the variable node with the smallest degree are divided into the second group, and the remaining bits are divided into the third group. The bits of the first group are mapped to the other A bit positions of each QAM symbol except the first A bit positions in order from low to high energy, and the bits of the second group are mapped to the other B bit positions of each QAM symbol except the first B bit positions in order from high to low energy. A refers to the value of A in relation (3) in the above-mentioned scheme 3, and B refers to the calculation method of A in relation (4) in the above-mentioned scheme 4.

[0170] The simulation results of this application show that the greater the number of groups in the first codeword sequence, that is, the larger the value of X, the better the interleaving performance, but the corresponding hardware complexity will increase. Therefore, in actual use, a compromise between the number of groups X and hardware complexity can be made based on hardware conditions and scenario requirements.

[0171] It can be seen that the above schemes 1 to 5 group the bits in the first codeword sequence according to the variable node with the largest degree or the variable node with the smallest degree (or, in other words, the maximum column weight or the minimum column weight of the base matrix), and the corresponding correspondence between the degrees of the variable nodes and the energy levels of the bit positions of the QAM symbols is satisfied. The following, in conjunction with scheme 6, provides an example of dividing the degrees of the variable nodes into at least two intervals, and then establishing a correspondence between the at least two intervals and the energy levels of the bit positions of the QAM symbols.

[0172] Option 6

[0173] According to the degree distribution of the variable nodes in the basis matrix, the degree is divided into at least two intervals, denoted as [d1,d2], [d3,d4], ..., [d 2k-1 ,d 2k ], where d k As k changes monotonically, for example, d k As k increases or decreases monotonically, on this basis, it is combined with the above schemes 1 to 5.

[0174] As an example, the degree distribution is divided into at least two intervals and combined with Scheme 1, then the interval with the largest degree [d 2k-1 ,d 2k ] corresponds to the lowest energy level; if combined with solution 2, the interval with the smallest degree [d1, d2] corresponds to the highest energy level; if combined with solution 3, the interval with the largest degree [d 2k-1 ,d 2k ] does not correspond to the highest energy level; if combined with solution 4, the interval [d1, d2] with the minimum degree does not correspond to the lowest energy level. In addition, if combined with solution 5, the at least two intervals can be specifically three intervals, while satisfying one or more of the corresponding relationships in solutions 1 to 4. For example, assuming that the at least two intervals include a first interval, a second interval, and a third interval, the degree distribution from the first interval to the third interval decreases monotonically, the first interval corresponds to the minimum energy level, the third interval corresponds to the maximum energy level, and the second interval corresponds to energy levels other than the minimum energy level and the maximum energy level.

[0175] As an example, the degree distribution is divided into intervals [1], [4, 7], [8, 11] in a monotonically increasing manner. If combined with the above solution 1, the column corresponding to the interval [8, 11] corresponds to the lowest energy level. If combined with the above solution 2, the column corresponding to the interval [1] corresponds to the highest energy level.

[0176] It is understandable that there are many combinations in the above scheme 6. Based on the design concept of this application, those skilled in the art can know how to combine these schemes and whether they can be combined, and they will not be listed here one by one.

[0177] In one or more embodiments of the present application, "degree" may be related to the code rate. Because LDPC needs to support flexible code rates, different regions of the base matrix may be intercepted as the encoding or decoding matrix. Therefore, the matrix used for encoding or decoding can vary with different code rates, and the column weight of the matrix used for encoding or decoding can also vary with different code rates. Some possible implementations are described below.

[0178] In one implementation, the column weight described in some of the above solutions can be the column weight of the complete base matrix, or the column weight of the matrix region corresponding to the lowest code rate supported in the current communication scenario. For example, in a high-throughput scenario, the matrix region corresponding to the high code rate of the base matrix is ​​intercepted. In this case, the column weight can be the column weight corresponding to the high code rate region supported by the base matrix. For another example, in a scenario with limited hardware conditions such as a limited buffer (LBRM), the column weight can be the column weight corresponding to the lowest code rate region supported by the base matrix.

[0179] In another implementation, the column weight described in some of the above schemes can be the column weight corresponding to the highest code rate supported by the base matrix. The highest code rate can be the highest code rate indicated by the modulation coding scheme (MCS), or it can be the code rate corresponding to the core area of ​​the base matrix (area A and area B in Figure 1). The degree of the matrix corresponding to the highest code rate is used for sorting, and the degree of the extended check node is considered to be the smallest. The reason is that the high-throughput peak scenario is the highest code rate scenario that the base matrix can support, and the fast convergence requirements of this part should be met as much as possible.

[0180] In one implementation, the encoding or decoding device can obtain at least two indicator sequences, each corresponding to a bit rate range or a matrix row range. In actual use, the corresponding indicator sequence is selected based on the transmission bit rate or the number of matrix rows used. The base matrix used within the bit rate range corresponding to the at least two indicator sequences, after column reordering, constitutes the first codeword sequence. Optionally, the at least two bit rate ranges include the bit rates corresponding to the core matrix of the base matrix.

[0181] Option 7

[0182] The columns of the base matrix can be divided into at least two subsets. When performing QAM symbol energy level mapping on the bits in at least one of the at least two subsets, both the degree and whether the bits are information bits need to be considered. In other words, when performing QAM mapping on the bits in the at least one subset, both information bit protection and the degree-based interleaving of the present application are considered.

[0183] As an example, the columns of the base matrix can be divided into three subsets, with the first subset being information columns, the second subset being core check columns, and the third subset being extended check columns. As another example, the columns of the base matrix can be divided into two subsets, with the first subset being information columns and core check columns, and the second subset being extended check columns.

[0184] The division of the at least two subsets can be combined with any one of the above-mentioned solutions 1 to 4. In the absence of contradiction, it can also be combined with multiple solutions in solutions 1 to 4. Some examples are given below.

[0185] As an example, the energy level mapping of the bits in the second subset is combined with Scheme 1 while also considering information bit protection. For example, the information column with the largest degree in the second subset corresponds to the first A bit positions of the QAM symbol in ascending order of energy level, where A is a positive integer.

[0186] Among them, A satisfies the following relationship:

[0187] As another example, the energy level mapping of the bits in the first subset is combined with Scheme 2 while taking information bit protection into consideration. For example, the information column with the smallest degree in the first subset corresponds to the first A bit positions of the QAM symbol in descending order of energy level.

[0188] Among them, A satisfies the following relationship:

[0189] As another example, the energy level mapping of the bits in the second subset is combined with Scheme 3, while considering whether they are information bits. For example, the information column with the largest degree in the second subset corresponds to the A bit positions of energy levels other than the highest energy level of the QAM symbol.

[0190] Among them, A satisfies the following relationship:

[0191] As another example, the energy level mapping of the bits in the first subset is combined with Scheme 4 while considering information bit protection. For example, the smallest information column in the first subset corresponds to the A bit positions of the QAM symbol at energy levels other than the lowest energy level.

[0192] Among them, A satisfies the following relationship:

[0193] The description of the parameters in these relational expressions in Scheme 7 can be found above and will not be repeated here.

[0194] As another example, the bit positions contained in the QAM symbol are divided into three groups according to the energy level, and the non-information bits correspond to the first A bit positions in the order of energy level from low to high, the information bit with the smallest degree corresponds to the first B bit positions in the order of energy level from high to low as a group, and the other bits are located in the remaining Q bits of the QAM symbol. m -AB bit positions.

[0195] In this example, A can be determined by the code rate r, and B is determined by the length E of the first codeword sequence and the number N of variable nodes with the smallest degree in the information bit. min Sure.

[0196] For example, A or B satisfies the following relationship (7-5):

[0197] A=round((1-r)·Q m )

[0198] Where round represents a rounding function. Optionally, the round function can also be replaced by the ceil function or the floor function.

[0199] FIG12 is a schematic diagram of the solution 7 provided by this application. In this example, A=2, B=2, Q m =8.

[0200] As an example, the pseudo code of the interleaving algorithm of Scheme 7 may be as follows:

[0201] In the above pseudo code, sequence f is the second codeword sequence, and sequence e is the first codeword sequence.

[0202] The advantage of Solution 7 is that it can achieve rapid convergence while also protecting information bits. This means that information bits are always mapped to the bit positions with the highest energy levels in the QAM symbol. This ensures that even if the overall decoding of the transmitted codeword fails, some information bits will still be correctly decoded, increasing the probability of successful information bit decoding.

[0203] Figure 13 is a block error rate (BLER) performance simulation comparison chart of the interleaving method provided by this application. The horizontal axis of Figure 13 is the signal-to-noise ratio (SNR), and the vertical axis is the block error rate (BLER). The code length is 8448 and the number of iterations is 4. It can be seen that the simplified interleaving scheme of this application is very close to the performance of the relatively strict degree-based interleaving while significantly reducing the complexity. There is a slight loss in the slope of BLER-SNR, but the overall performance difference is very small. It can be seen that the interleaving method provided by this application has lower hardware complexity while keeping the performance of degree-based interleaving basically unchanged.

[0204] The interleaving method or deinterleaving method provided by the present application has been described in detail above. The communication device provided by the present application is introduced below.

[0205] As shown in FIG14 , the present application provides a communication device 1000 .

[0206] The communication device 1000 may be an encoding device, or a device applied to an encoding device and capable of implementing the corresponding functions of the encoding device in the embodiment of the method of the present application, such as a chip, a chip system, or a circuit. Alternatively, the communication device 1000 may be a decoding device, or a device applied to a decoding device and capable of implementing the corresponding functions of the decoding device in the embodiment of the method of the present application, such as a chip, a chip system, or a circuit.

[0207] Optionally, the communication device 1000 includes a processing module 1001, which can be a processor, a processing board, a processing unit, or a processing device. When the communication device 1000 is a coding device or a device applied to a coding device, the processing module 1001 is used to interleave the first codeword sequence to be interleaved to obtain a second codeword sequence, and map the second codeword sequence to a QAM symbol. The specific process can refer to the detailed description of the interleaving process in the method embodiment, which will not be repeated here. When the communication device 1000 is a decoding device or a device applied to a decoding device, the processing module 1001 is used to demodulate the QAM symbol to be demodulated to obtain a first information sequence, and deinterleave the first information sequence to obtain a second information sequence. The specific process can refer to the description of the deinterleaving process in the method embodiment, which will not be repeated here.

[0208] Optionally, the communication device 1000 further includes a communication module 1002, which may also be referred to as a transceiver module, transceiver, transceiver, or transceiver device, etc., for performing receiving (or inputting) and / or sending (or outputting) operations. For example, when the communication device 1000 is an encoding device or an apparatus applied to an encoding device, the communication module 1002 may be used to obtain a first codeword sequence to be interleaved, output modulated QAM symbols, etc. When the communication device 1000 is a decoding device or an apparatus applied to a decoding device, the communication module 1002 may be used to obtain a QAM symbol to be demodulated, and output a second information sequence, etc.

[0209] In some embodiments, the aforementioned communication module and / or processing module may be implemented by a virtual module, for example, the processing module may be implemented by a software functional unit or a virtual device, and the communication module may be implemented by a software function or a virtual device. Alternatively, the processing module or the communication module may also be implemented by a physical device, for example, if the device is implemented using a chip / circuit (such as an integrated circuit, a dedicated circuit, a logic circuit, etc.). The communication module may be an input / output circuit and / or a communication interface that performs input operations (corresponding to the aforementioned receiving operations) and output operations (corresponding to the aforementioned sending operations); the processing module is an integrated processor or microprocessor or circuit (such as an integrated circuit, a logic circuit, etc.).

[0210] The division of modules in this application is illustrative and represents only a logical functional division. In actual implementation, other division methods may be used. Furthermore, the functional modules in the examples of this application may be integrated into a single processor, exist physically as separate modules, or two or more modules may be integrated into a single module. The aforementioned integrated modules may be implemented in either hardware or software functional modules.

[0211] As shown in Figure 15, the present application further provides a communication device 1100. The communication device 1100 includes at least one processor 1110, which implements the functions of the encoding device or decoding device described in the above method embodiments.

[0212] Optionally, the processor 1110 is coupled to a memory, which may be located within the communication device, integrated with the processor, or external to the communication device. The communication device 1100 may further include at least one memory 1120. Memory 1120 stores computer programs, instructions, or data necessary to implement any of the aforementioned method embodiments. Processor 1110 may execute the computer programs, instructions, or data stored in memory 1120 to perform the interleaving method or deinterleaving method of any of the aforementioned embodiments.

[0213] Optionally, the communication device 1100 may further include a communication interface 1130, and the communication device 1100 may exchange information with other devices via the communication interface 1130. Exemplarily, the communication interface 1130 may be a transceiver, circuit, bus, module, pin, or other type of interface.

[0214] Coupling in this application refers to an indirect coupling or communication connection between devices, units, or modules, which can be electrical, mechanical, or other forms, and is used for information exchange between devices, units, or modules. Processor 1110 may operate in conjunction with memory 1120 and communication interface 1130. This application does not limit the specific connection medium between the processor 1110, memory 1120, and communication interface 1130.

[0215] As shown in Figure 16, the present application also provides a chip (or chip system). The chip (or chip system) 30 may include a circuit 31 and an input / input interface 32. The circuit 31 may be a logic circuit, an integrated circuit, etc., and the input / output interface 32 may also be an input / output circuit, or an interface circuit, which can input information (or receive information) and output information (or send information). Optionally, the chip system can be composed of chips, or it can include chips and other discrete devices. The chip 30 can be used to execute the method performed by the encoding device or the decoding device in each embodiment of the present application.

[0216] In addition, the present application also provides a computer-readable storage medium, which stores computer instructions. When the computer instructions are run on a computer, the operations and / or processing performed by the encoding device or decoding device in each method embodiment of the present application are executed.

[0217] The present application also provides a computer program product, which includes computer program code or instructions. When the computer program code or instructions are run on a computer, the operations and / or processing performed by the encoding device or decoding device in the various method embodiments of the present application are executed.

[0218] In addition, the present application further provides a chip, the chip including a processor. A memory for storing a computer program is provided independently of the chip, and the processor is configured to execute the computer program stored in the memory so that the operations and / or processing performed by the encoding device or the decoding device in any method embodiment are performed.

[0219] Furthermore, the chip may further include a communication interface. The communication interface may be an input / output interface, or an interface circuit, etc. Furthermore, the chip may further include a memory.

[0220] The present application provides a communication system including an encoding device and a decoding device. The encoding device is used to implement S210 to S240, and the decoding device is used to implement S250 to S280. In some embodiments, the encoding device is the communication device used as the encoding device in Figure 14 or Figure 15, or the chip used to implement the encoding device in Figure 16.

[0221] In each embodiment of the present application, "plurality" includes two or more.

[0222] In this application, a processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field-programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and may implement or execute the methods, steps, and logic block diagrams disclosed in this application. A general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in this application may be directly executed by a hardware processor, or by a combination of hardware and software modules within the processor.

[0223] The memory may be a non-volatile memory, such as a hard disk drive (HDD) or a solid-state drive (SSD), or a volatile memory, such as a random-access memory (RAM). The memory is any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory in this application may also be a circuit or any other device that can perform a storage function, for storing program instructions and / or data.

[0224] The technical solutions provided in this application can be implemented in whole or in part through software, hardware, firmware, or any combination thereof. When implemented using software, they can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in this application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a terminal device, an access network device, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital video disc (DVD)), or a semiconductor medium.

[0225] In this application, under the premise of no logical contradiction, the examples can reference each other, for example, the methods and / or terms between method embodiments can reference each other, for example, the functions and / or terms between device embodiments can reference each other, for example, the functions and / or terms between device examples and method examples can reference each other.

[0226] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0227] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0228] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0229] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0230] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0231] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0232] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. An interleaving method, characterized in that: include: Obtain a first codeword sequence to be interleaved, the first codeword sequence corresponds to a base matrix of a low-density parity check code LDPC, the column weight of the columns included in the base matrix is ​​related to the energy level of the bit position included in the orthogonal amplitude modulation QAM symbol, the first codeword sequence includes X groups, X is greater than or equal to 2, and X is a positive integer; Interleaving the first codeword sequence to obtain a second codeword sequence; Mapping the second codeword sequence onto QAM symbols; Output modulated QAM symbols.

2. The method according to claim 1, characterized in that The column weight of the base matrix is ​​related to the energy level of the bit position contained in the QAM symbol, including: The column weight of the base matrix includes at least two intervals, the minimum column weight in a first interval of the at least two intervals is greater than the maximum column weight in a second interval of the at least two intervals, and the energy level corresponding to the first interval is less than the energy level corresponding to the second interval.

3. The method according to claim 2, characterized in that Each of the at least two intervals includes one or more column weights, wherein the at least two intervals include a third interval, and the column weights included in the third interval change non-continuously and monotonically.

4. The method according to any one of claims 1 to 3, characterized in that The columns included in the base matrix correspond to at least two subsets; The step of interleaving the first codeword sequence to obtain the second codeword sequence includes: The second codeword sequence is obtained by interleaving the bits in the first subset corresponding to the bits in the first subset of the at least two subsets, wherein the first subset is the information column with the smallest degree in the base matrix, and the bits in the first subset correspond to the first A bit positions of the QAM symbol in order from high to low energy levels, and A is a positive integer.

5. The method according to claim 4, characterized in that The number N of variable nodes with the smallest degree in A and the base matrix min And the length E of the first codeword sequence satisfies the following relationship: Among them, round represents the rounding function.

6. The method according to any one of claims 1 to 5, characterized in that The columns included in the base matrix correspond to at least two subsets; The step of interleaving the first codeword sequence to obtain the second codeword sequence includes: The interleaving is performed on a second subset of the at least two subsets to obtain the second codeword sequence, wherein the second subset is the information column with the largest degree among the at least two subsets, and the bits in the second subset correspond to the first A bit positions of the QAM symbol in order from low to high energy levels, where A is a positive integer.

7. The method according to claim 6, characterized in that The number N of variable nodes with the largest degree in A and the base matrix max And the length E of the first codeword sequence satisfies the following relationship: Among them, round represents the rounding function.

8. The method according to any one of claims 1 to 3, characterized in that The columns included in the base matrix correspond to at least two subsets; The step of interleaving the first codeword sequence to obtain the second codeword sequence includes: The interleaving is performed on the bits in the first subset of the at least two subsets to obtain the second codeword sequence, wherein the first subset is the information column with the smallest degree among the at least two subsets, and the bits in the first subset correspond to A bit positions of other energy levels of the QAM symbol except the lowest energy level.

9. The method according to claim 8, characterized in that The number N of variable nodes with the smallest degree in A and the base matrix min And the length E of the first codeword sequence satisfies the following relationship: Here, round represents a rounding function.

10. The method according to any one of claims 1 to 3, characterized in that The columns included in the base matrix correspond to at least two subsets; The step of interleaving the first codeword sequence to obtain the second codeword sequence includes: The interleaving is performed on the bits in the second subset of the at least two subsets to obtain the second codeword sequence, where the second subset is the information column with the largest degree in the at least two subsets, and the bits in the second subset correspond to A bits of other energy levels other than the highest energy level of the QAM symbol, where A is a positive integer.

11. The method according to claim 10, characterized in that The number N of variable nodes with the largest degree in A and the base matrix max And the length E of the first codeword sequence satisfies the following relationship: Among them, round represents the rounding function.

12. The method according to any one of claims 1 to 3, characterized in that X=2, the QAM symbol includes Q m bits; The Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in descending order of column weight, and the A bits are located in the Q m The energy levels of the bits are in the order of the first A bits from low to high, where A is a positive integer.

13. The method according to claim 12, characterized in that The value of A is determined based on the number N of variable nodes with the largest degree in the base matrix. max and the length E of the first codeword sequence is determined by N max and E are positive integers.

14. The method according to claim 13, characterized in that The A,N max and E satisfy the following relationship: Among them, round represents the rounding function.

15. The method according to any one of claims 1 to 3, characterized in that X=2, the QAM symbol includes Q m bits; The Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in the order from low to high column weight, and the A bits are located in the Q m The energy levels of the bits are the first A bit positions in descending order, where A is a positive integer.

16. The method according to claim 15, characterized in that The value of A is determined based on the number N of variable nodes with the smallest degree in the base matrix. min and the length E of the first codeword sequence is determined by N min and E are positive integers.

17. The method according to claim 16, characterized in that The A,N min and E satisfy the following relationship: Among them, round represents the rounding function.

18. The method according to any one of claims 1 to 3, characterized in that X=2, the QAM symbol includes Q m bits; The Q m A bits of the A bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in descending order of column weight, and the A bits are located in the Q m There are A bit positions corresponding to energy levels other than the highest energy level in the bits, where A is a positive integer.

19. The method according to claim 18, characterized in that The value of A is determined based on the number N of variable nodes with the largest degree in the base matrix. max and the length E of the first codeword sequence is determined by N max and E are positive integers.

20. The method according to claim 19, characterized in that The A,N max and E satisfy the following relationship: Among them, round represents the rounding function.

21. The method according to any one of claims 1 to 3, characterized in that X=2, the QAM symbol includes Q m bits; The Q m A bits of the bits are from the first group of the X groups, and the Q m The remaining Q m - A bits are from the second group of the X groups, the A bits correspond to the first interval of the at least two intervals in the order from low to high column weight, and the A bits are located in the Q m There are A bit positions corresponding to energy levels other than the lowest energy level in the bits, where A is a positive integer.

22. The method according to claim 21, characterized in that The value of A is determined based on the number N of variable nodes with the smallest degree in the base matrix. min and the length E of the first codeword sequence is determined by N min and E are positive integers.

23. The method according to claim 22, characterized in that The A,N min and E satisfy the following relationship: Among them, round represents the rounding function.

24. The method according to any one of claims 1 to 3, characterized in that X=3, the QAM symbol includes Q m bits; The Q m The first A bits in the order of energy level from low to high are from the first group of the X groups, and the Q m The bits in the first B bit positions in the order of energy level from high to low in the bits are from the second group of the X groups, and the Q m The remaining Q m -AB bits are from a third group of the X groups, wherein the A bits correspond to the first interval of the at least two intervals in descending order of column weight, and the B bits correspond to the first interval of the at least two intervals in descending order of column weight.

25. The method according to claim 24, characterized in that A and B respectively satisfy the following relationship: Among them, round represents the rounding function, N max Represents the number of variable nodes with the largest degree in the base matrix, N min The table represents the number of variable nodes with the smallest degree in the base matrix, and E represents the length of the first codeword sequence.

26. A communication device, characterized in that: include: A communication module, configured to obtain a first codeword sequence to be interleaved, wherein the first codeword sequence corresponds to a base matrix of LDPC, the column weight of the columns included in the base matrix is ​​related to the energy level of the bit position included in the QAM symbol, and the first codeword sequence includes X groups, X is greater than or equal to 2, and X is a positive integer; Processing modules for: Interleaving the first codeword sequence to obtain a second codeword sequence; Mapping the second codeword sequence onto QAM symbols; The communication module is also used to output the modulated QAM symbols.

27. A communication device, characterized in that: It includes a communication interface and a circuit, wherein the communication interface is used to receive a first codeword sequence to be interleaved and input the first codeword sequence to the circuit; the circuit is used to execute the method as described in any one of claims 1-25 to interleave the first codeword sequence to obtain a second codeword sequence, and map the second codeword sequence to QAM symbols; the communication interface is also used to output modulated QAM symbols.

28. A communication device, characterized in that: The method comprises a module or a unit for executing the method as claimed in any one of claims 1 to 25.

29. A communication device, characterized in that: include: A processor, the processor is coupled to the memory, and the processor is used to execute the computer program or instructions stored in the memory to enable the communication device to perform the method according to any one of claims 1 to 25.

30. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions. When the computer instructions are executed on a computer, the method according to any one of claims 1 to 25 is implemented.

31. A computer program product, characterized in that The method comprises computer instructions. When the computer instructions are executed on a computer, the method according to any one of claims 1 to 25 is implemented.

Images