Controlling an electromechanical switch and a semiconductor switch

By using a series connection of an electromechanical switch and a semiconductor switch with a controlled switch-off sequence, the arrangement addresses the issue of persistent arcing in conventional relays, enhancing efficiency and realism in simulations.

WO2025119868A1PCT designated stage expired Publication Date: 2025-06-12DSPACE DIGITAL SIGNAL PROCESSING & CONTROL ENGINEERING GMBH

Patent Information

Application Number
PCT/EP2024/084411
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-08
Filing Date
2024-12-03
Publication Date
2025-06-12

AI Technical Summary

Technical Problem

Conventional relay switches experience persistent arcing when switching off at DC voltages, leading to inefficiencies and potential damage.

Method used

An arrangement comprising an electromechanical switch and a semiconductor switch connected in series, with a control device that sends a switch-off signal to the electromechanical switch first, followed by a delayed signal to the semiconductor switch, allowing for a temporary arc to clean the contacts.

Benefits of technology

This solution effectively suppresses arcing during switching off, enabling the handling of higher currents at DC voltages without damage, and improves the realism of signal interruption simulations in HIL applications.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to an arrangement having an electromechanical switch (1), a semiconductor switch (2) and a control device (3), wherein the electromechanical switch (1) and the semiconductor switch (2) can be switched on and off, wherein the electromechanical switch (1) and the semiconductor switch (2) are each closed in the switched-on state and are each open in the switched-off state, the electromechanical switch (1) has switching contacts (4) that can be electromechanically connected to one another for switching on or off, the electromechanical switch (1) and the semiconductor switch (2) are connected to one another in series in a load path (5), and both are connected to the control device (3) for switching on or off, and the control device (3) is configured in such a way that when the electromechanical switch (1) and the semiconductor switch (2) are switched off, it first sends a switch-off signal to the electromechanical switch (1) to open the load path (5) and then, after a predetermined switch-off delay, sends a switch-off signal to the semiconductor switch (2). This achieves the object of enabling the switching of higher currents at DC voltages that would lead to sustained arcing in a conventional relay when switched off.
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Description

[0001] Controlling an electromechanical switch and a semiconductor switch

[0002] The invention relates to an arrangement with an electromechanical switch, a semiconductor switch and a control device, wherein the electromechanical switch and the semiconductor switch can be switched on and off, wherein the electromechanical switch and the semiconductor switch are each closed in the switched-on state and each open in the switched-off state, the electromechanical switch has switching contacts that can be electromechanically connected to one another for switching on and off, and the electromechanical switch and the semiconductor switch are connected in series to one another in a load path and both are connected to the control device for switching on and off. The invention also relates to a method for controlling an electromechanical switch and a semiconductor switch, wherein the electromechanical switch can be switched on and off.Switching off has electromechanically connectable switching contacts and the electromechanical switch and the semiconductor switch are connected in series to one another in a load path and electromechanical switches and the semiconductor switch are connected to the control device for switching on or off.

[0003] So-called HIL simulators are known from the prior art, which are used particularly for testing control units (HIL, derived from "Hardware in the Loop"). HIL simulators each comprise at least one computer unit, with the computer unit(s) specifically tasked with executing models that at least partially replicate the environment of an electronic device or a more complex technical system.

[0004] HIL simulators enable a testing procedure in which an embedded system, particularly an electronic control unit (ECU) or a mechatronic module, is connected via its inputs and outputs to a customized counterpart, namely the HIL simulator, which serves to replicate the real environment of the embedded system. Within the context of an HIL simulation, the embedded system is also referred to as the device under test (DUT). During testing of the embedded system, at least some of the input signals for the embedded system are provided by the HIL simulator, and at least some of the output signals of the embedded system are sent to the HIL simulator.

[0005] For example, the temporal behavior of the environment of the system under test can be simulated using an environment model running on a HIL simulator. For example, if an HIL simulator is intended to test an embedded system, in particular an ECU, the HIL simulator is designed to at least partially replicate the ECU's real environment. In this case, the HIL simulator can communicate with the ECU via its inputs and outputs equipped with a bus or network interface, or via bidirectional communication channels, and thus function as an adapted counterpart to the ECU.

[0006] HIL simulation is always only a simplification of reality and therefore cannot replace testing on a real system. If excessive discrepancies arise between a HIL test and reality, the underlying models in the simulation are often oversimplified. In this case, the simulation models must be further developed.

[0007] A key component of HIL testing is fault simulation, which is used to test the control unit's response to fault situations. To simulate cable breaks or similar faults, additional plug-in cards for HIL systems or external devices, so-called Failure Insertion Units (FIUs), also known as fault insertion units, are usually available. These devices can be connected to the HIL systems, for example, via bus or network interfaces. They comprise circuits with remotely and automatically controllable switches for simulating, for example, cable breaks, short circuits and / or so-called contact bounce (bouncing in the context of the aforementioned faults, "loose contact"), which can lead to unwanted modulation. FIUs are available for both sensors and actuators; for actuators, they are additionally combined with load devices.Fills can therefore be used to generate simulation signals that represent non-normal, i.e., faulty, operating states. This allows an electrical component to be tested not only for normal operation, but also for various error and / or fault conditions.

[0008] DE 10 2009 048 981 A1 from dSPACE GmbH describes an FIU in the form of a device for testing an electronic component, comprising a simulation device for generating a simulation signal, a test device for connecting the electronic component, two connecting devices, and a selection device for selecting the connecting device. The simulation device and the test device can be electrically connected to one of the connecting devices by means of the selection device, and the individual connecting devices differ from one another with respect to at least one electrical property. The simulation device is designed such that simulation signals can be generated for different operating states of the electronic component, and in particular, simulation signals for faulty operating states of the electrical component can be provided by means of an FIU.

[0009] In such an FIU, the signal lines are typically connected to ground potential or the positive potential line, i.e., to 0 V or up to +60 V, so that the object under test can be subjected to a corresponding voltage. Semiconductor switches, such as MOSFET switches, can be used for this voltage application, although they should be protected against potential overloads. The load path can also be interrupted to simulate a cable break.

[0010] Based on this, the object of the invention is to further develop the prior art. Preferably, it is possible to switch higher currents at DC voltages, which would lead to persistent arcing in a conventional relay upon switching off. This object is achieved by the subject matter of the independent patent claims. Preferred developments can be found in the subclaims.

[0011] According to the invention, an arrangement is thus provided with an electromechanical switch, a semiconductor switch and a control device, wherein the electromechanical switch and the semiconductor switch can be switched on and off, wherein the electromechanical switch and the semiconductor switch are each closed in the switched-on state and each open in the switched-off state, the electromechanical switch has switching contacts which can be electromechanically connected to one another for switching on and off, the electromechanical switch and the semiconductor switch are connected in series to one another in a load path, and electromechanical switches and the semiconductor switch can be switched on and off.Switching off are connected to the control device and the control device is set up in such a way that when the electromechanical switch and the semiconductor switch are switched off to open the load path, it first sends a switch-off signal to the electromechanical switch and then, after a predetermined switch-off delay, a switch-off signal to the semiconductor switch.

[0012] Such an arrangement can be used together with an electronic fuse to open the electronic switch in case of overload.

[0013] The latter series connection of electromechanical switches and semiconductor switches in the load path leads to an advantage compared to a circuit or series connection that has / have exclusively one semiconductor switch or exclusively several semiconductor switches in the load path. The advantage lies in the avoidance of a disadvantage caused by the comparatively significantly higher intrinsic electrical capacitance present between the working contacts of a semiconductor switch (e.g., between source and drain) when the semiconductor switch is off. An electromechanical switch in series with the semiconductor switch avoids the unwanted effect of the latter electrical capacitance.Otherwise, i.e. without using an electromechanical switch in the load path, the intrinsic capacitance of the semiconductor switch can impair or prevent a realistic simulation (HIL simulation) of a signal interruption in FIU applications.

[0014] In principle, different settings are possible for the switch-off delay. However, according to a preferred embodiment of the invention, the switch-off delay is selected such that it results in a temporary arc between the switching contacts of the electromechanical switch. This arc serves to clean the switching contacts of the electromechanical switch.

[0015] Preferably, the electromechanical switch has an intrinsic switching time for switching off, which is determined by the time period between receipt of the switch-off signal from the control device and the opening of the electromechanical switch, and the switch-off delay is greater than the intrinsic switching time of the electromechanical switch. Preferably, an electromechanical switch of this type is used here, which is suitable not only for direct current applications but also for 50 Hz / 250 volt alternating current applications. The maximum arc duration is preferably selected to be less than the duration of a mains half-wave of 10 ms. Preferably, the switch-off delay is selected such that the arc occurs between the switching contacts of the electromechanical switch for a maximum of 7 ms.

[0016] According to a preferred development of the invention, the electromechanical switch for suppressing arcs has neither a structural design nor a function. Regarding switching on, the control device is preferably configured such that, when the electromechanical switch and the semiconductor switch are switched on, it simultaneously sends a respective switch-on signal to the electromechanical switch and the semiconductor switch, respectively. However, due to the physical differences between a semiconductor switch on the one hand and an electromechanical switch on the other, the simultaneous switch-on signals generally do not result in the semiconductor switch and the electromechanical switch actually being closed simultaneously.Rather, the simultaneous switch-on signals usually result in the semiconductor switch being closed before the electromechanical switch, i.e. the semiconductor switch provides an electrically conductive connection before the electromechanical switch.

[0017] The semiconductor switch is preferably a MOSFET switch. This can be configured to switch one technical current direction, or preferably to switch both technical current directions. Furthermore, it is preferred that the electromechanical switch is a relay or a contactor.

[0018] In principle, the semiconductor switch can be used for only one electromechanical switch. According to a preferred embodiment of the invention, however, the semiconductor switch is connected in series upstream of a plurality of electromechanical switches connected in parallel, all of which are connected to the control device for switching on and off. The control device is configured such that only one of the electromechanical switches can be switched on at a time.

[0019] The invention also relates to a failure insertion unit for connection to a HIL simulator via a load path and for simulating at least one electrical fault and transmitting it to the HIL simulator via the load path, wherein the load path is provided with a previously described arrangement. Preferably, the electrical fault is selected from the group comprising a short circuit of a control unit output to ground potential, a short circuit of a control unit output to supply potential, and a short circuit of a control unit output having a first signal line to a second signal line, as well as a separation of a signal line that electrically connects a control unit output to a signal sink or a control unit input to a signal source. Very particularly preferably, the fault insertion unit FIU can deliver multiple faults.

[0020] The aforementioned short circuits represent faults induced for simulation purposes, namely, triggered by computer programs. The Failure Insertion Unit is preferably connected to a real control unit, specifically to its real control unit outputs. If a real control unit is not available, it is preferable to use a simulated control unit with simulated control unit outputs. According to a preferred development of the invention, mixed forms are also used, namely in which real control units are interconnected with simulated control units in a network, and selected real and / or simulated control unit outputs are connected to the Failure Insertion Unit.

[0021] The invention further lies in a method for controlling an electromechanical switch and a semiconductor switch, wherein the electromechanical switch and the semiconductor switch can be switched on and off, wherein the electromechanical switch and the semiconductor switch are each closed in the switched-on state and each open in the switched-off state, the electromechanical switch has switching contacts that can be electromechanically connected to one another for switching on or off, and the electromechanical switch and the semiconductor switch are connected in series to one another in a load path and both are connected to the control device for switching on or off, comprising the following method steps:

[0022] Sending a switch-off signal to the electromechanical switch at a first time and sending a switch-off signal to the semiconductor switch at a second time that is delayed by a predetermined switch-off delay from the first time.

[0023] According to a preferred development of the invention, it is provided that when the electromechanical switch and the semiconductor switch are switched on, the control device simultaneously sends a respective switch-on signal to the electromechanical switch and the semiconductor switch, respectively.

[0024] Further preferred embodiments of this method arise analogously to the preferred embodiments of the arrangement according to the invention described above. These methods are particularly preferably used for a failure insertion unit.

[0025] The invention is explained in more detail below using preferred embodiments with reference to the drawings.

[0026] The drawings show

[0027] Fig. 1 schematically shows an arrangement with an electromechanical switch, a semiconductor switch and a control device in a failure insertion unit according to a preferred embodiment of the invention,

[0028] Fig. 2 shows the control of the electromechanical switch and the semiconductor switch during switching on and the switching-on reactions of the electromechanical switch and the semiconductor switch according to the preferred embodiment of the invention,

[0029] Fig. 3 shows the control of the electromechanical switch and the semiconductor switch during switching off and the switching off reactions of the electromechanical switch and the semiconductor switch according to the preferred embodiment of the invention and Fig. 4 shows schematically an arrangement with a plurality of electromechanical switches, a semiconductor switch and a control device according to a further preferred embodiment of the invention.

[0030] Fig. 1 schematically shows an arrangement with an electromechanical switch 1 in the form of a relay, a semiconductor switch 2 designed as a MOSFET switch, and a control device 3 according to a preferred embodiment of the invention. The electromechanical switch 1 and the semiconductor switch 2 can both be switched on and off, with the electromechanical switch 1 and the semiconductor switch 2 each being closed in the switched-on state and open in the switched-off state. The electromechanical switch 1 has electromechanically connectable switching contacts 4, which are brought into contact with one another or separated from one another to switch the electromechanical switch 1 on or off, in order to establish or break a galvanically conductive connection.

[0031] The electromechanical switch 1 used here has neither a structural design nor a function for arc suppression. The electromechanical switch 1 and the semiconductor switch 2 are connected in series in a load path 5. Furthermore, the electromechanical switch 1 and the semiconductor switch 2 are connected to the control device 3, so that the electromechanical switch 1 and the semiconductor switch 2 can be controlled by the control device 3 to switch on or off.

[0032] Here, an embodiment is shown in which the arrangement with the electromechanical switch 1, the semiconductor switch 2 and the control device 3 is part of a failure insertion unit 6. The failure insertion unit 6 is intended for connection to a HIL simulator (not shown here in detail), specifically via the load path 5. The failure insertion unit 6 serves to simulate electrical faults, which are transmitted from it to the HIL simulator via the load path 6.The Failure Insertion Unit 6 used here can, among other things, generate the following electrical errors and output them to the HIL simulator: a short circuit of a control unit output to ground potential, a short circuit of a control unit output to supply potential, a short circuit of a control unit output having a first signal line to a second signal line and a separation of a signal line that electrically connects a control unit output to a signal sink or a control unit input to a signal source.

[0033] As can be seen schematically in Fig. 2, which shows the control of the electromechanical switch 1 and the semiconductor switch 2 during switching on and the switching-on reactions of the electromechanical switch 1 and the semiconductor switch 2, when the electromechanical switch 1 and the semiconductor switch 2 are switched on, the control device 3 simultaneously sends a respective switch-on signal to the electromechanical switch 1 and the semiconductor switch 2 (switching profiles a and b). However, this does not lead to an immediate switching on of the electromechanical switch 1 and the semiconductor switch 2, nor does it lead to the electromechanical switch 1 and the semiconductor switch 2 closing at the same time. Rather, the semiconductor switch 2 has a very short reaction time of approximately 10 ps, ​​while the reaction time of the electromechanical switch 1 is in the range between 1 and 6 ms.The electromechanical switch 1 (switch-on sequence c) therefore closes much later than the semiconductor switch 2 (switch-on sequence d).

[0034] An essential aspect of the presently described preferred embodiment of the invention is that, as schematically illustrated in Fig. 3, when the electromechanical switch 1 and the semiconductor switch 2 are switched off to open the load path 5, the control device 3 first sends a switch-off signal to the electromechanical switch 1 (switching sequence a) and only then, specifically after a predetermined switch-off delay, a switch-off signal to the semiconductor switch 2 (switching sequence b). The switch-off delay is selected such that it leads to a time-limited arc between the switching contacts 4 of the electromechanical switch 1.It should be noted that the electromechanical switch 1 has an intrinsic, i.e. unavoidable, switching time for switching off, which is determined by the time period between receipt of the switch-off signal from the control device 3 and the opening of the electromechanical switch 1. Therefore, the procedure here is such that the switch-off delay for switching off the semiconductor switch 2 is selected to be greater than the intrinsic switching time of the electromechanical switch 1. The electromechanical switch 1 (switch-off process c) therefore opens earlier than the semiconductor switch 2 (switch-off process d), so that for a certain time the switching contacts 4 of the electromechanical switch 1 are separated from one another, while the semiconductor switch 2 is still closed.In the preferred embodiment described here, an arc is therefore formed between the switching contacts 4 of the electromechanical switch 1 for a maximum period of 7 ms.

[0035] Finally, Fig. 4 schematically shows an arrangement with a plurality of electromechanical switches 1, a semiconductor switch 2, and a control device 3 according to a further preferred embodiment of the invention. The semiconductor switch 2 is connected to the control device 3 via a semiconductor control line, which is not shown in Fig. 4. As shown, the semiconductor switch 2 is connected in series upstream of a plurality of electromechanical switches 1 connected in parallel, all of which are connected to the control device 3 for switching on and off. The control device 3 is set so that only one of the electromechanical switches 1 can be switched on at a time. Otherwise, the function for the individual electromechanical switches 1 is as previously explained with reference to Figs. 1, 2, and 3. List of Reference Symbols

[0036] 1 electromechanical switch

[0037] 2 Semiconductor switch 3 Control device

[0038] 4 switching contacts

[0039] 5 Load path

[0040] 6 Failure Insertion Unit

Claims

Patent claims 1 . Arrangement with an electromechanical switch (1 ), a semiconductor switch (2) and a control device (3), wherein the electromechanical switch (1 ) and the semiconductor switch (2) can be switched on and off, wherein the electromechanical switch (1 ) and the semiconductor switch (2) are each closed in the switched-on state and each open in the switched-off state, the electromechanical switch (1 ) has switching contacts (4) which can be electromechanically connected to one another for switching on and off, the electromechanical switch (1 ) and the semiconductor switch (2) are connected in series to one another in a load path (5), and electromechanical switches (1) and the semiconductor switch (2) can be switched on and off.Switching off are connected to the control device (3) and the control device (3) is set up in such a way that when the electromechanical switch (1) and the semiconductor switch (2) are switched off to open the load path (5), it first sends a switch-off signal to the electromechanical switch (1) and then, after a predetermined switch-off delay, a switch-off signal to the semiconductor switch (2).

2. Arrangement according to claim 1, wherein the switch-off delay is selected such that it leads to a time-limited arc between the switching contacts (4) of the electromechanical switch (1).

3. Arrangement according to claim 2, wherein the switch-off delay is selected such that the arc is formed between the switching contacts (4) of the electromechanical switch (1) for a maximum period of 7 ms.

4. Arrangement according to one of the preceding claims, wherein the electromechanical switch (1) has an intrinsic switching time for switching off, which is given by the time period between the receipt of the switch-off signal from the control device (3) and the opening of the electromechanical see switch (1 ), and the switch-off delay is greater than the intrinsic switching time of the electromechanical switch (1 ).

5. Arrangement according to one of the preceding claims, wherein the electromechanical switch (1) for suppressing arcs has neither a structural design nor a function.

6. Arrangement according to one of the preceding claims, wherein the control device (3) is arranged such that when the electromechanical switch (1) and the semiconductor switch (2) are switched on, it simultaneously sends a respective switch-on signal to the electromechanical switch (1) and the semiconductor switch (2) respectively.

7. Arrangement according to one of the preceding claims, wherein the semiconductor switch (2) is a MOSFET switch.

8. Arrangement according to one of the preceding claims, wherein the electromechanical switch (1) is a relay or a contactor.

9. Arrangement according to one of the preceding claims, wherein the semiconductor switch (2) is connected in series upstream of a plurality of electromechanical switches (1) connected in parallel to one another, which are all connected to the control device (3) for switching on or off, and the control device (3) is set up in such a way that only one of the electromechanical switches (1) can be switched on at the same time.

10. Failure Insertion Unit (6) for connection to a HIL simulator via a load path (5) and for simulating at least one electrical fault and transmitting it to the HIL simulator via the load path (6), wherein the load path (6) is provided with an arrangement according to one of the preceding claims.

11. Failure Insertion Unit (6) according to claim 10, wherein the electrical fault is selected from the group comprising a short circuit of a control unit output to ground potential, a short circuit of a control unit output to supply potential and a short circuit of a control unit output having a first signal line to a second signal line, as well as a separation of a signal line that electrically connects a control unit output to a signal sink or a control unit input to a signal source.

12. Method for controlling an electromechanical switch (1) and a semiconductor switch (2), wherein the electromechanical switch (1) has switching contacts (4) which can be electromechanically connected to one another for switching on or off, and the electromechanical switch (1) and the semiconductor switch (2) are connected in series to one another in a load path (5) and both are connected to the control device (3) for switching on or off, comprising the following method steps: Sending a shutdown signal to the electromechanical switch (1) at a first time and Sending a switch-off signal to the semiconductor switch (2) at a second time which is delayed by a predetermined switch-off delay compared to the first time.

13. The method according to claim 12, wherein the control device (3) simultaneously sends a respective switch-on signal to the electromechanical switch (1) and the semiconductor switch (2) when the electromechanical switch (1) and the semiconductor switch (2) are switched on.

14. Use of a method according to one of claims 12 or 13 for a failure insertion unit (6).

Citation Information

Patent Citations

  • Device for testing an electrical component

    DE102009048981A1

  • A hybrid DC circuit breaker with multi-channel selection function

    CN111756359B

  • Solid-state circuit breaker trips an air gap actuator and solid-state switching components at the same time or the solid-state switching components with a delay

    US11798756B2

  • Switching device and switch-off method for operating a switching device

    US20170018390A1

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