Method and apparatus for processing signal

Abstract

The present invention relates to a method performed by a receiving node in a wireless communication system, comprising: an operation of receiving a signal vector including a plurality of information bits from a transmitting node; an operation of generating a log likelihood ratio (LLR) vector on the basis of the signal vector; an operation of generating a plurality of permutated LLR vectors by performing permutation on the LLR vector; and an operation of performing decoding on each of the plurality of permutated LLR vectors, wherein the decoding includes: an operation of generating a score on the basis of a first mathematical expression and at least one of a permutated codeword vector and a permutated data carrier vector, and selecting at least one or more vectors on the basis of the score; and an operation of obtaining a plurality of information bits on the basis of the selected at least one or more vectors.

Description

Signal processing method and device

[0001] The present disclosure relates to a wireless communication system (or mobile communication system). Specifically, the present disclosure relates to a signal processing method and device for performing automorphism ensemble decoding.

[0002] Looking back at the evolution of wireless communication over successive generations, technologies have primarily been developed for human-facing services such as voice, multimedia, and data. With the commercialization of the 5G (5th Generation) communication system, an explosive increase in connected devices is expected to be connected to communication networks. Examples of networked objects include vehicles, robots, drones, home appliances, displays, smart sensors installed in various infrastructures, construction equipment, and factory equipment. Mobile devices are also expected to evolve into diverse form factors, such as augmented reality glasses, virtual reality headsets, and holographic devices. In the 6G (6th Generation) era, efforts are being made to develop improved 6G communication systems to connect hundreds of billions of devices and objects and provide diverse services. For this reason, 6G communication systems are often referred to as "beyond 5G."

[0003] The 6G communication system, expected to be realized around 2030, will have a maximum transmission speed of terabytes (i.e., 1,000 gigabits) per second (bps) and a wireless latency of 100 microseconds (μsec). In other words, compared to 5G, the transmission speed in a 6G communication system will be 50 times faster and the wireless latency will be reduced to one-tenth.

[0004] To achieve these high data rates and ultra-low latency, 6G communication systems are being considered for implementation in the terahertz (THz) band (e.g., from 95 gigahertz (GHz) to 3 terahertz (THz)). Compared to the millimeter wave (mmWave) band introduced in 5G, the terahertz band is expected to have more severe path loss and atmospheric absorption, making it more important to develop technologies that can guarantee signal reach, or coverage. Key technologies to ensure coverage include Radio Frequency (RF) components, antennas, new waveforms that offer better coverage than Orthogonal Frequency Division Multiplexing (OFDM), beamforming, and multiple antenna transmission technologies such as massive Multiple-Input and Multiple-Output (MIMO), Full Dimensional MIMO (FD-MIMO), array antennas, and large-scale antennas. In addition, new technologies such as metamaterial-based lenses and antennas, high-dimensional spatial multiplexing using Orbital Angular Momentum (OAM), and Reconfigurable Intelligent Surface (RIS) are being discussed to improve the coverage of terahertz band signals.

[0005] In addition, in order to improve frequency efficiency and system network, 6G communication systems are developing full duplex technology that utilizes the same frequency resources at the same time for uplink and downlink; network technology that integrates satellites and HAPS (High-Altitude Platform Stations); network structure innovation technology that supports mobile base stations and enables optimization and automation of network operation; dynamic spectrum sharing technology through collision avoidance based on spectrum usage prediction; AI-based communication technology that utilizes AI (Artificial Intelligence) from the design stage and internalizes end-to-end AI support functions to realize system optimization; and next-generation distributed computing technology that realizes services with complexity that exceeds the limits of terminal computing capabilities by utilizing ultra-high-performance communication and computing resources (Mobile Edge Computing (MEC), cloud, etc.). In addition, efforts are being made to further strengthen connectivity between devices, further optimize networks, promote softwareization of network entities, and increase the openness of wireless communications through the design of new protocols to be used in 6G communication systems, the implementation of hardware-based security environments, the development of mechanisms for the safe use of data, and the development of technologies for maintaining privacy.

[0006] Research and development of these 6G communication systems are expected to enable a new level of hyper-connected experience through the hyper-connectivity of 6G communication systems, which encompass not only connections between things but also connections between people and things. Specifically, 6G communication systems are expected to enable services such as truly immersive eXtended Reality (XR), high-fidelity mobile holograms, and digital replicas. Furthermore, services such as remote surgery, industrial automation, and emergency response, which are provided through 6G communication systems through enhanced security and reliability, will be applied in diverse fields such as industry, medicine, automobiles, and home appliances.

[0007] A receiving node may apply multiple permutation methods to a signal vector received from a transmitting node, decode each vector to which the multiple permutation methods have been applied, apply inverse permutation to the resulting vectors, and select one of the inverse permutated vectors based on the Euclidean distance value between the inverse permutated vectors and the signal vector. However, since the signal vector is composed of real values ​​reflecting noise, there is a problem that it is not appropriate to calculate the Euclidean distance value between the signal vector and the inverse permutated vector.

[0008] In addition, when a conventional receiver decodes a permutated signal vector, the decoder outputs a permutated carrier vector, but the permutated carrier vector cannot be depermutated as is. Therefore, the permutated carrier vector must be encoded to output a permutated codeword vector, and then the permutated codeword vector must be depermutated. Therefore, there is a problem of increasing complexity because the encoding process must be performed for each vector to which multiple permutation methods are applied.

[0009] The present disclosure may have as its primary purpose a signal processing method and device that reduces complexity and improves accuracy in processing a signal received at a receiving end.

[0010] According to one embodiment of the present disclosure, a method performed by a receiving node in a wireless communication system includes an operation of receiving a signal vector including a plurality of information bits from a transmitting node, an operation of generating an LLR (Log Likelihood Ratio) vector based on the signal vector, an operation of performing permutation on the LLR vector to generate a plurality of permutated LLR vectors, an operation of performing decoding on each of the plurality of permutated LLR vectors, the decoding including an operation of generating a score based on at least one of a permutated codeword vector and a permutated data carrier vector and a first mathematical expression, and selecting at least one or more vectors based on the score, and an operation of obtaining a plurality of information bits based on the selected at least one or more vectors.

[0011] Preferably, the operation of generating a plurality of permutated LLR vectors generates a plurality of permutated LLR vectors based on a plurality of different permutation schemes, and each of the plurality of permutated LLR vectors is any one of all vectors that can be derived by considering an information bit index and a frozen bit index in the LLR vector.

[0012] Preferably, the plurality of permutated LLR vectors are represented by a linear combination of the LLR vectors and a permutation matrix corresponding to one of the plurality of permutation methods.

[0013] Preferably, the first mathematical expression may be based on a product of a vector modulating a permutated codeword vector and a permutated LLR vector with the same index.

[0014] Additionally, the decoding generates a decision LLR vector based on the permutated LLR vector, and the first mathematical expression may be based on a value corresponding to a frozen bit index of the decision LLR vector.

[0015] Additionally, decoding generates a decision LLR vector based on the permutated LLR vector, and the first mathematical expression may be based on a sum of values ​​corresponding to information bit indices of the decision LLR vector.

[0016] Preferably, the decoding comprises successive cancellation-list (SCL) decoding, wherein the successive cancellation-list decoding can perform a first validity test on candidate vectors corresponding to preset list values.

[0017] In addition, preferably, the decoding is systematic decoding, and the signal processing method may further include an operation of performing depermutation on the permutated codeword vector to generate a depermutated codeword vector, and an operation of performing a second validity test on the depermutated codeword vector. In this case, the operation of selecting at least one vector selects one of the vectors that pass the second validity test.

[0018] According to one embodiment of the present disclosure, the receiver can reduce or minimize latency and BLER (Block Error Rate) that may occur during the decoding process.

[0019] In addition, various effects may be provided, either directly or indirectly, through this document.

[0020] FIG. 1 illustrates a wireless communication system according to one embodiment of the present disclosure.

[0021] Figure 2 is a drawing for explaining the structure of a terminal according to one embodiment.

[0022] FIG. 3 is a drawing for explaining the structure of a base station according to one embodiment.

[0023] FIG. 4 is a drawing for explaining a signal processing method according to one embodiment.

[0024] FIG. 5 is a diagram for explaining a second decoding and signal processing method based on an LLR vector according to one embodiment.

[0025] FIG. 6 is a diagram for explaining a signal processing method to which a validity test is applied according to one embodiment.

[0026] FIG. 7 is a diagram for explaining a signal processing method to which a validity test is applied according to one embodiment.

[0027] FIG. 8 is a diagram for explaining a signal processing method to which successive cancellation list (SCL) decoding is applied according to one embodiment.

[0028] Figure 9a is a drawing for explaining the detailed operation of the signal processing process of Figure 8.

[0029] Figure 9b is a drawing for explaining the detailed operation of the signal processing process of Figure 9a.

[0030] Figures 10a and 10b are diagrams for explaining non-systematic encoding and systematic encoding, respectively.

[0031] FIG. 10c is a diagram for explaining a signal processing method to which systematic encoding is applied according to one embodiment.

[0032] FIG. 11 is a diagram for explaining a signal processing method to which systematic decoding is applied according to one embodiment.

[0033] FIG. 12 is a diagram for explaining a signal processing method to which systematic decoding is applied according to one embodiment.

[0034] Fig. 13 is a diagram for explaining the characteristics of a permutation matrix according to one embodiment.

[0035] FIG. 14 is a diagram for explaining the characteristics of a Block-Lower Triangular matrix according to one embodiment.

[0036] FIG. 15 is a diagram for explaining the characteristics of an encoding matrix according to one embodiment.

[0037] Fig. 16 is a drawing for explaining the characteristics of a matrix in the form of an Upper Triangular according to one embodiment.

[0038] Fig. 17 is a drawing for explaining a signal processing method according to one embodiment.

[0039] Fig. 18 is a drawing for explaining a signal processing method according to one embodiment.

[0040] FIG. 19 is a drawing for explaining a signal processing method according to one embodiment.

[0041] Fig. 20 is a drawing for explaining a signal processing method according to one embodiment.

[0042] In connection with the description of the drawings, the same or similar reference numerals may be used for identical or similar components.

[0043] Hereinafter, various embodiments of the present invention will be described with reference to the accompanying drawings. However, this is not intended to limit the present invention to specific embodiments, and it should be understood that various modifications, equivalents, and / or alternatives of the embodiments of the present invention are included.

[0044] FIG. 1 illustrates a wireless communication system according to one embodiment of the present disclosure.

[0045] FIG. 1 illustrates some of the nodes utilizing a wireless channel in a wireless communication system, including a base station (110), a first terminal (120), and / or a second terminal (130). Although FIG. 1 illustrates only one base station, this is merely an example. The wireless communication system of FIG. 1 may further include other base stations identical or similar to the base station (110).

[0046] The base station (110) is a network infrastructure that provides wireless access to terminals (120, 130). The base station (110) has coverage defined as a certain geographical area based on the distance at which a signal can be transmitted. In addition to the base station, the base station (110) may be referred to as an 'access point (AP)', 'eNodeB (eNB)', 'gNodeB (gNB)', '5G node (5th generation node)', 'wireless point', 'transmission / reception point (TRP)', or other terms having equivalent technical meanings.

[0047] The first terminal (120) and the second terminal (130) are each devices used by a user and can communicate with the base station (110) via a wireless channel. At least one of the first terminal (120) or the second terminal (130) can be operated without the user's intervention. For example, at least one of the first terminal (120) or the second terminal (130) may be a device that performs machine type communication (MTC) and may not be carried by the user. Each of the first terminal (120) and the second terminal (130) may be referred to as a terminal, or other terms having equivalent technical meanings, such as 'user equipment (UE),' 'mobile station,' 'subscriber station,' 'customer premises equipment (CPE),' 'remote terminal,' 'wireless terminal,' 'electronic device,' or 'user device.'

[0048] The base station (110), the first terminal (120), and the second terminal (130) can transmit and / or receive wireless signals in the millimeter wave (mmWave) band (e.g., 28 GHz, 30 GHz, 38 GHz, 60 GHz). At this time, in order to improve channel gain, the base station (110), the first terminal (120), and / or the second terminal (130) can perform beamforming.

[0049] Beamforming may include transmit beamforming and / or receive beamforming. That is, the base station (110), the first terminal (120), and / or the second terminal (130) may impart directionality to the transmit signal or the receive signal. To impart directionality to the receive signal, the base station (110) and / or the terminals (120, 130) may select serving beams (112, 113, 121, 131) through a beam search or beam management procedure. After the serving beams (112, 113, 121, 131) are selected, subsequent communication may be performed through resources that are in a quasi-co-located (QCL) relationship with the resources that transmitted the serving beams (112, 113, 121, 131).

[0050] The base station (110), the first terminal (120), and the second terminal (130) of the present disclosure may each be a transmitting apparatus, a transmitting node, a receiving apparatus, and / or a receiving node. For example, the base station (110) may transmit an RF (radio frequency) signal to the first terminal (120). The base station (110) may receive the RF signal from the first terminal (120). As another example, the first terminal (120) may transmit an RF signal to the base station (110) or the second terminal (130). The first terminal (120) may receive the RF signal from the base station (110) or the second terminal (130).

[0051] Figure 2 is a drawing for explaining the structure of a terminal according to one embodiment.

[0052] Referring to FIG. 2, a terminal (200) according to one embodiment may include a transceiver (210), a memory (220), and / or a processor (230). Although the terminal (200) is described in the present disclosure as including a transceiver (210), a memory (220), and / or a processor (230), this is merely an example. For example, the terminal (200) may further include other components in addition to the transceiver (210), the memory (220), and the processor (230).

[0053] According to one embodiment, the transceiver (210), memory (220), and processor (230) may be implemented or formed as separate chips. However, this is merely an example, and the transceiver (210), memory (220), and / or processor (230) may be implemented or formed as a single chip.

[0054] According to one embodiment, the transceiver (210) may include at least one transmitter and / or at least one receiver. For example, the transceiver (210) may include an RF transmitter for amplifying and up-converting the frequency of a transmitted signal. The transceiver (210) may include an RF receiver for down-converting the frequency of a received signal and amplifying low-noise.

[0055] The configurations of the transceiver (210) described in the present disclosure are merely examples, and the configuration of the transceiver (210) is not limited to an RF transmitter and an RF receiver. For example, the transceiver (210) may further include a coupler to ensure isolation between the RF transmitter and the RF receiver.

[0056] In one embodiment, the transceiver (210) may transmit or receive signals to the processor (230). For example, the transceiver (210) may transmit or deliver an RF signal received via a wireless communication channel to the processor (230). The transceiver (210) may receive or deliver an RF signal from the processor (230).

[0057] In one embodiment, the transceiver (210) may be referred to as a UE transmitter or a UE receiver.

[0058] According to one embodiment, the transceiver (210) may transmit signals to a base station (e.g., base station (110) of FIG. 1) or a network entity (e.g., user plane function (UPF) entity) or receive signals from the base station or network entity. In one embodiment, the transmitted or received signals may include control signals and data.

[0059] According to one embodiment, the memory (220) may include or store programs and data necessary for the operations of the terminal (200). For example, the memory (220) may be a non-transitory memory, and a program stored in the non-transitory memory may be organically combined with a hardware configuration of the terminal (200) (e.g., a processor (230) or a transceiver (210)). The memory (220) may store control information or data including a signal acquired by the terminal (200). In one embodiment, the memory (220) may include a read-only memory (ROM), a random access memory (RAM), a hard disk, a CD-ROM, a DVD, and / or a storage medium.

[0060] According to one embodiment, the processor (230) may include one processor or multiple processors. For example, the processor (230) may include a communication processor. For example, the processor (230) may include a communication processor and / or an application processor.

[0061] In one embodiment, the processor (230) may control a series of processes performed by the terminal (200). For example, the transceiver (210) may receive a data signal including control information transmitted by a base station or network entity. The processor (230) may process the received control signal and data signal.

[0062] The term "processor" in the present disclosure may be replaced with various terms referring to a configuration that executes or performs operations of the terminal (200). For example, the term "processor" may be replaced with a controller or a computing circuit.

[0063] The terminal (200) of the present disclosure may correspond to the first terminal (120) and / or the second terminal (130) of FIG. 1.

[0064] FIG. 3 is a drawing for explaining the structure of a base station according to one embodiment.

[0065] Referring to FIG. 3, a base station (300) according to one embodiment may include a transceiver (310), a memory (320), and / or a processor (330). Although the base station (300) is described in the present disclosure as including a transceiver (310), a memory (320), and / or a processor (330), this is merely an example. For example, the base station (300) may further include other components in addition to the transceiver (310), the memory (320), and the processor (330).

[0066] According to one embodiment, the transceiver (310), memory (320), and processor (330) may be implemented or formed as separate chips. However, this is merely an example, and the transceiver (310), memory (320), and / or processor (330) may be implemented or formed as a single chip.

[0067] According to one embodiment, the transceiver (310) may include at least one transmitter and / or at least one receiver. For example, the transceiver (310) may include an RF transmitter for amplifying and up-converting the frequency of a transmitted signal. The transceiver (310) may include an RF receiver for down-converting the frequency of a received signal and amplifying low-noise.

[0068] The configurations of the transceiver (310) described in the present disclosure are merely examples, and the configuration of the transceiver (310) is not limited to an RF transmitter and an RF receiver. For example, the transceiver (310) may further include a coupler to ensure isolation between the RF transmitter and the RF receiver.

[0069] In one embodiment, the transceiver (310) may transmit or receive signals to the processor (330). For example, the transceiver (310) may transmit or deliver an RF signal received via a wireless communication channel to the processor (330). The transceiver (310) may receive or deliver an RF signal from the processor (230).

[0070] In one embodiment, the transceiver (310) may be referred to as a base station transmitter or a base station receiver.

[0071] In one embodiment, the transceiver (310) may transmit a signal to the terminal (200) or receive a signal from the terminal (200). In one embodiment, the transmitted or received signal may include a control signal and data.

[0072] According to one embodiment, the memory (320) may include programs and data necessary for the operations of the base station (300). For example, the memory (320) may be a non-transitory memory, and the program stored in the non-transitory memory may be organically combined with the hardware configuration of the base station (300) (e.g., the processor (330) or the transceiver (310)). The memory (320) may store control information or data including a signal acquired by the base station (300). In one embodiment, the memory (320) may include a read-only memory (ROM), a random access memory (RAM), a hard disk, a CD-ROM, a DVD, and / or a storage medium.

[0073] According to one embodiment, the processor (330) may include one processor or multiple processors. For example, the processor (330) may include a communication processor. For example, the processor (330) may include a communication processor and / or an application processor.

[0074] In one embodiment, the processor (330) may control a series of processes performed by the base station (300). For example, the transceiver (310) may receive a data signal containing control information transmitted by the base station or a network entity. The processor (330) may process the received control signal and data signal.

[0075] The term "processor" in the present disclosure may be replaced with various terms referring to a configuration that executes or performs operations of the base station (300). For example, the term "processor" may be replaced with a controller or a computing unit.

[0076] The devices described in FIGS. 2 and 3 may correspond to devices of a transmitter or receiver. A terminal or base station according to an embodiment of the present disclosure may be a transmitter if it is a transmitter, and may be a receiver if it is a receiver.

[0077] Hereinafter, the transmitter and receiver may refer to the terminals or base stations described in FIGS. 1 to 3, respectively. When describing downlink signals, the base station will be the transmitter and the terminal will be the receiver, and when describing uplink signals, the terminal will be the transmitter and the base station will be the receiver.

[0078] FIG. 4 is a drawing for explaining a signal processing method according to one embodiment.

[0079] Referring to Fig. 4, a signal processing method of the receiver is described.

[0080] According to one embodiment, the receiving end may correspond to a terminal (e.g., terminal (200) of FIG. 2) or a base station (e.g., base station (300) of FIG. 3). For example, the transmitting end may correspond to the base station (300), and the receiving end may correspond to the terminal (200). The transmitting end may transmit an RF signal to the receiving end via a wireless communication channel, and the receiving end may receive an RF signal from the transmitting end via a wireless communication channel.

[0081] Additionally, the transmitter may correspond to a first terminal (e.g., the first terminal (120) of FIG. 1), and the receiver may correspond to a second terminal (e.g., the second terminal (130) of FIG. 1). The transmitter may perform sidelink communication by transmitting an RF signal to the receiver.

[0082] According to one embodiment, an RF signal transmitted from a transmitter to a receiver may include encoded bits, and the encoded bits may be processed at the receiver. Hereinafter, a process by which the receiver processes (i.e., decode) bits encoded using the encoding method proposed in the present disclosure is described.

[0083] According to one embodiment, a transmitter may perform sub-channel allocation on an information vector d to generate a data carrier vector u, perform encoding on the data carrier vector u to generate a codeword vector x, and transmit the codeword vector x to a receiver. The receiver may receive a signal in which noise is applied to the signal to generate a difference, and the received signal vector may be referred to as y.

[0084] The information vector d can contain a specified number of bits. The information vector is d={d0,d1,…,d A-1} can be referenced. At this time, the number of bits in the information vector can be A.

[0085] The data carrier vector u may include information bits containing information to be transmitted and frozen bits containing no information. The data carrier vector (rate profiled vector) is u={u0,u1,…,u N-1} can be referenced. Here, N is a power of 2 as the size of the mother polar code, and can be determined by a pre-determined criterion from among values ​​greater than A. The number of bits of the data carrier vector can be N, and the number of inserted frozen bits can be NA. The number of at least one inserted or concatenated frozen bit can be preset. The data carrier vector u can be referred to as a rate profiled vector. In addition, the data carrier vector u can be referred to as a sub-channel allocated vector.

[0086] By including frozen bits in this way, even if some of the bits included in the signal transmitted from the transmitter are lost due to the wireless communication channel, the loss of information bits can be minimized because mainly the frozen bits are lost.

[0087] The codeword vector x can be generated by the mathematical formula 1 below.

[0088]

[0089] In [Mathematical Formula 1], x is a codeword vector and u is a data carrier vector. G is a generator matrix of a polar code and can represent a polar encoding operation. G may also be referred to as a polar code generator matrix. Due to its characteristics, the polar code generator matrix G*G can be an identity matrix.

[0090] A codeword (or codeword vector) can be transmitted from a transmitter to a receiver via a wireless communication channel. The receiver can receive the codeword y from the transmitter via the wireless communication channel. The codeword y received by the receiver via the wireless communication channel may differ from the codeword x transmitted by the transmitter due to the influence of the channel environment (e.g., noise).

[0091] Referring to FIG. 4, operation 410 represents an operation of receiving a signal vector y at a receiving end according to one embodiment of the present disclosure.

[0092] The operation 420 represents an operation in which the receiver performs a permutation on the received signal vector y. The permutation operation according to one embodiment may represent changing the order of columns included in the vector. In addition, the permutation operation may be performed based on multiple permutation methods. For example, the receiver may perform a first to Mth permutation operation on the signal vector y. Accordingly, the first permutated signal vector ( ) to the M permutated signal vector ( ) can be generated. Multiple permutation methods can have different permutation methods.

[0093] The 430 operation performs a first decoding (e.g., successive cancellation decoding) based on the permutated signal vector at the receiver, thereby decoding the permutated data carrier vector ( ) represents the operation of generating a permutated data carrier vector ( ) is a permutated signal vector ( ) may be a vector generated through sequential removal decoding operations.

[0094] Since the decoding operation is performed on each of the multiple permutated signal vectors, multiple data carrier vectors This can be created.

[0095] The 440 operation is performed on the permuted data carrier vector ( ) and perform encoding based on the permutated codeword vector Indicates an operation of generating a plurality of permutated data carrier vectors. Since the encoding operation is performed for each of a plurality of permutated data carrier vectors, a plurality of permutated codeword vectors can be generated. Here, the encoding operation is performed on a permutated data carrier vector can be expressed as multiplying the encoding matrix G. That is, , and when the polar code encoding matrix G is multiplied by the same matrix G, the identity matrix I is generated, so the vector ultimately generated is the permutated codeword vector. am.

[0096] 450 operation, the permuted codeword vector at the receiver Perform reverse permutation based on the reverse permutated codeword vector It represents an operation of generating. Since the reverse permutation operation is performed for each of a plurality of permutated codeword vectors, a plurality of reverse permutated codeword vectors can be generated.

[0097] The operation 460 represents an operation of selecting one of the plurality of reverse permutated codeword vectors generated at the receiver. At this time, the receiver may calculate the distance between the plurality of reverse permutated codeword vectors and the signal vector y, and select the reverse permutated codeword vector closest to the signal vector y based on the calculation result. A known method (e.g., Euclidean distance) may be applied to calculate the distance. The selected reverse permutated codeword vector is can be displayed as

[0098] 470 Operation, the depermutated codeword vector selected at the receiver Perform encoding operation on the depermutated data carrier vector This represents an operation of generating information bits. Since the receiver cannot directly derive information bits from the codeword vector, it performs an encoding operation again to convert the codeword vector into a data carrier vector, and then obtains information bits from the data carrier vector. At this time, the obtained information bits may be referred to as estimated information bits.

[0099] The operations performed at the transmitting end may be understood as being substantially performed by at least one processor or controller included in the transmitting end. Furthermore, the operations performed at the receiving end may be understood as being substantially performed by at least one processor or controller included in the receiving end.

[0100] FIG. 5 is a diagram for explaining a second decoding and signal processing method based on an LLR (Log likelihood ratio) vector according to one embodiment.

[0101] According to one embodiment, the receiving end may correspond to a terminal (e.g., terminal (200) of FIG. 2) or a base station (e.g., base station (300) of FIG. 3). For example, the transmitting end may correspond to the base station (300), and the receiving end may correspond to the terminal (200). The transmitting end may transmit an RF signal to the receiving end via a wireless communication channel, and the receiving end may receive an RF signal from the transmitting end via a wireless communication channel.

[0102] Additionally, the transmitter may correspond to a first terminal (e.g., the first terminal (120) of FIG. 1), and the receiver may correspond to a second terminal (e.g., the second terminal (130) of FIG. 1). The transmitter may perform sidelink communication by transmitting an RF signal to the receiver.

[0103] According to one embodiment, an RF signal transmitted from a transmitter to a receiver may include encoded bits, and the encoded bits may be processed at the receiver. Hereinafter, a process in which bits encoded using a polar coding method are processed at the receiver is described.

[0104] According to one embodiment, a transmitter may perform sub-channel allocation on an information vector d to generate a data carrier vector u, perform encoding on the data carrier vector u to generate a codeword vector x, and transmit the codeword vector x to a receiver. The receiver may receive a signal in which noise is applied to the signal to generate a difference, and the received signal vector may be referred to as y.

[0105] The information vector d can contain a specified number of bits. The information vector is d={d0,d1,…,d A-1} can be referenced. Here, the number of bits of the information vector can be A.

[0106] The data carrier vector u may include information bits containing information to be transmitted and frozen bits containing no information. The data carrier vector is u={u0,u1,…,u N-1} can be referenced. At this time, the number of bits of the data carrier vector can be N, and the number of inserted frozen bits can be NA. The number of at least one inserted or concatenated frozen bit can be preset. The data carrier vector u can be referred to as a rate profiled vector.

[0107] A codeword (or codeword vector) can be transmitted from a transmitter to a receiver via a wireless communication channel. The receiver can receive the codeword y from the transmitter via the wireless communication channel. The codeword y received by the receiver via the wireless communication channel may differ from the codeword x transmitted by the transmitter due to the influence of the channel environment (e.g., noise).

[0108] Referring to FIG. 5, operation 510 represents an operation of receiving a signal vector y at a receiving end according to one embodiment of the present disclosure.

[0109] Operation 520 represents the operation of calculating the LLR value for the signal vector y received at the receiver. The receiver calculates the LLR value for each element of the signal vector y and generates the LLR vector L y can be created.

[0110] Operation 530 represents an operation of performing permutation on the LLR vector generated in operation 520. The permutation operation according to one embodiment may represent changing the order of values ​​included in the vector. In addition, the permutation operation may be performed based on multiple permutation methods. For example, the receiver may generate an LLR vector L y The first permutation operation to the Mth permutation operation can be performed on the first permutated LLR vector ( ) to the M permuted LLR vector ( ) can be generated. Multiple permutation methods can have different permutation methods.

[0111] The 540 operation performs a second decoding (e.g., successive cancellation decoding) based on the permutated LLR vector at the receiver, and the permutated data carrier vector ( ), permutated codeword vector ( ) and outputs a score generated based on a mathematical formula. Since the decoding operation is performed for each of a plurality of permutated LLR vectors, a data carrier vector, a codeword vector, and a score corresponding to each of a plurality of permutated LLR vectors can be generated. In one embodiment, the decoder receives a permutated LLR vector as input, and outputs a permutated data carrier vector ( ), permutated codeword vector ( ) and can be improved to output scores generated based on mathematical formulas.

[0112] In one embodiment, the score output by operation 540 can be generated based on the following [Mathematical Formula 2] to [Mathematical Formula 4].

[0113]

[0114] [Mathematical formula 2] can be referred to as a correlation metric.

[0115] score( ) is a permutated codeword vector ( ) can be produced by multiplying the values ​​of the BPSK modulated vector and the values ​​included in the LLR vector (channel LLR vector) with the same indices, and adding the multiplied values. At this time, the modulation method is not limited to BPSK, and other known modulation methods can be applied.

[0116]

[0117] [Mathematical expression 3] can be referred to as an SCL-like path metric.

[0118] Referring to [Mathematical Formula 3], the score ( ) is the decision LLR vector (Decision LLR vector, ) If the sign value of the value corresponding to the frozen bit index (i∈F) is not 1, the value of the decision LLR vector corresponding to the frozen bit index can be calculated by adding the values. The decision LLR vector can be generated during the decoding process of the 540 operation, and the frozen bit index value can be a predetermined value.

[0119]

[0120] [Mathematical formula 4] can be referred to as the Decision LLR metric.

[0121] Referring to [Mathematical Formula 4], the score ( ) is the decision LLR vector (Decision LLR vector, ) can be produced by adding the absolute values ​​of the values ​​corresponding to the information bit index (i∈I). The decision LLR vector can be generated during the decoding process of the 540 operation, and the information bit index value can be a predetermined value.

[0122] In one embodiment, operation 540 may calculate a score based on [Mathematical Equation 2] to [Mathematical Equation 4]. However, the mathematical equation for calculating the score is not limited to [Mathematical Equation 2] to [Mathematical Equation 4], and may include other mathematical equations based on a channel LLR vector, a decision LLR vector, a frozen bit index, or an information bit index.

[0123] The 550 operation is to generate multiple permutated codeword vectors ( based on the score corresponding to each permutated LLR vector) at the receiver. ) represents an action of selecting one of them. At this time, the receiver is the permutated codeword vector ( ) can be selected.

[0124] 560 The operation is a permutated codeword vector selected at the receiver. Perform reverse permutation based on the reverse permutated codeword vector It represents an operation to generate. Since the reverse permutation operation is performed on a selected single vector, the operation process can be simplified compared to the embodiment described in Fig. 4 (performing the reverse permutation operation M times).

[0125] 570 operation, the depermutated codeword vector selected at the receiver Perform encoding operation on the depermutated data carrier vector It represents an operation of generating. Since the receiver cannot directly derive information bits from the codeword vector, it performs an encoding operation again to convert the codeword vector into a data carrier vector, and then obtains information bits from the data carrier vector. At this time, the obtained information bits can be referred to as estimated information bits. Here, the encoding operation is a depermutated codeword vector can be expressed as multiplying the encoding matrix G. That is, can be expressed as

[0126] The signal processing method described in Fig. 5 does not select a vector based on the distance between the signal vector y and the codeword vector x at the receiver. Instead, a score is generated in the decoding operation and a vector is selected based on the score.

[0127] The operations performed at the receiving end may be understood to be substantially performed by at least one processor or controller included in the receiving end.

[0128] FIG. 6 is a diagram for explaining a signal processing method to which a validity test is applied according to one embodiment.

[0129] The signal processing method of FIG. 6 can be understood as an example in which the receiving end performs a validity test operation in the signal processing method of FIG. 5.

[0130] The operation 620 represents the operation of calculating the LLR value for the signal vector y received at the receiver. The receiver calculates the LLR value for each element of the signal vector y and generates the LLR vector L y can be generated. The 620 operation can correspond to the 520 operation of Fig. 5.

[0131] The 630 operation represents an operation that performs a permutation on the LLR vector generated in the previous operation. The permutation operation may represent changing the order of values ​​contained in the vector. In addition, the permutation operation may be performed based on multiple permutation methods. For example, the receiver may receive an LLR vector L y The first permutation operation to the Mth permutation operation can be performed on the first permutated LLR vector ( ) to the M permuted LLR vector ( ) can be generated. Multiple permutation methods can have different permutation methods. Operation 630 can correspond to operation 530 of FIG. 5.

[0132] The 640 operation performs a second decoding (e.g., successive cancellation decoding) based on the permutated signal vector at the receiver, and the permutated data carrier vector ( ), permutated codeword vector ( ) and outputs a score (M) generated based on a mathematical formula. Since the decoding operation is performed for each of a plurality of permutated LLR vectors, a plurality of data carrier vectors, codeword vectors, and scores can be output. In one embodiment, the decoder receives a permutated LLR vector as input, and outputs a permutated data carrier vector ( ), permutated codeword vector ( ) and can be improved to output a score generated based on a mathematical formula. With regard to the mathematical formula, reference can be made to the content described above in FIG. 5. Operation 640 can correspond to operation 540 of FIG. 5.

[0133] The 650 operation is based on the scores produced at the receiver, and multiple permutated codeword vectors ( ) represents an operation of selecting at least one vector among them. At this time, the receiver selects k permutated codeword vectors ( in descending order of scores. ) can be selected. 660 The operation is to select k selected permutated codeword vectors at the receiver. Perform reverse permutation on the reversed permutated codeword vector It represents the operation of generating. Since the reverse permutation operation is performed on k vectors, k reverse permutated codeword vectors are produced.

[0134] Operation 670 represents an operation in which the receiver performs an encoding operation on k de-permutated codeword vectors and generates de-permutated data carrier vectors. Since the receiver cannot directly derive information bits from the codeword vectors, it performs an encoding operation again to convert the codeword vectors into data carrier vectors.

[0135] The 680 operation represents an operation in which a receiver performs a validity test on k depermutated data carrier vectors. The validity test may include a CRC (Cyclic Redundancy Check) or a Parity Check. The validity test may be performed sequentially on the k vectors, and if none of the k vectors pass the validity test, the receiver may report a NACK message. The receiver may output information bits ( ) can be obtained.

[0136] In one embodiment, operations 660 to 680 are performed on k selected permutated codeword vectors. The operations can be performed sequentially, starting from the vector with the highest score among them. For example, if the receiver performs operations 660 to 680 on the permutated codeword vector with the highest score but fails the validity test as a result, the receiver can perform operations 660 to 680 on the permutated codeword vector with the next highest score. In this way, operations 660 to 680 can be performed sequentially on k vectors.

[0137] FIG. 7 is a diagram for explaining a signal processing method to which a validity test is applied according to one embodiment.

[0138] The signal processing method of FIG. 7 can be understood as an embodiment in which the order in which the receiver performs the validity test operation is changed in the signal processing method of FIG. 6.

[0139] The 720 operation represents the operation of calculating the LLR value for the signal vector y received at the receiver. The receiver calculates the LLR value for each element of the signal vector y and generates the LLR vector L y can be generated. The 720 operation can correspond to the 620 operation of Fig. 6.

[0140] The 730 operation represents an operation that performs a permutation on the LLR vector generated in the previous operation. The permutation operation may represent changing the order of values ​​contained in the vector. In addition, the permutation operation may be performed based on multiple permutation methods. For example, the receiver may receive an LLR vector L y The first permutation operation to the Mth permutation operation can be performed on the first permutated LLR vector ( ) to the M permuted LLR vector ( ) can be generated. Multiple permutation methods can have different permutation methods. Operation 730 can correspond to operation 630 of FIG. 6.

[0141] The 740 operation performs a second decoding (e.g., successive cancellation decoding) based on the permutated LLR vector at the receiver, and the permutated data carrier vector ( ), permutated codeword vector ( ) and outputs a score (M) generated based on a mathematical formula. Since the decoding operation is performed for each of a plurality of permutated LLR vectors, a plurality of data carrier vectors, codeword vectors, and scores can be output. In one embodiment, the decoder receives a permutated LLR vector as input, and outputs a permutated data carrier vector ( ), permutated codeword vector ( ) and can be improved to output a score generated based on a mathematical formula. With regard to the mathematical formula, reference can be made to the content described above in FIG. 5. Operation 740 can correspond to operation 640 of FIG. 6.

[0142] The 750 operation is a permuted codeword vector at the receiver ( ) and perform reverse permutation on the reversed permutated codeword vector ( ) represents an operation to generate a plurality of permutated codeword vectors ( ) is performed on multiple reverse permutated codeword vectors ( ) can be created.

[0143] The 760 operation is the reverse permutated codeword vector at the receiver ( ) and the de-permutated data carrier vector ( ) represents an operation of generating a plurality of de-permutated codeword vectors ( ) is performed for each of the multiple inverse permutated data carrier vectors ( ) can be created.

[0144] The 770 operation generates multiple inversely permutated data carrier vectors ( ) represents an operation of performing a validity test on each of the vectors. The validity test may include a CRC (Cyclic Redundancy Check) or a Parity Check. If all vectors fail the validity test, the receiver may report a NACK message. Operation 770 may correspond to operation 680 of FIG. 6.

[0145] Operation 780 represents the operation of selecting one of the vectors that passed the validity test in operation 770. Operation 780 may select a vector based on the score generated in operation 740. For example, the receiver may select the vector with the highest score to obtain information bits.

[0146] FIG. 8 is a diagram for explaining a signal processing method to which CRC-aided successive cancellation list (CA-SCL) decoding is applied according to one embodiment.

[0147] The signal processing method of FIG. 8 can be understood as an embodiment in which the receiving end performs a CA-SCL decoding operation in the signal processing method of FIG. 5.

[0148] The 820 operation represents the operation of calculating the LLR value for the signal vector y received at the receiver. The receiver calculates the LLR value for each element of the signal vector y and generates the LLR vector L y can be generated. The 820 operation can correspond to the 520 operation of Fig. 5.

[0149] Operation 830 represents an operation of performing permutation on the LLR vector generated in operation 820. The permutation operation according to one embodiment may represent changing the order of values ​​included in the vector. In addition, the permutation operation may be performed based on multiple permutation methods. For example, the receiver may perform an LLR vector L y The first permutation operation to the Mth permutation operation can be performed on the first permutated LLR vector ( ) to the M permuted LLR vector ( ) can be generated. Multiple permutation methods can have different permutation methods.

[0150] The 840 operation performs CA (CRC aided)-SCL decoding based on the permutated LLR vector at the receiver, and the permutated data carrier vector ( ), permutated codeword vector ( ) and outputs a score generated based on a mathematical formula. Since the CA-SCL decoding operation is performed for each of a plurality of permutated LLR vectors, a plurality of data carrier vectors, codeword vectors, and scores can be generated. In one embodiment, the decoder receives a permutated LLR vector as input, and outputs a permutated data carrier vector ( ), permutated codeword vector ( ) and can be improved to output scores generated based on mathematical formulas.

[0151] The 850 operation generates multiple permutated codeword vectors ( based on the scores generated corresponding to each permutated LLR vector at the receiver end. ) represents an action of selecting one of them. At this time, the receiver is the permutated codeword vector ( ) can be selected.

[0152] The 860 operation is the permutated codeword vector selected at the receiver. Perform reverse permutation based on the reverse permutated codeword vector It represents an operation to generate. Since the reverse permutation operation is performed on a single selected vector, the operation process can be simplified compared to the embodiment described in Fig. 4.

[0153] The 870 operation is the reverse permutated codeword vector selected at the receiver. Perform encoding operation on the depermutated data carrier vector It represents an operation of generating. Since the receiver cannot directly derive information bits from the codeword vector, it performs an encoding operation again to convert the codeword vector into a data carrier vector, and then obtains information bits from the data carrier vector. At this time, the obtained information bits can be referred to as estimated information bits. Here, the encoding operation is a depermutated codeword vector can be expressed as multiplying the encoding matrix G. That is, can be expressed as

[0154] The operations performed at the receiving end may be understood to be substantially performed by at least one processor or controller included in the receiving end.

[0155] Figure 9a is a drawing for explaining the detailed operation of the signal processing process of Figure 8.

[0156] Fig. 9a illustrates operation 840 of Fig. 8 in detail. Operations 940 to 960 in Fig. 9a may correspond to operation 840 of Fig. 8.

[0157] Referring to FIG. 9a, operation 920 corresponds to operation 820 of FIG. 8, and operation 930 corresponds to operation 830 of FIG. 8.

[0158] The 940 operation performs the third decoding based on the permutated signal vector at the receiving end, and the permutated data carrier vector ( ), permutated codeword vector ( ) and outputs a score generated based on a mathematical expression. Since the third decoding is performed for each of a plurality of permutated LLR vectors, a plurality of data carrier vectors, codeword vectors, and scores can be produced. The scores can be produced based on mathematical expressions 2 to 4 described in FIG. 5.

[0159] In one embodiment, the third decoding operation may be performed by a list decoder. The list decoder may select candidates during the decoding process based on a preset list value. For example, if the list value is 8, the list decoder may select 8 candidates during the decoding process.

[0160] Action 950 represents the action of performing a validity test (e.g., CRC) on a candidate. For example, if there are eight candidates, the receiver can perform a validity test on all eight candidates.

[0161] The 960 operation represents an operation in which the receiver selects one of the candidates that passed the validity test. The selection may be performed based on a score. For example, the receiver may select the candidate corresponding to the largest score. The selected candidate is a permutated data carrier vector ( ), permutated codeword vector ( ) and may include scores generated based on mathematical formulas.

[0162] Meanwhile, the receiver can perform 940 to 960 operations on a single permutated LLR vector. Accordingly, if the receiver performs 940 to 960 operations on each of a plurality of LLR vectors permutated by m permutation methods, m vectors can be derived.

[0163] Action 970 represents an action in which the receiver selects one of the m candidates selected in action 960. At this time, the selection by the receiver can be performed based on the score corresponding to each candidate.

[0164] The aforementioned operations 940 to 960 may be referred to as CA-SCL (CRC Aided Successive Cancellation List) decoding operations. The CA-SCL decoding operation generates a candidate list during the decoding process and selects one of the candidates based on the CRC. Therefore, error correction can be performed during the decoding process.

[0165] Figure 9b is a drawing for explaining the detailed operation of the signal processing process of Figure 9a.

[0166] Fig. 9b illustrates operation 950 of Fig. 9a in detail. Operations 952 to 956 in Fig. 9b may correspond to operation 950 of Fig. 9a.

[0167] Referring to FIG. 9b, operation 940 corresponds to operation 940 of FIG. 9a, and operation 960 of FIG. 9b corresponds to operation 960 of FIG. 9a.

[0168] The 930 operation is the LLR vector L, which is calculated as the element-wise LLR value of the signal vector y received at the receiver. y Indicates an operation that performs permutation. That is, operation 930 can represent an operation that generates a permutated LLR vector.

[0169] The 952 operation is a multiple codeword vector generated from the 940 operation ( ) performs reverse permutation on the candidates, and reverse permutated codeword vector ( ) represents an operation to generate multiple permutated codeword vectors ( ) is performed on multiple reverse permutated codeword vectors ( ) can be created.

[0170] The 954 operation is to depermutate the codeword vector at the receiver ( ) and the de-permutated data carrier vector ( ) represents an operation of generating a plurality of de-permutated codeword vectors ( ) is performed for each of the multiple inverse permutated data carrier vectors ( ) can be created.

[0171] The 956 operation generates multiple inversely permutated data carrier vectors ( ) represents an action of performing a validity test (e.g., CRC) on each candidate. For example, if there are 8 candidates, the receiver can perform a validity test on the 8 candidates.

[0172] Operations 940 to 960 of FIG. 9B may be referred to as CA-SCL (CRC-Aided Successive Cancellation List) decoding operations with added depermutation and encoding operations. The CA-SCL decoding operation generates a candidate list during the decoding process and selects one of the candidates based on the CRC. Therefore, it has an improved error correction effect.

[0173] Figures 10a and 10b are diagrams for explaining non-systematic encoding and systematic encoding, respectively.

[0174] Referring to Fig. 10a, a non-systematic polar encoder (1010) is illustrated. In the non-systematic case, the data carrier vector (u) and the information bit (or, information vector, d) correspond, but the codeword vector (x) generated by encoding the data carrier vector (u) does not correspond to the information bit. Therefore, the receiver cannot obtain the information bit directly when there is the codeword vector (x), but can obtain the information bit after encoding the codeword vector (x) to obtain the data carrier vector (u). That is, in the non-systematic case, the values ​​corresponding to the information bit index of the data carrier vector (u) correspond to the information vector (d), but the values ​​corresponding to the information bit index of the codeword vector (x) do not correspond to the information vector (d).

[0175] In contrast, referring to FIG. 10b, a systematic polar encoder (1016) is illustrated. In the case of systematic, when a preprocessed vector (v) obtained by preprocessing a data carrier vector (u) is encoded by the systematic polar encoder (1016), a systematic codeword vector (x) is generated, and this codeword vector (x) corresponds to an information bit (or, information vector, d). That is, in the case of systematic, values ​​corresponding to the information bit index of the data carrier vector (u) do not correspond to the information vector (d), but values ​​corresponding to the information bit index of the codeword vector (x) can correspond to the information vector (d). That is, the receiver can obtain the information bit if it knows the codeword vector (x).

[0176] FIG. 10c is a diagram for explaining a signal processing method to which systematic encoding is applied according to one embodiment.

[0177] The signal processing method of FIG. 10c shows an embodiment of performing signal processing by applying the systematic encoding operation of FIG. 10b.

[0178] The 1020 operation represents the operation of calculating the LLR value for the signal vector y received at the receiver. The receiver calculates the LLR value for each element of the signal vector y and generates the LLR vector L y can be generated. The 1020 operation can correspond to the 720 operation of Fig. 7.

[0179] The 1030 operation represents an operation that performs a permutation on the LLR vector generated in the previous operation. The permutation operation may represent changing the order of values ​​contained in the vector. In addition, the permutation operation may be performed based on multiple permutation methods. For example, the receiver may receive an LLR vector L y The first permutation operation to the Mth permutation operation can be performed on the first permutated LLR vector ( ) to the M permuted LLR vector ( ) can be generated. Multiple permutation methods can have different permutation methods. The 1030 operation can correspond to the 730 operation of FIG. 7.

[0180] The 1040 operation performs the fourth decoding (e.g., successive cancellation list decoding for systematic polar codes) based on the permutated LLR vector at the receiver, and the permutated codeword vector ( ) and outputs a score (M) generated based on a mathematical formula. The fourth decoding is SCL decoding, so it selects candidates corresponding to the list values.

[0181] The 1050 operation is performed by the receiver to perform reverse permutation on the candidates selected in the 1140 operation to obtain a reverse permutated codeword vector ( ) represents the action of generating a function.

[0182] The 1060 operation is that the receiver receives a number of de-permutated codeword vectors ( ) represents an action to perform a validity test (e.g., CRC).

[0183] Operation 1070 represents the operation in which the receiver selects one of the candidates that passed the validity test. The selection may be performed based on a score. For example, the receiver may select the candidate corresponding to the largest score. The selected candidate is a depermutated codeword vector ( ) and may include scores generated based on mathematical formulas.

[0184] Meanwhile, the receiver can perform 1040 to 1070 operations on a single permutated LLR vector. Accordingly, if the receiver performs 1040 to 1070 operations on each of a plurality of LLR vectors permutated by m permutation methods, m codeword vectors and scores can be derived.

[0185] The 1080 operation represents an operation in which the receiver selects one of the m candidates selected in the 1070 operation. In this case, the selection by the receiver can be performed based on the score corresponding to each candidate.

[0186] The aforementioned operations 1040 to 1070 may be referred to as CA-SCL (CRC-Aided Successive Cancellation List) decoding operations with an added depermutation process for validity testing. The CA-SCL decoding operation can have improved error correction performance by generating a candidate list during the decoding process and selecting one of the candidates based on the CRC.

[0187] The signal processing method of Fig. 10c applies systematic encoding, so that the receiver can directly obtain information bits from the codeword vector (x) without converting the codeword vector (x) into a data carrier vector (u). Therefore, decoding can be performed with less complexity compared to embodiments that apply non-systematic encoding.

[0188] FIG. 11 is a diagram for explaining a signal processing method to which systematic decoding is applied according to one embodiment.

[0189] The signal processing method of FIG. 11 shows an example of performing signal processing by applying a systematic decoding operation corresponding to the systematic encoding of FIG. 10b.

[0190] The operation 1120 represents the operation of calculating the LLR value for the signal vector y received at the receiver. The receiver calculates the LLR value for each element of the signal vector y and generates the LLR vector L y can be generated. The 1120 operation can correspond to the 720 operation of Fig. 7.

[0191] The 1130 operation represents an operation that performs a permutation on the LLR vector generated in the previous operation. The permutation operation may represent changing the order of values ​​contained in the vector. In addition, the permutation operation may be performed based on multiple permutation methods. For example, the receiver may receive an LLR vector L y The first permutation operation to the Mth permutation operation can be performed on the first permutated LLR vector ( ) to the M permuted LLR vector ( ) can be generated. Multiple permutation methods can have different permutation methods. The 1130 operation can correspond to the 730 operation of FIG. 7.

[0192] The 1140 operation performs the fourth decoding (e.g., systematic successive cancellation list decoding) based on the permutated LLR vector at the receiver, and the permutated codeword vector ( ) and outputs a score (M) generated based on a mathematical formula. The fourth decoding is SCL decoding, so it selects candidates corresponding to the list values.

[0193] In operation 1150, the receiver performs reverse permutation on the candidates selected in operation 1140, and produces a reverse permutated codeword vector ( ) represents the action of generating a function.

[0194] The 1160 operation is that the receiver receives as many depermutated codeword vectors as the number of candidates ( ) and performs a first validity test (e.g., CRC) on the candidates, and selects one of the candidates that passed the first validity test. At this time, the selection by the receiver can be performed based on the score corresponding to each candidate. For example, the receiver can select the candidate with the highest score.

[0195] The aforementioned operation 1160 may correspond to operations 950 to 960 of FIG. 9A. The aforementioned operation 1140 may be understood as applying systematic decoding to operation 940 of FIG. 9A.

[0196] The aforementioned operations 1140 to 1160 may be referred to as the first Systematic Polar Code (SPC) CA-SCL decoding.

[0197] The above-described operations 1140 and 1160 can be performed for each of a plurality of permutated LLR vectors according to a plurality of permutation methods. Accordingly, through operation 1160, the receiver can generate a plurality of inversely permutated codeword vectors corresponding to a plurality of permutated LLR vectors. ) can be obtained.

[0198] The 1170 operation is when the receiver receives the depermutated codeword vector selected in the 1160 operation ( ) represents an operation of performing a second validity test (CRC or Parity check) on the vectors. If all vectors fail the second validity test, the receiver may report a NACK message.

[0199] The 1180 operation is a reverse permutated codeword vector that the receiver passes the second validity test of the 1170 operation. ) and obtains an information vector (d). At this time, the selection of the receiver is the reverse permutated codeword vector ( ) can be performed based on the score corresponding to the vector. For example, the receiver can obtain the information bit by selecting the vector with the highest score.

[0200] The signal processing method of FIG. 11 applies systematic decoding, so that the receiver can obtain information bits directly from the codeword vector (x) without converting the codeword vector (x) into a data carrier vector (u). At the same time, decoding error correction and detection are possible and decoding accuracy can be improved by the first validity test performed during the decoding process and the second validity test performed after the decoding process without increasing complexity. In response to the performing of the first validity test and the second validity test at the receiver according to one embodiment of the present disclosure, the transmitter can perform the first CRC encoding process and the second CRC encoding process during the encoding process. The transmitter can apply additional bits for the validity test to the information bits during the encoding process. The first validity test at the receiver can be performed to select one codeword vector among L candidates during the sequential elimination list decoding process.

[0201] FIG. 12 is a diagram for explaining a signal processing method to which systematic decoding is applied according to one embodiment.

[0202] The signal processing method of FIG. 12 can be understood as an embodiment in which the order of the reverse permutation operation is changed in the signal processing method of FIG. 11.

[0203] The 1220 operation represents the operation of calculating the LLR value for the signal vector y received at the receiver. The receiver calculates the LLR value for each element of the signal vector y and generates the LLR vector L y can be generated. The 1220 operation can correspond to the 720 operation of Fig. 7.

[0204] The 1230 operation represents an operation that performs permutation on the LLR vector generated in the previous operation. The permutation operation may represent changing the order of values ​​contained in the vector. In addition, the permutation operation may be performed based on multiple permutation methods. For example, the receiver may receive an LLR vector L y The first permutation operation to the Mth permutation operation can be performed on the first permutated LLR vector ( ) to the M permuted LLR vector ( ) can be generated. Multiple permutation methods can have different permutation methods. The 1230 operation can correspond to the 730 operation of FIG. 7.

[0205] The 1240 operation performs the fourth decoding (e.g., systematic successive cancellation list decoding) based on the permutated LLR vector at the receiver, and the permutated codeword vector ( ) and outputs a score (M) generated based on a mathematical formula. The fourth decoding is SCL decoding, so it selects candidates corresponding to the list values. Each candidate is a permutated codeword vector ( ) and a set of scores (M) generated based on a mathematical formula.

[0206] The 1250 operation is that the receiver receives a permutated codeword vector ( ) and performs a first validity test (e.g., CRC) on the candidates, and selects one of the candidates that passed the first validity test. At this time, the selection by the receiver can be performed based on the score corresponding to each candidate. For example, the receiver can select the candidate with the highest score.

[0207] The aforementioned operation 1250 may correspond to operations 950 to 960 of FIG. 9A. The aforementioned operation 1240 may be understood as applying systematic decoding to operation 940 of FIG. 9A.

[0208] The aforementioned 1240 to 1250 operations may be referred to as the second Systematic Polar Code (SPC) CA-SCL decoding.

[0209] The above-described operations 1240 and 1250 can be performed for each of a plurality of permutated LLR vectors according to a plurality of permutation methods. Accordingly, through operation 1250, the receiver can generate a plurality of permutated codeword vectors corresponding to a plurality of permutated LLR vectors. ) can be obtained.

[0210] In operation 1260, the receiver performs reverse permutation on the candidates selected in operation 1250, and produces a reverse permutated codeword vector ( ) represents the action of generating a function.

[0211] The 1270 operation is that the receiver receives the de-permutated codeword vector ( ) represents an operation of performing a second validity test (CRC or Parity check) on the vectors. If all vectors fail the second validity test, the receiver may report a NACK message.

[0212] The 1280 operation is a reverse permutated codeword vector that the receiver passes the second validity test of the 1270 operation. ) and obtains an information vector (d). At this time, the selection of the receiver is the reverse permutated codeword vector ( ) can be performed based on the score corresponding to the vector. For example, the receiver can obtain the information bit by selecting the vector with the highest score.

[0213] The signal processing method of FIG. 12 can perform the first validity test without performing depermutation on all candidates generated during the SCL decoding process of the receiver. In contrast, in the case of FIG. 11, in operation 1150, the receiver depermutates L candidate vectors, and in operation 1160, selects one of the depermutated candidate vectors based on the first validity test. However, in the case of FIG. 12, in operation 1250, the receiver can perform the first validity test on candidate vectors that have not been depermutated, and select one of the candidate vectors that have not been depermutated. Therefore, in operation 1260, the receiver performs depermutation only on the selected candidate vector, thereby reducing the complexity of the operation.

[0214] In one embodiment, the receiver receives a permutated codeword vector ( ) can perform a first validity test without performing reverse permutation on the permuted codeword vector based on the information bit positions. This operation of the receiver can be expressed by mathematical expression 5 or mathematical expression 6.

[0215]

[0216] The left side of mathematical expression 5 is the reverse permutation ( ) and then perform validation by extracting the value corresponding to the first information bit index (I). ) can represent the action. The right side of mathematical expression 5 shows that the receiver immediately obtains the second information bit index ( ) can represent an operation of performing validation by extracting a value corresponding to the permutation method. That is, the receiving end may indicate an operation of performing validation by extracting a value corresponding to the permutation method. ) can be obtained in advance, and a first validity test can be performed on a codeword vector that has not been de-permutated. The receiver can obtain information bit indices indicating information bit positions of the permutated codeword vector in advance. The receiver can obtain information bit indices corresponding to multiple permutation methods in advance.

[0217] Meanwhile, in the case of mathematical expression 6, it is as follows.

[0218]

[0219] The left side of mathematical expression 6 is the reverse permutation of the permuted code word vector by the receiver. ) and then perform validation by extracting the value corresponding to the information bit index (I). ) can represent the action of performing the operation. The right side of mathematical expression 6 is that the receiver extracts the value corresponding to the information bit index (I) from the permutated code word vector and performs a validity check ( ) can represent an action to perform validation based on the method. That is, the receiving end can perform validation based on the method corresponding to the permutation method ( ) can be obtained in advance, and a first validity test can be performed on a codeword vector that has not been de-permutated. The receiver can obtain multiple validation methods corresponding to multiple permutation methods in advance.

[0220] The signal processing method of Fig. 12 applies systematic decoding, so that the receiver can obtain information bits directly from the codeword vector (x) without converting the codeword vector (x) into a data carrier vector (u). At the same time, by reducing the number of inverse permutation operations, the first validity test performed during the decoding process and the second validity test performed after the decoding process enable decoding error correction and detection, thereby improving decoding accuracy.

[0221] With respect to the signal processing method of FIGS. 4 to 12 described above, a permutation operation according to one embodiment of the present disclosure may have the following characteristics.

[0222] 1) Automorphism characteristics

[0223] The automorphism property means that when a permutation is applied to a first vector to generate a second vector, the second vector corresponds to one of all possible combinations of the first vector. For example, in an example vector of length 4, if the frozen bit indices are 0 and 1 and the information bit indices are 2 and 3, the possible combinations in the example vector are [0,0,0,0], [0,0,1,0], [0,0,0,1], and [0,0,1,1]. Therefore, when an example vector is permutated and corresponds to one of the four combinations described above, the permutation operation is valid, and this property can be referred to as automorphism.

[0224] That is, a permutation operation has an automorphism property if the permutated vector is one of all vectors that can be derived from the original vector by considering the information bit indices and the frozen bit indices.

[0225] 2) Characteristics expressed by affine transform

[0226] A permutated vector can be mathematically expressed as a linear combination of the original vector and the permutation matrix. For example, if vector A is permuted to produce vector B, it can be mathematically expressed as follows.

[0227] B = P*A or B = P*A + C

[0228] Here, P represents a permutation matrix and C represents an arbitrary vector.

[0229] That is, the permutation operation can be mathematically expressed as a linear combination of the permutation matrix and the original vector.

[0230] 3) Decoder-variant characteristics

[0231] A permutation operation according to one embodiment of the present disclosure has different characteristics between the result of decoding a signal vector y and the result of performing inverse permutation after decoding the signal vector y by permuting it.

[0232] 4) Multiple permutation methods have different characteristics.

[0233] In a signal processing method according to one embodiment of the present disclosure, a permutation operation may be performed based on a plurality of permutation methods. At this time, the plurality of permutation methods have different characteristics. Therefore, the result of a receiver performing a first permutation on an original vector, decoding it, and then performing a first inverse permutation is different from the result of a receiver performing a second permutation on the original vector, decoding it, and then performing a second inverse permutation. The inverse permutation operation can be understood as the reverse process corresponding to the permutation operation.

[0234] Fig. 13 is a diagram for explaining the characteristics of a permutation matrix according to one embodiment.

[0235] Referring to FIG. 13, mathematical characteristics of a matrix applied to a permutation operation or an inverse permutation operation of the signal processing method described in FIGS. 4 to 12 are described.

[0236] In the formula shown in Figure 13, u is a data carrier vector, x is a codeword vector, and G N is the polar code encoding matrix, represents the inverse permutation matrix, is a permutated codeword vector, represents a permutated data carrier vector.

[0237] As shown in Fig. 13, class If these are equal to each other, that is, if they are equal even when their order is changed, then the data carrier vector u is a permutated data carrier vector and the inverse permutation matrix It can be easily found by multiplying by .

[0238] Based on these characteristics, the signal processing methods described above in FIGS. 5 to 12 can be improved, as described below.

[0239] The 550 operation in Fig. 5 is that the receiver permutates the data carrier vector based on the score ( ) can be selected. And, operation 560 is the permutated data carrier vector selected by the receiver ( ) by the inverse permutation matrix to perform an inverse permutation operation, and obtain a data carrier vector u. Accordingly, the receiver can obtain information bits based on the obtained data carrier vector u. That is, the encoding process (operation 570) for obtaining the data carrier vector u can be omitted.

[0240] The 650 operation of Fig. 6 is that the receiver permutates the data carrier vector based on the score ( ) can be selected. And, the 660 operation is the permutated data carrier vector ( ) by the inverse permutation matrix to perform an inverse permutation operation, and obtain a data carrier vector u. Accordingly, the receiver can perform a validity test on the obtained data carrier vector u (operation 680) and obtain information bits. That is, the encoding process (operation 670) for obtaining the data carrier vector u in FIG. 6 can be omitted.

[0241] The 750 operation of Fig. 7 is that the receiver receives the permutated data carrier vector ( ) by the inverse permutation matrix to perform an inverse permutation operation, and obtain a data carrier vector u. Therefore, a validity test can be performed based on the obtained u without an encoding operation (760 operations).

[0242] The 850 operation of Fig. 8 is that the receiver permutates the data carrier vector based on the score ( ) can be selected. And, the 860 operation is the permutated data carrier vector ( ) by the inverse permutation matrix to perform an inverse permutation operation, and obtain a data carrier vector u. The receiving end can obtain information bits based on the obtained data carrier vector u. That is, the encoding process (operation 870) for obtaining the data carrier vector u can be omitted.

[0243] FIG. 14 is a diagram for explaining the characteristics of a Block-Lower Triangular matrix (hereinafter, BLT matrix) according to one embodiment.

[0244] Referring to Fig. 14, the BLT matrix is ​​illustrated.

[0245] A permutation operation (or inverse permutation operation) according to one embodiment of the present disclosure can be expressed as a product of a vector and a permutation matrix (or inverse permutation matrix), and the permutation matrix can be a BLT matrix. The BLT matrix illustrated in Fig. 14 has an nxn size and s in the diagonal direction of the matrix. i ×s i D of size i,i The matrices can be arranged. Each D arranged on the diagonal i,i The matrix is ​​s i ×s i is an invertible matrix. The BLT matrix is ​​an invertible matrix of each D i,i An array (or vector) s representing the size of the matrix <s1,s2,s3,…,s l > can be defined by . An array (or vector) s can be referred to as a profile, and the values ​​of the profile are satisfies D i,j (j <i) 행렬은 이진 팻 행렬(binary fat matrix)일 수 있다.

[0246] Additionally, in an encoding operation according to one embodiment of the present disclosure, the encoding matrix G may be a BLT matrix.

[0247] In one embodiment, the encoding matrix G and the inverse permutation matrix If is a BLT matrix, The result is, Based on the characteristics of the profile (e.g. s1, s2, s3, etc.), it derives a result of mixing values ​​within a specific index range in G. For example, The result may be a matrix in which the values ​​corresponding to the 1st to 4th columns in G are mixed together, and the values ​​corresponding to the 5th to 8th columns are mixed together. That is, based on the profile characteristics of the inverse permutation matrix, there is a characteristic that values ​​within a specific index range in the G matrix are mixed together, and this characteristic can be utilized to reduce the computational complexity. For example, the receiver can identify values ​​in the matrix that do not affect the computational result in advance and omit computations on those values ​​in subsequent computations.

[0248] In one embodiment, the receiver To reduce unnecessary operations during calculations Corresponding to You can create and use matrices in advance.

[0249] FIG. 15 is a diagram for explaining the characteristics of an encoding matrix according to one embodiment.

[0250] Referring to Fig. 15, the method described in Fig. 14 It shows the matrix. According to one embodiment The matrix is Matrices that occupy a portion of the matrix resulting from (e.g., ) can be composed of each The matrix is The size and location can be determined based on the features of the profile (e.g. s1, s2, s3, etc.).

[0251] In one embodiment, the receiver has pre-computed Matrix as a permutated data carrier vector The codeword vector is de-permutated by multiplying it with In a signal processing method according to one embodiment of the present disclosure, the receiver may generate a depermutated codeword vector At each step of creating By repeatedly using matrices, unnecessary operations can be reduced and the complexity of signal processing methods can be lowered.

[0252] The contents described in FIGS. 14 to 15 are the reverse permutated codeword vectors in the embodiments described in FIGS. 4 to 12. can be applied to the process of creating .

[0253] Fig. 16 is a diagram for explaining the characteristics of an Upper Triangular matrix (hereinafter, UTL matrix) according to one embodiment.

[0254] Referring to Figure 16, a UTL matrix is ​​illustrated.

[0255] A permutation operation (or inverse permutation operation) according to one embodiment of the present disclosure can be expressed as a product of a vector and a permutation matrix (or inverse permutation matrix), and the permutation matrix can be a UTL matrix.

[0256] The UTL matrix illustrated in Fig. 16 has a size of n × n, and 1 values ​​can be arranged in the diagonal direction of the matrix. In addition, rows corresponding to indices lower than the 1 values ​​arranged in the diagonal direction can contain x values ​​that can be 0 or 1. i (e.g. x1,x2,…,x M ) can be arranged as in Fig. 16. In the UTL matrix, 0 values ​​are located in rows corresponding to indices greater than 1 values ​​arranged diagonally. For example, in Fig. 16, the 1 value arranged diagonally in the third column of the UTL matrix is ​​located in the third row. Accordingly, x2 and x3 can be located in the first and second rows of the third column of the UTL matrix, and 0 can be located from the fourth row.

[0257] In the case where the permutation matrix according to one embodiment of the present disclosure is a UTL matrix and all x values ​​located in the first to Kth columns of the permutation matrix are 0, the first 2 of the vector multiplied with the permutation matrix kThe values ​​corresponding to the indices of the dog are not affected. Therefore, when the receiver performs a permutation operation on a specific vector, if the permutation matrix is ​​a UTL matrix, the values ​​corresponding to the first 2 of the vector are affected. k The values ​​corresponding to the indices of the dog can be calculated without calculating them, and only the remaining values ​​can be calculated to generate a permuted vector. In other words, the receiver can reduce the computational complexity during signal processing.

[0258] Fig. 17 is a drawing for explaining a signal processing method according to one embodiment.

[0259] A signal processing method according to one embodiment of the present disclosure may include the following operations.

[0260] Referring to FIG. 17, operation 1710 represents an operation in which a receiver receives a signal vector (y) including multiple information bits from a transmitter. Operation 1710 may correspond to operation 410 of FIG. 4 and operation 510 of FIG. 5.

[0261] The 1720 operation is that the receiver generates an LLR (Log likelihood ratio) vector (L) based on the signal vector (y). y ) represents an operation of generating a signal. The 1720 operation may correspond to the 520 operation of FIG. 5, the 620 operation of FIG. 6, the 720 operation of FIG. 7, the 820 operation of FIG. 8, the 920 operation of FIG. 9a, the 1120 operation of FIG. 11, and / or the 1220 operation of FIG. 12.

[0262] The 1730 operation is performed by the receiver to perform permutation on the LLR vector to generate multiple permutated LLR vectors ( ) represents an operation of generating them. The 1730 operation may correspond to the 530 operation of FIG. 5, the 630 operation of FIG. 6, the 730 operation of FIG. 7, the 830 operation of FIG. 8, the 930 operation of FIG. 9a, the 1130 operation of FIG. 11, and / or the 1230 operation of FIG. 12.

[0263] The 1740 operation is performed by the receiver to decode each of the multiple permutated LLR vectors, and the decoding is performed on the permutated codeword vector ( ), permutated data carrier vector ( ) and outputting a score (M) based on the first mathematical formula. The 1740 operation may correspond to the 540 operation of FIG. 5, the 640 operation of FIG. 6, the 740 operation of FIG. 7, the 840 operation of FIG. 8, and / or the 940 to 960 operations of FIG. 9a.

[0264] Operation 1750 represents an operation in which the receiver selects at least one vector based on a score calculated by the first mathematical expression. Here, the first mathematical expression may be based on [Mathematical Expression 2] to [Mathematical Expression 5] described in FIG. 5. Operation 1750 may correspond to operation 550 of FIG. 5, operation 650 of FIG. 6, operation 780 of FIG. 7, operation 850 of FIG. 8, operation 970 of FIG. 9a, operation 1180 of FIG. 11, and / or operation 1280 of FIG. 12. At this time, the selected vector may be a codeword vector or a data carrier vector corresponding to the score calculated by the first mathematical expression.

[0265] Operation 1760 represents an operation in which the receiver generates (or acquires) a plurality of information bits based on at least one vector selected in operation 1750. Operation 1760 may correspond to operations 560 to 570 of FIG. 5, operations 660 to 680 of FIG. 6, operations 780 of FIG. 7, operations 860 to 870 of FIG. 8, operations 1180 of FIG. 11, and / or operations 1280 of FIG. 12.

[0266] The operations of the signal processing method according to one embodiment of the present disclosure described in FIG. 17 may be operations performed by a transceiver and processor of a receiving end.

[0267] Fig. 18 is a drawing for explaining a signal processing method according to one embodiment.

[0268] A signal processing method according to one embodiment of the present disclosure may include the following operations. The operations described in FIG. 18 may be understood as operations subsequent to operation 1730 of FIG. 17. That is, operation 1810 of FIG. 18 may be understood as an operation performed subsequent to operations 1710 and 1720 of FIG. 17.

[0269] Referring to FIG. 18, operation 1810 may represent an operation in which a receiver performs systematic decoding (SCL) on each of a plurality of permutated LLR vectors, and the decoding outputs a score based on the permutated codeword vector and the first mathematical expression. Operation 1810 may correspond to operations 1240 to 1250 of FIG. 12.

[0270] Operation 1820 may represent an operation in which the receiver performs depermutation on a permutated codeword vector to generate a depermutated codeword vector. Operation 1820 may correspond to operation 1260 of FIG. 12.

[0271] Operation 1830 represents an operation in which the receiver performs a validity test on the depermutated codeword vector. Operation 1830 can correspond to operation 1270 of FIG. 12.

[0272] Operation 1840 represents an operation in which the receiver selects at least one vector among the vectors that pass the validity test based on the score calculated by the first mathematical expression. Operation 1840 may correspond to operation 180 of FIG. 7, operation 1180 of FIG. 11, and / or operation 1280 of FIG. 12.

[0273] Operation 1850 represents an operation in which the receiver generates multiple information bits based on the vector selected in operation 1840. Operation 1850 may correspond to operation 1760 of FIG. 17.

[0274] The operations of the signal processing method according to one embodiment of the present disclosure described in FIG. 18 may be operations performed by a transceiver and processor of a receiving end.

[0275] FIG. 19 is a drawing for explaining a signal processing method according to one embodiment.

[0276] A signal processing method according to one embodiment of the present disclosure may include the following operations.

[0277] The operations described in FIG. 19 can be understood as specific descriptions of operation 1760 of FIG. 17 or operation 1850 of FIG. 18.

[0278] Operation 1910 represents an operation in which the receiver selects one of the permutated data carrier vectors based on the scores produced by the previous operations. Operation 1910 may correspond to operation 550 of FIG. 5, operation 650 of FIG. 6, operation 850 of FIG. 8, and / or operation 970 of FIG. 9A.

[0279] Operation 1920 represents an operation in which the receiver multiplies the selected data carrier vector by an inverse permutation matrix to generate an inverse permutated carrier vector. Operation 1920 can be performed based on the characteristics of the inverse permutation matrix described in Fig. 13. If the product (P*G) of the inverse permutation matrix (P) and the encoding matrix (G) is equal to the product of the two in reversed orders (G*P), the receiver can obtain an inverse permutated data carrier vector by multiplying the selected data carrier vector by the inverse permutation matrix. Therefore, the receiver can omit the process of encoding the codeword vector.

[0280] Operation 1930 represents an operation in which the receiver performs a validity test on a depermutated data carrier vector. The receiver can obtain information bits using a data carrier vector that passes the validity test.

[0281] The operations of the signal processing method according to one embodiment of the present disclosure described in FIG. 19 may be operations performed by a transceiver and processor of a receiving end.

[0282] Fig. 20 is a drawing for explaining a signal processing method according to one embodiment.

[0283] A signal processing method according to one embodiment of the present disclosure may include the following operations.

[0284] The operations described in FIG. 20 can be understood as specific descriptions of operations 1740 to 1750 of FIG. 17.

[0285] The 2010 operation represents an operation in which the receiver multiplies the permutated carrier vector by the inverse permutation matrix to generate the inverse permutated carrier vector. The 2010 operation can be performed based on the characteristics of the inverse permutation matrix described in Fig. 13. If the product (P*G) of the inverse permutation matrix (P) and the encoding matrix (G) is the same as the product (G*P) obtained by reversing the order of the two, the receiver can obtain the inverse permutated data carrier vector by multiplying the permutated data carrier vector by the inverse permutation matrix. Therefore, the receiver can omit the process of encoding the codeword vector.

[0286] The 2020 operation represents an operation in which the receiver performs a validity test on a reverse-permutated carrier vector. The 2020 operation can correspond to the 770 operation of FIG. 7.

[0287] Operation 2030 represents an operation in which the receiver selects one of the vectors that passed the validity test based on the score calculated by the first mathematical formula. Operation 2030 may correspond to operation 780 of FIG. 7.

[0288] The operations of the signal processing method according to one embodiment of the present disclosure described in FIG. 20 may be operations performed by a transceiver and a processor of a receiving end.

[0289] According to the signal processing methods of FIGS. 4 to 20 described above, the complexity of the signal processing process at the receiver can be reduced, thereby reducing delay, and the accuracy of signal processing can be improved through error detection and correction functions. While the present disclosure has described each embodiment separately, the operations of each embodiment can be combined to form a new embodiment.

[0290] Meanwhile, this specification and drawings disclose preferred embodiments of the present invention. Although specific terms have been used, they are used in a general sense only to easily explain the technical content of the present invention and to aid in understanding the invention, and are not intended to limit the scope of the present invention. It will be apparent to those skilled in the art that other modifications based on the technical concept of the present invention are possible in addition to the embodiments disclosed herein.

[0291] The methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0292] When implemented in software, a computer-readable storage medium storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium are configured for execution by one or more processors within an electronic device. The one or more programs include instructions that cause the electronic device to execute methods according to embodiments described in the claims or specification of the present disclosure.

[0293] These programs (software modules, software) may be stored in a random access memory, a non-volatile memory including a flash memory, a read only memory (ROM), an electrically erasable programmable read only memory (EEPROM), a magnetic disc storage device, a compact disc ROM (CD-ROM), a digital versatile disc (DVD) or other forms of optical storage, a magnetic cassette, or a memory formed by a combination of some or all of these. In addition, each configuration memory may be included in multiple numbers.

[0294] Additionally, the program may be stored on an attachable storage device that is accessible via a communication network such as the Internet, an intranet, a local area network (LAN), a wide LAN (WLAN), or a storage area network (SAN), or a combination thereof. Such a storage device may be connected to a device performing an embodiment of the present disclosure via an external port. Additionally, a separate storage device on the communication network may be connected to a device performing an embodiment of the present disclosure.

[0295] In the specific embodiments of the present disclosure described above, components included in the disclosure are expressed in the singular or plural form, depending on the specific embodiment presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components. Components expressed in the plural form may be composed of singular elements, or components expressed in the singular form may be composed of plural elements.

[0296] Additionally, in the present disclosure, terms such as “part”, “module”, etc. may refer to a hardware component such as a processor or circuit, and / or a software component executed by a hardware component such as a processor.

[0297] A "component" or "module" may be implemented by a program stored in an addressable storage medium and executed by a processor. For example, a "component" or "module" may be implemented by components such as software components, object-oriented software components, class components, and task components, as well as processes, functions, attributes, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuitry, data, databases, data structures, tables, arrays, and variables.

[0298] The specific implementations described in this disclosure are merely exemplary and do not limit the scope of the present disclosure in any way. For the sake of brevity, descriptions of conventional electronic components, control systems, software, and other functional aspects of the systems may be omitted.

[0299] Additionally, in the present disclosure, “comprising at least one of a, b, or c” may mean “comprising only a, comprising only b, comprising only c, comprising both a and b, comprising both b and c, comprising both a and c, or comprising all of a, b, and c.”

[0300] While the detailed description of this disclosure has described specific embodiments, it should be understood that various modifications are possible without departing from the scope of this disclosure. Therefore, the scope of this disclosure should not be limited to the described embodiments, but should be defined not only by the scope of the claims described below, but also by equivalents thereof.

Claims

1. A method performed by a receiving node in a wireless communication system, An operation of receiving a signal vector containing a plurality of information bits from a transmitter; An operation of generating an LLR (Log Likelihood Ratio) vector based on the above signal vector; An operation of performing permutation on the above LLR vector to generate multiple permutated LLR vectors; An operation of performing decoding on each of the above multiple permutated LLR vectors, wherein the decoding is performed on a permutated codeword vector ( ) and permutated data carrier vector ( ) and generate a score based on the first mathematical expression; and An operation of selecting at least one vector based on the above scores; and An operation of obtaining the plurality of information bits based on at least one of the selected vectors, method.

2. In claim 1, The above plurality of permutated LLR vectors are expressed by a linear combination of the LLR vector and a permutation matrix corresponding to one of the above plurality of permutation methods. method.

3. In claim 1, The first mathematical expression above is, The above permutated codeword vector ( ) is based on the product of the vector modulated by the above permuted LLR vector and the value obtained by multiplying the same indices. method.

4. In claim 1, The above decoding generates a decision LLR vector based on the permutated LLR vector, The first mathematical expression above is, Based on the value corresponding to the frozen bit index or information bit index of the above decision LLR vector, method.

5. In claim 1, The above decoding includes successive cancellation-list (SCL) decoding, The above sequential removal list decoding performs a first validity test on candidate vectors corresponding to preset list values. method.

6. In claim 5, The above decoding is systematic decoding. The above method, The above permutated codeword vector ( ) and perform reverse permutation on the reverse permutated codeword vector ( ) the action of generating; and Further comprising an operation of performing a second validity test on the above-described reverse permutated codeword vector, The operation of selecting at least one of the above vectors is: Selecting one of the vectors that passed the second validity test above, method.

7. In claim 2, The above permutation matrix (P π ) corresponding to the inverse permutation matrix ( ) satisfies the following formula for the encoding matrix (G): method.

8. In claim 7, The operation of selecting at least one of the above vectors comprises a permutated data carrier vector ( ) Select one of them, The operation of generating the above multiple information bits is: The above selected data carrier vector ( ) in the inverse permutation matrix ( ) is multiplied by the inverse permutated carrier vector ( ) to create, method.

9. In claim 7, The above method, Permutated data carrier vector ( ) for the inverse permutation matrix ( ) is multiplied by the inverse permutated carrier vector ( ) and the action of generating it, The above reverse permutated carrier vector ( ) further includes an action to perform a validity test on the The operation of selecting at least one of the above vectors comprises selecting a vector that passes the above validity test. method.

10. In a wireless communication system, at the receiving node, transceiver; and A controller coupled with the above transceiver is included, The above controller: An operation of receiving a signal vector containing a plurality of information bits from a transmitter; An operation of generating an LLR (Log Likelihood Ratio) vector based on the above signal vector; An operation of performing permutation on the above LLR vector to generate multiple permutated LLR vectors; An operation of performing decoding on each of the above multiple permutated LLR vectors, wherein the decoding is performed on a permutated codeword vector ( ), permutated data carrier vector ( ) and generate a score based on the first mathematical formula; and An operation of selecting at least one vector based on the above scores; and configured to perform an operation of obtaining the plurality of information bits based on at least one of the selected vectors, Receiving end.

11. In claim 10, The above plurality of permutated LLR vectors are expressed by a linear combination of the LLR vector and a permutation matrix corresponding to one of the above plurality of permutation methods. Receiving end.

12. In claim 10, The first mathematical expression above is, The above permutated codeword vector ( ) is based on the product of the vector modulated by the above permuted LLR vector and the value obtained by multiplying the same indices. Receiving end.

13. In claim 10, The above decoding generates a decision LLR vector based on the permutated LLR vector, The first mathematical expression above is, Based on the value corresponding to the frozen bit index or information bit index of the above decision LLR vector, Receiving end.

14. In claim 10, The above decoding includes successive cancellation-list (SCL) decoding, The above sequential removal list decoding performs a first validity test on candidate vectors corresponding to preset list values. Receiving end.

15. In claim 14, The above decoding is systematic decoding. The above controller, The above permutated codeword vector ( ) and perform reverse permutation on the reverse permutated codeword vector ( ) the action of generating; and It is configured to further perform a second validity test operation on the above-described reverse permutated codeword vector, The operation of selecting at least one of the above vectors is: Selecting one of the vectors that passed the second validity test above, Receiving end.

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