Gain-adjustable linear low-noise amplifier
By introducing an output feedback module into the low-noise amplifier and connecting it with the bias circuit, the problem of insufficient linearity and matching of the low-noise amplifier in the prior art during gain adjustment is solved, and good performance under different gain gears is achieved.
Patent Information
- Application Number
- PCT/CN2024/126720
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-13
- Filing Date
- 2024-10-23
- Publication Date
- 2025-06-19
AI Technical Summary
The existing low-noise amplifiers have poor linearity and matching properties when adjusting the gain, especially in low-gain design. The linearity and matching properties of the output signal are insufficient, resulting in poor system performance.
The output feedback module is introduced into the low noise amplifier and connected to the output of the bias circuit module to improve the linearity and matching of the output signal. The design includes a signal input terminal, an input matching adjustment module, a power amplifier module, an output feedback module, an output matching adjustment module, a bias circuit module and a signal output terminal, and the gain and phase adjustment is achieved through inductance and capacitance adjustment circuits.
It achieves good power consumption, noise factor (NF) and linearity at different gain gears, meets the good performance of the receiver path and improves the overall performance of the low-noise amplifier.
Smart Images

Figure CN2024126720_19062025_PF_FP_ABST
Abstract
Description
Gain-adjustable linear low-noise amplifier Technical Field
[0001] The present invention relates to the field of radio frequency technology, and in particular to a linear low-noise amplifier with adjustable gain. Background Art
[0002] With the development of 5G mobile communication technology and the widespread adoption of 5G mobile phones both domestically and internationally, the demand for 5G signal quality is increasing year by year, posing significant challenges to 5G chip design. The module most impacting mobile communications is the RF front-end (RFF), which includes the low-noise amplifier (LNA), power amplifier (PA), filters, switches, and antennas. The PA is a crucial component. As the first-stage active component in the RF front-end system, the RF LNA typically requires a certain gain to amplify weak signals received from the antenna and provide sufficient noise suppression for downstream modules. It also requires very low noise itself to ensure system sensitivity. To ensure the system receives high-power signals from the antenna without distortion and without damaging downstream active components, the LNA requires variable gain and an extended dynamic range. Therefore, in addition to meeting system requirements for gain and noise, high linearity is essential for gain-adjustable LNAs.
[0003] The low-noise amplifier of the related art includes a signal input terminal, input matching, current bias circuit, amplifier, feedback circuit, output attenuation network, and signal output terminal. Traditional gain-adjustable low-noise amplifiers mainly adjust the various gain levels of the low-noise amplifier by output attenuation and adjusting the bias current. However, these two methods are limited in improving linearity. For the design method of output attenuation, the linearity of the gain levels designed by attenuation is often the same, which cannot meet the step-by-step IIP3 index of the communication system. The design method of adjusting current often has poor linearity and matching of the output signal due to the small output current when designing at low gain. In addition, the amplifier tube may enter the subthreshold region at low current, so a good linearity improvement method is necessary.
[0004] Summary of the Invention
[0005] The purpose of an embodiment of the present invention is to provide a linear low-noise amplifier with adjustable gain, in which an output feedback module is connected to the output of a bias circuit module through a second resistor to solve the problem that the bias current output of the existing low-noise amplifier is small, resulting in poor linearity and matching of the output signal.
[0006] In order to solve the above technical problems, an embodiment of the present invention provides a linear low-noise amplifier with adjustable gain, which includes a signal input end, an input matching adjustment module, a power amplification module, an output feedback module, an output matching adjustment module, a bias circuit module, and a signal output end. The signal input end, the input matching adjustment module, the power amplification module, the output matching adjustment module, and the signal output end are electrically connected in sequence; two ends of the output feedback module are respectively connected to the output end and the input end of the power amplification module; the bias circuit module is connected to the input end of the power amplification module to provide a bias current;
[0007] The bias circuit module includes a first MOS transistor, a second MOS transistor, a third MOS transistor, a first resistor, a second resistor, and a constant current source; an input end of the constant current source is connected to a power supply voltage, and an output end of the constant current source is connected to a drain of the first MOS transistor; the drain of the first MOS transistor is connected to a gate of the third MOS transistor, the drain of the third MOS transistor is connected to the power supply voltage, the gate of the first MOS transistor is connected to the power amplifier module, the source of the first MOS transistor is connected to the drain of the second MOS transistor, the source of the second MOS transistor is grounded, the source of the second MOS transistor is respectively connected to the source of the third MOS transistor and the first end of the first resistor, and the second end of the first resistor is grounded; the first end of the second resistor is connected to the source of the second MOS transistor, and the second end of the second resistor is connected to the output feedback module;
[0008] The output feedback module includes a feedback circuit and a third resistor, the first end of the feedback circuit is connected to the output end of the power amplification module, the second end of the feedback circuit is respectively connected to the second end of the second resistor and the first end of the third resistor, and the second end of the third resistor is connected to the input end of the power amplification module.
[0009] Preferably, the feedback circuit includes: a first capacitor, a second capacitor, a first switch, and a second switch; the first end of the first capacitor and the first end of the second capacitor are connected and jointly serve as the second end of the feedback circuit, the second end of the first capacitor is connected to the output end of the first switch, the second end of the second capacitor is connected to the output end of the second switch, and the control end of the first switch and the control end of the second switch are connected and jointly serve as the first end of the feedback circuit.
[0010] Preferably, the input matching adjustment module includes: a third capacitor, an inductance adjustment circuit and a capacitance adjustment circuit; the first end of the third capacitor is connected to the signal input end, the second end of the third capacitor is connected to the second end of the third resistor, the first end of the inductance adjustment circuit is grounded, the second end of the inductance adjustment circuit is respectively connected to the first end of the capacitance adjustment circuit and the power amplification module, and the second end of the capacitance adjustment circuit is connected to the second end of the third capacitor.
[0011] Preferably, the inductance adjustment circuit includes: a third switch, a fourth switch, a fifth switch, a first inductor and a second inductor;
[0012] The first end of the first inductor and the control end of the fourth switch jointly serve as the second end of the inductance adjustment circuit. The second end of the first inductor is respectively connected to the control end of the third switch and the output end of the fifth switch. The control end of the fifth switch is respectively connected to the output end of the fourth switch and the first end of the second inductor. The second end of the second inductor and the output end of the third switch jointly serve as the first end of the inductance adjustment circuit.
[0013] Preferably, the capacitance adjustment circuit includes: a sixth switch, a seventh switch, a fourth capacitor, a fifth capacitor and a sixth capacitor;
[0014] The first end of the fourth capacitor, the first end of the fifth capacitor, and the first end of the sixth capacitor collectively serve as the first end of the capacitance adjustment circuit; the second end of the fifth capacitor is connected to the output end of the sixth switch; the second end of the sixth capacitor is connected to the output end of the seventh switch; the second end of the fourth capacitor, the control end of the sixth switch, and the control end of the seventh switch collectively serve as the second end of the capacitance adjustment circuit.
[0015] Preferably, the power amplification module includes: a fourth MOS transistor, a fifth MOS transistor, a seventh capacitor, and a fourth resistor; the gate of the fourth MOS transistor, serving as the input end of the power amplification module, is respectively connected to the second end of the third resistor, the second end of the third capacitor, and the second end of the capacitance adjustment circuit; the source of the fourth MOS transistor is connected to the second end of the inductance adjustment circuit; the drain of the fourth MOS transistor is connected to the source of the fifth MOS transistor; the gate of the fifth MOS transistor is respectively connected to the first end of the seventh capacitor and the first end of the fourth resistor; the second end of the seventh capacitor is grounded; the second end of the fourth resistor is connected to the gate of the first MOS transistor; and the drain of the fifth MOS transistor, serving as the output end of the power amplification module, is connected to the input end of the output matching adjustment module.
[0016] Preferably, the output matching adjustment module includes: a third inductor, a resistance adjustment circuit, an output matching circuit and an attenuation network;
[0017] The first end of the third inductor and the first end of the resistance adjustment circuit are commonly connected to the power supply voltage, the second end of the third inductor is respectively connected to the output end of the power amplification module, the second end of the resistance adjustment circuit and the input end of the output matching circuit, the output end of the output matching circuit is connected to the input end of the attenuation network, and the output end of the attenuation network is connected to the signal output end.
[0018] Preferably, the resistance adjustment circuit includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth switch and a ninth switch;
[0019] The first end of the fifth resistor, the first end of the sixth resistor, and the first end of the seventh resistor collectively serve as the first end of the resistance adjustment circuit, the second end of the sixth resistor is connected to the output end of the eighth switch, the second end of the seventh resistor is connected to the output end of the ninth switch, and the second end of the fifth resistor, the control end of the eighth switch, and the control end of the ninth switch collectively serve as the second end of the resistance adjustment circuit.
[0020] Preferably, the output matching circuit includes: a tenth switch, an eleventh switch, a twelfth switch, a thirteenth switch, a fourteenth switch, a fifteenth switch, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, and a fourteenth capacitor;
[0021] The eighth capacitor, the eleventh capacitor, and the twelfth capacitor are connected in parallel, the output end of the twelfth switch and the output end of the thirteenth switch are connected in series with the eleventh capacitor and the twelfth capacitor, respectively, and the control end of the twelfth switch and the control end of the thirteenth switch are connected together and serve as the input end of the output matching circuit;
[0022] The first end of the ninth capacitor and the first end of the tenth capacitor are connected to the ground, the output end of the tenth switch and the output end of the eleventh switch are connected to the second end of the ninth capacitor and the second end of the tenth capacitor, respectively, and the control end of the tenth switch and the control end of the eleventh switch are connected and then connected to the control end of the twelfth switch;
[0023] The first end of the thirteenth capacitor and the first end of the fourteenth capacitor are connected to the ground, the output end of the fourteenth switch and the output end of the fifteenth switch are connected to the second end of the thirteenth capacitor and the second end of the fourteenth capacitor respectively, the control end of the fourteenth switch is connected to the control end of the fifteenth switch, and the control end of the fifteenth switch is connected to the input end of the attenuation network.
[0024] Preferably, the attenuation network is a Type II attenuation network.
[0025] Compared with the prior art, the gain-adjustable linear low-noise amplifier of the present invention is electrically connected in sequence through a signal input end, an input matching adjustment module, a power amplification module, an output matching adjustment module, and a signal output end; two ends of the output feedback module are respectively connected to the output end and the input end of the power amplification module, and the bias circuit module is connected to the input end of the power amplification module to provide a bias current; the input end of the constant current source is connected to the power supply voltage, and the output end of the constant current source is connected to the drain of the first MOS transistor; the drain of the first MOS transistor is connected to the gate of the third MOS transistor, the drain of the third MOS transistor is connected to the power supply voltage, the gate of the first MOS transistor is connected to the power amplification module, the source of the first MOS transistor is connected to the drain of the second MOS transistor, the source of the second MOS transistor is grounded, the source of the second MOS transistor is respectively connected to the source of the third MOS transistor and the first end of the first resistor, and the second end of the first resistor is grounded; the first end of the second resistor is connected to the source of the second MOS transistor, and the second end of the second resistor is connected to the output feedback module. The inductor adjustment circuit is used to adjust the input and output matching, gain, and phase of the low-noise amplifier at different gain levels. The capacitor adjustment circuit is used to feed back the AC signal to the input voltage of the power amplifier module, thereby adjusting the bias point of the power amplifier module under large signal conditions and thus adjusting the linearity. This allows for adjustable gain and achieves good power consumption, NF, and linearity at different gain levels, ensuring excellent performance in the receiver path. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:
[0027] FIG1 is a schematic diagram of the overall structure of a linear low-noise amplifier with adjustable gain provided in an embodiment of the present invention;
[0028] FIG2 is a schematic diagram of voltage and current changes of an output feedback module provided by an embodiment of the present invention;
[0029] FIG3 is an overall circuit diagram of a linear low-noise amplifier with adjustable gain provided in an embodiment of the present invention;
[0030] FIG4 is a partial enlarged view of FIG3 ;
[0031] FIG5 is a second partial enlarged view of FIG3 ;
[0032] FIG6 is a circuit diagram of another resistance adjustment circuit provided in an embodiment of the present invention.
[0033] In the figure, 100, a linear low-noise amplifier with adjustable gain, 1, a signal input terminal, 2, an input matching adjustment module, 21, an inductance adjustment circuit, 22, a capacitance adjustment circuit, 3, a power amplification module, 4, an output feedback module, 41, a feedback circuit, 5, an output matching adjustment module, 51, a resistance adjustment circuit, 52, an output matching circuit, 53, an attenuation network, 6, a bias circuit module, and 7, a signal output terminal. DETAILED DESCRIPTION
[0034] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.
[0035] Referring to Figures 1-6 , an embodiment of the present invention provides a linear low-noise amplifier 100 with adjustable gain. The linear low-noise amplifier 100 includes a signal input terminal 1, an input matching adjustment module 2, a power amplification module 3, an output feedback module 4, an output matching adjustment module 5, a bias circuit module 6, and a signal output terminal 7. The signal input terminal 1, the input matching adjustment module 2, the power amplification module 3, the output feedback module 4, the output matching adjustment module 5, and the signal output terminal are electrically connected in sequence. The output feedback module 4 has two terminals connected to the output terminal and the input terminal of the power amplification module 3, respectively. The bias circuit module 6 is connected to the input terminal of the power amplification module 3 to provide a bias current. The bias circuit module 6 is connected to the output matching adjustment module 5 and is also connected to a power supply voltage VDD. A radio frequency signal is output through the signal input terminal 1 to the input matching adjustment module 2, where it is adjusted and output to the power amplification module 3 for amplification. The amplified radio frequency signal is then output to the signal output terminal 7 through the output matching adjustment module 5. The bias circuit module 6 is connected to the power supply voltage VDD and performs bias processing to output to the power amplifier module 3, and is used to pass an adjustable reference current to the power amplifier module 3. The output feedback module 4 is used to generate AC feedback to change the output voltage of the bias circuit module 6.
[0036] The bias circuit module 6 includes a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3, a first resistor R1, a second resistor R2, and a constant current source Iref. The input end of the constant current source Iref is connected to the power supply voltage VDD, and the output end of the constant current source Iref is connected to the drain of the first MOS transistor M1. The drain of the first MOS transistor M1 is connected to the gate of the third MOS transistor M3, and the drain of the third MOS transistor M3 is connected to the power supply voltage VDD. The gate of the first MOS transistor M1 is connected to the power amplifier module 3. The source of the first MOS transistor M1 is connected to the drain of the second MOS transistor M2. The source of the second MOS transistor M2 is grounded. The source of the second MOS transistor M2 is connected to the source of the third MOS transistor M3 and the first end of the first resistor R1, respectively. The second end of the first resistor R1 is grounded. The first end of the second resistor R2 is connected to the source of the second MOS transistor M2, and the second end of the second resistor R2 is connected to the output feedback module 4. The mirror transistor formed by the first MOS transistor M1 and the second MOS transistor M2 is used to generate a reference current for the power amplifier module 3. The third MOS transistor M3 is a buffer transistor, which is used to generate a fixed threshold voltage to raise the V1 potential of the gate of the first MOS transistor M1. The drain of the second MOS transistor M2 is connected to the gate of the third MOS transistor M3. The gate voltage of the second MOS transistor M2 is V2. V1 and V2 are output to the power amplifier module 3 to provide an adjustable reference current for the power amplifier module 3.
[0037] The output feedback module 4 includes a feedback circuit 41 and a third resistor R3. The first end of the feedback circuit 41 is connected to the output end of the power amplifier module 3, the second end of the feedback circuit 41 is respectively connected to the second end of the second resistor R2 and the first end of the third resistor R3, and the second end of the third resistor R3 is connected to the input end of the power amplifier module 3. The feedback circuit 41 can generate an AC feedback to V2 under large signals, which is used to change the DC band voltage point, thereby improving the linearity of the low-noise amplifier. By connecting the feedback circuit 41 to the V2 point of the input matching adjustment module 2 and the bias circuit module 6 respectively, the presence of the third resistor R3 ensures that negative feedback will not cause the Miller effect to affect the input matching.
[0038] Specifically, the inductance adjustment circuit 21 is used to adjust the input matching, output matching, gain, and phase of the low-noise amplifier at different gain levels; the capacitance adjustment circuit 22 is used to feed back the AC signal, which is fed back to the input voltage of the power amplifier module 3, so that the bias point of the power amplifier module 3 is adjusted under large signal conditions, thereby adjusting the linearity. At the same time, the gain can be adjusted, and good power consumption, NF, and linearity can be achieved at different gain levels, meeting the good performance of the receiver path. In the design of the bias circuit module 6, input matching adjustment module 2, output matching adjustment module 5, and output feedback module 4 of the low-noise amplifier, a variety of independently adjustable circuits with multiple parameters can be set. Flexible gain control and current control can be achieved by adjusting the switches of each module separately, and the linearity index and noise requirements under the corresponding gain are guaranteed, which helps the low-noise amplifier meet different index requirements in the application environment under different antenna receiving powers.
[0039] In addition, the gate voltage V2 is adjusted through negative feedback, which is equivalent to changing the working type of the amplifier tube, increasing the conduction angle and improving the linearity. It can also be considered that the VGS voltage of the amplifier tube is changed through feedback adjustment to reach a point where gm3 is minimum, thereby achieving good linearity.
[0040] In this embodiment, the feedback circuit 41 includes: a first capacitor C1, a second capacitor C2, a first switch S1, and a second switch S2. The first end of the first capacitor C1 and the first end of the second capacitor C2 are connected and collectively serve as the second end of the feedback circuit 41. The second end of the first capacitor C1 is connected to the output end of the first switch S1, and the second end of the second capacitor C2 is connected to the output end of the second switch S2. The control end of the first switch S1 and the control end of the second switch S2 are connected and collectively serve as the first end of the feedback circuit 41. The first switch S1 and the second switch S2 respectively control the on-off of the first capacitor C1 and the second capacitor C2, thereby generating different feedback adjustments and achieving good linearity. The feedback circuit 41 primarily implements capacitive feedback through the first capacitor C1 and the second capacitor C2. When large signals are applied, the DC point of the bias voltage is perturbed, increasing the conduction angle of the amplifier to achieve high linearity. Different capacitor values can be added for different gain levels to achieve improved linearity.
[0041] In this embodiment, the input matching adjustment module 2 includes: a third capacitor C3, an inductance adjustment circuit 21 and a capacitance adjustment circuit 22; the first end of the third capacitor C3 is connected to the signal input terminal 1, the second end of the third capacitor C3 is connected to the second end of the third resistor R3, the first end of the inductance adjustment circuit 21 is grounded, the second end of the inductance adjustment circuit 21 is respectively connected to the first end of the capacitance adjustment circuit 22 and the power amplifier module 3, and the second end of the capacitance adjustment circuit 22 is connected to the second end of the third capacitor C3. The RF signal is input to the third capacitor C3 through the signal input terminal 1 to implement input matching processing. The input matching adjustment module 2 can perform input matching and gain adjustment at different gain levels, so that the designed low noise amplifier has better input impedance, linearity and noise figure. In addition, the capacitance adjustment circuit 22 and the inductance adjustment circuit 21 in the module can also fine-tune the gain phase at different gain levels to ensure phase continuity.
[0042] In this embodiment, the inductance adjustment circuit 21 includes: a third switch S3, a fourth switch S4, a fifth switch S5, a first inductor L1, and a second inductor L2. The first end of the first inductor L1 and the control end of the fourth switch S4 jointly serve as the second end of the inductance adjustment circuit 21. The second end of the first inductor L1 is respectively connected to the control end of the third switch S3 and the output end of the fifth switch S5. The control end of the fifth switch S5 is respectively connected to the output end of the fourth switch S4 and the first end of the second inductor L2. The second end of the second inductor L2 and the output end of the third switch S3 jointly serve as the first end of the inductance adjustment circuit 21.
[0043] Specifically, when the linear low-noise amplifier 100 is operating, either the third switch S3 or the fourth switch S4 is closed to ensure a ground path. During gain switching, the third switch S3, the fourth switch S4, and the fifth switch S5 can be configured in three different combinations. By designing different inductance values, different gain levels can be adjusted. At low gain, only the fifth switch S5 closed significantly improves linearity.
[0044] In this embodiment, the capacitance adjustment circuit 22 includes: a sixth switch S6, a seventh switch S7, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6; the first end of the fourth capacitor C4, the first end of the fifth capacitor C5, and the first end of the sixth capacitor C6 collectively serve as the first end of the capacitance adjustment circuit 22; the second end of the fourth capacitor C4 and the second end of the fifth capacitor C5 are connected to the output end of the sixth switch S6; the second end of the sixth capacitor C6 is connected to the output end of the seventh switch S7; the second end of the fourth capacitor C4, the control end of the sixth switch S6, and the control end of the seventh switch S7 collectively serve as the second end of the capacitance adjustment circuit 22. By adjusting the on / off state of the sixth switch S6 and the seventh switch S7, the capacitance of the parallel capacitor is increased, input matching can be adjusted under different gain levels, and linearity can also be optimized.
[0045] Preferably, the capacitance adjustment circuit 22 includes not only the three capacitors mentioned above, but also multiple capacitors connected in parallel, which produce the same function and are not described here.
[0046] In this embodiment, the power amplifier module 3 includes: a fourth MOS transistor, a fifth MOS transistor, a seventh capacitor C7, and a fourth resistor R4. The gate of the fourth MOS transistor, serving as the input of the power amplifier module 3, is connected to the second end of the third resistor R3, the second end of the third capacitor C3, and the second end of the capacitance adjustment circuit 22. The source of the fourth MOS transistor is connected to the second end of the inductance adjustment circuit 21. The drain of the fourth MOS transistor is connected to the source of the fifth MOS transistor. The gate of the fifth MOS transistor is connected to the first end of the seventh capacitor C7 and the first end of the fourth resistor R4. The second end of the seventh capacitor C7 is grounded. The second end of the fourth resistor R4 is connected to the gate of the first MOS transistor M1. The drain of the fifth MOS transistor, serving as the output of the power amplifier module 3, is connected to the input of the output matching adjustment module 5. By combining the fourth and fifth MOS transistors to form the core circuit of the LNA, a cascode structure is formed, and the transistor sizes can be rationally adjusted to design different gain levels.
[0047] In this embodiment, the output matching adjustment module 5 includes: a third inductor L3, a resistance adjustment circuit 51, an output matching circuit 52, and an attenuation network 53. The first end of the third inductor L3 and the first end of the resistance adjustment circuit 51 are commonly connected to the power supply voltage VDD. The second end of the third inductor L3 is respectively connected to the output of the power amplifier module 3, the output feedback module 4, the second end of the resistance adjustment circuit 51, and the input of the output matching circuit 52. The output of the output matching circuit 52 is connected to the input of the attenuation network 53, and the output of the attenuation network 53 is connected to the signal output terminal 7. The output matching adjustment module 5 can provide a reasonable output impedance for the designed linear low-noise amplifier 100 at different gain levels. The attenuation network 53 is designed to provide different output attenuation at different gain levels without significantly affecting the input noise. In addition to adjusting the gain attenuation, the resistance adjustment current also provides a suitable load point for the output to ensure good linearity.
[0048] In this embodiment, the resistance adjustment circuit 51 includes a fifth resistor R5 , a sixth resistor R6 , a seventh resistor R7 , an eighth switch S8 , and a ninth switch S9 .
[0049] The first end of the fifth resistor R5, the first end of the sixth resistor R6, and the first end of the seventh resistor R7 collectively serve as the first end of the resistance adjustment circuit 51. The second end of the sixth resistor R6 is connected to the output end of the eighth switch S8, and the second end of the seventh resistor R7 is connected to the output end of the ninth switch S9. The second end of the fifth resistor R5, the control end of the eighth switch S8, and the control end of the ninth switch S9 collectively serve as the second end of the resistance adjustment circuit 51. When the eighth switch S8 and the ninth switch S9 of the resistance adjustment circuit 51 are not turned on, at least the branch of the fifth resistor R5 exists, providing a reasonable maximum initial gain value. When adjusting the low gain range, the value of the parallel resistance is changed by the eighth switch S8 and the ninth switch S9. When the eighth switch S8 and the ninth switch S9 are turned on, the resistance of the entire resistance adjustment circuit 51 decreases. Optionally, the parallel resistance is not limited to the sixth resistor R6 and the seventh resistor R7, but can also include multiple parallel resistors, which produce the same function and are not described here.
[0050] In an optional embodiment of the present invention, the resistance adjustment circuit 51 includes: a resistor R24, a resistor R25, a resistor R26, a switch S23, a switch S24, and a switch S25; resistors R25 and R26 are connected in series and then in parallel with resistor R24; switch S23 is connected in series with resistor R25; switch S24 is connected in parallel with resistor R25; and switch S25 is connected in parallel with resistor R26. When switches S24 and S25 are turned on and off, the impact on the overall resistance is much smaller than the resistance of the sixth resistor R6 and the seventh resistor R7 connected in parallel. The two circuit branches here are not limited to those shown in Figure 6; more branches can be used to provide more design solutions.
[0051] In this embodiment, the output matching circuit 52 includes: a tenth switch S10, an eleventh switch S11, a twelfth switch S12, a thirteenth switch S13, a fourteenth switch S14, a fifteenth switch S15, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, and a fourteenth capacitor C14;
[0052] The eighth capacitor C8, the eleventh capacitor C11, and the twelfth capacitor C12 are connected in parallel. The output end of the twelfth switch S12 and the output end of the thirteenth switch S13 are connected in series with the eleventh capacitor C11 and the twelfth capacitor C12, respectively. The control end of the twelfth switch S12 and the control end of the thirteenth switch S13 are connected together and serve as the input end of the output matching circuit 52.
[0053] a first end of the ninth capacitor C9 and a first end of the tenth capacitor C10 are connected to the ground; an output end of the tenth switch S10 and an output end of the eleventh switch S11 are connected to the second end of the ninth capacitor C9 and the second end of the tenth capacitor C10, respectively; a control end of the tenth switch S10 and a control end of the eleventh switch S11 are connected and then connected to the control end of the twelfth switch S12;
[0054] The first end of the thirteenth capacitor C13 and the first end of the fourteenth capacitor C14 are connected to ground. The output end of the fourteenth switch S14 and the output end of the fifteenth switch S15 are connected to the second end of the thirteenth capacitor C13 and the second end of the fourteenth capacitor C14, respectively. The control end of the fourteenth switch S14 is connected to the control end of the fifteenth switch S15, and the control end of the fifteenth switch S15 is connected to the input end of the attenuation network 53. When all switches are closed, at least the eighth capacitor C8 remains in place to act as a DC blocking capacitor for output matching. By adjusting the on and off states of each switch, the optimal output matching point for each gain level can be effectively adjusted.
[0055] In this embodiment, the attenuation network 53 is a Type II attenuation network 53. Type II networks are often used for gain matching in RF and IF circuit designs. By skillfully applying the attenuation network 53, circuit gain can be adjusted, improving LNA circuit standing waves, and more.
[0056] In this embodiment, the aforementioned modules are replaced with actual circuit structures in the specific implementation circuit. By controlling the on and off of each switch, the noise figure, input-output matching, linearity, and phase requirements under different gain requirements are achieved. Each switch can be used independently, which increases design flexibility.
[0057] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.
[0058] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A gain-adjustable linear low-noise amplifier, comprising a signal input terminal, an input matching adjustment module, a power amplification module, an output feedback module, an output matching adjustment module, a bias circuit module and a signal output terminal, wherein the signal input terminal, the input matching adjustment module, the power amplification module, the output matching adjustment module and the signal output terminal are electrically connected in sequence; two ends of the output feedback module are respectively connected to the output terminal of the power amplification module and the input terminal of the power amplification module, and the bias circuit module is connected to the input terminal of the power amplification module to provide a bias current; characterized in that: The bias circuit module includes a first MOS tube, a second MOS tube, a third MOS tube, a first resistor, a second resistor and a constant current source; the input end of the constant current source is connected to the power supply voltage, and the output end of the constant current source is connected to the drain of the first MOS tube; The drain of the first MOS tube is connected to the gate of the third MOS tube, the drain of the third MOS tube is connected to the power supply voltage, the gate of the first MOS tube is connected to the power amplifier module, the source of the first MOS tube is connected to the drain of the second MOS tube, the source of the second MOS tube is grounded, the source of the second MOS tube is respectively connected to the source of the third MOS tube and the first end of the first resistor, and the second end of the first resistor is grounded; the first end of the second resistor is connected to the source of the second MOS tube, and the second end of the second resistor is connected to the output feedback module; The output feedback module includes a feedback circuit and a third resistor, the first end of the feedback circuit is connected to the output end of the power amplifier module, the second end of the feedback circuit is respectively connected to the second end of the second resistor and the first end of the third resistor, and the second end of the third resistor is connected to the input end of the power amplifier module.
2. The gain-adjustable linear low-noise amplifier according to claim 1, characterized in that: The feedback circuit includes: a first capacitor, a second capacitor, a first switch and a second switch; the first end of the first capacitor and the first end of the second capacitor are connected and serve together as the second end of the feedback circuit, the second end of the first capacitor is connected to the output end of the first switch, the second end of the second capacitor is connected to the output end of the second switch, and the control end of the first switch and the control end of the second switch are connected and serve together as the first end of the feedback circuit.
3. The gain-adjustable linear low-noise amplifier according to claim 1, characterized in that: The input matching adjustment module includes: a third capacitor, an inductance adjustment circuit and a capacitance adjustment circuit; the first end of the third capacitor is connected to the signal input end, the second end of the third capacitor is connected to the second end of the third resistor, the first end of the inductance adjustment circuit is grounded, the second end of the inductance adjustment circuit is respectively connected to the first end of the capacitance adjustment circuit and the power amplification module, and the second end of the capacitance adjustment circuit is connected to the second end of the third capacitor.
4. The gain-adjustable linear low-noise amplifier according to claim 3, characterized in that: The inductance adjustment circuit includes: a third switch, a fourth switch, a fifth switch, a first inductor and a second inductor; The first end of the first inductor and the control end of the fourth switch together serve as the second end of the inductance adjustment circuit, the second end of the first inductor is respectively connected to the control end of the third switch and the output end of the fifth switch, the control end of the fifth switch is respectively connected to the output end of the fourth switch and the first end of the second inductor, and the second end of the second inductor and the output end of the third switch together serve as the first end of the inductance adjustment circuit.
5. The gain-adjustable linear low-noise amplifier according to claim 3, characterized in that: The capacitance adjustment circuit includes: a sixth switch, a seventh switch, a fourth capacitor, a fifth capacitor and a sixth capacitor; The first end of the fourth capacitor, the first end of the fifth capacitor and the first end of the sixth capacitor collectively serve as the first end of the capacitor adjustment circuit, the second end of the fifth capacitor is connected to the output end of the sixth switch, the second end of the sixth capacitor is connected to the output end of the seventh switch, and the second end of the fourth capacitor, the control end of the sixth switch and the control end of the seventh switch collectively serve as the second end of the capacitor adjustment circuit.
6. The gain-adjustable linear low-noise amplifier according to claim 3, characterized in that: The power amplifier module includes: a fourth MOS tube, a fifth MOS tube, a seventh capacitor and a fourth resistor; the gate of the fourth MOS tube is connected to the second end of the third resistor, the second end of the third capacitor and the second end of the capacitor adjustment circuit as the input end of the power amplifier module, the source of the fourth MOS tube is connected to the second end of the inductance adjustment circuit, the drain of the fourth MOS tube is connected to the source of the fifth MOS tube, the gate of the fifth MOS tube is connected to the first end of the seventh capacitor and the first end of the fourth resistor, the second end of the seventh capacitor is grounded, the second end of the fourth resistor is connected to the gate of the first MOS tube, and the drain of the fifth MOS tube is connected to the input end of the output matching adjustment module as the output end of the power amplifier module.
7. The gain-adjustable linear low-noise amplifier according to claim 1, characterized in that: The output matching adjustment module includes: a third inductor, a resistance adjustment circuit, an output matching circuit and an attenuation network; The first end of the third inductor and the first end of the resistance adjustment circuit are commonly connected to the power supply voltage, the second end of the third inductor is respectively connected to the output end of the power amplifier module, the second end of the resistance adjustment circuit and the input end of the output matching circuit, the output end of the output matching circuit is connected to the input end of the attenuation network, and the output end of the attenuation network is connected to the signal output end.
8. The gain-adjustable linear low-noise amplifier according to claim 7, characterized in that: The resistance adjustment circuit includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth switch and a ninth switch; The first end of the fifth resistor, the first end of the sixth resistor and the first end of the seventh resistor collectively serve as the first end of the resistance adjustment circuit, the second end of the sixth resistor is connected to the output end of the eighth switch, the second end of the seventh resistor is connected to the output end of the ninth switch, and the second end of the fifth resistor, the control end of the eighth switch and the control end of the ninth switch collectively serve as the second end of the resistance adjustment circuit.
9. The gain-adjustable linear low-noise amplifier according to claim 7, characterized in that: The output matching circuit includes: a tenth switch, an eleventh switch, a twelfth switch, a thirteenth switch, a fourteenth switch, a fifteenth switch, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor and a fourteenth capacitor; The eighth capacitor, the eleventh capacitor and the twelfth capacitor are connected in parallel with each other, the output end of the twelfth switch and the output end of the thirteenth switch are respectively connected in series with the eleventh capacitor and the twelfth capacitor, and the control end of the twelfth switch and the control end of the thirteenth switch are connected together and serve as the input end of the output matching circuit; The first end of the ninth capacitor and the first end of the tenth capacitor are connected and grounded, the output end of the tenth switch and the output end of the eleventh switch are connected to the second end of the ninth capacitor and the second end of the tenth capacitor respectively, and the control end of the tenth switch and the control end of the eleventh switch are connected and then connected to the control end of the twelfth switch; The first end of the thirteenth capacitor and the first end of the fourteenth capacitor are connected to the ground, the output end of the fourteenth switch and the output end of the fifteenth switch are connected to the second end of the thirteenth capacitor and the second end of the fourteenth capacitor respectively, and the control end of the fourteenth switch and the control end of the fifteenth switch are connected to the ground. The control end of the fifteenth switch is connected to the input end of the attenuation network.
10. The gain-adjustable linear low-noise amplifier according to claim 7, characterized in that: The attenuation network is a type II attenuation network.
Citation Information
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