Communication method and communication apparatus based on low-density parity check code

Abstract

Provided in the embodiments of the present application are a communication method and communication apparatus based on a low-density parity check code. The joint screening of the number of information columns and the number of punctures is performed on the basis of a target code rate, wherein the number of information columns is used for determining a coding base matrix, and the number of punctures is used for determining a puncturing sequence; the coding base matrix is used to perform coding on an information bit sequence, so as to obtain a codeword sequence; and puncturing is performed on the codeword sequence on the basis of the puncturing sequence. In this way, the puncturing proportion matches the target code rate, and the puncturing proportion is always controlled within an appropriate range, so as to achieve the advantages of a high convergence speed and a good decoding threshold, thereby improving a rate matching manner.

Description

A communication method and communication device based on low-density parity-check code

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on December 14, 2023, with application number 202311727832.9 and application name “A communication method and communication device based on low-density parity-check code”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of communication technology, and more particularly, to a communication method and a communication device based on low-density parity-check codes. Background Art

[0003] In the field of channel coding, low-density parity check (LDPC) code is one of the most mature and widely used channel coding schemes.

[0004] Currently, 5G's LDPC features two check matrices: base graph 1 (BG1) and base graph 2 (BG2). When encoding in high-throughput scenarios, a single base graph is typically used. This fixed number of information columns results in a fixed number of punctures and positions. When using this base graph for LDPC encoding, the decoding threshold is poor and the convergence speed is slow. This results in significant performance loss in high-throughput scenarios, making it impossible to adopt a more optimal rate matching method.

[0005] Therefore, it is necessary to consider how to improve the rate matching method.

[0006] Summary of the Invention

[0007] The present application provides a communication method based on low-density parity-check codes, which can improve the rate matching method.

[0008] In a first aspect, a communication method based on low-density parity-check codes is provided. The method can be executed by a transmitting device or a module or unit in the transmitting device. For ease of description, the transmitting device is used in the following description. The transmitting device can be a terminal device or a network device.

[0009] The method includes: determining the number of information columns and the number of puncturing according to a target code rate and a first LDPC base matrix, wherein the number of information columns is used to determine a second LDPC base matrix, and the second LDPC base matrix is ​​a submatrix of the first LDPC base matrix; encoding an information bit sequence using the second LDPC base matrix to obtain a first LDPC codeword sequence; puncturing the first LDPC codeword sequence according to a puncturing sequence, and outputting a second LDPC codeword sequence, wherein the puncturing sequence is determined according to the puncturing number.

[0010] Based on the above scheme, the number of information columns and the number of punctures are jointly screened according to the target bit rate, where the number of information columns is used to determine the coding basis matrix, and the number of punctures is used to determine the puncture sequence. This allows the puncture ratio to match the target bit rate, thereby providing a more flexible rate matching method.

[0011] In combination with the first aspect, in certain implementations of the first aspect, determining the number of information columns and the number of puncturing according to the target code rate and the first LDPC base matrix includes: determining the number of information columns corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of information columns, and determining the number of puncturing corresponding to the number of information columns according to a pre-stored correspondence between the number of information columns and the number of puncturing; or determining the number of information columns corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of information columns, and determining the number of puncturing according to the number of information columns and the target code rate. or, determining the number of information columns and the number of punctures according to a pre-stored correspondence between the target bit rate, the number of information columns, and the number of punctures; or, determining the number of punctures corresponding to the target bit rate according to a pre-stored correspondence between the target bit rate and the number of punctures, and determining the number of information columns corresponding to the number of punctures according to a pre-stored correspondence between the number of information columns and the number of punctures; or, determining the number of punctures corresponding to the target bit rate according to a pre-stored correspondence between the target bit rate and the number of punctures, and determining the number of information columns according to the puncture number and the target bit rate.

[0012] Based on the above scheme, the correspondence between the target bit rate and the number of information columns is pre-stored in the form of a table, or the correspondence between the target bit rate and the number of information columns and the number of punctures is pre-stored, or the correspondence between the target bit rate and the number of punctures is pre-stored. Therefore, the number of information columns and the number of punctures that match the target bit rate can be quickly determined, thereby providing a more flexible rate matching method.

[0013] In combination with the first aspect, in certain implementations of the first aspect, the correspondence between the pre-stored target code rate and the number of information columns is the correspondence between the code rate interval to which the target code rate belongs and the number of information columns, wherein the endpoints of the code rate interval are determined based on the number of information columns, the number of puncturing, and the core check number of the first LDPC base matrix.

[0014] Based on the above scheme, the correspondence between the bit rate interval and the number of information columns is stored in the form of a table. Since the bit rate interval is continuous, the number of information columns that matches the target bit rate can be determined more quickly and accurately through the bit rate interval to which the target bit rate belongs. The corresponding number of puncturing is then determined based on the number of information columns, thereby providing a more flexible rate matching method.

[0015] In combination with the first aspect, in certain implementations of the first aspect, the pre-stored correspondence between the target code rate and the number of information columns and the number of punctures is a correspondence between the code rate interval to which the target code rate belongs and the number of information columns and the number of punctures, wherein the endpoints of the code rate interval are determined based on the number of information columns, the number of punctures, and the core check number of the first LDPC base matrix.

[0016] Based on the above scheme, the correspondence between the bit rate interval and the number of information columns and the number of puncturing is stored in the form of a table. Since the bit rate interval is continuous, the number of information columns and the number of puncturing that match the target bit rate can be determined more quickly and accurately through the bit rate interval to which the target bit rate belongs, thereby providing a more flexible rate matching method.

[0017] In combination with the first aspect, in certain implementations of the first aspect, the pre-stored correspondence between the target code rate and the puncturing number is a correspondence between the code rate interval to which the target code rate belongs and the puncturing number, wherein the endpoints of the code rate interval are determined based on the number of information columns, the number of puncturing, and the core check number of the first LDPC base matrix.

[0018] Based on the above scheme, the correspondence between the bit rate interval and the number of puncturing is stored in the form of a table. Since the bit rate interval is continuous, the number of information columns and the number of puncturing that match the target bit rate can be determined more quickly and accurately through the bit rate interval to which the target bit rate belongs, thereby providing a more flexible rate matching method.

[0019] In combination with the first aspect, in certain implementations of the first aspect, the correspondence between the target bit rate and the number of information columns is the number of information columns corresponding to the target bit rate when it is greater than a predetermined threshold; when the target bit rate is lower than a predetermined first threshold and / or higher than a predetermined second threshold, the number of information columns is fixed.

[0020] In combination with the first aspect, in certain implementations of the first aspect, as the target bit rate increases, the number of information columns corresponding to the target bit rate increases monotonically.

[0021] In combination with the first aspect, in certain implementations of the first aspect, the correspondence between the target code rate and the number of information columns includes: the code rate interval to which the target code rate belongs includes a first interval, the first interval corresponds to the first number of information columns, and when the target code rate does not belong to the first interval, the target code rate corresponds to the second number of information columns; or, the code rate interval to which the target code rate belongs includes the first interval and the second interval, the first interval corresponds to the first number of information columns, and the second interval corresponds to the second number of information columns, and when the target code rate does not belong to the first interval and the second interval, the target code rate corresponds to the third number of information columns; or, the code rate interval to which the target code rate belongs includes the first interval, the second interval, and the third interval, the first interval corresponds to the first number of information columns, the second interval corresponds to the second number of information columns, and the third interval corresponds to the third number of information columns, and when the target code rate does not belong to the first interval, the second interval, and the third interval, the target code rate corresponds to the fourth number of information columns.

[0022] In combination with the first aspect, in some implementations of the first aspect, the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the core check number of the first LDPC base matrix, including: the left endpoint of the code rate interval is The right endpoint is Among them, the K min is the minimum number of information columns supported by the first LDPC base matrix, x is a positive integer, C is the core check number of the first LDPC base matrix, and P is the number of puncturing corresponding to the number of information columns.

[0023] Based on the above scheme, the bit rate interval is continuous. Therefore, the number of information columns and the number of puncturing that match the target bit rate can be determined more quickly and accurately through the bit rate interval to which the target bit rate belongs, thereby providing a more flexible rate matching method.

[0024] In combination with the first aspect, in certain implementations of the first aspect, determining the number of information columns and the number of puncturing according to the target code rate and the first LDPC base matrix includes: for any one information column number K in the candidate information column number set corresponding to the first LDPC base matrix i , the K i and the number of holes P i Listed as the first candidate, or, for any puncture number P in the preset puncture number set i , the P i and the number of information columns K i Listed as the first candidate, among which the P i According to the K i , the core check number of the first LDPC base matrix and the target code rate are determined, the K i is a positive integer, the P i is a non-negative number; for the first candidate Ki and P i Combination, according to the P i The number of information columns and the number of punctures are determined by comparing the number of information columns and the number of punctures with the puncture threshold corresponding to the first LDPC base matrix; or, based on the level corresponding to the puncture threshold, the number of information columns and the number of punctures corresponding to the level are determined.

[0025] In combination with the first aspect, in some implementations of the first aspect, according to the P i The number of information columns and the number of punctures are determined by comparing the number of information columns and the number of punctures with the puncture threshold corresponding to the first LDPC base matrix, including: for K in the first candidate i and P i combination, when the P i When it is less than the puncture threshold, the K i and P i Listed as the second candidate; when all P i When the number of columns is greater than or equal to the puncturing threshold, the number of columns is the maximum K among the first candidates. i , the number of holes is the maximum K i The corresponding P i Or, when all P in the first candidate i When the puncture number is greater than or equal to the puncture threshold, the puncture number is the minimum P among the first candidates. i , the number of information columns is the minimum P i The corresponding K i .

[0026] In combination with the first aspect, in certain implementations of the first aspect, when there are at least two K i and P i When combined, the number of information columns is the maximum K among the second candidates i , the number of punctures is the maximum K among the second candidates i The corresponding P i ; or the number of information columns is the minimum K among the second candidates i , the number of punctures is the minimum K among the second candidates i The corresponding P i ; Or determine the number of information columns and the number of punching holes based on hardware utilization.

[0027] Based on the above scheme, by screening according to the target bit rate to determine the number of information columns and the number of punctures, the number of information columns and the number of punctures adapted to the target bit rate are obtained, wherein the number of information columns is used to determine the coding basis matrix, and the number of punctures is used to determine the puncture sequence, so that the puncture ratio matches the target bit rate, thereby improving the rate matching method.

[0028] In combination with the first aspect, in certain implementations of the first aspect, the puncturing sequence is determined based on the puncturing number, including: when the puncturing number is less than or equal to 1, the first column of the puncturing sequence is the column with the largest column weight among the columns of the first LDPC base matrix; when the puncturing number is greater than 1 and less than or equal to 2, the first two columns of the puncturing sequence are the two columns of the first LDPC base matrix that contain the most checks with a puncturing number less than or equal to 1; or, the first column of the puncturing sequence is the column with the second largest column weight among the columns of the first LDPC base matrix, and the associated rows of the first column and the second column of the puncturing sequence are inconsistent; when the puncturing number is greater than 2, the first three columns of the puncturing sequence include the columns with the lightest column weight among the columns of the first LDPC base matrix.

[0029] Based on the above scheme, different puncturing sequences are determined according to different puncturing numbers. The encoded bit sequence is punctured at non-fixed positions and non-fixed lengths according to different puncturing sequences. The puncturing method is more flexible, thereby providing a more flexible rate matching method.

[0030] In combination with the first aspect, in certain implementations of the first aspect, the first LDPC codeword sequence is punctured according to a puncture sequence, including: when the puncture number is an integer, the first LDPC codeword sequence is punctured from the first 1 to the puncture number of the puncture sequence; when the puncture number is a non-integer, the first LDPC codeword sequence is punctured from the first 1 to the puncture number of the puncture sequence rounded up.

[0031] Based on the above solution, since the puncturing positions are not fixed, the puncturing positions of the encoded bit sequence can be accurately determined by the puncturing number and the puncturing sequence.

[0032] In combination with the first aspect, in some implementations of the first aspect, the puncturing sequence is a set of permutations of any columns of the first LDPC base matrix.

[0033] Based on the above scheme, since the puncturing sequence is a permutation of a set consisting of any columns of the LDPC base matrix, the puncturing sequence is more flexible. Therefore, puncturing is performed according to the puncturing sequence, and the puncturing method is more flexible, thereby providing a more flexible rate matching method.

[0034] In combination with the first aspect, in some implementations of the first aspect, the first LDPC base matrix includes a base graph 1 and an additional information column.

[0035] In combination with the first aspect, in certain implementations of the first aspect, the first LDPC base matrix has the same lifting factor set as the base graph 1, and the fifth row of the additional information column portion does not have any connecting edges.

[0036] Based on the above scheme, an LDPC base matrix compatible with the BG1 coding scheme is designed. The LDPC base matrix has the same lifting factor set as BG1 and the fifth row of the additional information column part of the LDPC base matrix does not have any connecting edges, so that the LDPC base matrix can have a 5G degree distribution structure. In addition, according to the LDPC base matrix, the number of information columns and the number of puncturing that match the target code rate can be determined, which can provide a more flexible rate matching method, thereby improving the rate matching method.

[0037] In combination with the first aspect, in some implementations of the first aspect, the first LDPC base matrix includes a third LDPC base matrix and an additional information column, and a puncturing threshold corresponding to the third LDPC base matrix is ​​0.

[0038] In combination with the first aspect, in certain implementations of the first aspect, a core matrix corresponding to the minimum number of information columns supported by the third LDPC base matrix is ​​a fully connected matrix.

[0039] Based on the above scheme, by designing an LDPC base matrix that is compatible with the non-punctured matrix coding scheme, the LDPC matrix can support a higher coding rate, so that more information columns and puncturing numbers that match the coding rate can be determined according to the LDPC base matrix, thereby providing a more flexible rate matching method.

[0040] In combination with the first aspect, in certain implementations of the first aspect, outputting a second LDPC codeword sequence includes: when sending for the first time, deleting the corresponding position of the first LDPC codeword sequence according to the puncturing sequence and outputting the second LDPC codeword sequence according to a preset bit length; when sending for the second time, using the column of the first LDPC codeword sequence corresponding to the puncturing sequence as the starting position and outputting the second LDPC codeword sequence according to the preset bit length.

[0041] In combination with the first aspect, in certain implementations of the first aspect, outputting the second LDPC codeword sequence includes: interleaving the first LDPC codeword sequence and inputting it into a circular buffer, and outputting the second LDPC codeword sequence; or, inputting the first LDPC codeword sequence into a circular buffer and interleaving it, and outputting the second LDPC codeword sequence.

[0042] In combination with the first aspect, in certain implementations of the first aspect, outputting the second LDPC codeword sequence includes: during the first transmission, outputting the second LDPC codeword sequence from the starting position of the third LDPC codeword sequence according to the preset bit length, wherein the third LDPC codeword sequence is a sequence obtained by interleaving the first LDPC codeword sequence, and the column corresponding to the puncturing sequence in the third LDPC codeword sequence is after the preset bit length; during the second transmission, outputting the second LDPC codeword sequence according to the preset bit length using the column of the puncturing sequence corresponding to the first LDPC codeword sequence as the starting position of the third LDPC codeword sequence.

[0043] Based on the above scheme, the columns of the punctured sequence corresponding to the LDPC codeword sequence are not sent during the first transmission. During the second transmission, the columns of the punctured sequence corresponding to the LDPC codeword sequence are preferentially sent, that is, the punctured columns corresponding to the new LDPC codeword sequence obtained after interleaving. This provides a new puncturing method to output the codeword sequence, thereby providing a more flexible rate matching method.

[0044] In combination with the first aspect, in some implementations of the first aspect, the number of information columns supported by the first LDPC base matrix is ​​a continuous integer with an interval of 2 or 1.

[0045] Based on the above solution, the number of information columns is a continuous integer with an interval of 2 or 1, which can make the decoding threshold more optimized and increase the hardware utilization rate.

[0046] In a second aspect, a communication method based on a low-density parity-check code is provided, the method comprising: receiving a second LDPC codeword sequence; decoding the second LDPC codeword sequence according to a second LDPC base matrix, the second LDPC base matrix being determined according to the number of information columns, the second LDPC codeword sequence being obtained by puncturing a first LDPC codeword sequence according to a puncturing sequence, the puncturing sequence being determined according to the number of puncturing; the second LDPC base matrix being a submatrix of the first LDPC base matrix; the number of information columns and the number of puncturing being determined according to a target code rate and the first LDPC base matrix.

[0047] In combination with the second aspect, in certain implementations of the second aspect, the number of information columns and the number of punctures are determined according to the target code rate and the first LDPC base matrix, including: the number of information columns is determined according to a pre-stored correspondence between the target code rate and the number of information columns, and the number of punctures is determined according to a pre-stored correspondence between the number of information columns and the number of punctures; or, the number of information columns is determined according to a pre-stored correspondence between the target code rate and the number of information columns, and the number of punctures is determined according to the number of information columns and the target code rate; or, the number of information columns and the number of punctures are determined according to a pre-stored correspondence between the target code rate, the number of information columns, and the number of punctures; or, the number of punctures is determined according to a pre-stored correspondence between the target code rate and the number of punctures, and the number of information columns is determined according to a pre-stored correspondence between the number of information columns and the number of punctures; or, the number of punctures is determined according to a pre-stored correspondence between the target code rate and the number of punctures, and the number of information columns is determined according to a pre-stored correspondence between the number of information columns and the number of punctures; or, the number of punctures is determined according to a pre-stored correspondence between the target code rate and the number of punctures, and the number of information columns is determined according to the number of punctures and the target code rate.

[0048] In combination with the second aspect, in certain implementations of the second aspect, the correspondence between the pre-stored target code rate and the number of information columns is the correspondence between the code rate interval to which the target code rate belongs and the number of information columns, wherein the endpoints of the code rate interval are determined based on the number of information columns, the number of puncturing, and the core check number of the first LDPC base matrix.

[0049] In combination with the second aspect, in certain implementations of the second aspect, the pre-stored correspondence between the target code rate and the number of information columns and the number of punctures is a correspondence between the code rate interval to which the target code rate belongs and the number of information columns and the number of punctures, wherein the endpoints of the code rate interval are determined based on the number of information columns, the number of punctures, and the core check number of the first LDPC base matrix.

[0050] In combination with the second aspect, in certain implementations of the second aspect, the correspondence between the pre-stored target code rate and the puncturing number is the correspondence between the code rate interval to which the target code rate belongs and the puncturing number, wherein the endpoints of the code rate interval are determined based on the number of information columns, the number of puncturing, and the core check number of the first LDPC base matrix.

[0051] In combination with the second aspect, in certain implementations of the second aspect, the correspondence between the target bit rate and the number of information columns is the number of information columns corresponding to a case where the target bit rate is greater than a predetermined threshold; when the target bit rate is lower than a predetermined first threshold and / or higher than a predetermined second threshold, the number of information columns is fixed.

[0052] In combination with the second aspect, in certain implementations of the second aspect, as the target bit rate increases, the number of information columns corresponding to the target bit rate increases monotonically.

[0053] In combination with the second aspect, in certain implementations of the second aspect, the correspondence between the target bit rate and the number of information columns includes: the bit rate interval to which the target bit rate belongs includes a first interval, the first interval corresponds to the first number of information columns, and when the target bit rate does not belong to the first interval, the target bit rate corresponds to the second number of information columns; or, the bit rate interval to which the target bit rate belongs includes the first interval and the second interval, the first interval corresponds to the first number of information columns, and the second interval corresponds to the second number of information columns, and when the target bit rate does not belong to the first interval and the second interval, the target bit rate corresponds to the third number of information columns; or, the bit rate interval to which the target bit rate belongs includes the first interval, the second interval, and the third interval, the first interval corresponds to the first number of information columns, the second interval corresponds to the second number of information columns, and the third interval corresponds to the third number of information columns, and when the target bit rate does not belong to the first interval, the second interval, and the third interval, the target bit rate corresponds to the fourth number of information columns.

[0054] In conjunction with the second aspect, in certain implementations of the second aspect, the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the core check number of the first LDPC base matrix, including:

[0055] The left endpoint of the bit rate range is The right endpoint is Among them, the K min is the minimum number of information columns supported by the first LDPC base matrix, x is a positive integer, C is the core check number of the first LDPC base matrix, and P is the number of puncturing corresponding to the number of information columns.

[0056] In conjunction with the second aspect, in some implementations of the second aspect, the number of information columns and the number of puncturing are determined according to the target code rate and the first LDPC base matrix, including: for any one number of information columns K in the set of candidate number of information columns corresponding to the first LDPC base matrix i , the K i and the number of holes P i Listed as the first candidate, or, for any puncture number P in the preset puncture number set i , the P i and the number of information columns K i Listed as the first candidate, among which the P i According to the K i , the core check number of the first LDPC base matrix and the target code rate are determined, the K i is a positive integer, the P i is a non-negative number; for the first candidate K i and P i The number of information columns and the number of punctures are combined according to the P iThe number of information columns and the number of punctures are determined by comparing with a puncture threshold corresponding to the first LDPC base matrix; or, the number of information columns and the number of punctures are determined according to a level corresponding to the puncture threshold.

[0057] In conjunction with the second aspect, in certain implementations of the second aspect, the number of information columns and the number of punctures are based on the P i The determination is made by comparing the puncturing threshold value corresponding to the first LDPC base matrix, including: for the K in the first candidate i and P i combination, when the P i When it is less than the puncture threshold, the K i and P i Listed as the second candidate; when all P i When the number of columns is greater than or equal to the puncturing threshold, the number of columns is the maximum K among the first candidates. i , the number of holes is the maximum K i The corresponding P i Or, when all P in the first candidate i When the puncture number is greater than or equal to the puncture threshold, the puncture number is the minimum P among the first candidates. i , the number of information columns is the minimum P i The corresponding K i .

[0058] In conjunction with the second aspect, in certain implementations of the second aspect, when there are at least two K i and P i When the number of information columns is the maximum K among the second candidates i , the number of punctures is the maximum K among the second candidates i The corresponding P i ; or the number of information columns is the minimum K among the second candidates i , the number of punctures is the minimum K among the second candidates i The corresponding P i ; or the number of information columns and the number of punch holes are determined based on hardware utilization.

[0059] In combination with the second aspect, in certain implementations of the second aspect, the puncturing sequence is determined based on the puncturing number, including: when the puncturing number is less than or equal to 1, the first column of the puncturing sequence is the column with the largest column weight among the columns of the first LDPC base matrix; when the puncturing number is greater than 1 and less than or equal to 2, the first two columns of the puncturing sequence are the two columns of the first LDPC base matrix that contain the most checks with a puncturing number less than or equal to 1; or, the first column of the puncturing sequence is the column with the second largest column weight among the columns of the first LDPC base matrix, and the associated rows of the first column and the second column of the puncturing sequence are inconsistent; when the puncturing number is greater than 2, the first three columns of the puncturing sequence include the columns with the lightest column weight among the columns of the first LDPC base matrix.

[0060] In conjunction with the second aspect, in certain implementations of the second aspect, the second LDPC codeword sequence is obtained by puncturing the first LDPC codeword sequence according to the puncturing sequence, including:

[0061] When the puncturing number is an integer, puncturing the first LDPC codeword sequence from the first position to the puncturing number of the puncturing sequence to obtain the second LDPC codeword sequence;

[0062] When the puncturing number is a non-integer, the first LDPC codeword sequence is punctured from the first position of the puncturing sequence to the position rounded up to the integer of the puncturing number to obtain the second LDPC codeword sequence.

[0063] In combination with the second aspect, in certain implementations of the second aspect, the puncturing sequence is a set of permutations of any columns of the first LDPC base matrix.

[0064] In combination with the second aspect, in some implementations of the second aspect, the first LDPC base matrix includes a base graph 1 and an additional information column.

[0065] In combination with the second aspect, in certain implementations of the second aspect, the first LDPC base matrix has the same lifting factor set as the base graph 1, and the fifth row of the additional information column portion does not have any connecting edges.

[0066] In combination with the second aspect, in some implementations of the second aspect, the first LDPC base matrix includes a third LDPC base matrix and an additional information column, and the puncturing threshold corresponding to the third LDPC base matrix is ​​0.

[0067] In combination with the second aspect, in certain implementations of the second aspect, a core matrix corresponding to the minimum number of information columns supported by the third LDPC base matrix is ​​a fully connected matrix.

[0068] In combination with the second aspect, in certain implementations of the second aspect, receiving a second LDPC codeword sequence includes: receiving the second LDPC codeword sequence for the first time and receiving the second LDPC codeword sequence for the second time, wherein the second LDPC codeword sequence received for the first time is obtained by deleting the corresponding position of the first LDPC codeword sequence according to the puncturing sequence and then outputting it according to a preset bit length; and the second LDPC codeword sequence received for the second time is obtained by outputting the column of the first LDPC codeword sequence corresponding to the puncturing sequence as the starting position according to the preset bit length.

[0069] In combination with the second aspect, in certain implementations of the second aspect, receiving a second LDPC codeword sequence includes: the received second LDPC codeword sequence is obtained by interleaving the first LDPC codeword sequence and inputting it into a circular buffer; or, the received second LDPC codeword sequence is obtained by inputting the first LDPC codeword sequence into a circular buffer and then interleaving it.

[0070] In combination with the second aspect, in certain implementations of the second aspect, the received second LDPC codeword sequence includes: the second LDPC codeword sequence received for the first time is obtained by outputting the third LDPC codeword sequence from the starting position according to a preset bit length, wherein the column corresponding to the punctured sequence in the third LDPC codeword sequence is after the preset bit length, and the third LDPC codeword sequence is a sequence obtained by interleaving the first LDPC codeword sequence; the second LDPC codeword sequence received for the second time is obtained by outputting the column corresponding to the first LDPC codeword sequence of the punctured sequence as the starting position of the third LDPC codeword sequence according to the preset bit length.

[0071] In a third aspect, a communication device is provided, configured to execute the method provided by any of the above aspects or implementations thereof. Specifically, the device may include units and / or modules, such as a processing unit and / or a transceiver unit, configured to execute the method provided by any of the above aspects or implementations thereof.

[0072] In one implementation, the apparatus is a transmitting device or a receiving device. When the apparatus is a transmitting device or a receiving device, the transceiver unit may be a transceiver, an input / output interface, or a communication interface; and the processing unit may be at least one processor. Optionally, the transceiver is a transceiver circuit. Optionally, the input / output interface is an input / output circuit.

[0073] In another implementation, the apparatus is a chip, chip system, or circuit used in a transmitting device or a receiving device. When the apparatus is a chip, chip system, or circuit used in a transmitting device or a receiving device, the transceiver unit may be an input / output interface, interface circuit, output circuit, input circuit, pin, or related circuit on the chip, chip system, or circuit; and the processing unit may be at least one processor, processing circuit, or logic circuit.

[0074] In a fourth aspect, a communication device is provided, comprising: a memory for storing programs; and at least one processor for executing computer programs or instructions stored in the memory to perform the method provided by any one of the above aspects or its implementation.

[0075] In one implementation, the apparatus is a transmitting end device or a receiving end device.

[0076] In another implementation, the apparatus is a chip, a chip system, or a circuit used in a transmitting device or a receiving device.

[0077] In a fifth aspect, a communication device is provided, comprising: at least one processor and a communication interface, wherein the at least one processor is configured to retrieve a computer program or instruction stored in a memory through the communication interface to execute the method provided by any of the above aspects or implementations thereof. The communication interface may be implemented in hardware or software.

[0078] In one implementation, the device further includes the memory.

[0079] In a sixth aspect, a processor is provided for executing the methods provided in the above aspects.

[0080] For the operations such as sending and acquiring / receiving involved in the processor, unless otherwise specified, or if they do not conflict with their actual functions or internal logic in the relevant descriptions, they can be understood as operations such as processor output, reception, and input, or as sending and receiving operations performed by the radio frequency circuit and antenna. This application does not limit this.

[0081] In a seventh aspect, a computer-readable storage medium is provided, which stores a program code for execution by a device, wherein the program code includes a method for executing any one of the above aspects or its implementation.

[0082] In an eighth aspect, a computer program product comprising instructions is provided, which, when run on a computer, enables the computer to execute the method provided by any one of the above aspects or its implementation.

[0083] In a ninth aspect, a chip is provided, comprising a processor and a communication interface, wherein the processor reads instructions stored in a memory through the communication interface and executes the method provided by any one of the above aspects or implementations thereof. The communication interface may be implemented in hardware or software.

[0084] Optionally, as an implementation method, the chip also includes a memory, in which a computer program or instruction is stored, and the processor is used to execute the computer program or instruction stored in the memory. When the computer program or instruction is executed, the processor is used to execute the method provided by any of the above aspects or its implementation methods.

[0085] When the method provided in this application is executed by a chip, this application does not limit the number of chips that implement the method. For example, the method can be executed by one chip or by two or more chips. Furthermore, when the number of chips implementing the method of this application is two or more, the chip manufacturers are not limited and can be the same manufacturer or different manufacturers.

[0086] In a tenth aspect, a communication system is provided, comprising at least one of the transmitting device or the receiving device described above.

[0087] In an eleventh aspect, a computer program is provided, which, when executed on a computer, enables the method provided by any one of the above aspects or its implementation to be executed. BRIEF DESCRIPTION OF THE DRAWINGS

[0088] FIG1 is a schematic diagram of a network architecture applicable to an embodiment of the present application.

[0089] FIG2 is a schematic diagram of an LDPC check matrix H.

[0090] FIG3 is a schematic diagram of the Tanner obtained corresponding to the check matrix shown in FIG2 .

[0091] FIG4 is a schematic diagram of the structure of a check matrix.

[0092] FIG5 is a schematic diagram of the information transmission process.

[0093] FIG6 is a schematic diagram of the punching method of BG1.

[0094] FIG7 is a schematic flowchart of a communication method 700 based on LDPC codes provided in this application.

[0095] FIG8 is an example diagram of a basis matrix of a nested information column compatible with BG1.

[0096] FIG9 is a schematic diagram of the high-rate puncturing method of BG1.

[0097] FIG10 is a schematic diagram showing a method of puncturing a first LDPC base matrix constructed by adding an extra information column and an extended check column.

[0098] FIG11 is an example diagram of a base matrix compatible with a non-punctured matrix.

[0099] FIG12 is a schematic flow chart of determining the number of information columns and the number of punctures.

[0100] FIG13 is a schematic diagram of drilling one row of holes in the core area of ​​BG1.

[0101] FIG14 is a schematic diagram of two rows of holes punched in the core area of ​​BG1.

[0102] FIG15 is a schematic diagram of three rows of holes punched in the core area of ​​BG1.

[0103] Figure 16 shows the simulation results of the performance loss of 5G BG1 compared to the basis matrix of the nested information column.

[0104] FIG17 shows the simulation results of the performance loss of the basis matrix of the nested information column compatible with BG1 at different bit rates.

[0105] FIG18 is a schematic diagram of a base matrix format with different numbers of nested information columns.

[0106] Figure 19 shows the simulation results of the performance loss of the base matrix at a bit rate of 22 / 23.

[0107] FIG20 is a schematic block diagram of a communication device 10 provided in an embodiment of the present application.

[0108] Figure 21 is a schematic block diagram of a communication device 20 provided in an embodiment of the present application. DETAILED DESCRIPTION

[0109] To facilitate understanding of the embodiments of the present application, the following points are explained before introducing the embodiments of the present application:

[0110] The various numerical designations such as "first," "second," and so on are merely for convenience of description and are not intended to limit the scope of the embodiments of this application, for example, to distinguish between different messages or different information. "Pre-defining" or "pre-storing" can be implemented by pre-saving corresponding codes, tables, or other methods that can be used to indicate relevant information in the device. This application does not limit the specific implementation method. The "protocol" referred to may refer to a standard protocol in the communications field, such as the Long Term Evolution (LTE) protocol, the New Radio (NR) protocol, and related protocols used in future communications systems. This application does not limit this. Words such as "exemplary," "for example," "illustratively," and "as (another) example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described in this application as an "example" should not be construed as preferred or advantageous over other embodiments or designs. The terms "including," "comprising," "having," and their variations all mean "including but not limited to," unless otherwise specifically emphasized. "At least one" means one or more, and "a plurality" means two or more. "At most one" or "at most one" means one or zero. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can mean: a, or b, or c, or a and b, or a and c, or b and c, or a, b and c. Where a, b and c can be single or multiple. The description involving network element A sending a message, information or data to network element B, and network element B receiving a message, information or data from network element A, is intended to indicate to which network element the message, information or data is to be sent, and does not limit whether they are sent directly or indirectly via other network elements. Descriptions such as "when...", "in the case of...", "if...", and "if" all mean that the device will take corresponding actions under certain objective circumstances. They do not limit the time, nor do they require the device to make judgments when implementing them, nor do they imply the existence of other limitations.

[0111] In addition, the network architecture and business scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Ordinary technicians in this field can know that with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0112] The following describes a communication system that can be applied to the embodiments of the present application:

[0113] The technical solutions of the embodiments of the present application can be applied to various communication systems, including but not limited to: global system of mobile communication (GSM) system, enhanced data rate for GSM evolution system (EDGE), fifth generation (5G) system or new radio (NR) system, LTE system, long term evolution-advanced (LTE-A) system, LTE frequency division duplex (FDD) system, LTE time division duplex (TDD) system, wideband code division multiple access (WCDMA) system, code division multiple access (CDMA) system, time division-synchronization code division multiple access system (TD-SCDMA), etc. It can also be applied to future communication systems, such as the sixth generation mobile communication system. Furthermore, the present invention can also be applied to device-to-device (D2D) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), and Internet of Things (IoT) communication systems or other communication systems. Furthermore, the present invention can also be extended to similar wireless communication systems, such as wireless-fidelity (Wi-Fi), worldwide interoperability for microwave access (WIMAX), and communication systems related to the 3rd Generation Partnership Project (3GPP), without limitation.

[0114] A communication system applicable to embodiments of the present application may include one or more transmitting devices and one or more receiving devices. Optionally, one of the transmitting device and the receiving device may be a terminal device, and the other may be a network device. Optionally, both the transmitting device and the receiving device may be terminal devices. Optionally, both the transmitting device and the receiving device may be network devices.

[0115] FIG1 is a schematic diagram of a network architecture applicable to an embodiment of the present application.

[0116] As shown in Figure 1, the embodiments of the present application can be applied to both uplink data transmission and downlink data transmission. Figure 1 only takes uplink data transmission or downlink data transmission between a network device and two terminal devices (such as terminal device 1 and terminal device 2) as an example. In uplink data transmission, the transmitting device in this article is a terminal device, and the receiving device is a network device; conversely, in downlink data transmission, the transmitting device is a network device, and the receiving device is a terminal device. In addition, the applicability of the embodiments of the present application in other communication scenarios is not limited. For example, it can also be applied to sidelink communications.

[0117] The terminal device of the present application may also be referred to as user equipment (UE), access terminal, user unit, user station, mobile station, mobile station, mobile terminal (MT), remote station, remote terminal, mobile device, user terminal, terminal, drone, wireless communication device, user agent or user device, etc. The terminal device in the embodiments of the present application may refer to a device that provides voice and / or data connectivity to a user and can be used to connect people, objects and machines, such as a handheld device with wireless connection function, a vehicle-mounted device, etc. The terminal device in the embodiments of the present application can be a mobile phone, a tablet computer, a laptop computer, a PDA, a mobile internet device (MID), a wearable device, a virtual reality (VR) device, an augmented reality (AR) device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in a smart grid, a wireless terminal in transportation safety, a wireless terminal in a smart city, a wireless terminal in a smart home, etc., and the embodiments of the present application are not limited to this.

[0118] The network device in the embodiment of the present application may be a device with wireless transceiver functions, and the network device may be a device that provides wireless communication function services, usually located on the network side, including but not limited to the next generation base station (gNodeB, gNB) in the 5G system, the base station in the sixth generation mobile communication system, the base station in the future mobile communication system, or the access node in the wireless fidelity (WiFi) system, the evolved node B (eNB) in the long term evolution (LTE) system, the radio network controller (RNC), the node B (NB), the base station controller (BSC), the home base station (for example, home evolved NodeB, or home Node B, HNB), the base band unit (BBU), the transmission reception point (TRP), the transmitting point (TP), the base transceiver station (BTS), the satellite, the drone, etc. In a network structure, the network device may include a centralized unit (CU) node, or a distributed unit (DU) node, or a RAN device including a CU node and a DU node, or a RAN device including a control plane CU node and a user plane CU node, and a DU node, or the network device may also be a wireless controller, relay station, vehicle-mounted device, and wearable device in a cloud radio access network (CRAN) scenario. In addition, the base station may be a macro base station, a micro base station, a relay node, a donor node, or a combination thereof. The base station may also refer to a communication module, a modem, or a chip for being set in the aforementioned device or apparatus. The base station may also be a mobile switching center and a device that performs the base station function in D2D, V2X, and M2M communications, a network-side device in a 6G network, a device that performs the base station function in a future communication system, and the like. The base station may support networks with the same or different access technologies, which is not limited in the embodiments of the present application.

[0119] Unless otherwise specified, the device used to implement the function of a terminal device or network device in this application may refer to the terminal device or network device itself, or may refer to a device that can support the terminal device or network device to implement the function, such as a chip system or chip, specifically, a system on a chip (SoC) or a modem. The device can be installed in the terminal device or network device. In the embodiments of the present application, the chip system can be composed of chips, or it can include chips and other discrete devices.

[0120] It should also be noted that some embodiments herein use the 5G system as an example to describe specific solution details. It is understood that when this solution is applied to other communication systems, such as the LTE system or future communication systems, the messages, channels, or information in the solution can be replaced with messages, channels, or information in other communication systems that can implement corresponding functions, and this application does not limit this.

[0121] To facilitate understanding of the embodiments of the present application, several concepts or terms involved in the embodiments of the present application are briefly explained. The concepts or terms introduced below are explained based on the concepts or terms specified in the reference protocol, but this does not mean that the embodiments of the present application can only be applied to existing systems. The concepts or terms involved in the embodiments of the present application can be applied to future systems. The specific names of the concepts or terms (for example, concepts or terms involving functional descriptions) can be adjusted as future systems develop.

[0122] 1. LDPC Code

[0123] LDPC codes are linear block codes whose parity check matrices are sparse. They offer excellent performance, approaching the Shannon limit, low decoding complexity, and a flexible structure. The number of zero elements in an LDPC parity check matrix far outnumbers the number of nonzero elements. In other words, the row and column weights of the parity check matrix are very small compared to the LDPC code length. An LDPC code with an information bit sequence length equal to w and a code length equal to v can be uniquely identified by its parity check matrix.

[0124] In 1981, Tanner represented LDPC codewords using a graph, now called a Tanner graph. There is a one-to-one correspondence between a Tanner graph and a parity check matrix. A Tanner graph consists of two types of vertices: one type represents codeword bits, called variable nodes, and the other type is a check node, representing a check constraint. Each check node represents a check constraint. This is explained below using Figures 2 and 3.

[0125] FIG2 is a schematic diagram of an LDPC check matrix H.

[0126] In Figure 2, {Vi} represents the set of variable nodes (VN), and {Ci} represents the set of check nodes (CN). Each row of the check matrix H represents a check equation, each corresponding to a check node. Each column represents a codeword bit, and each codeword bit corresponds to a variable node. As shown in Figure 2, there are six variable nodes and three check nodes. Connecting the variable nodes and check nodes with lines yields a Tanner graph.

[0127] FIG3 is a Tanner diagram of an LDPC check matrix H.

[0128] Figure 3 shows the Tanner diagram corresponding to the example check matrix in Figure 2. LDPC codes can be represented by a check matrix or a Tanner graph. Figure 3 shows a Tanner graph for a check matrix H with three rows and six columns. The Tanner graph includes two types of nodes: check nodes and variable nodes. Each row of the check matrix H corresponds to a check node, i.e., a check bit of the LDPC code; each column of the check matrix H corresponds to a variable node, i.e., each codeword bit of the LDPC code. Therefore, the Tanner graph includes three check nodes and six variable nodes. As shown in Figure 3, a check node connects related variable nodes, or in other words, a check node is a convergence point of related variable nodes, to represent a check equation. Correlation corresponds to an element in the check matrix H taking the value of 1, meaning that the connection between the two types of nodes corresponds to the value of an element in the H matrix. If there is a connection between the i-th check node and the j-th variable node, the value of the element (i, j) in the H matrix is ​​1; if there is no connection, the corresponding element is 0. For example, for check node C1, the variable nodes with values ​​of 1 in the H matrix are V1, V2, and V4. Therefore, these three variable nodes are connected to check node C1. The connection between a variable node and a check node is also called an edge, which indicates the association between the check node and the variable node. The edge relationship between a check node and a variable node can include either the presence of an edge or the absence of an edge.

[0129] As mentioned above, LDPC is a linear block code. It divides the information sequence to be encoded into groups of w bits. The encoder then performs a linear operation on these w information bits to obtain g parity bits. These w information bits and g parity bits are then combined to form a codeword of length v = w + g. The mapping from w information bits to a codeword of length v bits is typically represented by a corresponding parity check matrix H. Based on the parity check matrix H, a codeword sequence is generated to complete the encoding process. After the codeword sequence is transmitted over the channel, the receiving device decodes the received signal and determines the original information bits.

[0130] 2. QC-LDPC code

[0131] Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) codecs are a type of structured LDPC code that utilizes cyclic shifts based on LDPC codes to improve encoding and decoding efficiency. In QC-LDPC codes, the parity check matrix H is divided into multiple Zc×Zc submatrices, each of which is a cyclic shift matrix. A cyclic shift matrix is ​​a matrix obtained by cyclically shifting the identity matrix. By selecting appropriate cyclic shift parameters, QC-LDPC codes with excellent error correction performance can be constructed. The code construction is based on a prototype matrix, called the base graph or base matrix Hb. Based on the base matrix Hb and the lifting size Zc, the base matrix Hb can be expanded into a complete parity check matrix for encoding or decoding. Zc can also be called the expansion factor, lifting factor, expansion value, expansion coefficient, or lifting size.

[0132] The base graph model of QC-LDPC code is BG=(X,Y,F), where X represents the variable, Y represents the check, and F represents the edge relationship between X and Y. After the expansion factor Z c After the QC expansion of the Tanner graph, the bipartite graph G = (V, C, E) is obtained, where V is the variable node, C is the check node, and E is the edge relationship. The corresponding check matrix column number N = |V| = Z c |X|, the number of check matrix rows M = |C| = Z c |Y|, the number of non-zero elements in the parity check matrix is ​​|E| = Z|F|. 5G has two LDPC code base graphs: BG1 and BG2. Both BG1 and BG2 share a common parity check matrix structure. BG1 is primarily used in scenarios with high throughput requirements, high code rates, and long code lengths. BG2 is primarily used in scenarios with lower throughput requirements, lower code rates, and shorter code lengths.

[0133] Optionally, the zero elements in the basis matrix Hb may be represented in other forms besides "-1", for example, using "-" or a null value to represent an all-zero matrix. The basis matrix of an LDPC code may also be called an LDPC basis matrix or an LDPC basis graph.

[0134] 3. Non-zero elements and zero elements

[0135] In the check matrix, a zero element indicates that there is no connection between the variable node and the check node, and a non-zero element indicates that there is a connection between the variable node and the check node.

[0136] In the LDPC basis matrix, the zero element represents an all-zero square matrix of order Zc, the non-zero element represents the identity matrix of order Zc or a circulant permutation matrix based on the identity matrix of order Zc, and the value of the non-zero element represents the cyclic shift value or translation value relative to the identity matrix.

[0137] This application does not limit the specific representation of zero and non-zero elements. For example, in the parity check matrix H shown in Figure 2, "0" is used to represent zero elements, and "1" is used to represent non-zero elements. For another example, in the basis matrix Hb described above, "-1" is used to represent zero elements, and "non-negative values" are used to represent non-zero elements.

[0138] For ease of description, the LDPC base matrix below uses "0" to represent a zero element and "1" to represent a non-zero element.

[0139] 4. Column weight and row weight

[0140] For a column of a matrix, the column weight can refer to the number of non-zero elements contained in that column. For a row of a matrix, the row weight can refer to the number of non-zero elements contained in that row. For example, as shown in Figure 2, the column weight of the first column of the check matrix H is 2, and the row weight of the first row is 3.

[0141] 5. Check matrix structure corresponding to the base graph

[0142] FIG4 is a schematic diagram of the structure of a check matrix.

[0143] The check matrix corresponding to the base graph is the matrix obtained by combining the base matrix with the lifting value and the translation value. As shown in Figure 4(a), the check matrix may include a high rate region, an all-zero region, an incremental redundancy region, and a raptor-like region. The high rate region (or core region) may include part A and part B as shown in Figure 4(b), where part A corresponds to the high rate information column region (or information bit, information bit, system bit, etc.), which is represented by a set such as {A1, A2, ..., An}, where A n The last column of the base image corresponds to the high-bitrate information column area, and the number of base image information columns is n; Part B corresponds to the high-bitrate core check column area (or core check bit, core check bit), which is represented by a set such as {B1, B2, ..., B C}, where B C The core parity column region of the base graph corresponds to the last column of the high-code rate core parity column region. The core parity column region of the base graph is C. Furthermore, the core parity column region can also be determined by the degree of the check nodes. For example, a parity column with a degree greater than 1 is called a core parity column, and its corresponding region is the core parity column region. The all-zero matrix corresponds to portion C in Figure 4(b), the incremental redundancy region corresponds to portion D in Figure 4(b), which corresponds to the low-code rate matrix, and the quasi-Lapp region corresponds to portion E in Figure 4(b). Portion E is a unit matrix, and D and E together form a single parity check relationship.

[0144] The base matrix is ​​designed for the lowest bit rate. A and B together form the high-rate core matrix (or core array), corresponding to the highest bit rate. This code rate is called the core array code rate. Since code rate = k / N, where k is the number of information bits and N is the total number of bits, as the matrix area is expanded in the direction indicated by the arrow in Figure 4(a), the number of information bits remains unchanged, while the total number of bits increases, and thus the code rate gradually decreases until the lowest bit rate is reached. When supporting different code rates, the matrix area in Figure 4(a) can be cut off for use.

[0145] 6. Information transmission process

[0146] Figure 5 is a schematic diagram of the information transmission process. As shown in Figure 5, information is sent from the source, undergoes source coding, channel coding, modulation, air interface transmission, demodulation, channel decoding, source recovery, and other processing, and arrives at the destination, completing the information transmission from the source to the destination. Among them, the processing shown in the upper half of Figure 5 (including source coding, channel coding, modulation, etc.) is performed by the transmitting end device, and the processing shown in the lower half of Figure 5 (including source decoding, channel decoding, demodulation, etc.) is performed by the receiving end device. This application mainly relates to the source coding, channel coding, source recovery, and channel decoding processing shown in the dotted rectangular box in Figure 5.

[0147] Currently, the main decoding algorithms for LDPC codes are the Minimum Sum (MS) and Belief Propagation (BP) decoding algorithms. Currently, Offset-MS and Normalized-MS decoding algorithms are used in practical communication systems.

[0148] 7. Punch column

[0149] As shown in Figure 4(b), the dotted matrix area represents punctured columns. The first two columns of the matrices for BG1 and BG2 are both punctured columns. In LDPC codes, punctured columns can refer to columns that are not transmitted. That is, the bits corresponding to the punctured bits are not transmitted during transmission, and the receiver has no information about the bits corresponding to these punctured bits. Puncturing is performed by setting the log-likelihood ratio of the punctured columns to 0, which is then recovered during decoding. As shown above, A and B constitute the core matrix, and their corresponding code rate is the core matrix code rate. The number of columns corresponding to the A portion of BG1 is 22, and the number of columns corresponding to the B portion is 4. The number of punctured columns (or puncture count) is 2. According to the above code rate formula, after puncturing two information columns, the core matrix code rate is coderate = k / N = 22 / (22 + 4 - 2) = 11 / 12 ≈ 0.917. To support code rates slightly higher than this, some parity columns can be additionally punctured. Therefore, punctured columns can be either information columns or parity columns.

[0150] Currently, the maximum usable code rate specified in the 5G data channel modulation and coding scheme (MCS) table is 0.926. Actual communication systems will use higher MCSs when channel quality is good, and future 6G peak throughput scenarios may require even higher MCSs. Currently, BG1, suitable for high-throughput scenarios, has fixed puncturing columns, namely the first and second information columns described above, resulting in a core matrix code rate of 0.917. To support code rates slightly higher than 0.917, some parity columns may be additionally punctured.

[0151] Figure 6 is a schematic diagram of the puncturing method of BG1. As shown in Figure 6, after the puncturing information columns 1 and 2 are fixed, in order to support a higher code rate, the last column of the check column is additionally punctured, so that the code rate is improved. However, this method will result in too many punctures, a poor decoding threshold, and slow convergence. In high-throughput scenarios, the performance loss is very large. The decoding threshold refers to the minimum signal-to-noise ratio at which the mutual information of each variable node can approach 1 with decoding, and the mutual information refers to the amount of information of each variable node. The greater the amount of information, the higher the reliability and the lower the error probability. In addition, when encoding in high-throughput scenarios, the existing technology usually uses a single base graph for encoding, such as BG1. The base graph has a fixed number of information columns, resulting in a fixed puncturing column, and it is impossible to allocate the puncturing column according to the code rate, and thus it is impossible to adopt a more optimal rate matching method.

[0152] Based on this, this application proposes a communication method and device based on low-density parity-check codes to meet the requirements of extremely high code rates and fast convergence in high-throughput and peak rate scenarios. Instead of setting a fixed number of punctures and puncture positions, the method jointly screens the number of information columns and the number of punctures based on the target code rate and the first LDPC base matrix, and uses the screened number of information columns to reconstruct the first LDPC base matrix to obtain a second LDPC base matrix to encode the information bit sequence. The encoded sequence is then punctured according to the puncture number and the puncture positions determined by the puncture sequence corresponding to the puncture number, completing rate matching.

[0153] To facilitate understanding of the embodiments of the present application, the following embodiments are described in peak rate scenarios, but it should be understood that the applicable scenarios of the embodiments of the present application are not limited to peak rate scenarios, but can also be implemented in high throughput scenarios, or in enhanced mobile broadband (eMBB) scenarios, or in ultra-reliable low latency communication (URLLC) scenarios, or in massive IoT communication / massive machine type communication (mMTC) scenarios, or in scenarios with extremely high bit rates and fast convergence requirements. The embodiments of the present application are not limited to this.

[0154] FIG7 is a schematic flowchart of a communication method 700 based on LDPC codes provided in this application.

[0155] Method 700 can be performed by a transmitting device and a receiving device. Unless otherwise specified, "transmitting device" or "receiving device" can refer to the transmitting device or receiving device itself, or can refer to a device that supports the transmitting device or receiving device to implement the function. For convenience of description, the following description uniformly uses the transmitting device and receiving device. The transmitting device can be a terminal device or a network device, and the receiving device can be a terminal device or a network device.

[0156] Method 700 may include at least part of the contents of S710 to S750.

[0157] S710: A transmitting end device obtains an information bit sequence and a first LDPC basis matrix.

[0158] If the transmitting device needs to communicate with the receiving device, that is, the transmitting device needs to send a signal to the receiving device, the transmitting device needs to first obtain an information bit sequence corresponding to the signal to be sent to the receiving device.

[0159] The transmitting end device obtaining the information bit sequence may refer to: the transmitting end device performing source encoding on source symbols to generate the information bit sequence. The transmitting end device obtaining the information bit sequence may also refer to: the transmitting end device obtaining (e.g., receiving) the information bit sequence from other communication devices.

[0160] Multiple LDPC basis matrices are predefined and stored in the form of a maximum-scale basis graph. Each LDPC basis matrix supports a different number of information columns. In some embodiments, different numbers of information columns correspond to different LDPC basis matrices. Based on the actual number of information columns required, an LDPC basis matrix with the corresponding number of information columns can be obtained by intercepting the maximum-scale basis graph.

[0161] Specifically, a large table is used to store the connection relationship and translation value of the largest base graph. The table uses row index i and column index j to represent the position (i, j) of the LDPC base matrix, that is, (i, j) represents the i-th row and j-th column of the LDPC base matrix. In addition, the table also uses the set index i LS To represent a set of translation values ​​V of the LDPC basis matrix (i, j) position i,j (shifting value, SV), where the maximum-scale base graph is the base graph corresponding to the maximum number of pre-stored information columns.

[0162] For example, Table 1 is a schematic diagram of the largest base graph in 5G. As shown in Table 1, according to the row number i of the LDPC base matrix as the index, all its associated column numbers j and a set of translation values ​​V corresponding to (i, j) are stored. i,j , the translation value V in the table i,j Indicates that the i-th row and j-th column are related, that is, the i-th row and j-th column are connected. LS To indicate each translation value, the 5G set index is 0, 1, ..., 7. When i = 0, j = 0 and i LS =0, indicating that the translation value of the 0th row and 0th column of the LDPC basis matrix is ​​250.

[0163] There are two ways to filter the base graph with a specified number of information columns from the largest base graph. The first way is to directly delete unused columns from the storage table of the largest base graph and set the information positions corresponding to the deleted columns to 0 during encoding, thus performing a shortening process. The second way is to delete unused columns and change the column numbers of the base graph, that is, to generate a new table and use the new table to guide the construction of the LDPC base graph.

[0164] For example, when the number of information columns K′ actually required is less than the maximum number of information columns corresponding to the maximum-scale base graph, the maximum-scale base graph 1 to K′ is intercepted as the information columns of the LDPC basis matrix supporting the number of information columns K′. The connection relationship and translation value of the matrix area corresponding to the information columns of the LDPC basis matrix and all the check columns can also be obtained according to Table 1.

[0165] It should be noted that the 1 to K′ information columns may be intercepted in sequence, or may be intercepted in another sequence specified by the standard, and this application does not impose any limitation on this.

[0166] For example, for base graph BG1, the column indexes of the corresponding core check columns are 22-25. LS =3, according to the table base graph BG1, the first row value of the core check matrix B corresponds to column indexes 22 and 23, which are 1 and 0. Similarly, the connection relationship and translation value corresponding to the information columns 1 to K' can be obtained. For the sake of brevity, we will not repeat them here.

[0167] In a first example of the first LDPC base matrix, the first LDPC base matrix is ​​a base matrix of nested information columns compatible with BG1, that is, the first LDPC base matrix includes BG1 and additional information columns.

[0168] Specifically, when K′=22, the base graph corresponding to the 1st to 22nd columns of information of the largest base graph is 5G BG1.

[0169] Table 1 Schematic diagram of the largest scale base map

[0170] FIG8 is an example diagram of a basis matrix of a nested information column compatible with BG1.

[0171] In a specific implementation, as shown in Figure 8, when the first LDPC base matrix includes BG1 and additional information columns, the first LDPC base matrix is ​​a core matrix, wherein portion A includes the BG1 information columns and the added additional information columns, and portion B corresponds to the core parity check digits including the core parity check digits of BG1. Furthermore, the first LDPC base matrix and BG1 have the same lifting factor set, so the first LDPC base matrix is ​​compatible with the 5G coding scheme with minimal modification.

[0172] BG1 represents base graph 1 in the 5G communication protocol, i.e., Table 5.3.2-2 in 3GPP protocol 38.212. The boosting factor set is a set of multiple boosting factors in exponential form. More specifically, it can be the boosting factor set in the 5G communication protocol, i.e., Table 5.3.2-1 in 3GPP protocol 38.212. In another possible implementation, the maximum value of each group in the boosting factor set is twice the maximum value of each group in the above communication protocol.

[0173] Exemplarily, part A includes information columns 1 to 22 of BG1 and additional information columns added in columns 23 to 33, and part B includes 4 core check columns of BG1, so the core check number is 4.

[0174] In addition, the additional information column portion of the first LDPC base matrix does not have any edges in the 5th row. Therefore, the first LDPC base matrix can have a degree distribution structure of 5G, thereby having a good decoding threshold.

[0175] The following is an exemplary description of the puncturing threshold corresponding to the first LDPC base matrix when the first LDPC base matrix is ​​a base matrix of a nested information column compatible with BG1, where the puncturing threshold is the upper limit of the puncturing number.

[0176] Exemplarily, when the target code rate is higher than the core matrix code rate of BG1, the high code rate requirement can be adapted by adding information columns. In this case, the matrix obtained after adding the information columns is the first LDPC base matrix, and the puncturing threshold corresponding to the first LDPC base matrix is ​​less than or equal to 2. If the number of information columns of the first LDPC base matrix after adding the information columns reaches the maximum number of information columns and the puncturing number is greater than 2, the last check bit is punctured. In this case, the puncturing threshold corresponding to the first LDPC base matrix is ​​greater than 2 and less than or equal to 3. If the number of information columns of the first LDPC base matrix reaches the maximum number of information columns and the puncturing number is greater than 2, in addition to puncturing information column 1 and information column 2, the extended check column is also punctured. In this case, the puncturing threshold corresponding to the first LDPC base matrix is ​​greater than 2 and less than or equal to 3.

[0177] Exemplarily, when the default puncturing number of the first LDPC base matrix is ​​2, if the target code rate is lower than the threshold R0, the first LDPC base matrix includes the core check column and the extended check column of BG1, as shown in Figure 8. The first LDPC base matrix is ​​a matrix area composed of the information column part, the additional information column part and the 1st to 5th columns of the check column part of BG1 in rows 1 to 5 in Figure 8. The 1st to 5th check columns include the 1st to 4th core check columns and the 5th extended check column. When puncturing, in addition to puncturing information column 1 and information column 2, the extended check column will also be punctured. At this time, the puncturing threshold corresponding to the first LDPC base matrix is ​​greater than 2 and less than or equal to 3.

[0178] Exemplarily, when the default puncturing number of the first LDPC base matrix is ​​2, if the target code rate is higher than the threshold R0, the number of information columns and the puncturing number are determined according to S720. At this time, the puncturing threshold corresponding to the first LDPC base matrix is ​​greater than 2 and less than or equal to 3. The first LDPC base matrix can be a base matrix including BG1 and additional information columns, or the first LDPC base matrix can be a base matrix including BG1, additional information columns and extended check columns.

[0179] The threshold R0 is the core matrix code rate of the first LDPC base matrix when only information columns 1 and 2 are punctured. For example, the core matrix code rate may be the core matrix code rate corresponding to the minimum number of information columns supported by the first LDPC base matrix. In another example, the core matrix code rate may be the core matrix code rate corresponding to the maximum number of information columns supported by the first LDPC base matrix.

[0180] The number of information columns supported by the first LDPC base matrix can be a continuous integer with an interval of 2 or 1 within a certain range, such as from K1 column to K2 column can be a continuous integer with an interval of 2 or 1. For example, when K1=2, K2 can take a value of 3 / 2K1 or 2K1, and the number of information columns can be a continuous integer with an interval of 2 or 1, which can make the decoding threshold more optimized and the hardware utilization rate high.

[0181] Figure 9 is a schematic diagram of the high-code-rate puncturing method of BG1. As shown in Figure 9, the first LDPC base matrix is ​​punctured by using a base graph directly constructed using the core part of BG1. The puncturing method of the first LDPC base matrix directly constructed using the core part of BG1 can make the hardware utilization higher.

[0182] Figure 10 is a schematic diagram of a method for puncturing the first LDPC base matrix constructed by adding an additional information column and an extended check column. When the target code rate is higher than the core matrix code rate, the puncturing threshold is set to a value greater than 2 and less than or equal to 3, and the added additional check column is punctured. For example, as shown in Figure 10, an additional last check column is added. When the puncturing threshold is a value greater than 2 and less than or equal to 3, when the information columns 1 and 2 are punctured according to the puncturing rules, the additional last check column is also punctured. The specific puncturing rules are detailed in Figures 13 to 15 and will not be repeated here. The method of puncturing the first LDPC base matrix with an additional information column and an extended check column can make the decoding threshold more optimized.

[0183] In the second example of the first LDPC base matrix, the first LDPC base matrix is ​​a base matrix of nested information columns compatible with a non-punctured matrix, that is, the first LDPC base matrix includes a third LDPC base matrix and an additional information column, the third LDPC base matrix is ​​a non-punctured matrix, and the puncturing threshold corresponding to the third LDPC base matrix is ​​0, that is, the puncturing number corresponding to the third LDPC base matrix is ​​0.

[0184] Figure 11 is an example diagram of a base matrix of nested information columns compatible with a non-punctured matrix, which shows a first LDPC base matrix that includes a third LDPC base matrix and additional information columns and is not punctured. In this case, the first LDPC base matrix is ​​a core matrix, part A of which includes the information columns of the third LDPC base matrix and the added additional information columns, and the core check number corresponding to part B includes the core check number of the third LDPC base matrix.

[0185] A specific implementation method is that the core matrix corresponding to the minimum number of information columns supported by the third LDPC base matrix is ​​a fully connected matrix, that is, the core information column area corresponding to the number of information columns (the above-mentioned part A corresponding to the minimum number of information columns) is a fully connected matrix, and the puncturing threshold corresponding to this third LDPC base matrix is ​​0. It is possible to choose to add information columns without puncturing to support the target code rate, wherein the added information columns are called additional information columns. If there is a number of information columns that can support the target code rate, then this value greater than or equal to the number of information columns is used as the number of information columns of the first LDPC base matrix. If there is no number of information columns that can support the target code rate, then the maximum number of information columns supported by the first LDPC base matrix is ​​selected as the number of information columns of the first LDPC base matrix.

[0186] The following is an exemplary description of the puncturing threshold corresponding to the first LDPC base matrix when the first LDPC base matrix is ​​a base matrix of nested information columns compatible with a non-punctured matrix, where the puncturing threshold is the upper limit of the puncturing number.

[0187] Exemplarily, if the number of information columns of the first LDPC base matrix reaches the maximum number of information columns and the puncturing number is less than or equal to 1, the last check bit of the first LDPC base matrix is ​​punctured, and in this case, the puncturing threshold corresponding to the first LDPC base matrix is ​​less than or equal to 1. If the number of information columns of the first LDPC base matrix reaches the maximum number of information columns and the puncturing number is less than or equal to 1, and the first LDPC base matrix includes a third LDPC base matrix, additional information columns, and extended check columns, only the extended check columns are punctured during puncturing, and in this case, the puncturing threshold corresponding to the first LDPC base matrix is ​​less than or equal to 1.

[0188] Exemplarily, if the target code rate is lower than the threshold R0, the first LDPC base matrix includes a third LDPC base matrix, an additional information column and an extended check column, and only the extended check column is punctured during puncturing. At this time, the puncturing threshold corresponding to the first LDPC base matrix is ​​less than or equal to 1.

[0189] Exemplarily, if the target code rate is higher than the threshold R0, the number of information columns and the number of puncturing are determined according to S720. The first LDPC base matrix may be a base matrix including a third LDPC base matrix and additional information columns, or the first LDPC base matrix may be a base matrix including a third LDPC base matrix, additional information columns and extended check columns. In this case, the puncturing threshold corresponding to the first LDPC base matrix is ​​0.

[0190] In the second example of the first LDPC base matrix, the threshold R0 is the core matrix code rate of the first LDPC base matrix when no puncturing is performed on the first LDPC base matrix. For example, the core matrix code rate may be the core matrix code rate corresponding to the minimum number of information columns supported by the first LDPC base matrix. In another example, the core matrix code rate may be the core matrix code rate corresponding to the maximum number of information columns supported by the first LDPC base matrix.

[0191] The first LDPC basis matrix in the above two examples may also be stored in the form of a maximum-scale basis table, and the first LDPC basis matrix may be obtained according to the number of information columns actually required and the maximum-scale basis table.

[0192] S720: The transmitting end device determines the number of information columns and the number of puncturing according to the target code rate and the first LDPC base matrix.

[0193] The number of information columns is used to determine a second LDPC base matrix, which is a submatrix of the first LDPC base matrix. The target code rate is a coding code rate corresponding to a predefined LDPC code (eg, specified by a protocol or predetermined by a transmitting and receiving device).

[0194] Since the information bit sequence is obtained, a given target information bit length, that is, the information length K corresponding to the information bit sequence, is selected according to the given information length K and the target code rate. Since the code rate = information length / code length, the appropriate first LDPC basis matrix can also be selected according to the given information length and code length, or the appropriate first LDPC basis matrix can also be selected according to the given code length and target code rate. The first LDPC basis matrix is ​​selected from a plurality of predefined LDPC basis matrices (or LDPC basis graphs).

[0195] Fig. 12 is a schematic flow chart of determining the number of information columns and the number of punctures, including S810 and S820.

[0196] S810: Determine a candidate information column number set, a puncturing threshold, and a puncturing sequence according to a target code rate and a first LDPC base matrix.

[0197] Specifically, according to the target code rate, the candidate information column number set S supported by the first LDPC base matrix is ​​determined: kAnd the alternative lifting size set S z .

[0198] Among them, S k ={K1,K2,…,K t}, the information column number set is the number of information columns supported by the first LDPC base matrix, where K1 is the minimum number of information columns corresponding to the first LDPC base matrix, and K t The maximum number of information columns corresponding to the first LDPC base matrix. The value range in the information column number set is from the minimum number of information columns to the maximum number of information columns supported by the first LDPC base matrix. This information column number set is only an example, and the information columns in the information column number set can be stored in other orders, such as K t Can be anywhere in the collection.

[0199] Exemplarily, the minimum number of information columns supported by the first LDPC base matrix is ​​22, and the maximum number of information columns is 33, and the set of information column numbers includes any one or more natural numbers from 22 to 33.

[0200] The set of candidate information column numbers corresponding to the first LDPC base matrix is ​​stored in the form of a table, where the set of candidate information column numbers includes one or more candidate information column numbers supported by the first LDPC base matrix, where each of the one or more candidate information column numbers is used to indicate the number of information columns selected from the first LDPC base matrix, and the set of candidate information column numbers corresponds to the first LDPC base matrix.

[0201] For example, BG1 corresponds to a candidate information column set table that stores the candidate information column numbers supported by BG1; BG2 corresponds to a candidate information column set table that stores the candidate information column numbers supported by BG2. The number of information columns is called the information column count. For example, BG1 supports 22 candidate information columns, while BG2 supports 10 candidate information columns.

[0202] In addition, since code rate = information length / code length, the target information length can be obtained when the target code length and target code rate are known, or the target code length and target information length can be obtained when the target code rate is known, or the target code length and target code rate can be obtained when the target information length and target code rate are known. That is, the target code rate can also be determined based on the target information length and the target code length.

[0203] The target code length E is the length of the bits to be transmitted, or it can also be the number of transmitted bits corresponding to the coded and modulated symbol. The target code rate R is the ratio of the number of information bits to the number of transmitted bits, i.e., code rate = number of information bits / number of transmitted bits. Therefore, the number of information bits can be obtained from the code length and code rate. The number of information bits corresponds to the information length K of the information bit sequence. The information length can be the number of information bits to be transmitted or the number of information bits to be transmitted. The number of information bits can include or exclude the cyclic redundancy check (CRC) bits.

[0204] The target code length, target code rate, and target information length may be pre-configured by higher-layer signaling, the multiple access channel (MAC) layer, or the downlink physical layer signal, or may be directly obtained and calculated by the transceiver.

[0205] The target code rate R can be the initial transmission code rate specified in the MCS, or it can be determined by the formula R=K / E based on the number of information bits K and the number of transmitted bits E, or it can be determined based on the number of resources, where the initial transmission code rate is the code rate when the bit sequence is sent for the first time.

[0206] Specifically, the target code length can be determined by the frame structure, number of layers, and modulation scheme for encoding and transmitting information bits; the target code rate can be determined by high-layer signaling, MAC layer, physical layer indication, or directly given in the MCS table.

[0207] Specifically, a corresponding puncturing threshold γ is determined based on the first LDPC base matrix. The puncturing threshold can be any value. In one possible implementation, the puncturing threshold can also be a continuous value within a certain interval, with a specific interval of 0.25, 0.5, or 1. For example, the puncturing threshold can be a value in the set {0, 0.25, 0.5, 0.75, 1, ..., 2}, or a value in the set {0, 0.5, 1, ..., 2}, or a value in {0, 1, 2}.

[0208] Specifically, one or more corresponding puncturing sequences are determined based on the first LDPC base matrix. The one or more puncturing sequences corresponding to the first LDPC base matrix are stored in a table format. For example, for BG1, a puncturing sequence table, such as a first puncturing sequence, includes one or more puncturing sequences supported by BG1; and for BG2, a puncturing sequence table, such as a second puncturing sequence, includes one or more puncturing sequences supported by BG2.

[0209] It should be understood that the above-mentioned puncture sequence can be some sequences stored in the form of a table, or it can be a sequence composed of puncture positions determined by the number of punctures described in the standard. For example, when the number of punctures is 2, the corresponding BG1 information column is the first two columns. This application does not limit this.

[0210] The puncturing sequence is a set of permutations of any columns of the first LDPC base matrix.

[0211] For example, when the first LDPC base matrix includes an extended parity check column, the length of the puncturing sequence of the first LDPC base matrix is ​​the sum of the maximum number of information columns, the core parity check number, and 1. The puncturing sequence corresponding to the first LDPC base matrix is ​​symbolically represented as {1, 2, ..., kb max +C+1} substitution, kb max is the maximum number of information columns supported by the first LDPC basis matrix, C is the core check number of the first LDPC basis matrix, kb max +C+1 represents the last extended check column of the first LDPC basis matrix; when i∈{1,2,…,kb max +C+1}, represents the i-th column of the first LDPC base matrix. If the length of the punctured sequence is limited, the punctured sequence corresponding to the first LDPC base matrix can also be a subsequence of the punctured sequence. In this case, the length of the punctured sequence corresponding to the first LDPC base matrix is ​​the length of the subsequence.

[0212] It should be understood that the above puncturing sequence is only an example. The order in the puncturing sequence is not fixed. The columns of the first LDPC base matrix corresponding to the puncturing sequence can be in any order. The i-th position of the puncturing sequence corresponds to the i-th priority punctured matrix column. For example, when i=2, the first column of the puncturing sequence is the second column of the first LDPC base matrix. When i=kb max When the first column of the puncturing sequence is the kbth column of the first LDPC basis matrix max The order of columns, that is, any columns of the corresponding first LDPC basis matrix in the puncturing sequence is not fixed.

[0213] It should be noted that the above description of the puncture sequence is only an exemplary description. The name of the puncture sequence, the specific presentation form or the description method of the puncture sequence does not constitute a limitation on the scheme of the embodiment of the present application. The puncture sequence can be presented in the form of a sequence, or in the form of pseudocode, or in other forms that can indicate the position of the puncture. This application does not limit this.

[0214] S820: Determine the number of information columns and the number of puncturing according to the target bit rate, the candidate information column number set, and the puncturing threshold.

[0215] Specifically, for the candidate information column number set S corresponding to the first LDPC base matrix k ={K1,K2,…,K t} any information column number K i ∈S k , number of holes P i According to the number of information columns K i , the core check number C of the first LDPC basis matrix and the target code rate R are determined, and the formula is expressed as P i =K i +CK i / R; and because E=K i / R, number of holes punched P i It can also be calculated based on the target code length E and the number of information columns K. i and the core check number C of the first LDPC basis matrix, where the number of information columns K i Is a positive integer.

[0216] In one possible implementation, when the first LDPC base matrix is ​​a core matrix, that is, the first LDPC base matrix does not include extended parity check columns, the number of information columns and the number of puncturing are determined as follows:

[0217] Step 1: For a K i , when K i +CK i When / R≥0, P i P i =K i +CK i / R, the P i It can be an integer or a decimal. i and P i Listed as the first candidate; or, when P i ≥0, The P i is an integer, and this K i and P i Listed as the first candidate.

[0218] For example, for an information column number K1=22, when K1+C-K1 / R≥0, and P1=K1+C-K1 / R's P1=1, K1=22 and P1=1 are listed as the first candidates; for another example, for an information column number K2=23, when K2+C-K2 / R≥0, and P2=K2+C-K2 / R's P2=2, K2=23 and P2=2 are listed as the first candidates, and so on, to screen out the combination of information column number and puncturing number that meets the target bit rate.

[0219] From this we can see that the first candidate is multiple K i and P i Combination, where Ki and P i One to one correspondence.

[0220] Another possible implementation is to pre-set multiple sets of puncture numbers, such as a set of values ​​{0, 0.25, 0.5, 0.75, 1, ..., 2} with an interval of 0.25, or a set of values ​​with an interval of 0.5 or 1. The actual selected puncture number P is i Belong to this set. For any punching number P in the preset punching number set i , according to P i =K i +CK i / R Calculate P i The corresponding K i , this K i and P i Listed as the first candidate.

[0221] Step 2: For the first candidate K i and P i Combination, according to P i The value is compared with the puncturing threshold corresponding to the first LDPC base matrix to determine the number of information columns and the number of puncturing.

[0222] Specifically, for the first candidate K i and P i Combination, when P i When it is less than the punching threshold, the K i and P i Listed as the second candidate; when all P in the first candidate i When it is greater than or equal to the puncturing threshold, the maximum K among the first candidates is i As the number of information columns, and the maximum K i The corresponding P i as the number of punctures; or, when all P in the first candidate i When the puncture threshold is greater than or equal to the puncture number, the puncture number is the minimum P among the first candidates. i , the number of information columns is the minimum P i The corresponding K i .

[0223] Another possible implementation is to introduce multiple puncturing thresholds γ and classify them into levels. The same level has the same number of information columns. Therefore, the number of information columns and the number of punctures corresponding to the level can also be determined based on the level corresponding to the puncturing threshold.

[0224] Another possible implementation method is to not filter according to the threshold and set P i Filter in ascending order to determine the number of punch holes and information columns.

[0225] Another possible implementation method is to select the maximum number of information columns K i , according to the maximum K i , the core check number C of the first LDPC base matrix and the target code rate, determine the K i The corresponding number of holes P i .

[0226] Step 3: When there are at least two K i and P i When combining, the maximum K among the second candidates i As the number of information columns, the number of punctures is the maximum K among the second candidates i The corresponding P i ; or the minimum K in the second candidate i As the number of information columns, the number of punctures is the minimum K among the second candidates i The corresponding P i ; Or determine the number of information columns and punching numbers based on hardware utilization.

[0227] The hardware utilization rate may be the parallelism of the current operation, reading, and storage of the hardware. More specifically, the hardware utilization rate may be determined based on the maximum value of the boosting factor and the currently used boosting factor.

[0228] Another possible implementation method is, specifically, when the first LDPC base matrix is ​​selected for a high code rate, when the number of information columns in the information column number set corresponding to the first LDPC base matrix is ​​greater than a certain number of information columns, the core matrix code rate of the base matrix corresponding to these information columns is higher than the target code rate. In order to reduce the core matrix code rate to reach the target code rate or to be lower than the target code rate, an extended check column is added to the core matrix part corresponding to these information columns for puncturing. At this time, the corresponding K i +CK i / R<0. When the first LDPC base matrix is ​​a core matrix plus one extended parity column, that is, the first LDPC base matrix includes one extended parity column, the number of information columns and the number of puncturing are determined as follows:

[0229] The difference from the above step 1 is that P i =K i +CK i / R+1, for a K i , when K i +CK i / R+1≥0, P i P i =K i +CK i / R+1, the P i It can be an integer or a decimal. iand P i Listed as the first candidate; or, when P i ≥0, The P i is an integer, and this K i and P i The remaining steps are the same and will not be described here for brevity.

[0230] During the screening of the number of information columns supported by the first LDPC base matrix, the core matrix code rate of the base matrix corresponding to the number of information columns may be higher than the target code rate. Therefore, an additional extended parity check column is introduced to reduce the core matrix code rate to below the target code rate. Puncturing the extended parity check column ensures that only predetermined information bits are punctured in the core matrix portion of the second LDPC base matrix with the final number of information columns, without additional core parity check bits. This helps maintain the decoding threshold. Furthermore, the core matrix portion of the second LDPC base matrix is ​​prevented from having a row containing three or more punctured bits, effectively improving convergence speed.

[0231] The corresponding number of information columns and puncture numbers obtained in the above screening process are stored to obtain a corresponding table of target bit rate and number of information columns, or a corresponding table of target bit rate and number of information columns and puncture numbers, or a corresponding table of target bit rate and number of punctures.

[0232] The screening scheme that controls the number of punctures within the threshold range has a continuous characteristic for the bit rate, so the target bit rate can be segmented, each segment corresponding to a number of information columns and a number of punctures. The protocol stores the segmented form of the supported bit rates, divided into intervals (a1, b1], (a2, b2], ..., (a k ,b k ], the code rate of each segment is obtained according to the above screening process, and the corresponding information column number and puncture number are obtained. The results are stored to obtain a corresponding table of code rate and information column number. The table can store the number of information columns corresponding to the code rate interval, the number of information columns and puncture number corresponding to the code rate interval, or the number of puncture number corresponding to the code rate interval. The segmentation of the interval can be (a k ,b k ), or [a k ,b k ), or [a k ,b k ] This application does not limit this.

[0233] For the convenience of description, the following is divided into intervals according to the bit rate (a k ,b k ], and the table describes the number of information columns corresponding to the bit rate range.

[0234] Another implementation method for determining the number of information columns and the number of punctures is to determine the number of information columns and the number of punctures according to the target code rate and a pre-stored table.

[0235] Pre-store a corresponding table of code rate intervals and the number of information columns. For example, for code rate intervals (a1, b1], (a2, b2],..., (a t , b t , where a i+1 = b i , and the corresponding numbers of information columns are K1, K2,..., K t . If the target code rate R is within the interval (a t , b t , then select K t as the number of information columns to be used, and determine the number of punctures P t corresponding to K t based on K t , the core check number C of the first LDPC base matrix, and the target code rate R.

[0236] Among them, the number of information columns can satisfy K1 < K2 <... < K t , showing a monotonically increasing trend. The endpoints a i , b i of the interval are where K min is the minimum value of the number of information columns supported by the first LDPC base matrix, x is a positive integer, and P is the number of punctures corresponding to the number of information columns K min + x or the number of information columns K min + x + 1. In this case, the left endpoint a i of each interval is and the right endpoint b i is

[0237] Another possible implementation method is that when the target code rate is greater than a certain predetermined threshold, that is, when the code rate does not depend on the above fixed interval endpoints, only a single information column is used. That is, when the target code rate is greater than the predetermined threshold, determine the number of information columns corresponding to the target code rate. For example, when there are K1 and K2, where K1 < K2, then when the target code rate is greater than the predetermined threshold, the determined number of information columns is K2. Among them, the predetermined threshold can be the core matrix code rate corresponding to the maximum number of information columns supported by the first LDPC base matrix. The number of information columns is fixed when the target code rate is lower than the predetermined first threshold a and / or higher than the predetermined second threshold b.

[0238] Another possible implementation method is that the code rate interval includes a first interval, the first interval corresponds to the first number of information columns, and when the target code rate does not belong to the first interval, the target code rate corresponds to the second number of information columns; or, the code rate interval includes the first interval and the second interval, the second interval corresponds to the second number of information columns, when the target code rate does not belong to the first interval and the second interval, the target code rate corresponds to the third number of information columns; or, the code rate interval includes the first interval, the second interval and the third interval, the third interval corresponds to the third number of information columns, when the target code rate does not belong to the first interval, the second interval and the third interval, the target code rate corresponds to the fourth number of information columns.

[0239] Specifically, for intervals within a predetermined threshold, such as (a1, b1], (a2, b2], the corresponding information columns are K1 and K2 respectively, and the number of information columns corresponding to the target bit rates that do not belong to the bit rate interval is K3, or it can be understood that the number of information columns corresponding to the remaining bit rate intervals except the bit rate interval is K3. For another example, for intervals within a predetermined threshold, such as (a1, b1], (a2, b2], (a3, b3], the corresponding information columns are K1, K2, and K3 respectively, and the number of information columns corresponding to the target bit rates that do not belong to the bit rate interval is K4, or it can be understood that the number of information columns corresponding to the remaining bit rate intervals except the bit rate interval is K4. The number of information columns corresponding to the remaining bit rate intervals is K4. The above-mentioned predetermined threshold value can be 1, 2 or 3, which represents the number of intervals obtained according to the predetermined threshold value. For example, for the bit rate interval within threshold 2, it can be 0, or it can also be 1, such as (a1, b1], or it can also be 2, such as (a1, b1], (a2, b2], when the target bit rate does not belong to the bit rate interval within the threshold, the corresponding number of information columns is the same. In a possible implementation manner, the number of information columns corresponding to the remaining bit rate intervals can be greater than a certain threshold b, and less than a certain threshold a.

[0240] The above-mentioned table of correspondence between target bit rate and number of information columns, or the table of correspondence between target bit rate and number of information columns and number of puncturing, or the table of correspondence between target bit rate and number of puncturing may have an index or may not have an index, and this application does not limit this.

[0241] It should be noted that the table is only a form of indicating the existence of a corresponding relationship and does not limit the solution itself. The corresponding relationship can also be expressed by mathematical formulas, corresponding rules, etc., and this application does not limit this.

[0242] It should be understood that the above method can determine the number of information columns corresponding to the target bit rate based on a pre-stored correspondence between the target bit rate and the number of information columns, and determine the number of punctures corresponding to the number of information columns based on a pre-stored correspondence between the number of information columns and the number of punctures; or determine the number of information columns corresponding to the target bit rate based on a pre-stored correspondence between the target bit rate and the number of information columns, and determine the number of punctures based on the number of information columns and the target bit rate; or determine the number of information columns and the number of punctures based on a pre-stored correspondence between the target bit rate, the number of information columns, and the number of punctures; or determine the number of punctures corresponding to the target bit rate based on a pre-stored correspondence between the target bit rate and the number of punctures, and determine the number of information columns corresponding to the number of punctures based on the pre-stored correspondence between the number of information columns and the number of punctures; or determine the number of punctures corresponding to the target bit rate based on a pre-stored correspondence between the target bit rate and the number of punctures, and determine the number of information columns based on the number of punctures and the target bit rate. Determining the number of punctures based on the number of information columns and the target bit rate, or determining the number of information columns based on the number of punctures and the target bit rate has been described in detail above and will not be further described here.

[0243] S730: The transmitting end device encodes the information bit sequence according to the second LDPC base matrix to obtain a first LDPC codeword sequence.

[0244] The second LDPC base matrix is ​​determined according to the number of information columns obtained in S720.

[0245] Specifically, the first LDPC base matrix is ​​truncated according to the number of information columns obtained above to obtain a second LDPC base matrix, and the second LDPC base matrix is ​​a submatrix of the first LDPC base matrix.

[0246] For example, the number of information columns supported by the first LDPC base matrix is ​​22 to 33. According to the above method, the number of information columns obtained by screening the 22 to 33 information columns is 24. Therefore, the first LDPC base matrix is ​​truncated using this number of information columns to obtain a second LDPC base matrix with only 24 information columns. The number of information columns of the second LDPC base matrix can also be equal to the maximum number of information columns of the first LDPC base matrix. In this case, the second LDPC base matrix is ​​the first LDPC base matrix.

[0247] S740: The transmitting device punctures the first LDPC codeword sequence according to the puncturing sequence and sends the second LDPC codeword sequence to the receiving device. In other words, the receiving device receives the second LDPC codeword sequence from the transmitting device.

[0248] A puncture sequence is determined based on the puncture number obtained in S720. The puncture sequence is one or more puncture sequences corresponding to the first LDPC base matrix in S710. When the first LDPC base matrix corresponds to one puncture sequence, the puncture sequence determined by the puncture number is the puncture sequence corresponding to the first LDPC base matrix. When the first LDPC base matrix corresponds to multiple puncture sequences, the puncture sequence is determined based on the puncture number as follows:

[0249] When the puncturing number is less than or equal to 1, the first column of the puncturing sequence determined by the puncturing number is the column with the largest column weight among the columns of the first LDPC base matrix.

[0250] For example, Figure 13 shows a schematic diagram of perforating one column in the BG1 core area. As shown in Figure 13 , when perforating one column, the column with the largest column weight can be perforated, i.e., column 1 in Figure 13 . Therefore, when the number of perforations is less than or equal to 1, the perforated column is column 1 in the BG1 core area.

[0251] In the case of puncturing one column, selecting the column with the largest punctured column weight not only improves the reliability of the punctured column but also makes the punctured column decodable with a consistent convergence speed.

[0252] When the puncturing number is greater than 1 and less than or equal to 2, the first two columns of the puncturing sequence determined by the puncturing number are the two columns of the first LDPC base matrix that contain the most checks with a puncturing number less than or equal to 1; or, the first column of the puncturing sequence is the second most heaviest column in the columns of the first LDPC base matrix, and the associated rows of the first column and the second column of the puncturing sequence are inconsistent.

[0253] For example, Figure 14 is a schematic diagram of punching two columns in the BG1 core area. As shown in Figure 14, when punching two columns, the associated rows between the punched columns are inconsistent. Since the associations between the 3rd and 4th rows of the 1st and 2nd columns are consistent, the 1st and 2nd columns are not set as punched columns. Shifting back one column, since the associated rows of the 2nd and 3rd columns are inconsistent, and the 2nd column is the second-heaviest column, the 2nd and 3rd columns are set as punched columns. That is, when the number of punched columns is greater than 1 and less than or equal to 2, the punched columns are the 2nd and 3rd columns of the BG1 core area.

[0254] It should be noted that the inconsistency of the associated rows between the punched columns means that the associated rows between the punched columns are completely different, or at least not completely the same.

[0255] In the case of puncturing two columns, based on the fact that there are more checks with a puncturing number less than or equal to 1, nodes with larger column weights are selected for puncturing so that all punctured columns can be decoded and the convergence speed can be accelerated.

[0256] When the puncture number is greater than 2, the puncture sequence includes the lightest columns in the first LDPC base matrix. That is, when the puncture number is n, the first n columns in the puncture sequence include the lightest columns in the first LDPC base matrix. For example, when the puncture number is 3, the first three columns in the puncture sequence include the lightest columns in the first LDPC base matrix.

[0257] For example, Figure 15 shows a schematic diagram of three columns being punctured in the BG1 core area. As shown in Figure 15 , when puncturing three columns, the columns containing the lightest column weight among the three columns of BG1 are punctured, such as the last column of the checksum column. Therefore, the columns punctured are the second, third, and last columns of the BG1 core area. Figure 15 is merely an example; these three columns are the first three columns in the puncture sequence.

[0258] When the number of punctures is greater than 2, the punctured columns include the columns with the lightest column weight, so that all punctured columns can be decoded and the convergence speed can be accelerated.

[0259] The manner of puncturing the first LDPC codeword sequence according to the puncturing sequence determined by the puncturing number is as follows:

[0260] When the puncturing number x is an integer, the first LDPC codeword sequence is punctured at positions from 1 to the puncturing number in the puncturing sequence, that is, the first LDPC codeword sequence is punctured according to bits 1 to x in the puncturing sequence. It should be understood that bits 1 to x in the puncturing sequence are permutations of columns of the first LDPC base matrix.

[0261] When the puncturing number x is a non-integer, the first LDPC codeword sequence is punctured from the first 1 to the puncturing number rounded up in the puncturing sequence, that is, according to the puncturing number from 1 to The first LDPC codeword sequence is punctured, and the The punching ratio is

[0262] Since the puncturing positions in this solution are not fixed, there are two ways to puncture the first LDPC codeword sequence and output the second LDPC codeword sequence:

[0263] The first method of outputting the second LDPC codeword sequence includes a first transmission and a second transmission, as follows:

[0264] When sending for the first time, the information bit sequence c0,…,c K-1 After encoding by the second LDPC base matrix, the first LDPC codeword sequence is obtained. The first LDPC codeword sequence is the entire coded bit sequence d′=d0,…d N-1, where d′ contains punctured bits, d′ is put into a circular buffer, and non-fixed position and fixed length deletion is performed on the corresponding positions in d′ based on the puncturing sequence; or part of the fixed position and part of the position searched according to the puncturing sequence are deleted, and the second LDPC codeword sequence is output according to the preset bit length.

[0265] During the second transmission, the column of the first LDPC codeword sequence corresponding to the puncturing sequence is used as the starting position to output the second LDPC codeword sequence according to the preset bit length.

[0266] The second method of outputting the second LDPC codeword sequence includes a first transmission and a second transmission, as follows:

[0267] When sending for the first time, the information bit sequence c0,…,c K-1 After encoding by the second LDPC base matrix, the first LDPC codeword sequence is obtained. The first LDPC codeword sequence is the entire coded bit sequence d′=d0,…d N-1 , wherein the punctured bits are not deleted from the first LDPC codeword sequence d′ and all bits enter the cyclic buffer. The bits to be transmitted may be interleaved before entering the buffer, or may be interleaved after entering the buffer. The columns of the punctured sequence corresponding to the first LDPC codeword sequence are interleaved to a preset bit length to obtain a third LDPC codeword sequence. The second LDPC codeword sequence is output from the starting position of the third LDPC codeword sequence in sequence of the preset bit length. The interleaving may be block interleaving or QC-LDPC cyclic unit block-level interleaving, not bit-level interleaving.

[0268] During the second transmission, the column of the puncturing sequence corresponding to the first LDPC codeword sequence is used as the starting position of the third LDPC codeword sequence and the second LDPC codeword sequence is output in sequence according to the preset bit length.

[0269] For example, when sending for the first time, the information bit sequence c0,…,c K-1 After encoding by the second LDPC base matrix, the first LDPC codeword sequence is obtained. The first LDPC codeword sequence is the entire coded bit sequence d′=d0,…d N-1 , wherein the punctured bits are not deleted from the first LDPC codeword sequence d′ and all enter the circular buffer. The bits to be transmitted are interleaved before entering the buffer, or they can be interleaved after entering the buffer. If the preset bit length is m, the columns of the punctured sequence corresponding to the first LDPC codeword sequence are d0, d1, then the third LDPC codeword sequence obtained by interleaving the first LDPC codeword sequence is d″′=d2,…,d 2+m ,d0,d1,d 3+m,…,d N-1 , output a second LDPC codeword sequence d″=d2,…,d from the starting position of the third LDPC codeword sequence of length m 2+m When sending for the second time, the second LDPC codeword sequence output is d″=d0,d1,d 3+m ,…,d 2m+1 .

[0270] For example, when the first LDPC base matrix is ​​a matrix including the third LDPC base matrix and the additional information column, the second LDPC base matrix is ​​a submatrix of the first LDPC base matrix. If the initial transmission of the second LDPC base matrix is ​​at an extremely high code rate, higher than the core matrix code rate, and has a partial puncturing number, then during retransmission, this punctured portion is preferentially transmitted, and the remaining resources are used to transmit extended parity bits.

[0271] When the first LDPC base matrix is ​​a matrix including the third LDPC base matrix and the additional information column, since the first LDPC base matrix is ​​designed for high-speed convergence requirements and has no fixed punctured columns, some columns are punctured only when the target code rate is higher than the maximum core array code rate to support higher code rates. However, when the code rate decreases, the matrix does not have a structure with a degree distribution of punctured columns (large columns are heavily punctured). Therefore, the initially transmitted punctured bits are sent first, always maintaining the characteristics of fast convergence.

[0272] Specifically, all coded bits obtained after encoding the information bit sequence by the second LDPC base matrix enter a circular buffer to be sent. When the initial transmission code rate is higher than the maximum core array code rate, several punctured bits indicated by the puncturing sequence are not sent. In the case of incremental redundancy hybrid automatic repeat request (IR-HARQ), these punctured bits are sent first, and the remaining resources are used to send the bits of the extended parity bits. In the case of chase combining hybrid automatic repeat request (CC-HARQ), these punctured bits are sent first, and the remaining resources are used to send other bits.

[0273] S750: Decode the second LDPC codeword sequence according to the second LDPC base matrix.

[0274] It should be noted that, since the second LDPC codeword sequence may introduce channel noise signals during transmission, the second LDPC codeword sequence output or sent by the transmitting device may be different from the second LDPC codeword sequence received by the receiving device.

[0275] The performance of the LDPC code of the embodiment of the present application is described below in conjunction with simulation results.

[0276] FIG16 shows the simulation results of the performance of 5G BG1 compared with the performance of the basis matrix of the nested information column.

[0277] Figure 16 shows the code rate on the horizontal axis and the signal-to-noise ratio (SNR) on the vertical axis. Figure 17 shows that when the code rate is higher than the core matrix code rate, the performance loss of BG1 compared to the nested information column base matrix gradually increases as the code rate increases. It can be seen that when the code rate is higher than the punctured core matrix code rate of 22 / 24, the nested information column base matrix solution can significantly reduce the performance loss. It should be understood that the base matrix of the nested information column here can be the first LDPC base matrix mentioned above, or it can be a submatrix of the first LDPC base matrix.

[0278] FIG17 shows the performance simulation results of the basis matrix of the nested information column compatible with BG1 at different bit rates.

[0279] In Figure 17, the horizontal axis is the number of information columns, and the vertical axis is the signal-to-noise ratio (SNR) of 1e-2. Figure 18 shows the simulation results of the performance loss of the base matrix puncturing scheme of the nested information columns of base graph 1 (BG1) (that is, the base matrix puncturing scheme of the nested information columns compatible with BG1 of the present application) at different code rates when the code rates are 22 / 23, 22 / 23.25, 22 / 23.5, 0.926, and 22 / 24 respectively. It should be understood that the base matrix of the nested information columns compatible with BG1 here can be the above-mentioned first LDPC base matrix, or it can be a submatrix of the first LDPC base matrix.

[0280] As shown in Figure 17, when the coding rate is 22 / 23, 22 / 23.25, 22 / 23.5, and 0.926, the base matrix of the nested information column compatible with BG1 can match different coding rates. In addition, when the coding rate is greater than the core array rate of 22 / 24, the puncturing scheme using the second LDPC base matrix compatible with BG1 has a higher SNR at each coding rate than the SNR when the coding rate is 22 / 24. That is to say, the base matrix of the nested information column has the advantages of good decoding threshold and fast convergence speed at high code rates, compared with the BG1 in 5G that only has two fixed puncturing columns, and the highest code rate has a gain of 0.4dB.

[0281] Figure 18 is a schematic diagram of the basis matrix form with different numbers of nested information columns. (a) in Figure 18 is the basis matrix form based on BG1, and (b) in Figure 18 and (c) in Figure 18 are basis matrix forms compatible with non-punctured matrices. Among them, (b) in Figure 18 is the basis matrix form with 33 nested information columns, and (c) in Figure 18 is the basis matrix form with 44 nested information columns, and only one column is punctured to support the target bit rate. The performance of (a), (b) and (c) in Figure 18 is simulated at a bit rate of 22 / 23, and the simulation results are shown in Figure 19.

[0282] Figure 19 shows the simulation results of the performance loss of the base matrix at a bit rate of 22 / 23.

[0283] As shown in Figure 19, a base matrix with 44 nested information columns performs better than a base matrix with 33 nested columns and a base matrix based on BG1. A base matrix with only one punctured column in a non-punctured matrix can support the target code rate and maintain fast convergence, with a gain approaching 1dB, compared to a base matrix based on BG1. In other words, the puncturing scheme for the base matrix with nested information columns (i.e., the first LDPC base matrix or the second LDPC base matrix) offers the advantages of faster convergence and a better decoding threshold than existing BG1-based puncturing schemes.

[0284] The above describes in detail the method embodiment provided by the present application in conjunction with Figures 1 to 19 , and the following will describe the device embodiment of the present application in conjunction with Figures 20 to 21 .

[0285] It is understood that, in order to implement the functions in the above embodiments, the apparatus in Figures 20 and 21 includes hardware structures and / or software modules corresponding to the execution of each function. It should be readily apparent to those skilled in the art that, in conjunction with the various exemplary units and method steps described in the embodiments disclosed herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software.

[0286] Figures 20 and 21 are schematic diagrams of possible apparatuses provided in embodiments of the present application. These apparatuses can be used to implement the functions of the transmitting device or the receiving device in the above method embodiments, thereby also achieving the beneficial effects of the above method embodiments.

[0287] FIG20 is a schematic block diagram of a communication device 10 according to an embodiment of the present application. As shown in the figure, the communication device 10 may include: a transceiver unit 11 and a processing unit 12.

[0288] In one possible design, the communication device 10 may be the transmitting device in the above method embodiment, or may be a chip for implementing the functions of the transmitting device in the above method embodiment.

[0289] Specifically, the communication device 10 may correspond to the transmitting end device in method 700 according to an embodiment of the present application, and the communication device 10 may include a unit for executing the method executed by the transmitting end device in method 700 in Figure 7. Furthermore, the various units in the communication device 10 and the other operations and / or functions described above are intended to implement the corresponding process of method 700 in Figure 7. It should be understood that the specific process of each unit executing the corresponding steps described above has been described in detail in the above method embodiment and will not be repeated here for the sake of brevity.

[0290] In another possible design, the communication device 10 may be the receiving device in the above method embodiment, or may be a chip for implementing the functions of the receiving device in the above method embodiment.

[0291] Specifically, the communication device 10 may correspond to the receiving device in method 700 according to an embodiment of the present application, and the communication device 10 may include a unit for executing the method executed by the receiving device in method 700 in Figure 7. Furthermore, the various units in the communication device 10 and the other operations and / or functions described above are intended to implement the corresponding process of method 700 in Figure 7. It should be understood that the specific process of each unit executing the above-mentioned corresponding steps has been described in detail in the above-mentioned method embodiment and will not be repeated here for the sake of brevity.

[0292] It should be understood that the specific process of each unit executing the above corresponding steps has been described in detail in the above method embodiment, and for the sake of brevity, it will not be repeated here.

[0293] It should be understood that the transceiver unit 11 in the communication device 10 may correspond to the transceiver 22 in the communication equipment 20 shown in Figure 21, and the processing unit 12 in the communication device 10 may correspond to the processor 21 in the communication equipment 20 shown in Figure 21.

[0294] Figure 21 is a schematic block diagram of a communication device 20 provided in an embodiment of the present application. As shown, the communication device 20 includes a processor 21 and a transceiver 22. The processor 21 is coupled to a memory and is configured to execute instructions stored in the memory to control the transceiver 22 to transmit and / or receive signals. Optionally, the communication device 20 also includes a memory 23 for storing instructions.

[0295] It should be understood that the processor 21 and memory 23 can be combined into a processing device, and the processor 21 is used to execute the program code stored in the memory 23 to implement the above functions. In specific implementation, the memory 23 can also be integrated into the processor 21 or independent of the processor 21.

[0296] It should also be understood that the transceiver 22 may include a receiver (or receiver) and a transmitter (or transmitter). The transceiver may further include an antenna, and the number of antennas may be one or more.

[0297] In one possible design, the communication device 20 may be the transmitting device in the above method embodiment, or may be a chip for implementing the functions of the transmitting device in the above method embodiment.

[0298] Specifically, the communication device 20 may correspond to the transmitting end device in method 700 according to an embodiment of the present application, and the communication device 20 may include a unit for executing the method executed by the transmitting end device in method 700 in Figure 7. Furthermore, the various units in the communication device 20 and the other operations and / or functions described above are intended to implement the corresponding process of method 700 in Figure 7. It should be understood that the specific process of each unit executing the above-mentioned corresponding steps has been described in detail in the above-mentioned method embodiment and will not be repeated here for the sake of brevity.

[0299] In another possible design, the communication device 20 may be the receiving device in the above method embodiment, or may be a chip for implementing the functions of the receiving device in the above method embodiment.

[0300] Specifically, the communication device 20 may correspond to the receiving device in method 700 according to an embodiment of the present application, and the communication device 20 may include a unit for executing the method executed by the receiving device in method 700 in Figure 7. Furthermore, the various units in the communication device 20 and the other operations and / or functions described above are intended to implement the corresponding process of method 700 in Figure 7. It should be understood that the specific process of each unit executing the above-mentioned corresponding steps has been described in detail in the above-mentioned method embodiment and will not be repeated here for the sake of brevity.

[0301] It should be understood that the specific process of each unit executing the above corresponding steps has been described in detail in the above method embodiment, and for the sake of brevity, it will not be repeated here.

[0302] The present application also provides a communication device, comprising a processor coupled to a memory, the memory being configured to store computer programs or instructions and / or data, the processor being configured to execute the computer programs or instructions stored in the memory, or to read data stored in the memory, to perform the methods described in the above method embodiments. Optionally, there are one or more processors. Optionally, the communication device includes a memory. Optionally, there are one or more memories. Optionally, the memory is integrated with the processor or provided separately.

[0303] The present application also provides a chip, including a processor, which is coupled to a memory, the memory is used to store computer programs or instructions, and the processor is used to execute the computer programs or instructions stored in the memory to implement the methods performed by the sending device or the receiving device in the above-mentioned method embodiments.

[0304] The present application also provides a computer-readable storage medium storing computer instructions for implementing the methods executed by a transmitting device or a receiving device in the above-mentioned method embodiments.

[0305] The present application also provides a computer program product comprising instructions, which, when executed by a computer, implement the methods performed by a transmitting device or a receiving device in the above-mentioned method embodiments.

[0306] The present application also provides a communication system, which includes at least one of the transmitting end device or the receiving end device in the above embodiments.

[0307] The explanation of the relevant contents and beneficial effects of any of the above-mentioned devices can be referred to the corresponding method embodiments provided above, which will not be repeated here.

[0308] It is understood that the processor in the embodiments of the present application may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0309] The method steps in the embodiments of the present application can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, and the software modules can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disks, mobile hard disks, compact disc read-only memory (CD-ROM) or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and storage medium can be located in an ASIC. In addition, the ASIC can be located in a transmitting device or a receiving device. Of course, the processor and storage medium can also be present in a transmitting device or a receiving device as discrete components.

[0310] In the above embodiments, all or part of the embodiments may be implemented using software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are performed in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device, or other programmable device. The computer program or instructions may be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions may be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; an optical medium, such as a digital video disk; or a semiconductor medium, such as a solid-state drive.

[0311] In the various embodiments of the present application, unless otherwise specified or there is a logical conflict, the terms and / or descriptions between different embodiments are consistent and can be referenced by each other. The technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationships.

[0312] As used in this specification, the terms "component," "module," "system," and the like are used to represent computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. By way of illustration, both an application running on a computing device and a computing device can be a component. One or more components can reside in a process and / or an execution thread, and a component can be located on a computer and / or distributed between two or more computers. In addition, these components can be executed from various computer-readable media having various data structures stored thereon. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component on a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0313] Those skilled in the art will appreciate that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented using electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0314] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0315] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the unit is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0316] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of the solution of this embodiment according to actual needs.

[0317] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0318] In the above embodiments, the functions of each functional unit can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When software is used for implementation, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions (programs). When the computer program instructions (programs) are loaded and executed on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website, computer, server or data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) mode to another website, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrations. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (eg, a solid state disk (SSD)).

[0319] If this function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method of each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store program code.

[0320] Unless otherwise specified, all technical and scientific terms used in the embodiments of this application have the same meanings as those commonly understood by those skilled in the art. The terms used in this application are only for the purpose of describing specific embodiments.

[0321] It is not intended to limit the scope of this application. It should be understood that the above is for illustration only, and the above examples are only to help those skilled in the art understand the embodiments of the present application, rather than to limit the application embodiments to the specific numerical values ​​or specific scenarios illustrated. Those skilled in the art can obviously make various equivalent modifications or changes based on the examples given above, and such modifications and changes also fall within the scope of the embodiments of the present application.

[0322] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A communication method based on low-density parity-check codes, characterized in that: include: Determine the number of information columns and the number of puncturing according to a target code rate and a first low-density parity-check code LDPC base matrix, wherein the number of information columns is used to determine a second LDPC base matrix, and the second LDPC base matrix is ​​a submatrix of the first LDPC base matrix; Encoding the information bit sequence using the second LDPC base matrix to obtain a first LDPC codeword sequence; The first LDPC codeword sequence is punctured according to a puncturing sequence to output a second LDPC codeword sequence, wherein the puncturing sequence is determined according to the puncturing number.

2. The method according to claim 1, characterized in that According to the target code rate and the first LDPC base matrix, the number of information columns and the number of puncturing are determined, including: Determine the number of information columns corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of information columns, and determine the number of punctures corresponding to the number of information columns according to a pre-stored correspondence between the number of information columns and the number of punctures; or Determine the number of information columns corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of information columns, and determine the number of puncturing according to the number of information columns and the target code rate; or, Determine the number of information columns and the number of puncturing according to a pre-stored correspondence between the target bit rate, the number of information columns, and the number of puncturing; or, Determine the number of punctures corresponding to the target code rate according to a pre-stored correspondence between the target code rate and the number of punctures, and determine the number of information columns corresponding to the number of punctures according to a pre-stored correspondence between the number of information columns and the number of punctures; or The number of punctures corresponding to the target code rate is determined according to a pre-stored correspondence between the target code rate and the number of punctures, and the number of information columns is determined according to the number of punctures and the target code rate.

3. The method according to claim 2, characterized in that The pre-stored correspondence between the target code rate and the number of information columns is a correspondence between a code rate interval to which the target code rate belongs and the number of information columns, wherein endpoints of the code rate interval are determined according to the number of information columns, the number of puncturing, and the number of core checks of the first LDPC base matrix.

4. The method according to claim 2, characterized in that: The pre-stored correspondence between the target code rate and the number of information columns and the number of punctures is the correspondence between the code rate interval to which the target code rate belongs and the number of information columns and the number of punctures, wherein the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures and the core check number of the first LDPC base matrix.

5. The method according to claim 2, characterized in that: The pre-stored correspondence between the target code rate and the number of punctures is the correspondence between the code rate interval to which the target code rate belongs and the number of punctures, wherein the endpoints of the code rate interval are determined according to the number of information columns, the number of punctures and the core check number of the first LDPC base matrix.

6. The method according to claim 2, characterized in that The corresponding relationship between the target bit rate and the number of information columns is the number of information columns corresponding to the target bit rate when it is greater than a predetermined threshold, and the number of information columns is fixed when the target bit rate is lower than a predetermined first threshold and / or higher than a predetermined second threshold.

7. The method according to claim 2 or 3, characterized in that: As the target bit rate increases, the number of information columns corresponding to the target bit rate increases monotonically.

8. The method according to claim 2, characterized in that: The corresponding relationship between the target bit rate and the number of information columns includes: The code rate interval to which the target code rate belongs includes a first interval, the first interval corresponds to a first number of information columns, and when the target code rate does not belong to the first interval, the target code rate corresponds to a second number of information columns; or, The code rate interval to which the target code rate belongs includes the first interval and the second interval, the first interval corresponds to the first number of information columns, the second interval corresponds to the second number of information columns, and when the target code rate does not belong to the first interval and the second interval, the target code rate corresponds to a third number of information columns; or The code rate interval to which the target code rate belongs includes the first interval, the second interval and the third interval, the first interval corresponds to the first number of information columns, the second interval corresponds to the second number of information columns, and the third interval corresponds to the third number of information columns. When the target code rate does not belong to the first interval, the second interval and the third interval, the target code rate corresponds to the fourth number of information columns.

9. The method according to any one of claims 3 to 5, characterized in that: The endpoints of the code rate interval are determined according to the number of information columns, the number of punctures, and the number of core checks of the first LDPC base matrix, including: The left endpoint of the bit rate interval is The right endpoint is Among them, the K min is the first LDPC basis The minimum number of information columns supported by the matrix, wherein x is a positive integer, C is the core check number of the first LDPC base matrix, and P is the number of puncturing corresponding to the number of information columns.

10. The method according to claim 1, characterized in that The step of determining the number of information columns and the number of puncturing according to the target code rate and the first LDPC base matrix includes: For any information column number K in the candidate information column number set corresponding to the first LDPC base matrix i , the K i and the number of holes P i Listed as the first candidate, where the P i According to the K i , the core check number of the first LDPC base matrix and the target code rate are determined, or, for any puncturing number P in a preset puncturing number set i , the P i and the number of information columns K i Listed as the first candidate, among which, the K i According to the P i , the core check number of the first LDPC base matrix and the target code rate are determined, the K i is a positive integer, the P i is a non-negative number; For the first candidate K i and P i Combination, according to the P i The number of information columns and the number of punctures are determined by comparing with the puncture threshold corresponding to the first LDPC base matrix; or, according to the level corresponding to the puncture threshold, the number of information columns and the number of punctures corresponding to the level are determined.

11. The method according to claim 10, characterized in that According to the P i The method of comparing the number of information columns and the number of puncturing with the puncturing threshold corresponding to the first LDPC base matrix to determine the number of information columns and the number of puncturing comprises: For the first candidate K i and P i combination, when the P i When it is less than the perforation threshold, the K i and P i Listed as the second candidate; when all P in the first candidate i When it is greater than or equal to the puncturing threshold, the number of information columns is the maximum K among the first candidates. i , the number of holes is the maximum K i The corresponding P i Or, when all P in the first candidate i When it is greater than or equal to the puncturing threshold, the puncturing number is the minimum P among the first candidates. i , the number of information columns is the minimum P i The corresponding K i .

12. The method according to claim 11, characterized in that When there are at least two K i and P i When combined, the number of information columns is the maximum K among the second candidates i The number of punctures is the maximum K among the second candidates i The corresponding P i ; or the number of information columns is the minimum K among the second candidates i , the number of puncturing is the minimum K among the second candidates i The corresponding P i ; or determine the number of information columns and the number of punching holes based on hardware utilization.

13. The method according to claim 1, characterized in that The puncturing sequence is determined according to the puncturing number, including: When the puncturing number is less than or equal to 1, the first column of the puncturing sequence is a column with the largest column weight among the columns of the first LDPC base matrix; When the puncturing number is greater than 1 and less than or equal to 2, the first two columns of the puncturing sequence are the two columns of the first LDPC base matrix that contain the most checks with the puncturing number less than or equal to 1; or, the first column of the puncturing sequence is the second most important column in the columns of the first LDPC base matrix, and the associated rows of the first column and the second column of the puncturing sequence are inconsistent; When the puncturing number is greater than 2, the first three columns of the puncturing sequence include columns with the lightest column weight among the columns of the first LDPC base matrix.

14. The method according to claim 1, characterized in that Puncturing the first LDPC codeword sequence according to the puncturing sequence includes: When the puncturing number is an integer, puncturing the first LDPC codeword sequence at a position from 1 to the puncturing number before the puncturing sequence; When the puncturing number is a non-integer, the first LDPC codeword sequence is punctured at a position from the first 1 of the puncturing sequence to a position rounded up to the puncturing number.

15. The method according to any one of claims 1 to 14, characterized in that The puncturing sequence is a set of permutations of any columns of the first LDPC base matrix.

16. The method according to claim 1, characterized in that The first LDPC base matrix includes a base graph 1 and an additional information column.

17. The method according to claim 16, characterized in that The first LDPC base matrix has the same lifting factor set as the base graph 1, and the fifth row of the additional information column part does not have any connecting edge.

18. The method according to claim 1, characterized in that The first LDPC base matrix includes a third LDPC base matrix and an additional information column, and the puncturing threshold corresponding to the third LDPC base matrix is ​​0.

19. The method according to claim 18, characterized in that The core matrix corresponding to the minimum number of information columns supported by the third LDPC base matrix is ​​a fully connected matrix.

20. The method according to claim 1, characterized in that The outputting the second LDPC codeword sequence comprises: During the first transmission, the corresponding position of the first LDPC codeword sequence is deleted according to the puncturing sequence, and then the second LDPC codeword sequence is output according to a preset bit length; During the second transmission, the second LDPC codeword sequence is outputted according to the preset bit length using the column of the first LDPC codeword sequence corresponding to the puncturing sequence as the starting position.

21. The method according to claim 20, characterized in that Outputting the second LDPC codeword sequence includes: interleave the first LDPC codeword sequence and input it into a circular buffer, and output the second LDPC codeword sequence; or, The first LDPC codeword sequence is input into a circular buffer and interleaved, and the second LDPC codeword sequence is output.

22. The method according to claim 21, characterized in that Outputting the second LDPC codeword sequence includes: During the first transmission, outputting the second LDPC codeword sequence from the starting position of the third LDPC codeword sequence according to the preset bit length, wherein the third LDPC codeword sequence is a sequence obtained by interleaving the first LDPC codeword sequence, and a column corresponding to a puncturing sequence in the third LDPC codeword sequence is after the preset bit length; During the second transmission, the column of the puncturing sequence corresponding to the first LDPC codeword sequence is used as the starting position of the third LDPC codeword sequence, and the second LDPC codeword sequence is output according to the preset bit length.

23. A communication method based on low-density parity-check code, characterized in that: include: Receiving a second LDPC codeword sequence; Decoding the second LDPC codeword sequence according to a second LDPC base matrix, the second LDPC base matrix is ​​determined according to the number of information columns, the second LDPC codeword sequence is obtained by puncturing the first LDPC codeword sequence according to a puncturing sequence, the puncturing sequence is determined according to the number of puncturing; the second LDPC base matrix is ​​a submatrix of the first LDPC base matrix; The number of information columns and the number of puncturing are determined according to a target code rate and the first LDPC base matrix.

24. A communication device, characterized in that: It includes a processor and an interface circuit, wherein the interface circuit is used to receive signals from other communication devices outside the communication device and transmit them to the processor or send signals from the processor to other communication devices outside the communication device, and the processor is used to implement the method as described in any one of claims 1 to 22 through a logic circuit or executing code instructions.

25. The communication device according to claim 24, characterized in that The communication device is a chip or a chip system.

26. A computer-readable storage medium, characterized in that: The storage medium stores a computer program or an instruction, and when the computer program or the instruction is executed by the communication device, the method according to any one of claims 1 to 22 is implemented.

27. A computer program product, characterized in that The invention comprises a computer program which, when being executed, implements the method according to any one of claims 1 to 22.

28. A communication system, characterized in that: include: A sending end device for executing the method according to any one of claims 1 to 22; A receiving device for executing the method as claimed in claim 23.

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