Wafer-based solar cell, and method for manufacturing such a wafer-based solar cell

Abstract

The invention relates to wafer-based solar cell comprising a semiconductor wafer that is made of monocrystalline or polycrystalline silicon semiconductor material and has a semiconductor wafer surface, at least one p-doped region, and at least one n-doped region, wherein the p-doped region and / or the n-doped region is electrically contacted, via opening regions and current contact regions located therein, with a metal electrode structure attached to the semiconductor wafer surface, and the metal electrode structure covers an electrode coverage area on the semiconductor wafer surface, and wherein the semiconductor wafer surface of the wafer-based solar cell has a passivation layer arranged between the semiconductor material and the metal electrode structure, and wherein the current contact regions are guided through the passivation layer. The aim of the invention is to provide a wafer-based solar cell, wherein the wafer-base solar cell has a reduced electrical contact resistance in order to increase the efficiency of the wafer-based solar cell. This aim is achieved by arranging a phase change region (9) in the semiconductor material at the current contact regions (5), and by designing the semiconductor material to be at least partially amorphous and / or at least partially nanocrystalline in this phase change region (9).

Description

[0001] Wafer solar cell and method for producing such a wafer solar cell

[0002] The present invention relates to a wafer solar cell. A wafer solar cell within the meaning of the present invention is understood to be a solar cell produced from a monocrystalline or polycrystalline silicon semiconductor wafer, and this semiconductor wafer forms the structural framework of the solar cell. The semiconductor wafer formed from semiconductor material (monocrystalline or polycrystalline silicon) has a semiconductor wafer surface and at least one p-doped region and at least one n-doped region. The p-doped region and / or the n-doped region are each electrically contacted with a metal electrode structure applied to the semiconductor wafer surface via current contact regions, and each metal electrode structure covers an electrode covering area on the semiconductor wafer surface. The metal electrode structure is important for discharging charge carriers from the wafer solar cell in the form of an electric current flow.

[0003] It is known that wafer solar cells can have dielectric passivation layers arranged between the metal electrode structure and the semiconductor wafer surface. The passivation layer is typically composed of materials selected from the group consisting of: AlOx (aluminum oxide), SiNx (silicon nitride), SiOxNy (silicon oxynitride), SiOx (silicon oxide), and / or poly-Si (polycrystalline silicon). The passivation layer can consist of a single one of these materials, but is preferably constructed as a layer stack combination of a plurality of these materials. The passivation layer, whether as a single layer or as a layer stack, preferably has a total layer thickness of 50 to 200 nm. The dielectric passivation layer reduces the recombination activity of the electrical charge carriers separated in the semiconductor material.

[0004] P-type wafer solar cells and n-type wafer solar cells are known. In p-type wafer solar cells, the semiconductor wafer has a positively charged silicon base, the upper surface of which is negatively charged due to doping with an impurity. The negatively charged upper surface forms the emitter of the p-type wafer solar cell. In n-type wafer solar cells, the semiconductor wafer has a negatively charged silicon base, the upper surface of which is positively charged due to doping with an impurity. The positively charged upper surface forms the emitter of the p-type wafer solar cell.

[0005] To form the metal electrode structure of a wafer solar cell with a passivation layer, metal pastes containing, for example, Ni, Cu, Ag, Al, Si, and / or their alloys are printed onto the semiconductor wafer surface using a screen printing process. In a subsequent annealing step, these metal pastes are etched or burned into the passivation layer, at least in part. This at least partial burning creates openings in the passivation layer. In at least some of these openings, current contact regions are also formed, which completely penetrate the passivation layer. The current contact regions primarily serve as the current paths for the charge carriers generated in the semiconductor wafer to reach the metal electrode structure.The current contact areas are therefore crucial for the electrical contact resistance between the metal electrode structure and the doped semiconductor wafer surfaces of the wafer solar cell. This contact resistance should be as low as possible.

[0006] The object of the invention is to provide a wafer solar cell, wherein the wafer solar cell has a reduced electrical contact resistance to increase the efficiency of the wafer solar cell.

[0007] This problem is solved by arranging a phase change region in the semiconductor material at the current contact areas, and by forming the semiconductor material in this phase change region in an at least partially amorphous and / or at least partially nanocrystalline form. Nanocrystalline refers to crystals with a structure size in the range of 1 nm to 100 nm. Nanocrystalline regions have a largely crystalline structure, but their dimensions are significantly smaller than the structure sizes of the crystals of monocrystalline or polycrystalline semiconductor materials used in wafer solar cells.

[0008] In one embodiment, the semiconductor material in the phase change region is amorphous in at least some regions. However, the semiconductor material can also be amorphous in the entire phase change region. In further embodiments, the semiconductor material in the phase change region can be nanocrystalline in at least some regions or nanocrystalline in the entire phase change region. However, the semiconductor material can also be amorphous in at least one region of the phase change region and nanocrystalline in at least one region of the phase change region.

[0009] This leads to a significant reduction in the contact resistance between the metal electrode structure and the doped semiconductor wafer surfaces of the wafer solar cell. The phase change regions can be created by locally heating the semiconductor material in the region of the openings and / or current contact areas, followed by rapid cooling. This local heating and rapid cooling results in a local phase change of the originally polycrystalline or monocrystalline silicon semiconductor material into an amorphous or nanocrystalline state. Local heating can be achieved, for example, using LECO (Laser Enhanced Contact Optimization) treatment or local radiation-assisted direct heating.In a LECO treatment, the wafer solar cell is electrically contacted at both polarities, a reverse voltage is applied, and a light source or point light source, such as a laser beam, is guided over the surface of the wafer solar cell. The resulting local current flows result in local heating of the wafer solar cell. In local radiation-assisted direct heating, the relevant area of ​​the wafer solar cell is locally irradiated, for example, using laser radiation. The laser energy is coupled directly into the wafer solar cell as thermal energy, thus leading to direct, local heating.

[0010] In an advantageous embodiment, the phase change regions in a plane parallel to the passivation layer have a lateral extent in the range from 10 nm to 2,000 nm, preferably in the range from 100 nm to 1,000 nm, particularly preferably in the range from 300 nm to 800 nm.

[0011] An advantageous embodiment provides that the phase change regions perpendicular to a plane parallel to the passivation layer have a lateral extent in the range from 10 nm to 2,000 nm, preferably in the range from 100 nm to 1,000 nm, particularly preferably in the range from 300 nm to 800 nm.

[0012] A further advantageous embodiment provides that the 10 to 45,000 phase change areas per mm 2 , preferably 1,000 to 15,000 phase change areas per mm 2 , particularly preferably 3,000 to 8,000 phase change areas per mm 2 , are provided.

[0013] Furthermore, a method for producing the wafer solar cell according to the invention is proposed. This method provides that firstly the wafer solar cell is provided with the semiconductor material, the passivation layer and the formed metal electrode structure and then, in a tempering step, the current contact regions are locally heated for a time in the range of 10 ns to 1 s to a temperature above the melting temperature of the semiconductor material and then at a cooling rate in the range of 1 ■ 10 11 K / s up to 1 ■ 10 14 K / s to below the melting temperature of the semiconductor material. The cooling rate is preferably in the range of 1 ■ 10 12 K / s up to 1 ■ 10 14 K / s, more preferably in the range of 5 10 12 K / s up to 1 ■ 10 14 K / s

[0014] It is further proposed that the temperature of the heated current contact regions is in the range of 840 °C to 2,000 °C, preferably in the range of 1,000 °C to 2,000 °C, more preferably in the range of 1,200 to 1,800 °C, more preferably in the range of 1,400 to 1,800 °C.

[0015] In an advantageous embodiment, the local heating is carried out by means of a LECO treatment or by means of a local radiation-assisted direct heating.

[0016] An embodiment of the invention is explained below with reference to the drawings.

[0017] Fig. 1 is a cross-sectional view of a wafer solar cell according to the invention

[0018] Fig. 2 a detailed view of section A of the cross-sectional view according to Fig. 1

[0019] Fig. 3 a detailed view of section B of the cross-sectional view according to Fig. 1

[0020] Fig. 1 shows a schematic cross-sectional view of an n-type wafer solar cell according to the invention. The wafer solar cell has a monocrystalline or polycrystalline semiconductor wafer 1 with a semiconductor wafer surface comprising a front side and a back side. A p-doped region 3 is formed in the front side, while an n-doped region 2 is formed in the back side. A passivation layer 6 is applied to each of the n-doped region 2 and the p-doped region 3. The passivation layer 6 applied to the p-doped region 3 is additionally covered with an anti-reflective layer 7. However, the anti-reflective layer 7 is optional and not mandatory. The passivation layer 6 consists of AlQx (aluminum oxide). However, the invention is not limited thereto.The passivation layer 6 can also consist of SiNx (silicon nitride), SiOxNy (silicon oxynitride), SiOx (silicon oxide), and / or poly-Si (polycrystalline silicon). Layer stack combinations of a plurality of these materials are also possible. Furthermore, the structure of the passivation layer 6 on the front side can differ from the structure of the passivation layer 6 on the back side.

[0021] A metal electrode structure 4 in the form of finger electrodes is arranged on the passivation layer 6 applied to the n-doped region 2 and on the anti-reflective layer 7. The metal electrode structure 4 covers an electrode covering surface when viewed from the front or back. The metal electrode structures 4 on the anti-reflective layer are electrically connected to the p-doped region 3 via current contact regions 5 (Fig. 2), which are located within opening regions 8 (Fig. 2) of the passivation layer 6 and anti-reflective layer 7. Likewise, the metal electrode structures 4 on the passivation layer 6 are electrically connected to the n-doped region 2 via current contact regions 5, which are located within opening regions 8 of the passivation layer 6 applied to the n-doped region 2.

[0022] Fig. 2 shows a detailed view of section A of the cross-sectional view according to Fig. 1. In this detailed view, a conductor track of the metal electrode structure 4 as well as sections of the passivation layer 6, the anti-reflective layer 7, and the p-doped region 3 of the semiconductor material are visible. Furthermore, an opening region 8 with a current contact region 5 arranged therein can be seen. In the opening region 8, the material of the metal electrode structure 4 has partially penetrated into the anti-reflective layer 7. In the current contact region 5, the material of the metal electrode structure 4 has penetrated through the passivation layer 6 and the anti-reflective layer 7 into the p-doped region 3 of the semiconductor material.

[0023] A phase change region 9 is arranged in the semiconductor material at the current contact region 5. In this phase change region 9, the semiconductor material is at least partially amorphous and / or at least partially nanocrystalline.

[0024] Fig. 3 shows a detailed view of section B of the cross-sectional view according to Fig. 1. In this detailed view, a conductor track of the metal electrode structure 4 as well as sections of the passivation layer 6 and the n-doped region 2 of the semiconductor material are visible. Furthermore, an opening region 8 with a current contact region 5 arranged therein can be seen. In the opening region 8, the material of the metal electrode structure 4 has partially penetrated into the passivation layer 6. In the current contact region 5, the material of the metal electrode structure 4 has penetrated through the passivation layer 6 into the n-doped region 2 of the semiconductor material.

[0025] A phase change region 9 is arranged in the semiconductor material at the current contact region 5. In this phase change region 9, the semiconductor material is amorphous and / or at least partially nanocrystalline. A plurality of opening regions 8 and current contact regions 5 arranged therein are provided both in the metal electrode structure 4 on the p-doped side of the semiconductor material and in the metal electrode structure 4.

[0026] The phase change regions 9 have a lateral extent in a plane parallel to the passivation layer in the range of 10 nm to 2,000 nm, preferably in the range of 100 nm to 1,000 nm, particularly preferably in the range of 300 nm to 800 nm. Perpendicular to a plane parallel to the passivation layer, the phase change regions 9 have a lateral extent in the range of 10 nm to 2,000 nm, preferably in the range of 100 nm to 1,000 nm, particularly preferably in the range of 300 nm to 800 nm.

[0027] Over the electrode coverage area, 10 to 45,000 phase change areas 9 per mm 2 , preferably 1,000 to 15,000 phase change ranges 9 per mm 2 , particularly preferably 3,000 to 8,000 phase change areas 9 per mm 2 , is provided.

[0028] The invention is not limited to the illustrated embodiment. For example, the wafer solar cell can also be a p-type wafer solar cell, where the p-doped and n-doped regions are reversed compared to the n-type wafer solar cell. Furthermore, in both a p-type wafer solar cell and an n-type wafer solar cell, the passivation layer 6 can be provided only on the n-doped side or only on the p-doped side.

[0029] To produce the wafer solar cell according to the invention, the wafer solar cell is first prepared with the semiconductor material, the passivation layer 6 and the formed metal electrode structure 4. Subsequently, in a tempering step, the current contact regions 5 are locally heated for a time in the range of 10 ns to 1 s to a temperature above the melting temperature of the semiconductor material and then cooled at a rate in the range of T 10 11 K / s to T 10 14K / s to below the melting temperature of the semiconductor material. The local heating is carried out by means of a LECO treatment or by means of local radiation-assisted direct heating. The temperature is in a range from 840 °C to 2,000 °C, preferably in the range from 1,000 °C to 2,000 °C, more preferably in the range from 1,200 to 1,800 °C, more preferably in the range from 1,400 to 1,800 °C. The cooling rate is preferably in the range of T 10 12 K / s to T 10 14 K / s, more preferably in the range of 5 10 12 K / s to T 10 14K / s. The local heating preferably takes place where the phase change regions 9 are to be arranged, wherein the phase change regions 9 have a lateral extent in a plane parallel to the passivation layer 6 in the range from 10 nm to 2,000 nm, preferably in the range from 100 nm to 1,000 nm, particularly preferably in the range from 300 nm to 800 nm, and perpendicular to the plane parallel to the passivation layer 6 a lateral extent in the range from 10 nm to 2,000 nm, preferably in the range from 100 nm to 1,000 nm, particularly preferably in the range from 300 nm to 800 nm.

[0030] List of reference symbols

[0031] 1 semiconductor wafer

[0032] 2 n-doped region

[0033] 3 p-doped region

[0034] 4 Metal electrode structure

[0035] 5 Power contact area

[0036] 6 Passivation layer

[0037] 7 Anti-reflective coating

[0038] 8 opening areas

[0039] 9 Phase change range

Claims

Patent claims 1. Wafer solar cell comprising a semiconductor wafer (1) made of monocrystalline or polycrystalline silicon semiconductor material, having a semiconductor wafer surface and at least one p-doped region (2) and at least one n-doped region (3), wherein the p-doped region (2) and / or the n-doped region (3) is electrically contacted with a metal electrode structure (4) applied to the semiconductor wafer surface via opening regions (8) and current contact regions (5) located therein, and the metal electrode structure (4) covers an electrode covering area on the semiconductor wafer surface, and wherein the semiconductor wafer surface of the wafer solar cell has a passivation layer (6) arranged between the semiconductor material and the metal electrode structure (4), and wherein the current contact regions (5) are guided through the passivation layer (6), characterized in thatthat a phase change region (9) is arranged at the current contact regions (5) in the semiconductor material and in this phase change region (9) the semiconductor material is at least partially amorphous and / or at least partially nanocrystalline., 2. Wafer solar cell according to claim 1, characterized in that phase change regions (9) in a plane parallel to the passivation layer have a lateral extent in the range from 10 nm to 2,000 nm, preferably in the range from 100 nm to 1,000 nm, particularly preferably in the range from 300 nm to 800 nm.

3. Wafer solar cell according to one of the preceding claims, characterized in that the phase change regions (9) have a lateral extent perpendicular to a plane parallel to the passivation layer in the range from 10 nm to 2,000 nm, preferably in the range from 100 nm to 1,000 nm, particularly preferably in the range from 300 nm to 800 nm.

4. Wafer solar cell according to one of the preceding claims, characterized in that the electrode covering surface has 10 to 45,000 phase change regions (9) per mm 2 , preferably 1,000 to 15,000 phase change areas (9) per mm 2 , particularly preferably 3,000 to 8,000 phase change areas (9) per mm 2 , are provided.

5. A method for producing a wafer solar cell according to one of the preceding claims, characterized in that firstly the wafer solar cell is provided with the semiconductor material, the passivation layer (6) and the formed metal electrode structure (4) and then in a tempering step the current contact regions (5) are locally heated for a time in the range of 10 ns to 1 s to a temperature above the melting temperature of the semiconductor material and then with a cooling rate in the range of T 10 11 K / s up to T10 14K / s to below the melting temperature of the semiconductor material.

6. The method according to claim 5, characterized in that the temperature is in the range from 840 °C to 2,000 °C, preferably in the range from 1,000 °C to 2,000 °C, more preferably in the range from 1,200 to 1,800 °C, more preferably in the range from 1,400 to 1,800 °C.

7. A method according to claim 5 or 6, characterized in that the cooling rate is preferably in the range of T10 12 K / s up to T10 14 K / s, more preferably in the range of 5 10 12 K / s up to 1 ■ 10 14 K / s.

8. Method according to one of claims 5 to 7, characterized in that the local heating is carried out by means of a LECO treatment or by means of a local radiation-assisted direct heating.

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