Wafer-based solar cell comprising passivated contacts, and method for manufacturing such a wafer-based solar cell
By creating through-plating areas that break through the SiO2 layer and forming metal-silicon mixtures at via-hole regions, the contact resistance in wafer solar cells with passivated contacts is significantly reduced, improving their efficiency.
Patent Information
- Application Number
- PCT/DE2024/101077
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-15
- Filing Date
- 2024-12-14
- Publication Date
- 2025-06-19
AI Technical Summary
Wafer solar cells with existing passivated contacts face challenges in achieving low electrical contact resistance, which limits their efficiency.
The introduction of through-plating areas in current contact areas, where the SiO2 layer is broken through, and the formation of metal-silicon mixtures at via-hole regions creates direct current paths between the semiconductor material and the metal electrode structure, significantly reducing contact resistance.
This approach results in a substantial reduction in electrical contact resistance, thereby enhancing the efficiency of the wafer solar cell.
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Figure DE2024101077_19062025_PF_FP_ABST
Abstract
Description
[0001] Wafer solar cell with passivated contacts and method for producing such a wafer solar cell
[0002] The present invention relates to a wafer solar cell with passivated contacts. A wafer solar cell in the sense of the present invention is understood to be a solar cell that is produced from a semiconductor wafer, and this semiconductor wafer forms the structural framework of the solar cell. The semiconductor wafer formed from semiconductor material has a semiconductor wafer surface and at least one p-doped region and at least one n-doped region, wherein the p-doped region and / or the n-doped region are each electrically contacted with a metal electrode structure applied to the semiconductor wafer surface via current contact regions, and each metal electrode structure covers an electrode covering area on the semiconductor wafer surface. The metal electrode structure is important for discharging charge carriers in the form of an electric current flow from the wafer solar cell.
[0003] Wafer solar cells with passivated contacts are also known. These have dielectric passivation layers arranged between the metal electrode structure and the semiconductor wafer surface. In one prior art wafer solar cell design, the passivation layer is formed from a double layer consisting of a poly-Si layer (polycrystalline silicon layer) and an ultra-thin SiC>2 layer (silicon dioxide layer). Starting from the semiconductor material of the semiconductor wafer, the SiC>2 layer is first formed, followed by the poly-Si layer on the SiC>2 layer on the semiconductor wafer surface. Typically, the poly-Si layer has a layer thickness in the range of 50 nm to 300 nm, and the SiC>2 layer has a layer thickness in the range of 5 nm to 10 nm. Optionally, additional layers can be provided on the SiC>2 layer—for example, an anti-reflection layer.
[0004] P-type wafer solar cells and n-type wafer solar cells are known. In p-type wafer solar cells, the semiconductor wafer has a positively charged silicon base whose upper side is negatively charged due to doping with a foreign material. The negatively charged upper side forms the emitter of the p-type wafer solar cell. Furthermore, in p-type wafer solar cells, the poly-Si layer of the passivation layer is highly doped and positively charged. In n-type wafer solar cells, the semiconductor wafer has a negatively charged silicon base whose upper side is positively charged due to doping with a foreign material. The positively charged upper side forms the emitter of the n-type wafer solar cell. Furthermore, in n-type wafer solar cells, the poly-Si layer of the passivation layer is highly doped and negatively charged. The passivation of the contacts can be one-sided or two-sided.Wafer solar cells can have passivated contacts only on the front, only on the back, or both on the front and back. The passivated contacts can optionally be selectively formed. With selectively formed passivated contacts, the double layer of SiC>2 and poly-Si layers is located only beneath the metal electrode structure. Areas without a metal electrode structure are designed without the double layer of SiC>2 and poly-Si layers through appropriate process steps during the construction of the wafer solar cell.
[0005] To form the metal electrode structure of a wafer solar cell with a poly-Si / SiC>2 passivation layer, metal pastes are printed onto the semiconductor wafer surface using a screen printing process, for example. In a subsequent annealing step, the metal pastes are etched or burned into the poly-Si layer, at least in part. This creates the openings containing the current contact areas. The SiC>2 layer remains completely intact, even in these current contact areas. Particularly in the case of metal pastes containing silver metal particles, silver crystallites are formed locally in the current contact areas of the poly-Si layer when the metal paste is burned into the poly-Si layer. These local silver crystallites primarily form the current paths for the charge carriers generated in the semiconductor wafer to reach the metal electrode structure.The transport of these charge carriers through the SiC>2 layer is essentially based on the quantum mechanical tunneling effect. The metal pastes can also be applied to the semiconductor wafer surface using other processes. Metal pastes are also known that contain other metallic particles in addition to silver, or that contain other metallic particles instead of silver.
[0006] The current contact areas determine the electrical contact resistance between the metal electrode structure and the doped semiconductor wafer surfaces of the wafer solar cell. This contact resistance should be as low as possible.
[0007] The object of the invention is to provide a wafer solar cell with passivated contacts, wherein the wafer solar cell has a reduced electrical contact resistance to increase the efficiency of the wafer solar cell.
[0008] This object is achieved in that, in at least some of the current contact regions, at least sectionally via-connections are provided, and in these via-connections the SiO2 layer is perforated. Furthermore, according to the invention, a metal-silicon mixture is formed in a mixed region at the via-connection regions in the transition between the metal electrode structure, the poly-Si layer, the SiO2 layer (6a), and the semiconductor material. By perforating the SiO2 layer at the via-connection regions, a punctual, direct current path is created between the semiconductor material of the semiconductor wafer and the metal electrode structure. This leads to a significant reduction in the contact resistance between the metal electrode structure and the doped semiconductor wafer surfaces of the wafer solar cell.The formation of the mixed regions then leads to a further reduction in the contact resistance between the metal electrode structure and the doped semiconductor wafer surfaces of the wafer solar cell.
[0009] According to the invention, the via regions with the mixed regions are created by locally heating the opening regions and / or current contact regions to temperatures in the range of 1,000°C to 1,500°C for a period of time in the range of 10 ns to 1 s. The local heating can be achieved, for example, by means of a LECO (Laser Enhanced Contact Optimization) treatment or by means of local radiation-assisted direct heating. In a LECO treatment, the wafer solar cell is electrically contacted at both polarities, a reverse voltage is applied, and a light source, such as a laser beam, is guided over the surface of the wafer solar cell, so that the resulting local current flows result in local heating of the wafer solar cell.In local radiation-assisted direct heating, the relevant area of the wafer solar cell is locally irradiated, for example by means of laser radiation, whereby the laser energy of the laser radiation is directly coupled into the wafer solar cell as thermal energy and thus leads to direct, local heating.
[0010] In an advantageous embodiment, the through-contact regions in the plane of the SiO2 layer each have an area in the range from 0.05 pm2 to 1.50 pm2, preferably in the range from 0.1 pm2 to 1.0 pm2, particularly preferably in the range from 0.15 pm2 to 0.6 pm2.
[0011] A further advantageous embodiment provides that the via regions in the plane of the SiO2 layer each have a lateral extent in the range from 50 nm to 500 nm, preferably in the range from 100 nm to 250 nm, particularly preferably in the range from 150 nm to 200 nm.
[0012] It is further proposed that the electrode covering area has 200 to 2000 through-contact areas per mm2, preferably 400 to 1000 through-contact areas per mm2, particularly preferably 500 to 800
[0013] Through-hole areas are provided per mm2.
[0014] Furthermore, a method for producing the wafer solar cell according to the invention is proposed. This method provides that the wafer solar cell is first prepared with the semiconductor material, the passivation layer, and the formed metal electrode structure. Subsequently, in a tempering step, the current contact regions are locally heated to a temperature in the range of 1,000°C to 1,500°C for a time in the range of 10 ns to 1 s.
[0015] In a preferred embodiment, the temperature is preferably in the range of 1,100 °C to 1,500 °C, more preferably in the range of 1,200 °C to 1,500 °C.
[0016] In an advantageous embodiment, the local heating is carried out by means of a LECO treatment or by means of a local radiation-assisted direct heating.
[0017] In LECO treatment, the wafer solar cell is electrically contacted at both polarities, a reverse voltage is applied, and a light source, such as a laser beam, is guided over the surface of the wafer solar cell. The resulting local current flows result in local heating of the wafer solar cell. In local radiation-assisted direct heating, the relevant area of the wafer solar cell is locally irradiated, for example, using laser radiation. The laser energy is coupled directly into the wafer solar cell as thermal energy, thus leading to direct, local heating.
[0018] An embodiment of the invention is explained below with reference to the drawings.
[0019] Fig. 1 a cross-sectional view of a p-type wafer solar cell with passivated contacts according to the prior art
[0020] Fig. 2 a cross-sectional view of an n-type wafer solar cell with passivated contacts according to the prior art
[0021] Fig. 3 a detailed view of section A of the cross-sectional view according to Fig. 1 and Fig. 2
[0022] Fig. 4 a top view of section A according to Fig. 3
[0023] Fig. 5 is a detailed view of section A of the cross-sectional view analogous to Fig. 3 in a wafer solar cell according to the invention. Fig. 6 is a plan view of section A according to Fig. 5.
[0024] Fig. 7 a detailed view of section B of the cross-sectional view according to Fig. 5
[0025] Fig. 1 shows a schematic cross-sectional view of a p-type wafer solar cell with passivated contacts according to the prior art. The wafer solar cell has a semiconductor wafer 1 with a semiconductor wafer surface comprising a front side and a back side. An n-doped region 3 is formed in the front side, while a p-doped region 2 is formed in the back side. An anti-reflective layer 7 is applied to the n-doped region 3 and a passivation layer 6 is applied to the p-doped region 2. The passivation layer 6 has an SiO2 layer 6a (silicon dioxide layer) and a poly-Si layer 6b (polycrystalline silicon layer). Starting from the p-doped region 2, first the SiO2 layer 6a and then the poly-Si layer 6b are arranged. The poly-Si layer 6b of the passivation layer 6 is highly doped and positively charged in this embodiment.A metal electrode structure 4 in the form of finger electrodes is arranged on each of the passivation layer 6 and the anti-reflective layer 7. In the illustrated embodiment, the wafer solar cell has the anti-reflective layer 7 only on the top side. However, the invention is not limited to such wafer solar cells. In other embodiments, an anti-reflective layer 7 can also be provided on the passivation layer 6 on the underside or only on the passivation layer 6 on the underside. The metal electrode structure 4 covers an electrode covering surface when viewed from the front or back side. The metal electrode structures 4 on the passivation layer 6 are in electrical connection with the p-doped region 2 via current contact regions 5 (Fig. 3), which are located within opening regions 8 (Fig. 3) of the passivation layer 6.
[0026] Fig. 2 shows a schematic cross-sectional view of an n-type wafer solar cell with passivated contacts according to the prior art. The wafer solar cell has a semiconductor wafer 1 with a semiconductor wafer surface comprising a front side and a back side. A p-doped region 2 is formed in the front side, while an n-doped region 3 is formed in the back side. An anti-reflective layer 7 is applied to the p-doped region 2 and a passivation layer 6 is applied to the n-doped region 3. In the embodiment shown, the wafer solar cell has the anti-reflective layer 7 only on the top side. However, the invention is not limited to such wafer solar cells. In other embodiments, an anti-reflective layer 7 can also be provided on the passivation layer 6 on the bottom side or only on the passivation layer 6 on the bottom side.The passivation layer 6 has an SiO2 layer 6a (silicon dioxide layer) and a poly-Si layer 6b (polycrystalline silicon layer). Starting from the n-doped region 3, the SiO2 layer 6a and then the poly-Si layer 6b are arranged first. The poly-Si layer 6b of the passivation layer 6 is highly doped and negatively charged in this embodiment. A metal electrode structure 4 in the form of finger electrodes is arranged on each of the passivation layer 6 and the anti-reflective layer 7. The metal electrode structure 4 covers an electrode covering surface when viewed from the front or back. The metal electrode structures 4 on the passivation layer 6 are electrically connected to the n-doped region 3 via current contact regions 5 (Fig. 3), which are located within opening regions 8 (Fig. 3) of the passivation layer 6.
[0027] Furthermore, the invention is not limited to wafer solar cells with full-surface double layers of SiO2 and poly-Si layers. In further embodiments not shown, wafer solar cells with selectively passivated contacts are also subject to the invention. In these selectively formed passivated contacts, the double layer of SiO2 and poly-Si layers is located only in the areas of the wafer solar cell covered by the metal electrode structure. The areas not covered by the metal electrode structure do not have a poly-Si layer.
[0028] Fig. 3 shows a detailed view of section A of the cross-sectional view according to Fig. 1 and Fig. 2 of the wafer solar cell with passivated contacts known from the prior art. In this detailed view, an opening region 8 can be seen on the side of the metal electrode structure 4 facing the semiconductor material 2, 3, which opening region 8 is characterized in that the material of the metal electrode structure 4 has partially penetrated into the poly-Si layer 6b in this region. Furthermore, five current contact regions 5 can be seen within the opening region 8. In these regions, the material of the metal electrode structure 4 has penetrated deeper into the poly-Si layer 6b. The current contact regions 5 differ in their lateral extents.
[0029] Fig. 4 shows a top view of a schematic representation of the distribution of the current contact areas 5 of the section A according to Fig. 3, which is visible after removal of the electrode structure 4.
[0030] Fig. 5 shows a detailed view of section A of the cross-sectional view analogous to Fig. 3 for a wafer solar cell according to the invention. Here, at least some of the current contact regions 5 are provided with through-hole regions 9, at least in sections. The SiO2 layer is perforated in these through-hole regions 9. The material of the metal electrode structure 4 has partially penetrated through the SiO2 layer into the semiconductor material 2, 3 in these through-hole regions 9.
[0031] Fig. 6 shows a plan view of a schematic representation of the distribution of the through-plating regions 9 in the current contact regions 5 of section A according to Fig. 5.
[0032] The through-contact regions 9 each have an area in the plane of the SiC>2 layer in the range from 0.05 pm2 to 1.50 pm2, preferably in the range from 0.1 pm2 to 1.0 pm2, particularly preferably in the range from 0.15 pm2 to 0.6 pm2.
[0033] The through-contact regions 9 each have a lateral extent in the plane of the SiC>2 layer in the range from 50 nm to 500 nm, preferably in the range from 100 nm to 250 nm, particularly preferably in the range from 150 nm to 200 nm.
[0034] Across the electrode covering surface, 200 to 2000 through-hole contact areas 9 per mm2, preferably 400 to 1000 through-hole contact areas 9 per mm2, particularly preferably 500 to 800 through-hole contact areas 9 per mm2 are provided.
[0035] Fig. 7 shows a detailed view of section B from the cross-sectional view according to Fig. 5. A metal-silicon mixture 10 is formed in a mixing region on the via region 9 in the transition between the metal electrode structure 4, poly-Si layer 6b, SiO2 layer 6a and the semiconductor material 2, 3.
[0036] The mixing region 10 has a lateral extent in the plane of the SiO2 layer of 50 nm to 300 nm, preferably in the range of 100 nm to 250 nm, particularly preferably in the range of 150 nm to 200 nm.
[0037] The mixing region 10 has a lateral extent of 100 nm to 1000 nm, preferably in the range of 200 nm to 800 nm, particularly preferably in the range of 400 nm to 700 nm, in a plane perpendicular to the plane of the SiO2 layer.
[0038] To produce the wafer solar cell according to the invention, the wafer solar cell is first prepared with the semiconductor material, the passivation layer, and the formed metal electrode structure. Subsequently, the current contact regions 5 are locally heated in a tempering step for a time in the range of 10 ns to 1 s to a temperature in the range of 1,000°C to 1,500°C. The local heating of the current contact regions 5 is carried out by means of a LECO treatment or by means of local radiation-assisted direct heating. The temperature is preferably in the range of 1,100°C to 1,500°C, more preferably in the range of 1,200°C to 1,500°C.
[0039] The metal electrode structures 4 mentioned in the exemplary embodiments are formed, for example, using metal paste applied via a screen-printing process. However, the invention is not limited to this. The metal paste can also be applied using a different process. The metal paste preferably comprises silver particles. However, the invention is not limited to this. For example, the metal paste contains other metallic particles (e.g., aluminum, copper, etc.) in addition to silver particles. In further embodiments, the metal paste contains other metallic particles (e.g., aluminum, copper, etc.) instead of the silver particles.
[0040] List of reference symbols
[0041] 1 semiconductor wafer
[0042] 2 p-doped region
[0043] 3 n-doped region
[0044] 4 Metal electrode structure
[0045] 5 Power contact area
[0046] 6 Passivation layer
[0047] 6a SiC>2 layer (silicon dioxide layer)
[0048] 6b poly-Si layer (polycrystalline silicon layer)
[0049] 7 Anti-reflective coating
[0050] 8 opening areas
[0051] 9 via areas
[0052] 10 Mixing area
Claims
Patent claims 1. A wafer solar cell comprising a semiconductor wafer (1) made of semiconductor material, having a semiconductor wafer surface and at least one p-doped region (2) and at least one n-doped region (3), wherein the p-doped region (2) and / or the n-doped region (3) are each electrically contacted with a metal electrode structure (4) applied to the semiconductor wafer surface via opening regions (8) and current contact regions (5) located therein, and each metal electrode structure (4) covers an electrode covering surface on the semiconductor wafer surface, and wherein the semiconductor wafer surface of the wafer solar cell has a passivation layer arranged between the semiconductor material and the metal electrode structure (4), and this passivation layer has a double layer consisting of a poly-Si layer (6b) and a SiO2 layer (6a), and wherein the current contact regions (5) are guided at least partially into the poly-Si layer (6b),characterized in that in at least some of the current contact regions (5) through-contact regions (9) are provided at least in sections and in these through-contact regions (9) the SiC>2 layer (6a) is broken through and that at the through-contact region (9) in the transition between the metal electrode structure (4), poly-Si layer (6b), SiC>2 layer (6a) and the semiconductor material in a mixing region a metal-silicon mixture is formed., 2. Wafer solar cell according to claim 1, characterized in that the through-contact regions (9) in the plane of the SiC>2 layer each have an area in the range of 0.05 pm 2 until 1:50 pm 2 , preferably in the range of 0.1 pm 2 until 1 pm 2 , particularly preferably in the range of 0.15 pm 2 until 0.6 pm 2 , have.
3. Wafer solar cell according to claim 1, characterized in that the through-contact regions (9) in the plane of the SiC>2 layer each have a lateral extent in the range from 50 nm to 500 nm, preferably in the range from 100 nm to 250 nm, particularly preferably in the range from 150 nm to 200 nm.
4. Wafer solar cell according to one of the preceding claims, characterized in that the electrode covering surface has 200 to 2000 through-contact areas (9) per mm 2 , preferably 400 to 1000 through-hole plating areas (9) per mm 2 , particularly preferably 500 to 800 through-hole contact areas (9) per mm 2 , are provided.
5. Wafer solar cell according to one of the preceding claims, characterized in that the mixing region (10) in the plane of the SiC>2 layer has a lateral extent of 50 nm to 300 nm, preferably in the range of 100 nm to 250 nm, particularly preferably in the range of 150 nm to 200 nm.
6. Wafer solar cell according to one of the preceding claims, characterized in that the mixing region (10) in a plane perpendicular to the plane of the SiC>2 layer has a lateral extent of 100 nm to 1000 nm, preferably in the range of 200 nm to 800 nm, particularly preferably in the range of 400 nm to 700 nm.
7. A method for producing a wafer solar cell according to one of the preceding claims, characterized in that first the wafer solar cell with the semiconductor material, the passivation layer (6) and the formed metal electrode structure (4) is provided and then in a tempering step the current contact regions (5) are heated locally for a time in the range of 10 ns to 1 s to a temperature in the range of 1,000 °C to 1,500 °C.
8. The method according to claim 7, characterized in that the temperature is preferably in the range from 1,100 °C to 1,500 °C, more preferably in the range from 1,200 °C to 1,500 °C.
9. Method according to claim 7 or 8, characterized in that the local heating is carried out by means of a LECO treatment or by means of a local radiation-assisted direct heating.
Citation Information
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