Inspection device, cutting device, and method for manufacturing semiconductor component

The inspection device addresses the challenge of accurately setting the bad mark region in semiconductor component inspection by using a control unit to compare luminance in setting images, resulting in improved inspection accuracy and reduced operator variability.

WO2025126537A1PCT designated stage expired Publication Date: 2025-06-19TOWA
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Patent Information

Application Number
PCT/JP2024/024763
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-12
Filing Date
2024-07-09
Publication Date
2025-06-19

AI Technical Summary

Technical Problem

In semiconductor component manufacturing, accurately setting the bad mark region in images for inspection is challenging due to varying bad mark positions, shapes, and camera mounting angles, leading to operator variability and reduced inspection accuracy.

Method used

An inspection device with a control unit that preliminarily sets the bad mark region by comparing luminance between good and defective product regions in a setting image, allowing for automatic detection in subsequent inspection images.

Benefits of technology

This approach enables precise and consistent setting of the bad mark region, improving the accuracy of bad mark inspections and reducing operator-dependent variations.

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Abstract

This inspection device includes a control unit. The control unit sets a bad mark region in advance in a setting image in which an object to be inspected appears, the bad mark region being a region in which a bad mark appears when the bad mark is included in the object to be inspected, and inspects the bad mark region in the inspection image to inspect whether or not the bad mark is included in the object to be inspected appearing in the inspection image. Setting the bad mark region in advance includes: acquiring a setting image in which a non-defective product, which is an object to be inspected not including the bad mark, and a defective product, which is an object to be inspected including the bad mark, appear; and determining the bad mark region by comparing the luminance of the non-defective region in which the non-defective product appears in the setting image with the luminance of the defective product region in which the defective product appears in the setting image.
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Description

Inspection device, cutting device, and semiconductor component manufacturing method

[0001] The present invention relates to an inspection device, a cutting device, and a method for manufacturing semiconductor components.

[0002] In a manufacturing line for products such as semiconductor components, a bad mark may be attached to a product to indicate that the product is defective. In such cases, a bad mark inspection is often performed in a subsequent inspection device to check whether the product has a bad mark. Patent Document 1 discloses a method for detecting bad marks using image processing.

[0003] JP 2013-38285 A

[0004] In order to accurately detect a bad mark, it is desirable to set as accurately as possible the area (bad mark area) in the image of the product where the bad mark will be placed if the product contains a bad mark. However, because the position and shape of the bad mark vary depending on the product, the position of the bad mark area in the image is often not uniformly determined. In addition, the position of the bad mark area in the image changes depending on the mounting position and angle of the camera. Therefore, in many cases, the bad mark area must be set manually. As a result, there are problems such as a large amount of variation in settings depending on the operator, making it difficult to ensure the accuracy of bad mark inspection.

[0005] An object of the present invention is to provide an inspection device, a cutting device, and a method for manufacturing semiconductor components that can appropriately set a bad mark area within an image of an object to be inspected, thereby improving the accuracy of bad mark inspection.

[0006] According to one aspect of the present invention, an inspection device includes a control unit. The control unit pre-defines a bad mark area in a setting image showing an object to be inspected, where the bad mark will be displayed if the object to be inspected contains a bad mark, and inspects the bad mark area in the inspection image to determine whether the object to be inspected shown in the inspection image contains a bad mark. Pre-defining the bad mark area includes acquiring a setting image showing a good product (i.e., an object to be inspected that does not contain a bad mark) and a defective product (i.e., an object to be inspected that contains a bad mark), and comparing the brightness of the good product area in the setting image showing the good product with the brightness of the defective product area in the setting image showing the defective product.

[0007] A cutting apparatus according to another aspect of the present invention includes a cutting mechanism that cuts a substrate including a plurality of semiconductor components and separates the semiconductor components, and the above-described inspection apparatus that inspects the separated semiconductor components as inspection objects.

[0008] A method for manufacturing semiconductor components according to yet another aspect of the present invention includes the steps of cutting a substrate containing a plurality of semiconductor components using a cutting mechanism to separate the semiconductor components, and inspecting the separated semiconductor components as inspection objects using the above-mentioned inspection device.

[0009] According to the present invention, a bad mark area can be appropriately set in an image of an object to be inspected, thereby improving the accuracy of bad mark inspection.

[0010] FIG. 1 is a plan view schematically showing a cutting device according to an embodiment; FIG. 2 is a side cross-sectional view schematically showing an imaging environment by a second optical inspection camera according to an embodiment; FIG. 3 is a diagram schematically showing a hardware configuration of a computer according to an embodiment; FIG. 4 is a diagram showing an example of an image of a semiconductor component captured by a second optical inspection camera according to an embodiment; FIG. 5 is a flowchart showing the flow of a method for setting parameters for bad mark inspection according to an embodiment; FIG. 6 is a diagram showing an example of divided regions set within one component region according to an embodiment; FIG. 7 is a diagram showing a comparison result of luminance between a good region and a defective region according to an embodiment; FIG. 8 is a diagram showing a comparison result of luminance between a good region and another good region according to an embodiment; FIG. 9 is a diagram showing a comparison result of luminance between a good region and yet another good region according to an embodiment;

[0011] An embodiment according to one aspect of the present invention (hereinafter also referred to as "the present embodiment") will be described in detail below with reference to the drawings. Note that identical or corresponding parts in the drawings are designated by the same reference numerals, and their description will not be repeated. Furthermore, for ease of understanding, each drawing is drawn in a schematic manner with objects appropriately omitted or exaggerated.

[0012] [1. Configuration] <1-1. Overall Configuration of Cutting Apparatus> Fig. 1 is a plan view schematically showing a cutting apparatus 1 according to the present embodiment. The cutting apparatus 1 is configured to cut a package substrate (an object to be cut) to separate the package substrate into a plurality of semiconductor components (package components). In the package substrate, a substrate or lead frame on which a semiconductor chip is mounted is sealed with resin.

[0013] Examples of package substrates include a BGA (Ball Grid Array) package substrate, an LGA (Land Grid Array) package substrate, a CSP (Chip Size Package) package substrate, an LED (Light Emitting Diode) package substrate, and a QFN (Quad Flat No-leaded) package substrate.

[0014] The cutting device 1 is also configured to inspect each of the plurality of individual semiconductor components. In the cutting device 1, an image of each semiconductor component is captured and each semiconductor component is inspected based on the image. Inspection data is generated through the inspection, and each semiconductor component is classified as either a "good product" or a "defective product."

[0015] In this example, a package substrate P1 is used as the object to be cut, and the package substrate P1 is divided into a plurality of semiconductor components S1 by a cutting device 1. Hereinafter, of the two surfaces of the package substrate P1, the surface that is sealed with resin will be referred to as the mold surface, and the surface opposite the mold surface will be referred to as the ball / lead surface.

[0016] As shown in FIG. 1 , the cutting device 1 includes, as its components, a cutting module (cutting mechanism) A1 and an inspection and storage module (inspection device) B1. The cutting module A1 is configured to manufacture a plurality of semiconductor components S1 by cutting a package substrate P1. The inspection and storage module B1 is configured to inspect each of the manufactured semiconductor components S1 as an inspection target, and then store the semiconductor components S1 in a tray. In the cutting device 1, each component is detachable and replaceable with respect to the other components.

[0017] The cutting module A1 mainly includes a substrate supply unit 3, a positioning unit 4, a cutting table 5, a spindle unit 6, and a transport unit 7.

[0018] The substrate supply unit 3 pushes out the package substrates P1 one by one from a magazine M1 that accommodates a plurality of package substrates P1, thereby supplying the package substrates P1 one by one to the positioning unit 4. At this time, the package substrate P1 is positioned with the ball / lead surface facing upward.

[0019] The positioning unit 4 positions the package substrate P1 by placing the package substrate P1 pushed out from the substrate supply unit 3 on the rail portion 4a. Thereafter, the positioning unit 4 transports the positioned package substrate P1 to the cutting table 5.

[0020] The cutting table 5 holds the package substrate P1 to be cut. In this example, a cutting device 1 having a twin-cut table configuration with two cutting tables 5 is illustrated. The cutting table 5 includes a holding member 5a, a rotation mechanism 5b, and a movement mechanism 5c. The holding member 5a holds the package substrate P1 transported by the positioning unit 4 by suction from below. The rotation mechanism 5b can rotate the holding member 5a in the θ1 direction in FIG. 1 (i.e., rotate it in the XY horizontal plane in FIG. 1). The movement mechanism 5c can move the holding member 5a along the Y axis in the figure.

[0021] The spindle unit 6 cuts the package substrate P1 to separate the package substrate P1 into a plurality of semiconductor components S1. In this example, the cutting device 1 has a twin-spindle configuration having two spindle units 6. The spindle units 6 are movable along the X-axis and Z-axis in the figure. However, the cutting device 1 may also have a single-spindle configuration having one spindle unit 6.

[0022] The spindle portion 6 includes a blade 6a and a rotating shaft 6c. The blade 6a cuts the package substrate P1 by rotating at high speed, dividing the package substrate P1 into a plurality of semiconductor components S1. The blade 6a is attached to the rotating shaft 6c while being sandwiched between first and second flanges (not shown). The first and second flanges are fixed to the rotating shaft 6c by fastening members (not shown), such as nuts. The first flange is also referred to as a rear flange, and the second flange is also referred to as an outer flange.

[0023] The spindle 6 is provided with a cutting water nozzle, a cooling water nozzle, a cleaning water nozzle (none of which are shown), etc. The cutting water nozzle sprays cutting water toward the blade 6a rotating at high speed. The cooling water nozzle sprays cooling water. The cleaning water nozzle sprays cleaning water to wash away cutting chips and the like.

[0024] 1, after the cutting table 5 has adsorbed the package substrate P1, the first position confirmation camera 5d captures an image of the package substrate P1 and confirms the position of the package substrate P1. The confirmation using the first position confirmation camera 5d is, for example, confirmation of the position of a mark provided on the package substrate P1. The mark is, for example, a mark for determining the cutting position of the package substrate P1.

[0025] The cutting table 5 then moves toward the spindle unit 6 along the Y-axis in the figure. After the cutting table 5 moves below the spindle unit 6, it is aligned, and then the cutting table 5 and the spindle unit 6 are moved relative to each other to cut the package substrate P1. Every time the package substrate P1 is cut by the blade 6a of the spindle unit 6, the package substrate P1 is imaged and confirmed by the second position confirmation camera 6b provided on the spindle unit 6. Confirmation using the second position confirmation camera 6b includes, for example, confirmation of the cut position and cut width of the package substrate P1.

[0026] After cutting of the package substrate P1 is completed, the cutting table 5, with the plurality of individual semiconductor components S1 held by suction, moves along the Y axis in the direction away from the spindle unit 6. During this movement, the first cleaner 5e cleans and dries the top surfaces (ball / lead surfaces) of the semiconductor components S1.

[0027] The transport unit 7 picks up the semiconductor component S1 held on the cutting table 5 from above and transports the semiconductor component S1 to the inspection table 11 of the inspection and storage module B1. During this transport process, the second cleaner 7a cleans and dries the underside (mold surface) of the semiconductor component S1.

[0028] The inspection and storage module B1 mainly includes an inspection table 11, a first optical inspection camera 12, a second optical inspection camera 13, illumination units 16 and 17, a placement unit 14, and an extraction unit 15. The first optical inspection camera 12 may be provided in the cutting module A1.

[0029] The inspection table 11 holds the semiconductor component S1 for optical inspection of the semiconductor component S1. The inspection table 11 is movable along the X-axis in the figure. The inspection table 11 can also be turned upside down. The inspection table 11 is provided with a holding member that holds the semiconductor component S1 by suction. In addition, the surface of the inspection table 11 that holds the semiconductor component S1 is made of dark rubber, such as black, in this example. Note that the color of the rubber does not need to be dark and may be a light color, such as white.

[0030] The first optical inspection camera 12 and the second optical inspection camera 13 capture images of the mold surface and the ball / lead surface of the semiconductor component S1, respectively. Various inspections of the semiconductor component S1 are performed based on the images (image data) generated by the first optical inspection camera 12 and the second optical inspection camera 13. The first optical inspection camera 12 and the second optical inspection camera 13 are each positioned near the inspection table 11 to capture an image of an upward direction. In this example, the images generated by the first optical inspection camera 12 and the second optical inspection camera 13 are grayscale (256 gradations), but are not limited thereto and may be color images, for example. After the package substrate P1 is cut at the spindle unit 6, the singulated semiconductor components S1 maintain their original arrangement on the package substrate P1 before cutting until they are imaged by the first optical inspection camera 12 and the second optical inspection camera 13 and then placed in the placement unit 14, as described below. That is, during this time, the singulated semiconductor components S1 maintain their vertical and horizontal alignment. Therefore, the images captured by the first optical inspection camera 12 and the second optical inspection camera 13 show the semiconductor components S1 aligned vertically and horizontally.

[0031] The first optical inspection camera 12 captures an image of the mold surface of the semiconductor component S1 being transported to the inspection table 11 by the transport unit 7. The transport unit 7 then places the semiconductor component S1 on a holding member of the inspection table 11. The inspection table 11 is then turned upside down after suctioning the semiconductor component S1. The inspection table 11 moves above the second optical inspection camera 13, and the ball / lead surface of the semiconductor component S1 is imaged by the second optical inspection camera 13.

[0032] An illumination unit 16 is provided above the first optical inspection camera 12, and an illumination unit 17 is provided above the second optical inspection camera 13. Each of the illumination units 16, 17 is configured, for example, as a so-called coaxial illumination and / or a dome-shaped illumination. The illumination unit 16 is configured to irradiate light onto the semiconductor components S1 on the transport unit 7 during inspection by the first optical inspection camera 12. The illumination unit 17 is configured to irradiate light onto the semiconductor components S1 on the inspection table 11 during inspection by the second optical inspection camera 13. The set of the first optical inspection camera 12 and the illumination unit 16 and the set of the second optical inspection camera 13 and the illumination unit 17 have, for example, the same configuration, so the configuration of the latter set will be described below as a representative example.

[0033] 2 is a side cross-sectional view schematically illustrating the imaging environment of the second optical inspection camera 13. As shown in FIG. 2, during inspection by the second optical inspection camera 13, light emitted by an illumination unit 17 is irradiated onto the semiconductor component S1. In this example, the illumination unit 17 is configured as a dome-shaped illumination unit, and includes a dome 17a and a plurality of LEDs 17b arranged on the inner surface of the dome 17a. With the light irradiated onto the semiconductor component S1, the second optical inspection camera 13 generates an image of the semiconductor component S1. Based on this image, the semiconductor component S1 is inspected.

[0034] 1, the inspected semiconductor component S1 is placed on the placement unit 14. The placement unit 14 is movable along the Y axis in the figure. The inspection table 11 places the inspected semiconductor component S1 on the placement unit 14.

[0035] The extraction unit 15 transfers the semiconductor components S1 placed in the placement unit 14 to a tray. The semiconductor components S1 are sorted into "good products" or "defective products" based on the results of inspection using the first optical inspection camera 12 and the second optical inspection camera 13. The extraction unit 15 transfers each semiconductor component S1 to a good product tray 15a or a defective product tray 15b based on the results of the sorting. That is, good products are stored in the good product tray 15a, and defective products are stored in the defective product tray 15b. When the good product tray 15a and the defective product tray 15b are each filled with semiconductor components S1, they are replaced with a new tray.

[0036] The cutting apparatus 1 further includes a computer 50 and a monitor 20. The monitor 20 is configured to display an image. The monitor 20 is configured with a display device such as a liquid crystal monitor or an organic EL (Electro Luminescence) monitor. In the example of FIG. 1, the computer 50 and the monitor 20 are provided in the inspection and storage module B1, but they may also be provided in the cutting module A1.

[0037] The computer 50 controls the operation of each part of the cutting module A1 and the inspection and storage module B1, for example, the board supply unit 3, the positioning unit 4, the cutting table 5, the spindle unit 6, the transport unit 7, the inspection table 11, the first position confirmation camera 5d, the second position confirmation camera 6b, the first optical inspection camera 12, the second optical inspection camera 13, the lighting units 16 and 17, the placement unit 14, the extraction unit 15, and the monitor 20.

[0038] Furthermore, the computer 50 performs various inspections of the semiconductor component S1 based on, for example, image data generated by the first optical inspection camera 12 and the second optical inspection camera 13. Next, the computer 50 will be described in detail.

[0039] <1-2. Hardware Configuration of Computer> Fig. 3 is a diagram schematically illustrating the hardware configuration of the computer 50. As shown in Fig. 3, the computer 50 includes a control unit 70, an input / output I / F (interface) 90, a reception unit 95, and a storage unit 80, and each component is electrically connected via a bus.

[0040] The control unit 70 includes a CPU (Central Processing Unit) 72, a RAM (Random Access Memory) 74, and a ROM (Read Only Memory) 76. The control unit 70 is configured to control each component in the computer 50 in accordance with information processing, thereby controlling each component in the cutting device 1 other than the computer 50.

[0041] The input / output I / F 90 is configured to communicate with each component included in the cutting device 1 via a signal line. The input / output I / F 90 is used to transmit data from the computer 50 to each component in the cutting device 1 and to receive data transmitted from each component in the cutting device 1 to the computer 50. The reception unit 95 is configured to receive instructions from a user. The reception unit 95 is configured with, for example, some or all of a touch panel, a keyboard, a mouse, and a microphone.

[0042] The storage unit 80 is, for example, an auxiliary storage device such as a hard disk drive or a solid state drive. The storage unit 80 is configured to store, for example, a control program 81. The control program 81 is executed by the control unit 70 to realize various operations in the cutting device 1. When the control unit 70 executes the control program 81, the control program 81 is loaded into the RAM 74. The control unit 70 then controls each component by using the CPU 72 to interpret and execute the control program 81 loaded into the RAM 74.

[0043] [2. Manufacturing Method of Semiconductor Components] A manufacturing method of semiconductor components S1 using the above-described cutting apparatus 1 will be described. First, a package substrate P1 is prepared and stored in a magazine M1 included in the cutting module A1 of the cutting apparatus 1. In this example, the package substrate P1 is a single substrate on which various elements, such as semiconductor devices, are arranged in a fixed repeating pattern. As a result, one package substrate P1 forms a structure in which multiple semiconductor components S1 of the same type are connected in a vertical and horizontal array. Each semiconductor component S1 included in one package substrate P1 is marked with a bad mark as necessary before being stored in the magazine M1. A bad mark is marked on a semiconductor component S1 when it is determined that the semiconductor component S1 has some kind of defect (is a defective product) in a process upstream of the cutting apparatus 1 in the manufacturing line. The bad mark is marked on the surface of the semiconductor component S1 in a manner that is visually recognizable from the exterior, for example, by laser cutting, printing, engraving, or other methods.

[0044] The package substrate P1 supplied to the magazine M1 is transported to the spindle unit 6 in the manner described above and cut by the spindle unit 6. Here, the package substrate P1 is cut lengthwise and widthwise along the boundaries of the semiconductor components S1 contained therein. As a result, a plurality of individual semiconductor components S1 are obtained. The individual semiconductor components S1 are transported to the inspection and storage module B1 while maintaining their positional relationship before cutting, and various inspections are performed. The various inspections referred to here include a visual inspection based on images generated by the first optical inspection camera 12 and the second optical inspection camera 13. The visual inspection based on the images generated by the second optical inspection camera 13 includes a bad mark inspection, which checks whether each semiconductor component S1 shown in the image contains a bad mark. These inspections are performed by the control unit 70 of the computer 50.

[0045] The control unit 70 classifies each semiconductor component S1 as either a good or defective component through various inspections, including a bad mark inspection. The control unit 70 controls the operation of the extraction unit 15 to transport the semiconductor components S1 classified as good to the good product tray 15a and the semiconductor components S1 classified as defective to the defective product tray 15b. As a result, each semiconductor component S1 is sorted into the good product tray 15a or the defective product tray 15b. In this process, semiconductor components S1 determined to contain a bad mark by the bad mark inspection are classified as defective and sorted into the defective product tray 15b. On the other hand, semiconductor components S1 determined not to contain a bad mark are sorted into the good product tray 15a unless they are determined to be defective by other inspections. As a result, multiple semiconductor components S1 separated from each other and classified as good or defective are obtained from the package substrate P1. In this manner, semiconductor components S1 are manufactured by the cutting device 1.

[0046] [3. Bad Mark Inspection] Next, the details of the bad mark inspection will be described. Below, the preparation process carried out prior to the bad mark inspection and the flow of the bad mark inspection carried out after the preparation process will be described in order. The preparation process is usually carried out when the package substrate P1 to be cut by the cutting device 1 is a variety that is being cut for the first time. Once the preparation process has been carried out, information on the package substrate P1 of the variety is stored in the memory unit 80, and can be called up from the memory unit 80 and used the next time that package substrate P1 of that variety is cut.

[0047] <3-1. Flow of the Preparation Process> Before starting the manufacturing process of the semiconductor component S1 described above, a preparation process is carried out. In the preparation process, various parameters for operating the cutting device 1 are set. As described above, the manufacturing process of the semiconductor component S1 includes a bad mark inspection. In the preparation process, various parameters used in processes other than the bad mark inspection are set, but various parameters for the bad mark inspection are also set. A method for setting parameters for the bad mark inspection will be described below.

[0048] FIG. 4 shows an example of an image IM1 of a semiconductor component S1 captured by the second optical inspection camera 13. In this example, image IM1 captures the ball / lead surface side of the semiconductor component S1. Image IM1 captures multiple semiconductor components S1, including four semiconductor components S1 arranged in a 2x2 matrix. The areas included in image IM1 corresponding to each semiconductor component S1 are called component areas. Image IM1 captures four component areas T1 to T4. Image IM1 also captures multiple cutting lines formed when the package substrate P1 is singulated into multiple semiconductor components S1. In image IM1, the cutting lines appear as images of the surface holding the semiconductor component S1 on the inspection table 11. The component areas T1 to T4 are adjacent to each other, with these cutting lines as boundary lines BL.

[0049] In the example of Figure 4, of the four semiconductor components S1 corresponding to component regions T1 to T4, only one semiconductor component S1 corresponding to component region T3 includes a bad mark BM. If a bad mark BM is included in semiconductor component S1 in image IM1, the region in which the bad mark BM appears is called a bad mark region ROI (Region of Interest). The bad mark region ROI in component region T3 includes an image of the bad mark BM, but the bad mark regions ROI in component regions T1, T2, and T4 do not include an image of the bad mark BM.

[0050] To perform a reliable bad mark inspection, it is desirable to set the bad mark region ROI as accurately as possible within the field of view of the image IM1 capturing the semiconductor component S1. However, because the position and shape of the bad mark BM vary depending on the product, the position of the bad mark region ROI within the image IM1 is often not uniformly determined. Furthermore, even slight variations in the mounting position or angle of the second optical inspection camera 13 can cause the position of the bad mark region ROI within the image IM1 to change slightly. Therefore, in the past, the bad mark region ROI was set manually, but this often led to a problem of significant variability in settings between operators. Furthermore, the threshold used to determine whether the bad mark BM is included within the bad mark region ROI has also been set manually, but this similarly led to a problem of significant variability in settings between operators. When attempting to manually set the bad mark region ROI so that it surrounds the bad mark BM, determining whether the bad mark region ROI is properly surrounded is subjective. Adjusting the threshold also involves subjective judgment. For example, some people may set the bad mark region ROI too wide, resulting in a relatively small image of the bad mark BM in the bad mark region ROI. This changes the average brightness within the bad mark region ROI, and the bad mark BM may not be detected with the set threshold. If the bad mark region ROI and threshold are not set appropriately, as in this example, the accuracy of the bad mark inspection will decrease. Another problem is that manually setting the bad mark region ROI and threshold takes a long time.

[0051] In consideration of the above problems, in this embodiment, the bad mark region ROI and threshold value are automatically set. Fig. 5 shows a flow of a method for setting the bad mark region ROI and threshold value (a third threshold value Th3, described later), which are parameters for bad mark inspection. The process shown in Fig. 5 is executed by the control unit 70. The process shown in Fig. 5 will be described in detail below.

[0052] First, in step S100, the control unit 70 cuts the package substrate P1 with the spindle unit 6, as in the actual manufacturing of the semiconductor components S1, and then causes the second optical inspection camera 13 to capture images of the separated semiconductor components S1. In this example, each image IM1 captured by the second optical inspection camera 13 captures only a portion of the semiconductor components S1 included in one package substrate P1, depending on the angle of view of the second optical inspection camera 13. The control unit 70 captures multiple images IM1 of the arrangement of the semiconductor components S1 derived from one package substrate P1. An image of each semiconductor component S1 derived from one package substrate P1 is captured in at least one of these multiple images IM1.

[0053] In the following step S101, the control unit 70 acquires a setting image from the multiple images IM1 acquired in step S100. Although multiple setting images may be used, for simplicity, in this description, it is assumed that one setting image is set. Specifically, the control unit 70 sequentially displays the multiple images IM1 on the monitor 20 in response to an operator's operation of the reception unit 95. The operator operates the reception unit 95 while checking the monitor 20 to select one image IM1 from the multiple images IM1. The condition for the image IM1 to be selected here (hereinafter, the selection condition) is that at least one semiconductor component S1 (good product) not containing a bad mark BM and at least one semiconductor component S1 (defective product) containing a bad mark BM are included in the image. The control unit 70 acquires the image IM1 that satisfies the selection condition selected by the operator as the setting image. Hereinafter, the setting image will also be referred to as the symbol IM1.

[0054] In the next step S102, the control unit 70 extracts multiple component regions T1 to T4 from the setting image IM1. Note that, based on the selection conditions described above, at least one of the extracted component regions T1 to T4 will be a non-defective component region depicting a non-defective component, and at least one will be a defective component region depicting a defective component. In this description, it is assumed that the image shown in FIG. 4 is selected as the setting image IM1. In the example shown in FIG. 4, T1, T2, and T4 represent non-defective component regions, and T3 represents a defective component region. The component regions T1 to T4 can be detected using any image processing method. For example, the control unit 70 can detect a boundary line BL and cut out the component regions T1 to T4 along the boundary line BL.

[0055] In the next step S103, the control unit 70 divides each of the multiple component regions T1 to T4, each of which includes at least one non-defective component region and at least one defective component region, into n divided regions D1 to Dn (n is an integer equal to or greater than 2). FIG. 6 shows the divided regions D1 to Dn set within the component region T1. The divided regions D1 to Dn are set in the same manner within the other component regions T2 to T4. In this example, the divided regions D1 to Dn are set in a matrix (10x10 in FIG. 6). In this example, the divided regions D1 to Dn are set evenly within the component region without gaps or overlaps. However, the divided regions D1 to Dn may be set with gaps between them, may overlap, or may be set unevenly.

[0056] In the next step S104, the control unit 70 calculates the luminance of each divided region D1 to Dn in each of the component regions T1 to T4. Each divided region D1 to Dn includes multiple pixels. Therefore, the luminance of a divided region is a representative value that represents the luminance of the multiple pixels included in that divided region. In this example, the average luminance of the multiple pixels is set as the representative value. However, the representative value can also be, for example, the median or mode of the luminance of the multiple pixels.

[0057] In the next step S105, the control unit 70 compares the luminance among multiple component areas T1 to T4, each of which includes at least one non-defective component area and at least one defective component area. In this example, comparing the luminance means calculating the difference in luminance (luminance difference). Furthermore, in this example, one reference component area is selected from the multiple component areas T1 to T4, and the luminance of the selected component area is compared with that of the remaining three component areas in a round-robin fashion. The reference component area may be selected automatically by any method, such as selection based on the luminance of each component area or random selection, or may be predetermined. In this example, component area T1 is selected as the reference component area, and the luminance is compared for the three component area combinations (T1, T2), (T1, T3), and (T1, T4). Alternatively, the luminance may be compared for all combinations of the multiple component areas T1 to T4 without selecting a single reference component area. According to the above method, the luminance of a non-defective component area is always compared for at least one pair of the luminance of a defective component area.

[0058] In this example, the luminance is compared for each divided region D1 to Dn between component regions T1 to T4. Specifically, the difference (luminance difference) between the luminance of divided region D1 of one of the two compared component regions and the luminance of divided region D1 of the other component region is calculated. The same process is repeated for divided regions D2 to Dn. As a result, the difference (luminance difference) between the luminance of the divided region of one component region and the luminance of the corresponding divided region in the other component region is calculated for all divided regions D1 to Dn. According to the above method, the luminance is compared between the good and defective regions for each divided region D1 to Dn. FIG. 7A shows the results of the luminance comparison between the good and defective regions T1 and T3. In FIG. 7A, the numerical values ​​in each divided region D1 to Dn that make up the component region indicate the luminance difference calculated for that divided region.

[0059] In the following step S106, the control unit 70 selects a segmented region where the luminance difference (absolute value) between the two component regions compared in step S105 is equal to or greater than the first threshold value Th1. In this example, similar processing to step S105 is repeated for the three component region combinations (T1, T2), (T1, T3), and (T1, T4). This ensures that a segmented region where the luminance difference is equal to or greater than the first threshold value Th1 is selected for at least one combination of a non-defective region and a defective region. In FIG. 7A, the segmented regions shaded dark gray are segmented regions where the luminance difference between the non-defective region T1 and the defective region T3 is equal to or greater than the first threshold value Th1. While the numerical values ​​of the luminance difference are omitted, FIG. 7B shows the results of a comparison of the luminance between the non-defective region T1 and the non-defective region T2, and FIG. 7C shows the results of a comparison of the luminance between the non-defective region T1 and the non-defective region T4. In FIGS. 7B and 7C, the divided areas painted dark gray are divided areas in which the difference in luminance between two component areas is equal to or greater than the first threshold value Th1, as in FIG. 7A.

[0060] The first threshold value Th1 may be set as appropriate. For example, the first threshold value Th1 may be a fixed value or may be automatically set. In the case of automatic setting, the first threshold value Th1 may be calculated based on the luminance of the two target component regions. In this example, the first threshold value Th1 is automatically set to (maximum luminance difference) / 2.

[0061] In the next step S107, the control unit 70 selects, in addition to the segmented region selected in step S106, segmented regions adjacent to the segmented region selected in step S106, whose component region luminance difference is equal to or greater than the second threshold value Th2. In this example, similar processing to steps S105 and S106 is repeated for the three component region combinations (T1, T2), (T1, T3), and (T1, T4). In Figures 7A to 7C, the segmented regions shaded in light gray are the segmented regions selected in step S107.

[0062] The second threshold Th2 may also be set appropriately. In this example, the second threshold Th2 is a fixed value. However, the second threshold Th2 may also be set automatically. In the case of automatic setting, for example, the second threshold Th2 may be calculated based on the luminance of the two target component regions or may be calculated based on the first threshold Th1. The second threshold Th2 is preferably smaller than the first threshold Th1. Therefore, for example, the second threshold Th2 may be set to a value obtained by multiplying the first threshold Th1 by a coefficient greater than 0 and less than 1. When the second threshold Th2 is set to a fixed value and the first threshold Th1 is set automatically, it is preferable to predict possible values ​​of the first threshold Th1 and set the second threshold Th2 in advance to be smaller than the predicted values.

[0063] 7A , a divided area in which the luminance difference (absolute value) between the non-defective area T1 and the defective area T3 is equal to or greater than the first threshold value Th1 (i.e., large) is considered to be an area where a bad mark BM is primarily present. It is also considered that a bad mark BM is primarily present around the divided area selected in step S106, i.e., an area where a bad mark BM is likely to be present. Therefore, step S107 is executed to detect all divided areas that were not detected in step S106 but are likely to contain a bad mark BM. Setting the second threshold value Th2 to a value smaller than the first threshold value Th1 means that, in line with this objective, the detection sensitivity is increased in step S107 compared to step S106. The area selected in step S107 is also an area where the luminance difference is relatively large and is considered to be an area where a bad mark BM is primarily present.

[0064] In the following step S108, the control unit 70 determines a bad mark region ROI to include the divided regions selected in steps S106 and S107. In this example, one or more regions (hereinafter referred to as "combined regions") C formed by connecting the selected divided regions for each of the three combinations (T1, T2), (T1, T3), and (T1, T4) are first detected. Then, among the detected one or more combined regions C, a maximum combined region Cmax, which is the combined region C with the largest area, is detected, and a bad mark region ROI is determined to include the maximum combined region Cmax. In the example of FIGS. 7A to 7C, a total of ten combined regions C are detected. The region with the largest area among these is detected as the maximum combined region Cmax. The maximum combined region Cmax is considered to be the region where a bad mark BM exists. Therefore, the maximum combined region Cmax is detected from the comparison result (FIG. 7A) between a non-defective region T1 that does not include a bad mark BM and a defective region T3 that does include a bad mark BM. A bonded area C other than the maximum bonded area Cmax is detected due to an error.

[0065] When detecting the combined area C, the divided areas being "connected" can mean, for example, that they are connected vertically, horizontally, or diagonally. Figures 7A to 7C show examples of connections vertically, horizontally, and diagonally.

[0066] 7A, the bad mark region ROI is determined as the smallest rectangular region that includes the maximum bonded region Cmax. However, the bad mark region ROI is not limited to this example, and may be, for example, the maximum bonded region Cmax itself, or a region slightly smaller than the maximum bonded region Cmax. In this example, information specifying the relative position of the bad mark region ROI within the component region is stored in the storage unit 80 as information specifying the position of the bad mark region ROI.

[0067] Through the above steps S100 to S108, the bad mark region ROI is preset prior to the bad mark inspection. The following steps S109 to S111 are a process for presetting a third threshold value Th3. The third threshold value Th3 is a parameter used for inspecting the bad mark region ROI in the inspection image. The inspection image is an image that is the subject of the bad mark inspection and is captured by the second optical inspection camera 13 under the same conditions as the setting image IM1. In this example, the third threshold value Th3 is calculated based on the brightness of the bad mark region ROI in the setting image IM1.

[0068] In step S109, the control unit 70 selects one pair of a non-defective area and a defective area from among the multiple component areas T1 to T4. This selection is performed, for example, but not limited to, by selecting the two component areas T1 and T3 that form the maximum combined area Cmax.

[0069] In the next step S110, the control unit 70 varies the parameter L to identify a parameter L appropriate for the third threshold Th3. In this example, the variation range of the parameter L is the maximum range of luminance that a pixel can have (0 to 255). However, the variation range of the parameter L is not limited to this. For example, the variation range of the parameter L may be limited to the vicinity of a predicted value appropriate for the third threshold Th3, such as a range narrower than the maximum range, such as 30 to 230. Note that the variation step (increment amount) of the parameter L may be 1 or a value of 2 or more.

[0070] Specifically, the control unit 70 calculates the area of ​​a portion of the bad mark region ROI included in one of the component regions (non-defective region) selected in step S109, where the luminance exceeds the parameter L, while varying the parameter L within the variation range. Similarly, the control unit 70 calculates the area of ​​a portion of the bad mark region ROI included in the other component region (defective region) selected in step S109, where the luminance exceeds the parameter L, while varying the parameter L within the variation range. The area can be counted, for example, as the number of pixels. The control unit 70 also calculates the difference between the two areas (hereinafter referred to as the area difference) while varying the parameter L within the variation range. FIG. 8 is a table showing the results of the above calculations. FIG. 9 is a graph showing the relationship between the parameter L (horizontal axis) and the area difference (vertical axis) shown in FIG. 8 .

[0071] The third threshold Th3 can be said to be a threshold for separating the bad mark BM from the background region. Referring to FIG. 4 , in this example, the bad mark region ROI mainly contains a bright portion representing the bad mark BM (hereinafter, the bad mark portion), a dark portion representing the substrate (hereinafter, the substrate portion), and a portion representing a ball that is brighter than the bad mark BM (hereinafter, the ball portion). In image IM1 of FIG. 4 , the ball portion corresponds to a white dot pattern. Next, referring to FIG. 9 , while the parameter L ranges from 0 to a certain value V1 (V1 > 0), the brightness of all pixels typically falls within the range of L to 255, so the area difference is essentially 0. However, when the parameter L exceeds the value V1, the brightness of the pixels in the substrate portion begins to deviate from the range of L to 255, causing the area difference graph to abruptly increase. This is because the presence of the bad mark BM hides the substrate portion in the defective area (i.e., the conventional substrate portion is hidden by the bad mark BM), but does not hide the substrate portion in the non-defective area (i.e., the conventional substrate portion is visible). In other words, when the parameter L exceeds the value V1, the presence of the bad mark BM begins to appear as an area difference.

[0072] When the parameter L exceeds the peak value V2 (V2 > V1), the graph of the area difference drops sharply. Furthermore, when the parameter L exceeds the value V3 (V3 > V2), the graph of the area difference becomes smooth or roughly constant. This is because the number of pixels in the substrate portion hidden by the bad mark BM reaches a plateau. The peak value V2 can be considered to be a value close to the average brightness of the substrate portion. After that, when the parameter L exceeds the value V4 (V4 > V3), the graph of the area difference begins to drop further. V4 can be considered to be a value close to the average brightness of the bad mark BM. Therefore, when the parameter L exceeds the value V4, the brightness of the pixels in the bad mark portion begins to deviate from the range of L to 255, and the graph of the area difference approaches 0. This is because the areas of the ball portions in the bad mark region ROI in the non-defective region and the bad mark region ROI in the defective region are the same.

[0073] In the following step S111, the control unit 70 sets a third threshold value Th3 based on the area difference calculated in step S110. Specifically, the control unit 70 identifies a parameter L (hereinafter referred to as a reference parameter Ls) that maximizes the area difference within the parameter L's variation range (0 to 255). The control unit 70 then sets a luminance value that is a predetermined offset value F1 away from the reference parameter Ls as the third threshold value Th3 and stores it in the storage unit 80. At this time, the value of the reference parameter Ls may also be stored in the storage unit 80 as a reference value. The offset value F1 may be a fixed value or may be automatically set. In the case of automatic setting, for example, the offset value F1 may be calculated based on the luminance of pixels in the bad mark regions ROI included in the two target non-defective and defective regions.

[0074] In this example, the third threshold value Th3 is set to a value that is greater than the reference parameter Ls by the offset value F1. This is because the third threshold value Th3 is set within the range of V3 to V4. This is because the range of V3 to V4 is where the number of pixels in the substrate portion hidden by the bad mark BM reaches a plateau, and is the position where the presence of the bad mark BM is stably apparent.

[0075] In this way, the two parameters used in the bad mark inspection, that is, the bad mark region ROI and the third threshold value Th3, are set.

[0076] <3-2. Bad Mark Inspection Flow> Next, the bad mark inspection flow will be described. Bad mark inspection is performed on an inspection image captured by the second optical inspection camera 13 during actual manufacturing of the semiconductor component S1. The inspection image is the same type of image as the image in the example of FIG. 4. Therefore, hereinafter, the inspection image will also be designated by the symbol IM1.

[0077] The control unit 70 continuously acquires inspection images IM1 and performs the following process on each inspection image IM1. First, the control unit 70 extracts multiple component regions T1 to T4 from the inspection image IM1, as in step S102. Then, the control unit 70 references the storage unit 80 and sets a bad mark region ROI within each component region based on the information identifying the position of the bad mark region ROI saved in step S108. Next, the control unit 70 references the storage unit 80 and reads a third threshold value Th3. Then, for each bad mark region ROI, the control unit 70 determines whether the number of pixels contained within the bad mark region ROI that exceed the third threshold value Th3 is equal to or greater than a fourth threshold value Th4. If the number of pixels is equal to or greater than the fourth threshold value Th4, the control unit 70 determines that the bad mark region ROI contains a bad mark BM, and determines that the semiconductor component S1 corresponding to the component region containing the bad mark region ROI is defective. If not, it is determined that the bad mark region ROI does not include a bad mark BM, and the semiconductor component S1 corresponding to the component region including the bad mark region ROI is determined to be a non-defective product.

[0078] This completes the bad mark inspection. The fourth threshold value Th4 may be a fixed value, or may be set manually or automatically prior to the bad mark inspection. In the case of automatic setting prior to the bad mark inspection, for example, the fourth threshold value Th4 may be calculated based on the luminance of pixels in the bad mark regions ROI included in the two target good and defective regions.

[0079] [4. Features] As described above, in the cutting device 1 according to this embodiment, the bad mark region ROI is automatically set in advance. This eliminates variations in settings caused by operators, improving the accuracy of bad mark inspection. Furthermore, it is possible to shorten the setting time required to prepare for bad mark inspection.

[0080] The third threshold value Th3 is also automatically set in advance. This eliminates the variation in the setting of the third threshold value Th3 by the operator, further improving the accuracy of the bad mark inspection. In addition, the setting time required for preparation for the bad mark inspection can be further reduced.

[0081] [5. Modifications] The above-described embodiment is merely an example of the present invention in every respect. The above-described embodiment can be improved or modified in various ways within the scope of the present invention. For example, the following modifications are possible. When implementing the present invention, specific configurations can be appropriately adopted depending on the embodiment.

[0082] <5-1> In the above embodiment, step S107 may be omitted.

[0083] <5-2> In the above embodiment, an example was shown in which the bad mark region ROI mainly contained a bad mark portion, a substrate portion, and a ball portion. The ball portion, the bad mark portion, and the substrate portion were arranged in order of brightness. However, even if the bad mark portion was the darkest region, the bad mark portion and the substrate portion would be separated near the peak value V2, so the third threshold value Th3 could be calculated using a similar algorithm. In this way, the above-described algorithm for calculating the third threshold value Th3 can be applied to various types of semiconductor components S1.

[0084] <5-3> In the above embodiment, the bad mark region ROI and the third threshold value Th3 are automatically set in advance. However, of the bad mark region ROI and the third threshold value Th3, only the bad mark region ROI may be automatically set, or only the third threshold value Th3 may be automatically set.

[0085] <5-4> In the above embodiment, in step S100 of the preparation process, the same package substrate P1 as that used in the actual production of the semiconductor component S1 is used, but a dummy substrate of this package substrate P1 may also be used.

[0086] The above describes exemplary embodiments of the present invention. That is, the detailed description and the accompanying drawings are disclosed for the purpose of illustrative explanation. Therefore, some of the components described in the detailed description and the accompanying drawings may be non-essential components for solving the problems. Therefore, just because these non-essential components are described in the detailed description and the accompanying drawings, it should not be immediately recognized that these non-essential components are essential.

[0087] 1 Cutting device, 3 Substrate supply unit, 4 Positioning unit, 4a Rail unit, 5 Cutting table, 5a Holding member, 5b Rotation mechanism, 5c Moving mechanism, 5d First position confirmation camera, 5e First cleaner, 6 Spindle unit, 6a Blade, 6b Second position confirmation camera, 6c Rotation axis, 7 Conveying unit, 7a Second cleaner, 11 Inspection table, 12 First optical inspection camera, 13 Second optical inspection camera, 14 Placement unit, 15 Extraction unit, 15a Tray for good products, 15b Tray for defective products, 16, 17 Illumination unit, 17a Dome, 17b LED, 20 Monitor, 50 Computer, 70 Control unit, 72 CPU, 74 RAM, 76 ROM, 80 Storage unit, 81 Control program, 90 Input / output I / F, 95 Reception unit, A1 Cutting module, B1 Inspection and storage module, BL Boundary line, BM bad mark, C bonded area, Cmax maximum bonded area, D1 divided area, D1 to Dn divided areas, F1 offset value, IM1 image (setting image, inspection image), L parameter, Ls reference parameter, M1 magazine, P1 package substrate, ROI bad mark area, S1 semiconductor component, T1 to T4 component area, T1, T2, T4 good area, T3 defective area, Th1 first threshold, Th2 second threshold, Th3 third threshold, Th4 fourth threshold, V1 to V4 values, V2 peak value.

Claims

1. An inspection device comprising: a control unit that pre-defines a bad mark area in a setting image showing an object to be inspected, where the bad mark is an area in which the object to be inspected will be shown if the object to be inspected includes a bad mark, and inspects the bad mark area in an inspection image to determine whether the object to be inspected shown in the inspection image includes the bad mark, wherein pre-defining the bad mark area includes: acquiring the setting image showing a good product that is the object to be inspected that does not include the bad mark, and a defective product that is the object to be inspected that includes the bad mark, and determining the bad mark area by comparing the luminance of the good product area in the setting image showing the good product with the luminance of the defective product area in the setting image showing the defective product.

2. The inspection device according to claim 1, wherein the control unit divides each of the good area and the defective area into a plurality of divided areas, and determines the bad mark area by comparing the luminance of the good area with the luminance of the defective area for each divided area.

3. The inspection device according to claim 2, wherein the control unit selects the divided area in which the luminance difference between the non-defective area and the defective area is equal to or greater than a first threshold, and determines the bad mark area so as to include the selected divided area.

4. The inspection device according to claim 3, wherein the control unit further selects, in addition to the divided area in which the luminance difference is equal to or greater than the first threshold, a divided area in which the luminance difference is equal to or greater than a second threshold from among the divided areas adjacent to the divided area in which the luminance difference is equal to or greater than the first threshold, and determines the bad mark area so as to include the selected divided area.

5. The inspection device according to claim 3 or 4, wherein the control unit determines the bad mark area so as to include the area with the largest area among one or more areas formed by connecting the selected divided areas.

6. An inspection device according to any one of claims 1 to 5, wherein the control unit pre-sets a third threshold value used for inspecting the bad mark area in the inspection image based on the luminance of the bad mark area in the setting image.

7. The inspection device of claim 6, wherein presetting the third threshold value includes: calculating a difference between an area of ​​a portion in the bad mark area included in the good area, the area having a luminance exceeding the third threshold value, and an area of ​​a portion in the bad mark area included in the defective area, the area having a luminance exceeding the third threshold value, while varying the third threshold value; and presetting the third threshold value based on the difference.

8. The inspection device according to claim 7, wherein the control unit presets, as the third threshold, a luminance that is away from the third threshold by an offset value and that maximizes the difference within a variation range of the third threshold.

9. A cutting device comprising: a cutting mechanism that cuts a substrate including a plurality of semiconductor components and separates the semiconductor components; and an inspection device according to any one of claims 1 to 8 that inspects the separated semiconductor components as the inspection objects.

10. A method for manufacturing semiconductor components, comprising: a step of cutting a substrate including a plurality of semiconductor components by a cutting mechanism to separate the semiconductor components; and a step of inspecting the separated semiconductor components as the inspection objects using an inspection device according to any one of claims 1 to 8.

Citation Information

Patent Citations

  • Detecting method for wafer chip

    JP1986294831A

  • Board mark recognition device

    JP1999040983A

  • Failed substrate detecting method and part mounter

    JP1999354992A

  • Substrate treatment method and part packaging system

    JP2008060250A