Systems and methods for achieving ion energy distribution
By employing a bias voltage power supply with an ion flux compensator to generate tailored waveforms, the system achieves controlled ion energy distribution in plasma processing, addressing the challenges of semiconductor wafer processing.
Patent Information
- Application Number
- PCT/US2024/058741
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-12
- Filing Date
- 2024-12-05
- Publication Date
- 2025-06-19
AI Technical Summary
In plasma processing systems, achieving a desirable ion energy distribution for semiconductor wafer processing is challenging due to difficulties in controlling the ion energy distribution effectively.
The implementation of a bias voltage power supply that generates a tailored waveform, specifically using an ion flux compensator with a switched current source, to control the ion energy distribution by adjusting the sheath potential slope.
This approach allows for precise control of ion energy distribution, enabling wide or narrow distributions based on the sheath potential slope, thereby improving semiconductor etching processes.
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Figure US2024058741_19062025_PF_FP_ABST
Abstract
Description
SYSTEMS AND METHODS FOR ACHIEVING ION ENERGY DISTRIBUTIONField
[0001] The present embodiments relate to systems and methods for achieving an ion energy distribution.Background
[0002] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
[0003] In a plasma processing system, a radio frequency (RF) generator is provided. The RF generator is coupled to a plasma chamber in which a semiconductor wafer is placed. The RF generator generates an RF signal that is provided to the plasma chamber for processing the semiconductor wafer. However, it is difficult to process the semiconductor wafer in a desirable manner.Summary
[0004] Embodiments of the disclosure provide systems, apparatus, methods and computer programs for achieving an ion energy distribution. It should be appreciated that the present embodiments can be implemented in numerous ways, e.g., a process, an apparatus, a system, a device, or a method on a computer readable medium. Several embodiments are described below.
[0005] In an embodiment, the systems and methods relate to a bias voltage power supply that generates a tailored waveform to achieve desired ion energy distribution for high aspect ratio semiconductor etching. For example, an ion flux compensator (TFC) with a switched current source that controls the ion energy distribution is provided. The ion flux compensator is operated, such as activated, when plasma discharges to a predetermined value, such as zero. The ion flux compensator includes a fast high voltage direct current (HVDC) source in series with a resistor inductor diode (RLD) circuit. The HVDC source generates high voltage to provide power for ion flux compensation, such as ion flux tuning. Once the ion flux compensation is over, the HVDC source generates a negative bias to make the ion flux compensator ineffective by reverse biasing an IFC diode.
[0006] In one embodiment, the ion flux compensator is provided as a tuning knob for ion energy spread. The ion flux compensator is used to control the ion energy distribution by changing a flatness of a sheath potential. The ion flux compensator is used to perform overcompensation, under-compensation, and critical-compensation of the sheath potential to shape the ion energy distribution. For example, an arbitrary shape of the sheath potential is created to tune the ion energy distribution.
[0007] In an embodiment, a method for achieving an energy distribution is described. The method includes accessing a value of the ion energy distribution and identifying, one of a plurality slopes of a sheath voltage corresponding to the value of ion energy distribution. The method includes controlling an ion flux compensator to achieve the one of the plurality of slopes.
[0008] In an embodiment, a controller for achieving an energy distribution is described. The controller includes a processor and a memory device coupled to the processor. The processor accesses a value of the ion energy distribution and identifies, one of a plurality slopes of a sheath voltage corresponding to the value of ion energy distribution. The processor controls an ion flux compensator to achieve the one of the plurality of slopes.
[0009] In one embodiment, a plasma system is described. The plasma system includes a radio frequency (RF) charger circuit that provides RF energy to a plasma chamber and a magnetic energy recovery circuit coupled to the radio frequency charger circuit. The magnetic energy recovery circuit operates after operation of the radio frequency charger circuit. The plasma system also includes an ion flux compensation circuit coupled to the radio frequency charger circuit. The ion flux compensation circuit includes a pulser and operates after operation of the magnetic energy recovery circuit. The plasma system includes a controller coupled to the ion flux compensation circuit. The controller accesses a value of the ion energy distribution and identifies, one of a plurality slopes of a sheath voltage corresponding to the value of ion energy distribution. The controller controls the ion flux compensation circuit to achieve the one of the plurality of slopes.
[0010] Some advantages of the herein described systems and methods include controlling ion energy distribution by controlling the sheath potential. For example, when the sheath potential is controlled to have a positive slope or a negative slope, a wide ion energy distribution is achieved. When the sheath potential is controlled to have a zero slope, a narrow ion energy distribution is achieved. The sheath potential is controlled by controlling a voltage that is output from a pulser of the ion flux compensator or by controlling a voltage that is generated by direct current voltage source or a combination thereof.
[0011] Other aspects will become apparent from the following detailed description, taken in conjunction with the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The embodiments may best be understood by reference to the following description taken in conjunction with the accompanying drawings.
[0013] Figure 1 is a diagram of an embodiment of a system to illustrate use of an ion flux compensator (IFC).
[0014] Figure 2 is a diagram of an embodiment of a system to illustrate details of a high voltage pulser of the IFC.
[0015] Figure 3 is a diagram of an embodiment of a system to illustrate a determination of peak-peak (P2P) voltages and slopes of the peak to peak voltages based on ion energy distributions (lEDs).
[0016] Figure 4A is an embodiment of a graph to illustrate different ion energy distributions.
[0017] Figure 4B is an embodiment of a graph to illustrate that a slope of a voltage of the lower sheath near a substrate is controlled to achieve different ion energy distributions.
[0018] Figure 5 includes embodiments of graphs to illustrate that by controlling a magnitude of current generated by the high voltage pulser, a slope of the voltage sheath is controlled.
[0019] Figure 6 is a diagram of an embodiment of a system to illustrate a control of voltage that is output from the high voltage pulser based on a measurement signal that is received from a voltage and current (V&I) sensor.
[0020] Figure 7 is a diagram of an embodiment of a system to illustrate generation of one or more control signals to control a voltage generated by the high voltage pulser.
[0021] Figure 8A is an embodiment of a graph of a measured voltage indicated within the measurement signal of Figure 6.
[0022] Figure 8B is an embodiment of a graph to illustrate a closed loop system for generating a control signal based on an ion energy distribution (IED) setpoint.
[0023] Figure 8C is a diagram of an embodiment of a graph to illustrate another application of the windowing and averaging function to a derivative of the measured voltage.DETAILED DESCRIPTION
[0024] The following embodiments describe systems and methods for achieving an ion energy distribution. It will be apparent that the present embodiments may be practicedwithout some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present embodiments.
[0025] Figure 1 is a diagram of an embodiment of a system 100 to illustrate use of an ion flux compensator (IFC) 102 within the system 100. The system 100 includes a radio frequency (RF) charger circuit 104, the IFC 102, a magnetic energy recovery (MER) circuit 106, a controller 108, a charging diode 110, a resonant inductor 112, a pre-blocking capacitor 114, a plasma chamber 116, and an IFC diode 118. The system 100 includes a MER diode 101 and a diode 103.
[0026] The RF charger circuit 104 includes a direct current (DC) voltage source VDC, a diode 120, a capacitor 122, and a high-voltage (HV) charger 124. As an example, the HV charger 124 includes a combination of two or more power supplies, such as voltage power supplies or DC power supplies, that step-up or step-down, a DC voltage provided at an input of the HV charger 124. To illustrate, a voltage that is applied at the input of the HV charger 124 is increased or decreased to output another voltage at an output of the HV charger 124.
[0027] The IFC 102 includes a pulser 126 and a resistor-inductor-diode (RLD) circuit 128. An example of the pulser 126 is a nanopulser. Another example of the pulser is a high voltage direct current source. The RLD circuit 128 includes a resistor 130, an inductor 132, and a diode 134.
[0028] The controller 108 includes a processor 136 and a memory device 138. Examples of the controller 108 include a computer, such as a desktop computer or a laptop computer or a smart phone or a tablet. Examples of the processor 136 include a microprocessor, a central processing unit, an application specific integrated circuit (ASIC), and a programmable logic device (PLD). An example of the memory device 138 includes a random access memory (RAM) or a read-only memory (ROM) or a combination thereof.
[0029] The MER circuit 106 includes multiple sub-circuits, and each sub-circuit of the MER circuit 106 includes multiple primary and secondary inductors, a capacitor, a switch, multiple diodes, and a resistor. The sub-circuits of the MER circuit 106 are coupled to each other. An example of the plasma chamber 116 is a capacitively coupled (CCP) plasma chamber. Another example of the plasma chamber 116 is an inductively coupled plasma (ICP) chamber. A sub-circuit is sometimes referred to herein as a component.
[0030] The DC voltage source VDC is coupled to the diode 120 to form a series circuit, and the series circuit is coupled in parallel with the capacitor 122 and with the HV charger 124 to form a parallel circuit between points 140 and 142. The point 142 is coupled to the diode 103, which is coupled to an output 144 of the MER circuit 106. An input 146 of the MER circuit 106 is coupled to the MER diode 101.
[0031] An output of the HV charger 124 is coupled to the charging diode 110. The charging diode 110 is coupled via a point 148 to the resonant inductor 112 and to the IFC diode 118. The pulser 126 is coupled to the DC voltage source VDC, and to the RLD circuit 128 at a point 105. For example, a series circuit includes the resistor 130 coupled in series with the inductor 132 and the series circuit is coupled in parallel with the diode 134 to form a parallel circuit, which is coupled to the pulser 126. Also, in the example, the parallel circuit is coupled to the IFC diode 118 at a point 107. Further, in the example, the parallel circuit is formed between the points 105 and 107.
[0032] The resonant inductor 112 is coupled via a point 150 to the pre-blocking capacitor 114 and to the MER diode 101. Also, the pre-blocking capacitor 114 is coupled to the plasma chamber 116. For example, the pre-blocking capacitor 114 is coupled to an electrode, such as a lower electrode 115 of an electrostatic chuck 113 of the plasma chamber 116 or to an upper electrode of the plasma chamber 116 or to an RF coil of the plasma chamber 116. To illustrate, when the pre-blocking capacitor 114 is coupled to the lower electrode 115, the upper electrode is coupled to the ground potential. As another illustration, when the pre-blocking capacitor 114 is coupled to the upper electrode or the RF coil, the lower electrode 115 is coupled to the ground potential. The processor 136 is coupled to the memory device 138, to the pulser 126, to the HV charger 124, to the DC voltage source VDC, and to the MER circuit 106.
[0033] The processor 136 consecutively controls the RF charger circuit 104, the MER circuit 106, and the IFC 102 to operate to complete a cycle of control, and repeats the cycle multiple times. During each cycle of the control by the processor 136, the DC voltage source VDC generates a voltage signal 152 and sends the voltage signal 152 via the diode 120, which is forward biased, to the HV charger 124. The processor 136 sends a control signal 111 to the DC voltage source VDC to modify, such as increase or decrease, a voltage of the voltage signal 152. The processor 136 sends one or more control signals 154 to the power supplies of the HV charger 124 to modify, such as increase or decrease a voltage, of the voltage signal 152 output another voltage signal 156.
[0034] The voltage signal 156 is sent from the HV charger 124 via the charging diode 110, the point 148, the resonant inductor 112, and the point 150 to the electrode of the plasma chamber 116. The charging diode 110 is forward biased when the voltage signal 156 passes through the charging diode 110. When one or more process gases, such as an oxygen containing gas for nitrogen containing gas or a fluorine containing gas or a combination thereof, are supplied to an interior region of the plasma chamber 116 in addition to RF energy of the voltage signal 156, plasma 119 is stricken or maintained within the plasma chamber 116 to process a substrate, such as a semiconductor wafer, placed on top of the electrostatic chuck 113.When the plasma 119 is stricken or maintained within the plasma chamber 116, a plasma load, such as the plasma chamber 116, is charged.
[0035] It should be noted that when the charging diode 110 is forward biased, the IFC diode 118 is reversed biased to decouple, such as disconnect, the IFC 102 from the plasma chamber 116. Moreover, during a time period in which the charging diode 110 is forward biased, the MER diode 101 is reversed biased to decouple, such as disconnect, the MER circuit 106 from the plasma chamber 116.
[0036] During each cycle, the processor 136 controls the RF charger circuit 104 and the HV charger 124 to operate for a pre-determined amount of dwell time. After the predetermined amount of dwell time has passed, the charging diode 110 becomes reversed biased to decouple the HV charger 124 from the plasma chamber 116. Moreover, after the predetermined amount dwell time has passed, the IFC diode 118 stays reversed biased and the MER diode 101 becomes forward biased.
[0037] Also, after the predetermined amount of dwell time has passed during each cycle, the processor 136 controls the MER circuit 106 to operate to recover RF energy from the plasma chamber 116. For example, upon determining that the predetermined amount of dwell time has passed, the processor 136 sends one or more control signals 109 to the MER circuit 106 to operate the MER circuit 106. The MER circuit 106 is operated to control the switches of the sub-circuits of the MER circuit 106 to close and open. When the switches are controlled to close, the RF energy recovered from the plasma chamber 116 via the MER diode 101 and the input 146 is stored within the primary inductors of the MER circuit 106. Also, when the switches are controlled to open after being closed, the RF energy stored within the primary inductors is transferred via the secondary inductors of the MER circuit 106, the output 144, the diode 103, which is forward biased, and the point 140 to be stored in the capacitor 122, which is an example of an energy storage circuit.
[0038] Moreover, during each cycle, after RF energy is recovered from the plasma chamber 116 by the energy storage circuit, the MER diode 101 becomes reversed biased, the charging diode 110 stays reverse biased, and the IFC diode 118 becomes forward biased. During a time period in which the IFC diode 118 is forward biased, the processor 136 sends one or more control signals 158 to the pulser 126 to operate the pulser 126. The pulser 126 is operated to control an amount of voltage to further control an amount of current that is output by the pulser 126. For example, the processor 136 includes, within the one or more control signals 158, one or more enable signals or one or more disable signals or a combination thereof, to send to the pulser 126 to control, such as increase or decrease, an amount of voltage that is applied by the pulser 126. The pulser 126 generates a current signal 160, such as a negative current, according to theamount of voltage that is applied by the pulser 126 and sends the current signal 160 to the RLD circuit 128. An indication that the current signal 160 is a negative current is provided by an upward arrow pointing towards the pulser 126.
[0039] The current signal 160 is provided in a first direction from the point 105 to the point 107 via the series circuit of the inductor 132 and the resistor 130. The inductor 132 and the resistor 130 modifies an impedance of the current signal 160 to output a current signal 162, which is sent via the point 107, the IFC diode 118, the point 148, the resonant inductor 112, the point 150, and the pre-blocking capacitor 114 to the electrode of the plasma chamber 116 for controlling, such as tuning or compensating, ion flux within the plasma chamber 116. For example, the processor 136 increases an amount of voltage to be applied by the pulser 126 to further increase an amount of current within the current signal 160 to modify the ion flux within the plasma chamber 116. As another example, the processor 136 decreases an amount of voltage to be applied by the pulser 126 to further decrease an amount of current within the current signal 160 to modify the ion flux within the plasma chamber 116. It should be noted that during a time period in which the current signal 162 is being supplied to the plasma chamber 116 from the RLD circuit 128, the diode 134 is reversed biased.
[0040] Each cycle of control to operate the RF charger circuit 104, the MER circuit 106, and the IFC 102 has a predetermined amount of time. After passage of the predetermined amount of time, the processor 136 sends another set of one or more control signals, such as the one or more control signals 154, to operate the HV charger 124 to start another cycle of occurrence of charging the plasma chamber 110. It should be noted that during the other cycle, the RF energy that is stored within the capacitor 122 is sent to the HV charger 124. The HV charger 124, based on the other set of control signals received from the processor 136, increases or decreases an amount of voltage of a voltage signal output from a combination of the DC voltage source VDC and the RF energy stored within the capacitor 122. The amount of voltage of the voltage signal is modified to output a modified voltage signal. The modified voltage signal is sent via the charging diode 110, the point 148, the resonant inductor 112, the point 150, and the pre-blocking capacitor 114 to the electrode to charge, such as strike or maintain the plasma 119 within, the plasma chamber 110.
[0041] Within each cycle, such as the other cycle, of control, during a time period in which the plasma chamber 110 is being charged by RF energy of the modified voltage signal, the IFC diode 118 becomes reversed biased. When the IFC diode 118 is reversed biased, the current signal 160 is sent from the pulser 126 via the point 105, the diode 134, which is forward biased, the point 107, the resistor 130, and the inductor 132 to the point 105. In this manner, when the diode 134 is forward biased, the current signal 160 flows in a second direction oppositeto the first direction, and therefore, the pulser 126 is sometimes referred to herein as a switched current source that switches the current signal 160 between the first and second directions. When the IFC diode 118 is reversed biased, the IFC 102 is disconnected from the plasma chamber 116 and there is no ion flux compensation.
[0042] During the other cycle, after the fixed amount of dwell time has passed, the processor 136 sends another control signal set, such as the one or more control signals 109, to the MER circuit 106 to recover RF energy from the plasma chamber 110. Also, during the other cycle, after the RF energy is recovered from the plasma chamber 110, the processor 136 sends another control signal set, such as the one or more control signals 158, to the pulser 126 to control, such as increase or decrease, a voltage that is output by the pulser 126 to further control an amount of current of a current signal generated by the pulser 126. During the other cycle, the amount of current of the current signal is controlled to control an amount of current of a current signal output from the RLD circuit 128 to tune, such as increase or decrease, ion flux of the plasma 119 within the plasma chamber 116. It should be noted that the pre-blocking capacitor 114 blocks DC voltage that can be applied by the plasma chamber 116 via the point 150 and the MER diode 101 to the MER recovery circuit 106.
[0043] In one embodiment, the processor 136 sends a control signal to the voltage source VDC to increase or decrease a voltage of the voltage signal 152 to further increase or decrease a voltage of the voltage signal 156 to charge the plasma load.
[0044] Figure 2 is a diagram of an embodiment of a system 200 to illustrate details of the pulser 126. The system 200 includes the RF charger circuit 104, the pulser 126, and the controller 108. The pulser 126 includes a combination 201 of power supplies 202, 204, and 206, such as voltage power supplies or DC power supplies, that are controlled by the controller 108.
[0045] The power supplies 202, 204, and 206 have inputs that are coupled in parallel and have outputs that are coupled in series. For example, an input 208 of the power supply 202 is coupled in parallel to an input 210 of the power supply 204 and the input 210 is coupled in parallel to an input 212 of the power supply 206. Also, a common input 214 of the power supply 202 is coupled in parallel to a common input 216 of the power supply 204 and the common input 216 is coupled in parallel to a common input 218 of the power supply 206. All of the common inputs 214, 216, and 218 are coupled to a reference potential, such as a ground potential. An output 220, having a voltage HV+, of the power supply 202 is coupled to the point 105 (Figure 1) at an input of the RLD circuit 128. Also, a common output 222 of the power supply 202 is coupled in series to an output 224 of the power supply 204 and a common output 226 of the power supply 204 is coupled to an output 228 of the power supply 206. A common output 230 of the power supply 206 is coupled to a reference potential HV-, such as a ground potential or anegative potential. The input 208 is coupled in series to the point 140. For example, a voltage at the point 208 is equal to a voltage at the point 140.
[0046] Enable inputs 232, 234, and 236 of the power supplies 202, 204, and 206 are coupled to the processor 136. For example, the enable input 232 of the power supply 202 is coupled via a connection 238 to the processor 136, the enable input 234 of the power supply 204 is coupled via a connection 240 to the processor 136, and the enable input 236 of the power supply 206 is coupled via a connection 242 to the processor 136. An example of a connection, as used herein, includes a cable.
[0047] The processor 136 sends the one or more control signals 158 to control, such as enable or disable, one or more of the power supplies 202, 204, and 206 to modify an amount of voltage that is applied at the output 220 to modify a magnitude of the current signal 160 produced at the output 220. For example, the processor 136 sends an enable signal ESI via the connection 238 to the enable input 232 to turn on the power supply 202, sends another enable signal ES2 via the connection 240 to the enable input 234 to turn on the power supply 204, and sends yet another enable signal ES3 via the connection 234 to the enable input 236 to turn on the power supply 206. The three enable signals ESI through ES3 are an example of the control signals 158. As another example, the power supplies 202 and 204 are turned on, and the power supply 206 is turned off. To illustrate, the processor 136 sends a disable signal DS3 via the connection 242 to the enable input 236 to turn off the power supply 206. The two enable signals ESI and ES2 and the third disable signal DS3 are an example of the control signals 158. As another example, the power supply 202 is turned on and the power supplies 204 and 206 are turned off. To illustrate, the processor 136 sends a disable signal DS2 via the connection 240 to the enable input 234 to turn off the power supply 204. The enable signal ESI and the two disable signals DS2 and DS3 are an example of the control signals 158. The amount of voltage provided at the output 220 is applied by the current signal 160 to the point 105.
[0048] It should be noted that the greater the number of power supplies 202, 204, and 206 that are turned on and the lower the number of power supplies 202, 204, and 206 that are that are turned off, the higher the voltage that is applied by the pulser 126 to generate the current signal 160 at the output 220. On the other hand, the lower the number of power supplies 202, 204, and 206 that are turned on and the higher the number of power supplies 202, 204, and 206 that are that are turned off, the lower the voltage that is applied by the pulser 126 to generate the current signal 160 at the output 220. For example, when the power supplies 202, 204, and 206 receive the enable signals ESI, ES2, and ES3, a first amount of voltage is applied by the pulser 126 to generate the current signal 160. In the example, the first amount of voltage is greater than a second amount of voltage that is applied by the pulser 126 to generate the current signal 160.The second amount of voltage is applied to the voltage signal 160 at the point 105 when the power supplies 202 and 204 receive the enable signals ESI and ES2 and the power supply 206 receives the disabled signal DS3.
[0049] When the voltage applied by the pulser 126 is higher, an amount of current of the current signal 160 is higher and when the voltage applied by the pulser 126 is lower, an amount of current of the current signal 160 is lower. For example, with an increase in the voltage applied by the pulser 126, the amount of current of the current signal 160 increases and with a decrease in the voltage applied by the pulser 126, the amount of current of the current signal 160 decreases. Also, the voltage applied by the pulser 126 is controlled via the power supplies 202, 204, and 206 to achieve a zero slope, a positive slope, or a negative slope of a sheath voltage of a lower sheath 117 of the plasma 119 within the plasma chamber 110 (Figure 1).
[0050] In one embodiment, the pulser 126 includes any other number, such as two or four or 10, of power supplies.
[0051] In an embodiment, a voltage output from the pulser 126 at the output 220 is modified, such as increased or decreased, by controlling a voltage output from the DC voltage source VDC. For example, the voltage output from the pulser 126 is increased by increasing the voltage output from the DC voltage source VDC and is decreased by decreasing the voltage output from the DC voltage source VDC. The processor 136 indicates, within the control signal 111, an amount of the voltage of the voltage signal 152 output from the DC voltage source VDC. Upon receiving the amount of voltage from the processor 136, the DC voltage source VDC generates the voltage signal 152 having the amount of voltage.
[0052] Figure 3 is a diagram of an embodiment of a system 300 to illustrate a determination of peak-peak (P2P) voltages and slopes of the peak to peak voltages based on ion energy distributions (lEDs). The system 300 includes an IED to electrical parameter estimator 302, which is sometimes referred to herein as an estimator. Examples of the electrical parameter include the peak to peak voltages and the slopes of the peak to peak voltages. An example of the estimator 302 is the controller 108 (Figure 1). Another example of the estimator 302 is a computer program that is executed by the processor 136.
[0053] The estimator 302, such as the processor 136, accesses one or more of ion energy distributions IED1, IED2, and lEDm, where m is a positive integer. For example, the one or more of ion energy distributions IED1, IED2, and IED are read from the memory device 138. The processor 136 receives the ion energy distributions IED1, IED2, and lEDm from a user via an input device, and stores the ion energy distributions IED1, IED2, and lEDm within the memory device 138. Examples of input device include a mouse, a keyboard, a stylus, a touchscreen, and a combination thereof. The input device is coupled to the processor 136 (Figure1). It should be noted that each ion energy distribution IED1, IED2, and lEDm is a value, such as a range between a first electron volt and a second electron volt.
[0054] The estimator 302 determines based on the ion energy distributions IED1, IED2, and lEDm, values of the electrical parameters. For example, the processor 136 identifies, from a listing stored within the memory device 138, that a peak to peak voltage value P2P1 of the sheath voltage and a slope 1 of the peak to peak voltage value P2P1 corresponds to, such as has a one-to-one or unique relationship with or a link with, the ion energy distribution IED1. Further in the example, the processor 136 identifies, from the listing, that a peak to peak voltage value P2P2 of the sheath voltage and a slope 2 of the peak to peak voltage value P2P2 corresponds to the ion energy distribution IED2 and that a peak to peak voltage value P2Pm of the sheath voltage and a slope m of the peak to peak voltage value P2Pm corresponds to the ion energy distribution lEDm.
[0055] The processor 136 controls the HV charger 124 (Figure 1) to achieve one of the peak to peak voltage values P2P1, P2P2, and P2Pm. For example, the processor 136 controls the HV charger 124 via the one or more control signals 154 (Figure 1) to achieve the peak to peak voltage value P2P1, P2P2, or P2Pm. To illustrate, the processor 136 increases a peak to peak voltage of the voltage signal 156 to achieve the peak to peak voltage value P2P2. The peak to peak voltage of the voltage signal 156 is increased by enabling a first number of the power supplies of the HV charger 124. The first number is greater than a second number of power supplies of the HV charger 124 that are enabled to achieve the peak to peak voltage value P2P1, which is less than the peak to peak voltage value P2P2. Also, a total number of power supplies of the HV charger 124 include a sum of the first number and a third number of power supplies that are disabled in the HV charger 124 or a sum of the second number and a fourth number of power supplies that are disabled in the HV charger 124. It should be noted that in the illustration, the sum of the first and third numbers is equal to the sum of the second and fourth numbers. As another illustration, the processor 136 decreases a peak to peak voltage of the voltage signal 156 to decrease the peak to peak voltage value P2P2 of the voltage signal 156 to the peak to peak voltage value P2P1. The peak to peak value of the voltage signal 156 is decreased by disabling a first number of the power supplies of the HV charger 124. The first number is greater than a second number of power supplies of the HV charger 124 that are disabled to achieve the peak to peak voltage value P2P2, which is greater than the peak to peak voltage value P2P1. Also, a total number of power supplies of the HV charger 124 include a sum of the first number and a third number of power supplies that are enabled in the HV charger 124 or a sum of the second number and a fourth number of power supplies that are enabled in the HV charger 124. It should benoted that in the illustration, the sum of the first and third numbers is equal to the sum of the second and fourth numbers.
[0056] Also, the processor 136 controls the pulser 126 of the IFC 102 to achieve the slope 1, or slope 2, or the slope m. For example, the processor 136 sends one or more of the enable signals ESI, ES2, and ES3, or one or more of the disabled signals DS2 and DS3, or a combination thereof, to the pulser 126 until a predetermined slope, such as the slope 1, or slope 2, or slope m, is achieved.
[0057] Figure 4A is an embodiment of a graph 400 to illustrate different ion energy distributions. The graph 400 plots ion energy distribution of ions of the plasma 119 within the plasma chamber 110 (Figure 1) on a y-axis and ion energy (E), in electron volts (eV), of the ions on an x-axis. The graph 400 includes a plot 402 that has a narrow range of distribution of ion energy and includes another plot 404 that is a wide range of distribution of ion energy.
[0058] Figure 4B is an embodiment of a graph 450 to illustrate that a slope of sheath voltage near the substrate is controlled to achieve different ion energy distributions. The graph 450 plots ion energy distribution of ions of the plasma 119 within the plasma chamber 110 (Figure 1) on a y-axis and energy of the ions on an x-axis. The graph 450 includes a plot 452, a plot 454, and a plot 456.
[0059] The graph 450 has embedded therein a graph 458, a graph 460, and a graph 462. The graph 458 includes a plot 464 of the sheath voltage versus time. Similarly, the graph 460 includes a plot 466 of the sheath voltage versus time and the graph 462 includes a plot 468 of the sheath voltage versus time.
[0060] The plot 452 illustrates an under-compensated mode, the plot 454 illustrates a critically-compensated mode, and the plot 456 illustrates an over-compensated mode. As illustrated by the plots 464 and 452, when the sheath voltage has a positive slope, the ion energy has a wide spread and is low in amount. As illustrated by the plots 466 and 454, when the sheath voltage has a zero slope, the ion energy has a narrow spread and is of a high amount. Further, as illustrated by the plots 468 and 456, when the sheath voltage has a negative slope, the ion energy has a spread in between the wide and narrow spreads and has an amount in between the low and high amounts. The ion energy spread in between the wide and narrow spreads is wider than the narrow spread. As such, by controlling the slope of the sheath voltage, the ion energy distribution is controlled.
[0061] Figure 5 includes embodiments of a graph 500, a graph 502, and a graph 504 to illustrate that by controlling a magnitude of current of the current signal 160 (Figure 1) generated by the pulser 126 (Figure 1), a slope of the sheath voltage is controlled. The graph 500plots the magnitude of the current of the current signal 160 on a y-axis and time t on an x-axis. The graph 500 includes three plots 506, 508, and 510 of magnitudes of the current signal 160.
[0062] Also, the graph 502 plots voltages that are measured at the point 150 (Figure 1) at an input of the pre-blocking capacitor 114 (Figure 1) on a y-axis and the time t on an x- axis. The x-axis of the graph 502 is the same as the x-axis of the graph 500. The graph 502 includes a plot 512, another plot 514, and another plot 516 of the voltage is measured of the point 150.
[0063] According to the graphs 500 and 502, an increase in the magnitude of the current of the current signal 160 increases a negative slope of the voltage measured at the point 150 and a decrease in the magnitude decreases the negative slope of the voltage measured in the point 150. For example, when a first magnitude of the current signal 160 is that illustrated by the plot 506, a voltage measured at the point 150 has a first negative slope illustrated by the plot 512. When a second magnitude of the current signal 160 is that illustrated by the plot 508, a voltage measured at the point 150 has a second negative slope illustrated by the plot 514. Also, when a third magnitude of the current signal 160 is that illustrated by the plot 510, a voltage measured at the point 150 has a third negative slope illustrated by the plot 516. The first magnitude is greater than the second magnitude, which is greater than the third magnitude. Also, in the example, each of the first, second, and third magnitudes is a maximum magnitude. To illustrate, the first magnitude occurs between a low to high transition and a consecutively following high to low transition of the plot 506, the second magnitude occurs between a low to high transition and a consecutively following high to low transition of the plot 508, and the third magnitude occurs between a low to high transition and a consecutively following high to low transition of the plot 510. A low to high transition of magnitudes of current of the current signal 160 is a transition from a low magnitude level of current of the current signal 160 to a high magnitude level of current of the current signal 160. The high magnitude level includes a maximum magnitude and the low magnitude level includes a minimum magnitude. The high magnitude level of current of the current signal 160 is substantially greater than the low magnitude level of current of the current signal 160. To illustrate, the high magnitude level of current of the current signal 160 is at least 10% greater than the low magnitude level of current of the current signal 160. The first negative slope is greater than, such as is more negative than, the second negative slope, and the second negative slope is greater than, such as is more negative than, the third negative slope.
[0064] Continuing with the example, a slope of a plot, such as the plot 512, 514, or 516, of voltage at the point 150 is a slope between a high to low transition of amounts, such as magnitudes, of voltage of the plot and a transition from a consecutively following low to hightransition of amounts of voltage of the plot. The low to high transition of the plot, such as the plot 512, 514, or 516, of voltage at the point 150 is a transition from a low magnitude level of the voltage to a high magnitude level of the voltage and the high to low transition of the plot is a transition from the high magnitude level to the low magnitude level. The high magnitude level of voltage at the point 150 is substantially greater than the low magnitude level of voltage at the point 150. To illustrate, the high magnitude level of voltage at the point 150 is at least 10% greater than the low magnitude level of voltage at the point 150. As another illustration, the high magnitude level of voltage at the point 150 includes a maximum magnitude of the voltage and the low magnitude level of voltage at the point 150 includes a minimum magnitude.
[0065] The graph 504 plots the sheath voltage on a y-axis and the time t on an x-axis. The x-axis of the graph 504 is the same as the x-axis of the graph 500. The graph 504 includes a plot 518, another plot 520 and yet another plot 522 of voltages of the lower sheath 117 (Figure 1). The plot 522 has a greater slope compared to the plot 520, which is a greater slope compared to the plot 518. For example, a slope of the plot 522 between a high to low transition of the plot 522 and a consecutively following low to high transition of the plot 522 is greater than a slope of the plot 520 between a high to low transition of the plot 520 and a consecutively following low to high transition of the plot 520, and the slope of the plot 520 is greater than a slope of the plot 518 between a high to low transition of the plot 518 and a consecutively following low to high transition of the plot 518.
[0066] A low to high transition of amounts, such as magnitudes, of voltage of a plot, such as the plot 518, or 520, or 522, is a transition from a low magnitude level of the sheath voltage to a high magnitude level of the sheath voltage. The high magnitude level of the sheath voltage is substantially greater than the low magnitude level of the sheath voltage. To illustrate, the high magnitude level of the sheath voltage is at least 10% greater than the low magnitude level of the sheath voltage. As another illustration, the high magnitude level of the sheath voltage includes a maximum magnitude of the voltage and the low magnitude level of the sheath voltage includes a minimum magnitude of the sheath voltage.
[0067] According to the graphs 500 and 504, an increase in the magnitude of the current of the current signal 160 decreases a slope of the sheath voltage and a decrease in the magnitude increases the slope of the sheath voltage. For example, when the first magnitude of the current signal 160 is that illustrated by the plot 506, the sheath voltage has a slope, such as a substantially zero slope, illustrated by the plot 518. When the second magnitude of the current signal 160 is that illustrated by the plot 508, the sheath voltage has a first positive slope illustrated by the plot 520. Also, when the third magnitude of the current signal 160 is that illustrated by the plot 510, the sheath voltage has a second positive slope illustrated by the plot522. The first magnitude is greater than the second magnitude, which is greater than the third magnitude. Also, in the example, each of the first, second, and third magnitudes is a maximum magnitude. The first positive slope is greater than, such as is more positive than, the substantially zero slope, and the second positive slope is greater than, such as is more positive than, the first positive slope. Each of the substantially zero slope, the first positive slope, and the second positive slope of a plot, such as the plot 518, 520, or 522, is between a high to low transition of the plot and a consecutively following low to high transition of the plot. An example of the substantially zero slope is a slope that is within a predetermined percentage, such as 2 to 3%, of a zero slope. To illustrate, the substantially zero slope is the zero slope or 3% greater than the zero slope or 3% lower than the zero slope. As such, by controlling the magnitudes of current of the current signal 160, the slope of the sheath voltage is controlled.
[0068] Figure 6 is a diagram of an embodiment of a system 600 to illustrate a control of voltage that is output from the pulser 126 based on a measurement signal 602 that is received from a voltage and current (V&I) sensor 604. The system 600 includes the IFC 102, the controller 108, the V&I sensor 604, the resonant inductor 112, and the plasma chamber 116. One end of the V&I sensor 604 is coupled at the point 150 and an opposite end of the V&I sensor 604 is coupled to the processor 136. An example of the measurement signal 602 is a signal indicating one or more amounts of voltage of the point 150, or a signal indicating one or more amounts of current of the point 150, or a signal indicating both the voltage and current at the point 150. To illustrate, the amounts of voltage indicated by the measurement signal 602 represents the sheath voltage.
[0069] The processor 136 receives the measurement signal 602 from the V&I sensor 604 to generate one or more control signals 606, which is an example of the one or more control signals 158 (Figure 1). Upon receiving the measurement signal 602, the processor 136 determines whether the magnitude of the current signal 160 generated by the pulser 126 is to be controlled, such as increased or decreased. Upon determining that the magnitude of the current signal 160 is to be increased, the processor 136 increases a number of enable signals or decreases a number of disable signals or a combination thereof of the one or more control signals 606 to increase a voltage that is applied by the pulser 126 to further increase the magnitude of the current signal 160. On the other hand, upon determining that the magnitude of the current signal 160 is to be decreased, the processor 136 decreases a number of enable signals or increases a number of disable signals or a combination thereof of the one or more control signals 606 to decrease a voltage that is applied by the pulser 126 to further decrease the magnitude of the current signal 160.
[0070] It should be noted that in an embodiment, the terms magnitude of the current signal 160 and magnitude of current of the current signal 160 are used herein interchangeably.
[0071] Figure 7 is a diagram of an embodiment of a system 700 to illustrate generation of the one or more control signals 606. The system 700 includes a processor 702, which is an example of the processor 136 (Figure 1). The processor 702 includes a variable calculator 704, a scaled slope factor (SSF) calculator 705, and a comparator 706. The variable calculator 704 is coupled to the V&I sensor 604 (Figure 6), and to the SSF calculator 705. The SSF calculator 705 is coupled to the comparator 706, which is coupled to the pulser 126 (Figure 1).
[0072] The variable calculator 704 receives the measurement signal 602 from the V and I sensor 604 and calculates a variable 708. For example, the variable calculator 704 determines a slope of the measured voltage, at the point 150 (Figure 1), received within the measurement signal 602 by computing a derivative, such as a slope, of the measured voltage. The derivative is a change in the measured voltage as a function of time. The variable calculator 704 further calculates a first ratio of the measured current, at the point 150, received with the measurement signal 602 and a product of a capacitance of the electrostatic chuck 113 (Figure 1) and a term. The variable calculator 704 calculates the term to be a sum of one and alpha (a). The variable calculator 704 determines alpha to be a second ratio of a first capacitance and a second capacitance. The first capacitance is an ESC-to-ground capacitance and the second capacitance is an ESC-to-wafer capacitance. For example, the ESC-to-ground capacitance is between the electrostatic chuck 113 (Figure 1) and a ground potential and the ESC-to-wafer capacitance is between the electrostatic chuck 113 and the substrate that is placed on top of the electrostatic chuck 113. The variable calculator 704 receives the capacitance of the electrostatic chuck 113 from the user via the input device. Also, the variable calculator 704 receives the first and second capacitances from the user via the input device.
[0073] The variable calculator 704 computes a difference between the slope of the measured voltage and the first ratio to output values of the variable 708. For example, the V&I sensor 604 provides a first set of times of measurement of values of the measured voltage at the point 150 and a second set of times of measured of values of the measured current at the point 150 to the variable calculator 704. Upon receiving the first and second sets of times, the variable calculator 704 calculates the derivative and the first ratio based on the first and second sets of times. To illustrate, the variable calculator 704 computes a first value of the derivative based on a first value of the voltage measured at a time tx by the V&I sensor 604 and computes a first value of the first ratio based on a first value of the current measured at the time tx by the V&I sensor 604. Similarly, the variable calculator 704 computes a second value of the derivativebased on a second value of the voltage measured at a time ty by the V&I sensor 604 and computes a second value of the first ratio based on a second value of the current measured at the time ty by the V&I sensor 604. The time ty occurs after the time tx. The variable calculator 704 calculates a first difference between the first value of the derivative and the first value of the first ratio to output a first value of the variable 708 and calculates a second difference between the second value of the derivative and the second value of the first ratio to output a second value of the variable 708.
[0074] The SSF calculator 705 receives the values of the variable 708 from the variable calculator 704 and applies a windowing and statistical function to the values of the variable 708 to calculate an SSF 710. For example, the SSF calculator 705 applies the windowing function to filter out, such as remove, values of the variable 708 between a low to high transition and a consecutively following high to low transition of the variable 708 to output filtered values of the variable 708. To illustrate, the low to high transition occurs from a low level of the variable 708 to a high level of the variable 708 and the high to low transition of the variable 708 occurs from the high level to the low level. To further illustrate, the high level of the variable 708 includes a maximum magnitude of the variable 708 and the low level of the variable 708 includes a minimum magnitude of the variable 708. Continuing with the example, the SSF calculator 705 applies the statistical function by calculating a statistical value, such as an average or a median, from the filtered values between the high to low transition and a consecutively following low to high transition of the variable 708 to determine the SSF 710.
[0075] The comparator 706 receives the SSF 710 from the SSF calculator 705 and compares the SSF 710 with zero to determine whether the SSF 710 is equal to zero, greater than zero, or less than zero. Upon determining that the SSF 710 is equal to zero, the comparator 706 does not generate the one or more control signals 606. For example, the comparator 706 does not modify, such as increase or decrease, a number of enable signals or a number of disable signals or a combination thereof that have been sent to the pulser 126. Rather, a voltage that is applied by the pulser 126 based on the enable signals or the disable signals or the combination thereof is maintained.
[0076] Upon determining that the SSF 710 is greater than zero, the comparator 706 generates the one or more control signals 606 to increase a voltage that is applied by the pulser 126 to further increase a magnitude of the current of the current signal 160. For example, in response to determining that the SSF 710 is greater than zero, the comparator 706 increases a number of enable signals or decreases a number of disable signals or a combination thereof to increase an amount of voltage that is applied by the pulser 126 to the point 105 (Figure 1) toincrease the magnitude of the current of the current signal 160. In this manner, the magnitude of the current of the current signal 160 is increased until the SSF 710 is equal to zero.
[0077] On the other hand, upon determining that the SSF 710 is less than zero, the comparator 706 generates the one or more control signals 606 to decrease a voltage that is applied by the pulser 126 to further decrease a magnitude of the current of the current signal 160. For example, in response to determining that the SSF 710 is less than zero, the comparator 706 decreases a number of enable signals or increases a number of disable signals or a combination thereof to decrease an amount of voltage that is applied by the pulser 126 to the point 105 (Figure 1) to decrease the magnitude of the current of the current signal 160. In this manner, the magnitude of the current of the current signal 160 is decreased until the SSF 710 is equal to zero.
[0078] It should be noted that the value of zero of SSF 710 is an example of the slope 1, or the slope 2 or the slope m (Figure 3). Also, a positive value of SSF 710 is another example of the slope 1, or the slope 2 or the slope m and a negative value of SSF 710 is yet another example of the slope 1, or the slope 2 or the slope m. For example, when the value of zero of SSF 710 is the slope 1, the positive value of SSF 710 is the slope 2 and the negative value of SSF 710 is the slope m. As another example, when the value of zero of SSF 710 is the slope 2, the positive value of SSF 710 is the slope 1 and the negative value of SSF 710 is the slope m.
[0079] In one embodiment, each of the variable calculator 704, the SSF calculator 705, and the comparator 706 is a separate integrated circuit.
[0080] In an embodiment, instead of controlling the magnitude of the current of the current signal 160 to increase or decrease until the SSF 710 is equal to zero, the magnitude of the current is controlled to decrease until the SSF 710 has a first predetermined value, such as a value greater than zero. For example, in response to determining that the SSF 710 is at the first predetermined value greater than zero, the comparator 706 does not generate the one or more control signals 606. To illustrate, the comparator 706 does not modify, such as increase or decrease, a number of enable signals or a number of disable signals or a combination thereof that have been sent to the pulser 126. Rather, a voltage that is applied by the pulser 126 based on the enable signals or the disable signals or the combination thereof is maintained. On the other hand, in the example, in response to determining that the SSF 710 is equal to zero or less than zero, the comparator 706 decreases a number of enable signals or increases a number of disable signals or a combination thereof to decrease an amount of voltage that is applied by the pulser 126 to the point 105 (Figure 1) to decrease the magnitude of the current of the current signal 160. In this manner, the magnitude of the current of the current signal 160 is decreased until the SSF 710 is at the first predetermined value greater than zero.
[0081] In an embodiment, instead of controlling the magnitude of the current of the current signal 160 to increase or decrease until the SSF 710 is equal to zero, the magnitude of the current is controlled to increase until the SSF 710 has a second predetermined value, such as a value less than zero. For example, in response to determining that the SSF 710 is at the second predetermined value less than zero, the comparator 706 does not generate the one or more control signals 606. To illustrate, the comparator 706 does not modify, such as increase or decrease, a number of enable signals or a number of disable signals or a combination thereof that have been sent to the pulser 126. Rather, a voltage that is applied by the pulser 126 based on the enable signals or the disable signals or the combination thereof is maintained. On the other hand, in the example, in response to determining that the SSF 710 is equal to zero or greater than zero, the comparator 706 increases a number of enable signals or decreases a number of disable signals or a combination thereof to increase an amount of voltage that is applied by the pulser 126 to the point 105 (Figure 1) to increase the magnitude of the current of the current signal 160. In this manner, the magnitude of the current of the current signal 160 is increased until the SSF 710 is at the second predetermined value less than zero.
[0082] Figure 8A is an embodiment of a graph 800 of a measured voltage indicated within the measurement signal 602 (Figure 6). The graph 800 includes a plot 802 of the measured voltage at the point 150 (Figure 1) versus time t. The measured voltage at the point 150 is plotted on a y-axis and the time t is plotted on an x-axis.
[0083] During a cycle of the measured voltage at the point 150, the measured voltage has an occurrence of a low to high transition consecutively followed by a high level of the measured voltage. Further, during the cycle, a high level of the measured voltage is consecutively followed by an occurrence of a high to low transition. Also, during the cycle, high to low transition is further consecutively followed by an occurrence of a negative slope of a low level of the measured voltage, and the negative slope is consecutively followed by another occurrence of a low to high transition. The other occurrence of the low to high transition occurs during a consecutively following cycle of the measured voltage at the point 150.
[0084] Figure 8B is an embodiment of a graph 804 to illustrate an application of the windowing function. The graph 804. Also illustrates a closed loop system, such as the feedback system illustrated in Figure 6, to generate a control signal based on an IED setpoint, such as a value of IED. The graph 804 includes a plot 806 that is generated after applying the windowing function to the plot 802 (Figure 8A). By applying the windowing function, each occurrence of the low to high transition of the plot 802, the high level of the plot 802, and the high to low transition of the plot 802 is filtered out to generate the plot 806
[0085] Figure 8C is a diagram of an embodiment of a graph 808 to illustrate another application of the windowing and averaging function. The graph 808 includes a plot 810 generated after applying the windowing function to a derivative of the measured voltage at the point 150 (Figure 1). The windowing function is applied to the derivative to output a result. Also, the graph 808 into a plot 812 that is generated after applying an averaging function to the result.
[0086] Embodiments described herein may be practiced with various computer system configurations including hand-held hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers and the like. The embodiments can also be practiced in distributed computing environments where tasks are performed by remote processing hardware units that are linked through a network.
[0087] In some embodiments, a controller, described herein, is a part of a system, which may be part of the above-described examples. Such systems include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems are integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics is referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and / or the type of system, is programmed to control any of the processes disclosed herein, including the delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks coupled to or interfaced with a system.
[0088] Broadly speaking, in a variety of embodiments, the controller is defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as ASICs, PLDs, and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). The program instructions are instructions communicated to the controller in the form of various individual settings (or program files), defining the parameters, the factors, the variables, etc., for carrying out a particular process on or for a semiconductor wafer or to a system. The program instructions are, in some embodiments, a part of a recipe defined byprocess engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.
[0089] The controller, in some embodiments, is a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller is in a “cloud” or all or a part of a fab host computer, which allows for remote access of the wafer processing. The computer enables remote access to the system to monitor current progress of fabrication operations, examines a history of past fabrication operations, examines trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process.
[0090] In some embodiments, a remote computer (e.g. a server) provides process recipes to a system over a network, which includes a local network or the Internet. The remote computer includes a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify the parameters, factors, and / or variables for each of the processing steps to be performed during one or more operations. It should be understood that the parameters, factors, and / or variables are specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller is distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes includes one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.
[0091] Without limitation, in various embodiments, example systems to which the methods are applied include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that is associated or used in the fabrication and / or manufacturing of semiconductor wafers.
[0092] It is further noted that in some embodiments, the above-described operations apply to several types of plasma reactor chambers, e.g., a plasma chamber including an inductively coupled plasma (ICP) reactor, a capacitively coupled plasma (CCP) reactor, a transformer coupled plasma reactor, conductor tools, dielectric tools, a plasma chamber including an electron cyclotron resonance (ECR) reactor, etc. For example, one or more RF generators are coupled to an inductor within the ICP reactor. Examples of a shape of the inductor include a solenoid, a dome-shaped coil, a flat-shaped coil, etc.
[0093] As noted above, depending on the process step or steps to be performed by the tool, the host computer communicates with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.
[0094] With the above embodiments in mind, it should be understood that some of the embodiments employ various computer-implemented operations involving data stored in computer systems. These operations are those physically manipulating physical quantities. Any of the operations described herein that form part of the embodiments are useful machine operations.
[0095] Some of the embodiments also relate to a hardware unit or an apparatus for performing these operations. The apparatus is specially constructed for a special purpose computer. When defined as a special purpose computer, the computer performs other processing, program execution or routines that are not part of the special purpose, while still being capable of operating for the special purpose.
[0096] In some embodiments, the operations may be processed by a computer selectively activated or configured by one or more computer programs stored in a computer memory, cache, or obtained over the computer network. When data is obtained over the computer network, the data may be processed by other computers on the computer network, e.g., a cloud of computing resources.
[0097] One or more embodiments can also be fabricated as computer-readable code on a non-transitory computer-readable medium. The non-transitory computer-readable medium is any data storage hardware unit, e.g., a memory device, etc., that stores data, which is thereafter be read by a computer system. Examples of the non-transitory computer-readable medium include hard drives, network attached storage (NAS), read-only memory (ROM), random access memory (RAM), compact disc-ROMs (CD-ROMs), CD-recordables (CD-Rs), CD-rewritables (CD-RWs), magnetic tapes and other optical and non-optical data storage hardware units. Insome embodiments, the non-transitory computer-readable medium includes a computer-readable tangible medium distributed over a network-coupled computer system so that the computer- readable code is stored and executed in a distributed fashion.
[0098] Although the method operations above were described in a specific order, it should be understood that in various embodiments, other housekeeping operations are performed in between operations, or the method operations are adjusted so that they occur at slightly different times, or are distributed in a system which allows the occurrence of the method operations at various intervals, or are performed in a different order than that described above.
[0099] It should further be noted that in an embodiment, one or more features from any embodiment described above are combined with one or more features of any other embodiment without departing from a scope described in various embodiments described in the present disclosure.
[0100] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.
Claims
IN THE CLAIMS1. A method for achieving an energy distribution, comprising: accessing a value of the ion energy distribution; identifying, one of a plurality slopes of a sheath voltage corresponding to the value of ion energy distribution; and controlling an ion flux compensator to achieve the one of the plurality of slopes.
2. The method of claim 1, comprising: identifying, from a plurality of peak-to-peak parameter values, one of the plurality of peak-to-peak parameter values corresponding to the value of ion energy distribution; controlling a charger to achieve the one of the plurality of peak-to-peak parameter values.
3. The method of claim 1, wherein the value of ion energy distribution is accessed from a plurality of values of ion energy distributions.
4. The method of claim 3, wherein the plurality of values of slope include a first slope and a second slope, wherein the plurality of values of ion energy distributions include a first value and a second value, wherein the first slope corresponds to the first value and the second slope corresponds to the second value.
5. The method of claim 1, wherein said controlling the ion flux compensator includes sending one or more enabling signals to one or more of a plurality of power supplies to increase an amount of voltage output from the ion flux compensator.
6. The method of claim 5, wherein said controlling the ion flux compensator includes sending one or more disabling signals to remaining ones of the plurality of power supplies.
7. The method of claim 1, wherein said controlling the ion flux compensator includes sending one or more disabling signals to one or more of a plurality of power supplies to decrease an amount of voltage output from the ion flux compensator.
8. The method of claim 7, wherein said controlling the ion flux compensator includes sending one or more enabling signals to remaining ones of the power supplies,9. The method of claim 1, comprising: receiving a voltage measurement and a current measurement; determining, based on the voltage measurement and the current measurement, a measured slope of the sheath voltage; calculating a variable from the measured slope; applying a windowing and statistical function to the variable to output a scaled slope factor; comparing the scaled slope factor with a pre-determined value; andadditionally controlling the ion flux compensator based on said comparing the slope with the pre-determined value.
10. The method of claim 9, wherein said comparing the scaled slope factor occurs to determine whether the scaled slope factor is zero, greater than zero, or less than zero.
11. A controller for achieving an energy distribution, comprising: a processor configured to: access a value of the ion energy distribution; identify, one of a plurality slopes of a sheath voltage corresponding to the value of ion energy distribution; and control an ion flux compensator to achieve the one of the plurality of slopes; and a memory device coupled to the processor.
12. The controller of claim 11, wherein the processor is configured to: identify, from a plurality of peak-to-peak parameter values, one of the plurality of peak- to-peak parameter values corresponding to the value of ion energy distribution; control a charger to achieve the one of the plurality of peak-to-peak parameter values.
13. The controller of claim 11, wherein the value of ion energy distribution is accessed from a plurality of values of ion energy distributions.
14. The controller of claim 13, wherein the plurality of values of slope include a first slope and a second slope, wherein the plurality of values of ion energy distributions include a first value and a second value, wherein the first slope corresponds to the first value and the second slope corresponds to the second value.
15. The controller of claim 11, wherein to control the ion flux compensator, the processor is configured to send one or more enabling signals to one or more of a plurality of power supplies to increase an amount of voltage output from the ion flux compensator.
16. The controller of claim 11, wherein to control the ion flux compensator, the processor is configured to send one or more disabling signals to remaining ones of the plurality of power supplies.
17. A plasma system comprising: a radio frequency charger circuit configured to provide RF energy to a plasma chamber; a magnetic energy recovery circuit coupled to the radio frequency charger circuit, wherein the magnetic energy recovery circuit is configured to operate after operation of the radio frequency charger circuit; an ion flux compensation circuit coupled to the radio frequency charger circuit, wherein the ion flux compensation circuit includes a pulser and is configured to operate after operation of the magnetic energy recovery circuit;a controller coupled to the ion flux compensation circuit, wherein the controller is configured to: access a value of the ion energy distribution; identify, one of a plurality slopes of a sheath voltage corresponding to the value of ion energy distribution; and control the ion flux compensation circuit to achieve the one of the plurality of slopes.
18. The plasma system of claim 17, wherein the radio frequency charger circuit includes a charger, wherein the controller is configured to: identify, from a plurality of peak-to-peak parameter values, one of the plurality of peak- to-peak parameter values corresponding to the value of ion energy distribution; control the charger to achieve the one of the plurality of peak-to-peak parameter values.
19. The plasma system of claim 17, wherein to control the ion flux compensator, the controller is configured to send one or more enabling signals to one or more of a plurality of power supplies to increase an amount of voltage output from the ion flux compensator.
20. The plasma system of claim 19, wherein to control the ion flux compensator, the controller is configured to send one or more disabling signals to remaining ones of the plurality of power supplies.
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