Current control circuit, power supply chip, and electronic device

Abstract

Embodiments of the present application provide a current control circuit, a power supply chip, and an electronic device. The current control circuit comprises a charge charging and discharging circuit, and a peak current control circuit; the peak current control circuit comprises a voltage division feedback circuit and a compensation circuit, and the voltage division feedback circuit is used for generating a feedback control voltage; the charge charging and discharging circuit is coupled to the compensation circuit, and the feedback control voltage is adjusted by means of the compensation circuit; when the feedback control voltage is reduced, the charge charging and discharging circuit injects charges into the compensation circuit, so that the feedback control voltage is increased; and when the feedback control voltage is increased, the charge charging and discharging circuit extracts charges in the compensation circuit, so that the feedback control voltage is reduced.

Description

Current control circuit, power chip and electronic equipment Technical Field

[0001] The present application relates to the field of display technology, and in particular to a current control circuit, a power chip, and an electronic device. Background Art

[0002] Switching power supply chips are widely used in automotive electronic systems to power various electronic components in the car.

[0003] In automotive applications, AM broadcasting, FM broadcasting, and mobile services occupy most of the 150kHz-108MHz frequency band. To ensure that these frequency bands are not interfered with, the switching frequency and electromagnetic interference of automotive power supply chips are strictly limited. Switching power supply chips based on peak current mode (PCM) have been widely used in automotive electronics because of their constant switching frequency and easy handling of electromagnetic interference.

[0004] In recent years, with the continuous development of electrification and intelligent new energy vehicles, automotive systems such as smart cockpits and advanced driver assistance systems have increasingly demanded higher computing power, and the supply current requirements of these computing chips have also increased. However, in practical applications, severe load current variations may occur. These severe load current variations can cause much more severe output voltage transient responses, such as overshoot and undershoot, causing the output voltage to deviate significantly from its intended steady-state value. This can cause extreme instability in the circuit system.

[0005] Therefore, in traditional switching power supply chips based on peak current mode (PCM), how to improve the dynamic response capability of the output voltage when facing a sudden change in load current has always been a hot research issue for those skilled in the art. Summary of the Invention

[0006] The embodiments of the present application provide a current control circuit, a power supply chip and an electronic device. The technical solution provided by the embodiments of the present application can achieve: when faced with a sudden change in load current and a change in switching frequency, the output voltage can respond quickly and dynamically and recover to a steady-state voltage value as soon as possible.

[0007] To achieve the above objectives, this application adopts the following technical solutions:

[0008] In a first aspect, an embodiment of the present application provides a current control circuit, comprising: a charge charging and discharging circuit and a peak current control circuit; the peak current control circuit comprises a voltage divider feedback circuit and a compensation circuit, the voltage divider feedback circuit being used to generate a feedback control voltage; the charge charging and discharging circuit is coupled to the compensation circuit, and the feedback control voltage is adjusted through the compensation circuit; when the feedback control voltage decreases, the charge charging and discharging circuit charges the compensation circuit so that the feedback control voltage increases; when the feedback control voltage increases, the charge charging and discharging circuit discharges the compensation circuit so that the feedback control voltage decreases.

[0009] The peak current control circuit includes a voltage divider feedback circuit, which is formed by a plurality of resistors coupled in series (or in parallel). The output voltage of the peak current control circuit acts on the input of the voltage divider feedback circuit. Therefore, the voltage across the plurality of resistors changes with the output voltage. Similarly, the feedback control voltage at the output of the voltage divider feedback circuit also changes with the output voltage. When the load current changes significantly, the output voltage of the peak current control circuit experiences a transient response, such as an overshoot, deviating from the steady-state value that the output voltage should reach. Because the output voltage acts on the input of the voltage divider feedback circuit, the feedback control voltage of the voltage divider feedback circuit also deviates from the steady-state value. The charge charging and discharging circuit and the compensation circuit jointly adjust the feedback control voltage so that the feedback control voltage is quickly restored to the steady-state value. Finally, the feedback control voltage also passes through a series of feedback loop networks and operational amplifiers, and ultimately reacts to the output voltage, causing the output voltage to quickly return to the steady-state value. Since the charge charging and discharging circuit has the function of rapidly injecting and extracting charge, the feedback control voltage can be adjusted quickly, and the output voltage can also quickly recover to a steady-state value.

[0010] In one possible design, the charge charging and discharging circuit includes a charge charging branch and a charge discharging branch; the charge charging branch includes a first current mirror, and the charge discharging branch includes a second current mirror; the first current mirror is coupled to the second current mirror, and an intermediate node between the couplings of the first and second current mirrors is coupled to the compensation circuit. The compensation circuit is coupled to a port for a feedback control voltage, and the charge charging and discharging circuit injects current into or extracts current from the compensation circuit through the first and second current mirrors. The injected (or extracted) charge is then applied to the feedback control voltage through the compensation circuit, causing it to quickly return to a steady-state value.

[0011] In one possible design, the charge charging branch also includes a first comparator, a first constant-on timer, and a first transistor; the first input of the first comparator receives a first reference voltage, and the second input receives a feedback loop voltage; the output of the first comparator is coupled to the input of the first constant-on timer, and the output of the first constant-on timer is coupled to the control electrode of the first transistor; the output signal of the first constant-on timer is used to control the on and off of the first transistor.

[0012] In one possible design, the charge charging branch also includes a first resistor and a first capacitor; the first current mirror is coupled to the power supply voltage terminal to receive the power supply voltage signal, and the first output terminal of the first current mirror is coupled to the first electrode of the first transistor; the second electrode of the first transistor is coupled to the first end of the first resistor, and the second end of the first resistor is coupled to the first end of the first capacitor; the second end of the first capacitor is coupled to the reference ground voltage terminal.

[0013] In one possible design, the charge charging branch also includes a first inverter and a second transistor; the output end of the first constant conduction timer is coupled to the input end of the first inverter, the output end of the first inverter is coupled to the control electrode of the second transistor, and the output signal of the first constant conduction timer is also used to control the conduction and disconnection of the second transistor.

[0014] In one possible design, the first electrode of the second transistor is coupled to the middle node between the first resistor and the first capacitor; the second electrode of the second transistor is coupled to the reference ground voltage terminal; under the control of the output signal of the first constant conduction timer, when the first transistor is turned on, the second transistor is turned off, and the power supply voltage at the power supply voltage terminal charges the first capacitor; when the first transistor is turned off, the second transistor is turned on, and the first capacitor is discharged through the second transistor.

[0015] In one possible design, the charge discharge branch includes a second amplifier, a second constant-on timer, and a third transistor; the first input of the second amplifier receives a second reference voltage, and the second input receives a feedback loop voltage; the output of the second amplifier is coupled to the input of the second constant-on timer, and the output of the second constant-on timer is coupled to the control electrode of the third transistor; the output signal of the second constant-on timer is used to control the conduction and disconnection of the third transistor.

[0016] In one possible design, the charge discharge branch further includes a second inverter and a fourth transistor; the input end of the second inverter is coupled to the output end of the second constant-on timer, and the input end of the second inverter is coupled to the control electrode of the third transistor; the output end of the second inverter is coupled to the control electrode of the fourth transistor; and the output signal of the second constant-on timer controls the on and off of the fourth transistor through the second inverter.

[0017] In one possible design, the charge discharge branch also includes a second resistor and a second capacitor; the first end of the second capacitor is coupled to the power supply voltage end, the second end of the second capacitor is coupled to the first end of the second resistor, the second end of the second resistor is coupled to the first electrode of the third transistor, the second electrode of the third transistor is coupled to the first end of the second current mirror, and the second end of the second current mirror is coupled to the reference ground voltage end.

[0018] In one possible design, the charge discharge branch also includes a fourth transistor; the output end of the second inverter is coupled to the control electrode of the fourth transistor; the first electrode of the fourth transistor is coupled to the power supply voltage end, and the second electrode of the fourth transistor is coupled to the intermediate node between the second resistor and the second capacitor.

[0019] In one possible design, under the control of the output signal of the second constant conduction timer, when the third transistor is turned on, the fourth transistor is turned off, and the power supply voltage at the power supply voltage end charges the second capacitor; when the third transistor is turned off, the fourth transistor is turned on, and the second capacitor is discharged through the fourth transistor.

[0020] In one possible design, the compensation circuit includes a first compensation resistor, a first compensation capacitor and a second compensation capacitor; the first compensation resistor and the first compensation capacitor are coupled in series between the output end of the voltage divider feedback circuit and the reference ground voltage end; the second compensation capacitor is coupled between the output end of the voltage divider feedback circuit and the reference ground voltage end; the second compensation capacitor is connected in parallel with the series branch of the first compensation resistor and the first compensation capacitor.

[0021] In one possible design, the peak current control circuit also includes a drive trigger circuit; the drive trigger circuit is used to generate the drive control signal; the input end of the drive trigger circuit is coupled to the output end of the voltage divider feedback circuit to receive the feedback control voltage signal.

[0022] In one possible design, the peak current control circuit further includes a mode switching circuit; the mode switching circuit is coupled to both the power supply voltage terminal and the output terminal of the drive trigger circuit, and receives a drive control signal from the drive trigger circuit. Under the action of the drive control signal, the mode switching circuit enters different circuit operating states and generates different output voltages;

[0023] In a possible design, the output end of the mode switching circuit is coupled to the load circuit and the voltage divider feedback circuit respectively to provide an output voltage signal to the load circuit and the voltage divider feedback circuit.

[0024] According to a second aspect of an embodiment of the present application, a power supply chip is provided. The power supply chip includes: a current control circuit and a power supply detection module. The current control circuit and the power supply detection module are coupled.

[0025] According to a third aspect of an embodiment of the present application, an electronic device is provided. The electronic device includes a power chip and a printed circuit board, wherein the power chip is arranged on the printed circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] FIG1 is a schematic structural diagram of an exemplary electronic device provided in an embodiment of the present application;

[0027] FIG2 is a schematic diagram of the structure of an exemplary power management chip provided in an embodiment of the present application;

[0028] FIG3 is a schematic structural diagram of an exemplary current control circuit provided in an embodiment of the present application;

[0029] FIG4 is a schematic structural diagram of an exemplary current control circuit provided in an embodiment of the present application;

[0030] FIG5 is a schematic diagram of the architecture of another exemplary current control circuit provided in an embodiment of the present application;

[0031] FIG6 is a schematic structural diagram of an exemplary current control circuit provided in an embodiment of the present application;

[0032] FIG7A is a schematic structural diagram of an exemplary charge charging branch provided in an embodiment of the present application;

[0033] FIG7B is a schematic structural diagram of an exemplary charge discharging branch provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0035] Hereinafter, the terms "second," "first," etc., are used for descriptive convenience only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature qualified as "second," "first," etc., may explicitly or implicitly include one or more of such features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0036] In addition, in the embodiments of the present application, directional terms such as "up", "down", "left", and "right" may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative descriptions and clarifications, and may change accordingly according to changes in the orientation of the components in the drawings.

[0037] In the embodiments of this application, unless otherwise specified or limited, the term "connection" should be understood in a broad sense. For example, "connection" can mean fixed connection, detachable connection, or integration; it can mean direct connection or indirect connection through an intermediate medium. In addition, the term "coupling" can mean direct electrical connection or indirect electrical connection through an intermediate medium. The term "contact" can mean direct contact or indirect contact through an intermediate medium.

[0038] In the embodiments of the present application, "and / or" describes the relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A exists alone, A and B exist simultaneously, and B exists alone. A and B can be singular or plural. The character " / " generally indicates that the associated objects are in an "or" relationship.

[0039] First, some basic concepts involved in the embodiments of this application are explained:

[0040] Current-mode control in switching power supplies: Most switching power supplies employ closed-loop feedback to provide stable power across a wide range of transient and load conditions. Feedback options fall into two broad categories: voltage-mode control (VMC) and current-mode control (CMC). Each method has advantages and disadvantages.

[0041] Voltage Control: Voltage-mode control uses the regulated output voltage as the feedback signal. This method provides a simple and straightforward feedback architecture for the control path. However, this method has several disadvantages. The primary disadvantage is that output voltage regulation requires sensing changes in the output voltage and propagating them through the feedback signal and filter before the output can be compensated accordingly. For systems requiring high levels of modulation, this can result in an unacceptably slow response. Feedback compensation for the power supply requires a high level of analysis to account for the two poles introduced by the output low-pass filter. Furthermore, the feedback compensation value must be adjusted because varying input voltages affect the overall loop gain.

[0042] Current control: Current mode control can solve the above shortcomings of voltage mode control by using the inductor current waveform for control. This signal is included in the output voltage feedback loop as an auxiliary fast response control loop

[0043] Peak Current Control: Peak current mode control (PCMC) uses the current waveform directly as a ramp waveform in the PWM generation comparator, rather than using an externally generated sawtooth (or triangular) signal as in VMC. The rising ramp portion of the inductor current or high-side transistor current waveform is used to provide a fast-response control loop in addition to the existing voltage control loop. The current signal is compared with the output of the voltage error amplifier to generate the PWM control signal for the power supply. Switching power supplies can achieve high efficiency between the input and output power rails. To maintain high converter efficiency, the sense resistor used to measure the inductor current should ideally be as small as possible to reduce power loss caused by the measurement. This small resistor value results in a small amplitude feedback signal.

[0044] The current control scheme proposed in the embodiments of the present application is applicable to multiple application scenarios and system devices, such as electronic devices, which can be consumer electronic products, home electronic products, vehicle-mounted electronic products, financial terminal products, and communication electronic products. Among them, consumer electronic products include mobile phones, tablet computers, laptops, e-readers, personal computers (PCs), personal digital assistants (PDAs), desktop displays, smart wearable products (e.g., smart watches, smart bracelets), virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, drones, cars, etc. Home electronic products include smart door locks, televisions, remote controls, refrigerators, rechargeable small household appliances (e.g., soymilk machines, sweeping robots), etc. Vehicle-mounted electronic products include car navigation systems, car high-density digital video discs (DVDs), etc. Financial terminal products include automated teller machines (ATMs), self-service terminals, etc. Communication electronic products such as servers, storage, radars, base stations and other communication equipment.

[0045] The above electronic products all involve the need for power supply.

[0046] Figure 1 is a schematic diagram of the structure of an electronic device provided illustratively in an embodiment of the present application. As shown in Figure 1, the electronic device 100 may include a processor 110, an external memory 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management unit 140, a power management chip 141, and a battery 142.

[0047] It should be understood that the structure illustrated in the embodiments of the present application does not constitute a specific limitation on the electronic device 400. In other embodiments of the present application, the electronic device 400 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0048] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors. The controller may generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution.

[0049] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface.

[0050] The external memory interface 420 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 400.

[0051] The internal memory 121 may be used to store computer-executable program codes, where the executable program codes include instructions.

[0052] The following further describes the power management chip 141 provided in the embodiments of the present application. The power management chip 141 is used to connect the battery 142, the charging management unit 140, and the processor 110. The power management chip 141 receives input from the battery 142 and / or the charging management unit 140 to power system components such as the processor 110 and the internal memory 121.

[0053] For example, an embodiment of the present application provides a power management chip 141, the internal structure of which is shown in Figure 2. It includes an input rectifier filter circuit 201, a power factor correction circuit 202, a switching power supply control circuit 203, an environmental monitoring circuit 204, a protection circuit 205, and a current control circuit 206.

[0054] The input rectifier and filter circuit 201 includes a rectifier circuit and a filter circuit. The power management chip 141 first passes the input AC power through the rectifier circuit, converting the AC current into a pulsating DC current. The filter circuit then removes most of the pulsating components, resulting in a relatively stable DC voltage.

[0055] Power factor correction circuit 202: Some high-power switching power supplies may include a power factor correction circuit. Power factor correction circuit 203 improves the power supply's impact on the grid, increases the power factor, and reduces grid harmonic pollution by controlling the on-time of the switching element.

[0056] Switching power supply control circuit 203: The power management chip 141 integrates a switching element (typically a MOSFET) and a control circuit to implement high-frequency switching of the power supply. The control circuit typically includes PWM (pulse-width modulation) control logic to adjust the switching time and frequency of the switching element to achieve power conversion and output regulation.

[0057] Environmental monitoring circuit 204: Some advanced switching power supply chips may integrate environmental monitoring functions, such as voltage monitoring, current monitoring, temperature monitoring, etc., for real-time monitoring of power supply and system status.

[0058] Protection circuit 205: The chip usually integrates multiple protection circuits, such as overvoltage protection, overcurrent protection, short circuit protection, overtemperature protection, etc., to ensure the safe operation of the power supply and connected devices.

[0059] The specific design of current control circuit 206 is crucial to ensuring that the voltages at various nodes and the output voltage within power management chip 141 can quickly recover to a steady state when faced with sudden changes in load current, ultimately impacting the stability of the entire circuit system. However, because power management chip 141 includes modules such as feedback loops, operational amplifiers, and resistor-capacitor networks, transmission delays often occur at key nodes within the circuit, resulting in longer output voltage response times and longer recovery times.

[0060] Therefore, how to design the circuit structure of the current control circuit 201 so that the dynamic response of the system can be improved and the output voltage and the voltage of each key node can be quickly restored to a steady-state value has become a widely studied topic in the industry.

[0061] Based on this, in some embodiments, the structure of the current control circuit 206 is shown in FIG3 , which introduces two control modes: a PWM mode control module and a hysteresis control module. When the circuit system is in a steady state, the PWM control mode module operates. When the load current in the circuit system suddenly changes, causing the output voltage to undershoot or overshoot, the circuit system switches from the PWM control mode to the hysteresis control mode. The PWM control mode module stops operating, and the hysteresis control mode module takes over, thereby improving the system's response speed.

[0062] However, when the circuit system switches from PWM control mode to hysteresis control mode, frequency fluctuations and instability may occur. In the case of automotive power supply chips, unstable and uncontrolled frequency can easily interfere with the majority of the 150kHz-108MHz frequency band occupied by AM broadcasting, FM broadcasting, and mobile services.

[0063] Based on this, in other embodiments, the structure of the current control circuit 206 is shown in FIG4 . Compared with the traditional peak current control circuit, this circuit structure adds an error amplifier 415. The error amplifier 418 provides a fast feedback loop that is not affected by the delay caused by the resistor-capacitor network circuit and can quickly feed back the output voltage to the control loop, thereby improving the response speed of the system.

[0064] However, the design of the fast feedback loop of this solution is relatively complex, and the control logic is also relatively complex.

[0065] Based on this, the present embodiment proposes a new design of a current control circuit 201, as shown in Figure 5. The output voltage of this current control circuit 201 can quickly respond to changes in the load circuit. When the load current suddenly changes, although the output voltage of the current control circuit 201 is also affected by it, causing transient responses such as overshoot or undershoot, in the solution of the embodiment of the present application, the output voltage can relatively quickly recover to a steady-state value.

[0066] Moreover, the switching frequency of this solution is constant.

[0067] The current control circuit 201 mainly includes: a charge charging and discharging circuit 501 and a peak current control circuit 502 .

[0068] The peak current control circuit 502 further includes a driving trigger circuit 5023 , a mode switching circuit 5024 , a voltage divider feedback circuit 5021 and a compensation circuit 5022 .

[0069] The drive trigger circuit 5023 is used to generate the drive control signal. The input end of the drive trigger circuit 5023 is coupled to the output end of the voltage divider feedback circuit 5021 to receive the feedback control voltage signal Vctrl. In some embodiments, as shown in Figure 6, the drive trigger circuit 5023 includes a trigger comparator com3, a driver dri1 and an SR trigger Sr1. The R input end of the SR trigger Sr1 is used to receive the output signal of the trigger comparator com3, and the S input end of the SR trigger Sr1 is used to receive the clock cycle signal. The output signal of the output end of the SR trigger Sr1 is transmitted to the driver dri1, and the driver dri1 generates two pulse width modulation signals with opposite phases at any time. The two pulse width modulation signals are respectively used to control the on and off of the charging switch tube S1 and the discharging switch tube S2 in the mode switching circuit 5024.

[0070] The mode switching circuit 5024 is coupled to both the power supply voltage terminal and the output terminal of the drive trigger circuit 5023, and receives a drive control signal from the drive trigger circuit 5023. In response to the drive control signal, the mode switching circuit 5024 enters different circuit operating states and generates different output voltages. The output terminal of the mode switching circuit is coupled to the load circuit and the voltage divider feedback circuit, respectively, to provide output voltage signals to the load circuit and the voltage divider feedback circuit.

[0071] The voltage divider feedback circuit 5021 is configured to generate a feedback control voltage Vctrl. An output terminal of the voltage divider feedback circuit 5021 is coupled to an input terminal of the compensation circuit 5022 .

[0072] The charge charging and discharging circuit 501 is also coupled to the input terminal of the compensation circuit 5022 , and adjusts the feedback control voltage Vctrl through the compensation circuit 5022 .

[0073] When the feedback control voltage Vctrl decreases, the charge charging and discharging circuit 501 charges the compensation circuit 5022 so that the feedback control voltage Vctrl increases; when the feedback control voltage Vctrl increases, the charge charging and discharging circuit 501 discharges the compensation circuit 5022 so that the feedback control voltage Vctrl decreases.

[0074] In some embodiments, as shown in FIG6 , the mode switching circuit 5024 includes a charging switch tube S1 , a discharging switch tube S2 , a first inductor L1 , and a load capacitor C0 .

[0075] The charging switch S1 and the discharging switch S2 are coupled in series between the power supply voltage terminal VDD and the reference ground voltage terminal. One terminal of the charging switch S1 is coupled to the power supply voltage terminal VDD, and the other terminal of the charging switch S1 is coupled to the discharging switch S2. The other terminal of the discharging switch S2 is coupled to the reference ground voltage terminal. One terminal of the first inductor L1 is coupled to the node between the charging switch S1 and the discharging switch S2. The other terminal of the first inductor L1 is coupled to the output terminal of the mode switching circuit 5024. One terminal of the load capacitor C0 is also coupled to the output terminal of the mode switching circuit 5024. The other terminal of the load capacitor C0 is coupled to the reference ground voltage terminal.

[0076] When the driving control signal of the driving trigger circuit 5023 causes the charging switch tube S1 to close and the discharging switch tube S2 to turn off, the first inductor L1 receives the charge from the power supply voltage terminal VDD through the charging switch tube S1, and the mode switching circuit 5024 enters the charging mode. At this time, the current passing through the first inductor L1 is I L .

[0077] Since the output end of the mode switching circuit 5024 is coupled to the load circuit Load and the voltage divider feedback circuit 5021 respectively, when the mode switching circuit 5024 enters the charging mode, the output end Vo of the mode switching circuit 5024 provides an output voltage signal to the load circuit Load and the voltage divider feedback circuit 5021.

[0078] When the driving control signal of the driving trigger circuit 5023 causes the charging switch S1 to turn off and the discharging switch S2 to turn on, the first inductor L1 is discharged through the discharging switch S2, and the mode switching circuit 5024 enters the discharge mode. At this time, the voltage at the output terminal Vo of the mode switching circuit 5024 gradually decreases.

[0079] In some embodiments, as shown in FIG6 , the voltage-dividing feedback circuit 5021 includes a first feedback resistor Rf1 , a second feedback resistor Rf2 , and a feedback loop comparator EA.

[0080] A first feedback resistor Rf1 and a second feedback resistor Rf2 are coupled in series between the output terminal Vo of the mode switching circuit 5024 and the reference ground voltage terminal. One end of the first feedback resistor Rf1 is coupled to the output terminal Vo of the mode switching circuit 5024, the other end of the first feedback resistor Rf1 is coupled to the second feedback resistor Rf2, and the other end of the second feedback resistor Rf2 is coupled to the reference ground voltage terminal. Due to the voltage divider effect of the first feedback resistor Rf1 and the second feedback resistor Rf2, the voltage at the node midway between the first feedback resistor Rf1 and the second feedback resistor Rf2 is Vo*Rf2 / (Rf1+Rf2). This voltage at the node midway is referred to as the feedback loop voltage Vfb.

[0081] A first input terminal of the feedback loop comparator EA is coupled to the middle node of the first feedback resistor Rf1 and the second feedback resistor Rf2 to receive the feedback loop voltage Vfb signal. A second input terminal of the feedback loop comparator EA receives the feedback reference voltage Vref signal.

[0082] The output terminal of the voltage divider feedback circuit 5021 is the output terminal of the feedback loop comparator EA, and the output terminal of the feedback loop comparator EA is coupled to the compensation circuit 5022 .

[0083] In some embodiments, as shown in FIG6 , the compensation circuit 5022 includes a first compensation resistor R2, a first compensation capacitor C2, and a second compensation capacitor Cx. The first compensation resistor R2 and the first compensation capacitor C2 are coupled in series between the output terminal of the feedback loop comparator EA and the reference ground voltage terminal. One end of the first compensation resistor R2 is coupled to the output terminal of the feedback loop comparator EA, the other end of the first compensation resistor R2 is coupled to the first compensation capacitor C2, and the other end of the first compensation capacitor C2 is coupled to the reference ground voltage terminal.

[0084] The second compensation capacitor Cx is coupled between the output terminal of the feedback loop comparator EA and the reference ground voltage terminal. The second compensation capacitor Cx is connected in parallel with the series branch of the first compensation resistor R2 and the first compensation capacitor C2.

[0085] The middle node between the first compensation resistor R2 and the first compensation capacitor C2 is coupled to the charge charging and discharging circuit 501. The charge charging and discharging circuit 501 adjusts the voltage Vm at the middle node between the first compensation resistor R2 and the first compensation capacitor C2. Changes in the middle node voltage Vm cause changes in the feedback control voltage Vctrl, and the charge charging and discharging circuit 501 thereby adjusts the feedback control voltage Vctrl.

[0086] In some embodiments, the charge charging and discharging circuit 501 includes a charge charging branch 5011 and a charge discharging branch 5012 .

[0087] As shown in FIG7A , in some embodiments, the charge charging branch 5011 includes a first comparator com1, a first constant-on timer Ton1, and a first transistor N1. The first comparator com1 has a first input terminal (i.e., a non-inverting input terminal) that receives a first reference voltage Vref-, and a second input terminal (i.e., an inverting input terminal) that receives a feedback loop voltage Vfb. The first reference voltage Vref- is slightly lower than the feedback reference voltage Vref.

[0088] The output terminal of the first comparator com1 is coupled to the input terminal of the first constant-on timer Ton1 . The output signal of the first comparator com1 is transmitted to the input terminal of the first constant-on timer Ton1 .

[0089] The output terminal of the first constant-on timer Ton1 is coupled to the control electrode of the first transistor N1. The output signal of the first constant-on timer Ton1 is used to control the on and off of the first transistor N1.

[0090] The charge charging branch 5011 further includes a first inverter Inv1 and a second transistor N2. The output of the first constant-on timer Ton1 is coupled to the input of the first inverter Inv1, and the output of the first inverter Inv1 is coupled to the control electrode of the second transistor N2. The output signal of the first constant-on timer Ton1 is also used to control the on and off of the second transistor N2.

[0091] When the output signal of the first constant-on timer Ton1 is at an active high level, the first transistor N1 is turned on. After the output signal of the first constant-on timer Ton1 passes through the first inverter Inv1, the output terminal of the first inverter Inv1 outputs an inactive low level, and the second transistor N2 coupled to the output terminal of the first inverter Inv1 is turned off.

[0092] Similarly, when the output signal of the first constant-on timer Ton1 is at an inactive low level, the first transistor N1 is turned off. After the output signal of the first constant-on timer Ton1 passes through the first inverter Inv1, the output terminal of the first inverter Inv1 outputs an active high level, and the second transistor N2 coupled to the output terminal of the first inverter Inv1 is turned on.

[0093] The charge charging branch 5011 further includes a first current mirror, which is coupled to the power supply voltage terminal and receives the power supply voltage signal. A first output terminal of the first current mirror is coupled to the first electrode of the first transistor. A second output terminal of the first current mirror is coupled to an intermediate node between a first compensation resistor R2 and a first compensation capacitor C2 in the compensation circuit 5022.

[0094] The charge charging branch 5011 further includes a first resistor R1 and a first capacitor C1. The second electrode of the first transistor N1 is coupled to the first end of the first resistor R1, the second end of the first resistor R1 is coupled to the first end of the first capacitor C1, and the second end of the first capacitor C1 is coupled to the reference ground voltage.

[0095] An intermediate node between the first resistor R1 and the first capacitor C1 is coupled to a first electrode of the second transistor N2 , and a second electrode of the second transistor N2 is coupled to a reference ground voltage terminal.

[0096] Due to the existence of the first inverter Inv1, the on-off state of the first transistor N1 is exactly opposite to the on-off state of the second transistor N2. The on-off state of the first transistor N1 is used to control whether the branch where the first resistor R1 and the first capacitor C1 are located is turned on.

[0097] When the output signal of the first constant-on timer Ton1 is at an active high level, the first transistor N1 is turned on, and the branch circuit in which the first transistor N1, the first current mirror, the first resistor R1, and the first capacitor C1 are coupled in series is turned on, and the power supply voltage VDD at the power supply voltage terminal charges the first capacitor C1. At this time, the second transistor N2 is turned off, so the first capacitor C1 does not short-circuit.

[0098] When the output signal of the first constant-on timer Ton1 is at an inactive low level, the first transistor N1 is turned off, disconnecting the branch circuit comprising the first transistor N1, the first current mirror, the first resistor R1, and the first capacitor C1. At this point, the second transistor N2 is turned on, causing the first capacitor C1 to discharge through the second transistor N2.

[0099] As shown in FIG. 7B , in some embodiments, the charge discharging branch 5012 includes a second amplifier com2 , a second constant-on timer Ton2 , and a third transistor N5 and a fourth transistor N6 .

[0100] A second amplifier com2 has a first input terminal receiving a second reference voltage Vref+, and a second input terminal receiving a feedback loop voltage Vfb. The output terminal of the second amplifier com2 is coupled to the input terminal of the second constant-on timer Ton2. The output terminal of the second constant-on timer Ton2 is coupled to the control electrode of the third transistor N5. The output signal of the second constant-on timer Ton2 is used to control the on and off state of the third transistor N5.

[0101] In some embodiments, the charge discharge branch 5012 further includes a second inverter Inv2. An input of the second inverter Inv2 is coupled to an output of the second constant-on timer Ton2. An input of the second inverter Inv2 is coupled to a control electrode of the third transistor N5. An output of the second inverter Inv2 is coupled to a control electrode of a fourth transistor N6. The output signal of the second constant-on timer Ton2 controls the on and off state of the fourth transistor N6 via the second inverter Inv2.

[0102] The second inverter Inv2 can invert the phase of the input signal by 180 degrees. The phase of the input terminal signal of the second inverter Inv2 is exactly opposite to the phase of the output terminal signal.

[0103] When the output signal of the second constant-on timer Ton2 is at an active high level, the third transistor N5 is turned on. After the output signal of the second constant-on timer Ton2 passes through the second inverter Inv2, the output terminal of the second inverter Inv2 outputs an inactive low level, and the fourth transistor N6 coupled to the output terminal of the second inverter Inv2 is turned off.

[0104] When the output signal of the second constant-on timer Ton2 is at an inactive low level, the third transistor N5 is turned off. After the output signal of the second constant-on timer Ton2 passes through the second inverter Inv2, the output terminal of the second inverter Inv2 outputs an active high level, and the fourth transistor N6 coupled to the output terminal of the second inverter Inv2 is turned on.

[0105] In some embodiments, the charge discharging branch 5012 further includes a second resistor R3 and a second capacitor C3. A first terminal of the second capacitor C3 is coupled to the power supply voltage terminal VDD, a second terminal of the second capacitor C3 is coupled to the first terminal of the second resistor R3, a second terminal of the second resistor R3 is coupled to the first terminal of the fourth transistor N6, a second terminal of the fourth transistor N6 is coupled to the first terminal of the second current mirror, and a second terminal of the second current mirror is coupled to the reference ground voltage terminal.

[0106] A first electrode of the fourth transistor N6 is coupled to the power supply voltage terminal VDD, and a second electrode of the fourth transistor N6 is coupled to an intermediate node between the second resistor R3 and the second capacitor C3.

[0107] When the output signal of the second constant-on timer Ton2 is at a valid high level, the third transistor N5 is turned on. Due to the inverting action of the second inverter Inv2, the control electrode of the fourth transistor N6 receives an invalid low level, the fourth transistor N6 is turned off, and the branch where the second resistor R3, the second capacitor C3, the fourth transistor N6 and the second current mirror are located is disconnected. The closed-loop branch formed by the power supply voltage terminal VDD, the third transistor N5 and the second capacitor C3 is turned on, and the power supply voltage of the power supply voltage terminal VDD charges the second capacitor C3.

[0108] When the output signal of the second constant-on timer Ton2 is at an inactive low level, the third transistor N5 is turned off. Due to the inverting action of the second inverter Inv2, the control electrode of the fourth transistor N6 receives an active high level, the fourth transistor N6 is turned on, and the branch including the second resistor R3, the second capacitor C3, the fourth transistor N6 and the second current mirror is turned on. The closed-loop branch formed by the power supply voltage terminal VDD, the third transistor N5 and the second capacitor C3 is disconnected, and the second capacitor C3 is discharged through the fourth transistor N6.

[0109] Those skilled in the art will clearly understand that, for the convenience and brevity of description, in the above embodiments, the description of each embodiment has different emphases. For parts that are not described in detail in a certain embodiment, reference can be made to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0110] In the several embodiments provided herein, it should be understood that the provided methods and circuits may be implemented in other ways. For example, the division of a module is merely a logical functional division, and in actual implementation, other division methods may be used, such as combining or integrating multiple units or components into another system, or omitting or not implementing certain features.

[0111] Those skilled in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0112] In the several embodiments provided in this application, it should be understood that the disclosed circuits, methods, and terminals can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interface, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0113] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located on a single device or distributed across multiple devices. Some or all of the modules may be selected to achieve the purpose of this embodiment based on actual needs.

[0114] In addition, the functional modules in the various embodiments of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0115] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using a software program, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loading and executing computer program instructions on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website, computer, server or data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) mode to another website, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more media that can be integrated. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (eg, a solid state disk (SSD)).

[0116] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A current control circuit, characterized in that: include: Charge charging and discharging circuit and peak current control circuit; The peak current control circuit comprises a voltage-dividing feedback circuit and a compensation circuit, wherein the voltage-dividing feedback circuit is used to generate a feedback control voltage; The charge charging and discharging circuit is coupled to the compensation circuit, and the feedback control voltage is adjusted through the compensation circuit; When the feedback control voltage decreases, the charge charging and discharging circuit injects charge into the compensation circuit, so that the feedback control voltage increases; when the feedback control voltage increases, the charge charging and discharging circuit extracts charge from the compensation circuit, so that the feedback control voltage decreases.

2. The current control circuit according to claim 1, characterized in that: The charge charging and discharging circuit includes a charge charging branch and a charge discharging branch; the charge charging branch includes a first current mirror, and the charge discharging branch includes a second current mirror; the first current mirror is coupled to the second current mirror, and the intermediate node of the first current mirror and the second current mirror is coupled to the compensation circuit.

3. The current control circuit according to claim 2, characterized in that: The charge charging branch also includes a first comparator, a first constant conduction timer and a first transistor; The first input terminal of the first comparator receives a first reference voltage, and the second input terminal receives a feedback loop voltage; the output terminal of the first comparator is coupled to the input terminal of the first constant conduction timer, and the output terminal of the first constant conduction timer is coupled to the control electrode of the first transistor; the output signal of the first constant conduction timer is used to control the conduction and disconnection of the first transistor.

4. The current control circuit according to claim 3, characterized in that: The charge charging branch also includes a first resistor and a first capacitor; The first current mirror is coupled to the power supply voltage terminal to receive the power supply voltage signal, and the first output terminal of the first current mirror is coupled to the first electrode of the first transistor; The second electrode of the first transistor is coupled to the first end of the first resistor, the second end of the first resistor is coupled to the first end of the first capacitor; and the second end of the first capacitor is coupled to the reference ground voltage end.

5. The current control circuit according to claim 4, characterized in that: The charge charging branch also includes a first inverter and a second transistor; The output end of the first constant conduction timer is coupled to the input end of the first inverter, the output end of the first inverter is coupled to the control electrode of the second transistor, and the output signal of the first constant conduction timer controls the conduction and disconnection of the second transistor through the first inverter.

6. The current control circuit according to claim 5, characterized in that: The first electrode of the second transistor is coupled to the middle node between the first resistor and the first capacitor; the second electrode of the second transistor is coupled to the reference ground voltage terminal; Under the control of the output signal of the first constant conduction timer, when the first transistor is turned on, the second transistor is turned off, and the power supply voltage at the power supply voltage terminal charges the first capacitor; Under the control of the output signal of the first constant-on timer, when the first transistor is turned off, the second transistor is turned on, and the first capacitor and the second transistor form a discharge loop.

7. The current control circuit according to any one of claims 2 to 6, characterized in that: The charge discharging branch includes a second amplifier, a second constant conduction timer and a third transistor; The first input terminal of the second amplifier receives a second reference voltage, and the second input terminal receives a feedback loop voltage; the output terminal of the second amplifier is coupled to the input terminal of the second constant conduction timer, and the output terminal of the second constant conduction timer is coupled to the control electrode of the third transistor; the output signal of the second constant conduction timer is used to control the conduction and disconnection of the third transistor.

8. The current control circuit according to any one of claims 2 to 6, characterized in that: The charge discharging branch further includes a second inverter; The input terminal of the second inverter is coupled to the output terminal of the second constant conduction timer, and the input terminal of the second inverter is coupled to the control electrode of the third transistor; The output signal at the output end of the second constant conduction timer is inverted 180 degrees in phase after being acted upon by the second inverter.

9. The current control circuit according to any one of claims 2 to 8, characterized in that: The charge discharging branch further includes a second resistor and a second capacitor; The first end of the second capacitor is coupled to the power supply voltage terminal, the second end of the second capacitor is coupled to the first end of the second resistor, the second end of the second resistor is coupled to the first electrode of the third transistor, the second electrode of the third transistor is coupled to the first end of the second current mirror, and the second end of the second current mirror is coupled to the reference ground voltage terminal.

10. The current control circuit according to any one of claims 2 to 9, characterized in that: The charge discharging branch further includes a fourth transistor; The output terminal of the second inverter is coupled to the control electrode of the fourth transistor, and the output signal of the second constant conduction timer controls the conduction and disconnection of the fourth transistor through the second inverter; A first electrode of the fourth transistor is coupled to the power supply voltage terminal, and a second electrode of the fourth transistor is coupled to an intermediate node between the second resistor and the second capacitor.

11. The current control circuit according to any one of claims 2 to 10, characterized in that: Under the control of the output signal of the second constant conduction timer, when the third transistor is turned on, the fourth transistor is turned off, and the power supply voltage at the power supply voltage terminal charges the second capacitor; Under the control of the output signal of the second constant-on timer, when the third transistor is turned off, the fourth transistor is turned on, and the second capacitor is discharged.

12. The current control circuit according to any one of claims 2 to 11, characterized in that: The compensation circuit includes a first compensation resistor, a first compensation capacitor and a second compensation capacitor; The first compensation resistor and the first compensation capacitor are coupled in series between the output terminal of the voltage-dividing feedback circuit and the reference ground voltage terminal; The second compensation capacitor is coupled between the output terminal of the voltage-dividing feedback circuit and the reference ground voltage terminal; The second compensation capacitor is connected in parallel with a series branch of the first compensation resistor and the first compensation capacitor.

13. The current control circuit according to any one of claims 2 to 12, characterized in that: The peak current control circuit also includes a drive trigger circuit; The drive trigger circuit is used to generate the drive control signal; The input end of the driving trigger circuit is coupled to the output end of the voltage-dividing feedback circuit to receive the feedback control voltage of the voltage-dividing feedback circuit.

14. The current control circuit according to claim 13, characterized in that: The peak current control circuit also includes a mode switching circuit; The mode switching circuit is coupled to the power supply voltage terminal and the output terminal of the drive trigger circuit, and receives the drive control signal of the drive trigger circuit. Under the action of the drive control signal, the mode switching circuit enters different circuit working states and generates different output voltages.

15. The current control circuit according to claim 14, characterized in that: The output end of the mode switching circuit is coupled to the load circuit and the voltage-dividing feedback circuit respectively to provide an output voltage signal to the load circuit and the voltage-dividing feedback circuit.

16. A power chip, characterized in that: It comprises a current control circuit as described in any one of claims 1-15, and a power detection module; the current control circuit and the power detection module are coupled.

17. An electronic device, characterized in that: It comprises the power chip as claimed in claim 16, and a printed circuit board, wherein the power chip is arranged on the printed circuit board.

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