Method of monitoring process drift in a semiconductor manufacturing process

Abstract

Described is a method of measuring at least one exposure offset error relating to a lithographic apparatus. The method comprises obtaining a substrate comprising a coating of a latent resist; performing at least a main exposure step to expose metrology structures into said latent resist; measuring at least said metrology structures in the undeveloped latent resist to obtain metrology data; and determining said exposure offset error from said metrology data. The measuring step is performed subsequently to said main exposure step without removing said substrate from the lithographic apparatus.

Description

METHOD OF MONITORING PROCESS DRIFT IN A SEMICONDUCTOR MANUFACTURING PROCESSCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of EP application 23217510.9which was filed on December 18, 2023 and which is incorporated herein in its entirety by reference.FIELD

[0002] The present invention relates to semiconductor manufacturing processes, in particular to methods of inspection or metrology in a semiconductor manufacturing process.BACKGROUND

[0003] A lithographic apparatus is a machine constructed to apply a desired pattern onto a substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). A lithographic apparatus may, for example, project a pattern (also often referred to as “design layout” or “design”) at a patterning device (e.g., a mask) onto a layer of radiation-sensitive material (resist) provided on a substrate (e.g., a wafer).

[0004] To project a pattern on a substrate a lithographic apparatus may use electromagnetic radiation. The wavelength of this radiation determines the minimum size of features which can be formed on the substrate. Typical wavelengths currently in use are 365 nm (i-line), 248 nm, 193 nm and 13.5 nm. A lithographic apparatus, which uses extreme ultraviolet (EUV) radiation, having a wavelength within the range 4-20 nm, for example 6.7 nm or 13.5 nm, may be used to form smaller features on a substrate than a lithographic apparatus which uses, for example, radiation with a wavelength of 193 nm.

[0005] The lithographic process to expose patterns on a substrate may relay on one or more process control loops, which may be generally based on metrology data obtained using a metrology tool measuring characteristics of the applied pattern or of metrology targets representing the applied pattern. Such characteristics or parameters of interest may comprise, for example, one or more of overlay (positioning of structures relative to one or more preceding layers) and / or focus (i.e., the focus of the lithographic apparatus during an exposure. In general the metrology tool is based on optical measurement of the position and / or dimensions of the pattern and / or targets. It is intrinsically assumed that these optical measurements are representative for a quality of the process of manufacturing of the integrated circuits.

[0006] Due to drift, these control loops require periodic recalibration, recommended to be performed every few days. However, such calibrations are complex and time consuming and therefore represent a considerable overhead within the lithographic process.

[0007] As such, it would be desirable to improve on present drift control methods and / or lithographic apparatus calibration methods.SUMMARY

[0008] It is an object of the inventors to address the mentioned disadvantage of the state of the art.

[0009] In a first aspect of the invention there is provided a method of measuring at least one exposure offset error relating to a lithographic apparatus, comprising: obtaining a substrate comprising a coating of a latent resist; performing at least a main exposure step to expose metrology structures into said latent resist; measuring at least said metrology structures in the undeveloped latent resist to obtain metrology data; and determining said exposure offset error from said metrology data; wherein said measuring step is performed subsequently to said main exposure step without removing said substrate from the lithographic apparatus.

[0010] Also disclosed is a computer program and various apparatuses operable to perform the method of the first aspect.BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Embodiments of the invention will now be described, by way of example only, with reference to the accompanying schematic drawings, in which:

[0012] Figure 1 depicts a schematic overview of a lithographic apparatus;

[0013] Figure 2 depicts a schematic overview of a lithographic cell;

[0014] Figure 3 depicts a schematic representation of holistic lithography, representing cooperation between three key technologies to optimize semiconductor manufacturing;

[0015] Figure 4 illustrates the control loops in a lithographic process utilizing a scanner stability module;

[0016] Figure 5 is a flow diagram of a known method for measuring and / or correcting for drift in a lithographic apparatus;

[0017] Figure 6 is a flow diagram of a method for measuring and / or correcting for drift in a lithographic apparatus according to a first embodiment;

[0018] Figure 7 is a flow diagram of a method for measuring and / or correcting for drift in a lithographic apparatus according to a second embodiment; and

[0019] Figure 8 is a flow diagram of a method for measuring and / or correcting for drift in a lithographic apparatus according to a third embodiment.DETAILED DESCRIPTION

[0020] In the present document, the terms “radiation” and “beam” are used to encompass all types of electromagnetic radiation, including ultraviolet radiation (e.g. with a wavelength of 365, 248, 193,157 or 126 nm) and EUV (extreme ultra-violet radiation, e.g. having a wavelength in the range of about 5-100 nm).

[0021] The term “reticle”, “mask” or “patterning device” as employed in this text may be broadly interpreted as referring to a generic patterning device that can be used to endow an incoming radiation beam with a patterned cross-section, corresponding to a pattern that is to be created in a target portion of the substrate; the term “light valve” can also be used in this context. Besides the classic mask (transmissive or reflective; binary, phase-shifting, hybrid, etc.), examples of other such patterning devices include:-a programmable mirror array. More information on such mirror arrays is given in U. S. Patent Nos. 5,296,891 and 5,523,193, which are incorporated herein by reference.-a programmable LCD array. An example of such a construction is given in U. S. Patent No. 5,229,872, which is incorporated herein by reference.

[0022] Before describing embodiments of the invention in detail, it is instructive to present an example environment in which embodiments of the present invention may be implemented.

[0023] Figure 1 schematically depicts a lithographic apparatus LA. The apparatus includes an illumination system (illuminator) IL configured to condition a radiation beam B (e.g., UV radiation or DUV radiation), a patterning device support or support structure (e.g., a mask table) MT constructed to support a patterning device (e.g., a mask) MA and connected to a first positioner PM configured to accurately position the patterning device in accordance with certain parameters; two substrate tables (e.g., a wafer table) WTa and WTb each constructed to hold a substrate (e.g., a resist coated wafer) W and each connected to a second positioner PW configured to accurately position the substrate in accordance with certain parameters; and a projection system (e.g., a refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by patterning device MA onto a target portion C (e.g., including one or more dies) of the substrate W. A reference frame RF connects the various components, and serves as a reference for setting and measuring positions of the patterning device and substrate and of features on them.

[0024] The illumination system may include various types of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof, for directing, shaping, or controlling radiation.

[0025] The patterning device support MT holds the patterning device in a manner that depends on the orientation of the patterning device, the design of the lithographic apparatus, and other conditions, such as for example whether or not the patterning device is held in a vacuum environment. The patterning device support can use mechanical, vacuum, electrostatic or other clamping techniques to hold the patterning device. The patterning device support MT may be a frame or a table, for example, which may be fixed or movable as required. The patterning device support may ensure that the patterning device is at a desired position, for example with respect to the projection system.

[0026] The term “patterning device” used herein should be broadly interpreted as referring to any device that can be used to impart a radiation beam with a pattern in its cross-section such as to create a pattern in a target portion of the substrate. It should be noted that the pattern imparted to the radiation beam may not exactly correspond to the desired pattern in the target portion of the substrate, for example if the pattern includes phase- shifting features or so called assist features. Generally, the pattern imparted to the radiation beam will correspond to a particular functional layer in a device being created in the target portion, such as an integrated circuit.

[0027] As here depicted, the apparatus is of a transmissive type (e.g., employing a transmissive patterning device). Alternatively, the apparatus may be of a reflective type (e.g., employing a programmable mirror array of a type as referred to above, or employing a reflective mask). Examples of patterning devices include masks, programmable mirror arrays, and programmable LCD panels. Any use of the terms “reticle” or “mask” herein may be considered synonymous with the more general term “patterning device.” The term “patterning device” can also be interpreted as referring to a device storing in digital form pattern information for use in controlling such a programmable patterning device.

[0028] The term “projection system” used herein should be broadly interpreted as encompassing any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, as appropriate for the exposure radiation being used, or for other factors such as the use of an immersion liquid or the use of a vacuum. Any use of the term “projection lens” herein may be considered as synonymous with the more general term “projection system”.

[0029] The lithographic apparatus may also be of a type wherein at least a portion of the substrate may be covered by a liquid having a relatively high refractive index, e.g., water, so as to fill a space between the projection system and the substrate. An immersion liquid may also be applied to other spaces in the lithographic apparatus, for example, between the mask and the projection system. Immersion techniques are well known in the art for increasing the numerical aperture of projection systems.

[0030] In operation, the illuminator IL receives a radiation beam from a radiation source SO. The source and the lithographic apparatus may be separate entities, for example when the source is an excimer laser. In such cases, the source is not considered to form part of the lithographic apparatus and the radiation beam is passed from the source SO to the illuminator IL with the aid of a beam delivery system BD including, for example, suitable directing mirrors and / or a beam expander. In other cases the source may be an integral part of the lithographic apparatus, for example when the source is a mercury lamp. The source SO and the illuminator IL, together with the beam delivery system BD if required, may be referred to as a radiation system.

[0031] The illuminator IL may comprise an adjuster AD for adjusting the angular intensity distribution of the radiation beam. Generally, at least the outer and / or inner radial extent (commonlyreferred to as o-outcr and o-inner, respectively) of the intensity distribution in a pupil plane of the illuminator may be adjusted. In addition, the illuminator IL may comprise various other components, such as an integrator IN and a condenser CO. The illuminator IL may be used to condition the radiation beam B, to have a desired uniformity and intensity distribution in its cross section.

[0032] The radiation beam B is incident on the patterning device MA, which is held on the patterning device support MT, and is patterned by the patterning device. Having traversed the patterning device (e.g., mask) MA, the radiation beam B passes through the projection system PS, which focuses the beam onto a target portion C of the substrate W. With the aid of the second positioner PW and position sensor IF (e.g., an interferometric device, linear encoder, 2-D encoder or capacitive sensor), the substrate table WTa or WTb can be moved accurately, e.g., so as to position different target portions C in the path of the radiation beam B. Similarly, the first positioner PM and another position sensor (which is not explicitly depicted in Figure 1) can be used to accurately position the patterning device (e.g., mask) MA with respect to the path of the radiation beam B, e.g., after mechanical retrieval from a mask library, or during a scan.

[0033] The lithographic apparatus may comprise an aberration sensor for the verification of an aberration fingerprint of the projection system PS. In an embodiment such an aberration fingerprint, i.e. aberrations per field point of the projection system PS, may be determined using a such wavefront aberration sensor. A wavefront aberration sensor of a known type, for instance such as described in US2002 / 0001088 may be used. Such a wavefront aberration sensor may be based on the principle of shearing interferometry and comprises a source module and a sensor module. The source module may comprise a patterned layer of chromium that is placed in the object plane (i.e. where during production the pattern of the patterning means is) of the projection system PS and has additional optics provided above the chromium layer. The combination provides a wavefront of radiation to the entire pupil of the projection system PS. The sensor module may comprise a patterned layer of chromium that is placed in the image plane of the projection system (i.e. where during production the substrate W is) and a camera that is placed some distance behind said layer of chromium. The patterned layer of chromium on the sensor module diffracts radiation into several diffraction orders that interfere with each other giving rise to an interferogram. The interferogram is measured by the camera. The aberrations in the projection lens can be determined by software based upon the measured interferogram. The wavefront aberration sensor may be configured to transfer information with respect to the aberration fingerprint towards the control unit.

[0034] Patterning device (e.g., mask) MA and substrate W may be aligned using mask alignment marks Ml, M2 and substrate alignment marks Pl, P2. Although the substrate alignment marks as illustrated occupy dedicated target portions, they may be located in spaces between target portions (these are known as scribe-lane alignment marks). Similarly, in situations in which more than one die is provided on the patterning device (e.g., mask) MA, the mask alignment marks may be located between the dies. Small alignment marks may also be included within dies, in amongst the devicefeatures, in which case it is desirable that the markers be as small as possible and not require any different imaging or process conditions than adjacent features. The alignment system, which detects the alignment markers is described further below.

[0035] The depicted apparatus could be used in a variety of modes. In a scan mode, the patterning device support (e.g., mask table) MT and the substrate table WT are scanned synchronously while a pattern imparted to the radiation beam is projected onto a target portion C (i.e., a single dynamic exposure). The speed and direction of the substrate table WT relative to the patterning device support (e.g., mask table) MT may be determined by the (de-)magnification and image reversal characteristics of the projection system PS. In scan mode, the maximum size of the exposure field limits the width (in the non-scanning direction) of the target portion in a single dynamic exposure, whereas the length of the scanning motion determines the height (in the scanning direction) of the target portion. Other types of lithographic apparatus and modes of operation are possible, as is well-known in the art. For example, a step mode is known. In so-called “maskless” lithography, a programmable patterning device is held stationary but with a changing pattern, and the substrate table WT is moved or scanned.

[0036] Combinations and / or variations on the above described modes of use or entirely different modes of use may also be employed.

[0037] Lithographic apparatus LA is of a so-called dual stage type which has two substrate tables WTa, WTb and two stations - an exposure station EXP and a measurement station MEA - between which the substrate tables can be exchanged. While one substrate on one substrate table is being exposed at the exposure station, another substrate can be loaded onto the other substrate table at the measurement station and various preparatory steps carried out. This enables a substantial increase in the throughput of the apparatus. The preparatory steps may include mapping the surface height contours of the substrate using a level sensor LS and measuring the position of alignment markers on the substrate using an alignment sensor AS. If the position sensor IF is not capable of measuring the position of the substrate table while it is at the measurement station as well as at the exposure station, a second position sensor may be provided to enable the positions of the substrate table to be tracked at both stations, relative to reference frame RF. Other arrangements are known and usable instead of the dual-stage arrangement shown. For example, other lithographic apparatuses are known in which a substrate table and a measurement table are provided. These are docked together when performing preparatory measurements, and then undocked while the substrate table undergoes exposure.

[0038] As shown in Figure 2 the lithographic apparatus LA may form part of a lithographic cell LC, also sometimes referred to as a lithocell or (litho)cluster, which often also includes apparatus to perform pre- and post-exposure processes on a substrate W. Conventionally these include spin coaters SC to deposit resist layers, developers DE to develop exposed resist, chill plates CH and bake plates BK, e.g. for conditioning the temperature of substrates W e.g. for conditioning solvents in the resist layers. A substrate handler, or robot, RO picks up substrates W from input / output ports I / O I , I / O2, moves them between the different process apparatus and delivers the substrates W to the loading bayLB of the lithographic apparatus LA. The devices in the lithocell, which are often also collectively referred to as the track, are typically under the control of a track control unit TCU that in itself may be controlled by a supervisory control system SCS, which may also control the lithographic apparatus LA, e.g. via lithography control unit LACU.

[0039] In order for the substrates W exposed by the lithographic apparatus LA to be exposed correctly and consistently, it is desirable to inspect substrates to measure properties of patterned structures, such as overlay errors between subsequent layers, line thicknesses, critical dimensions (CD), etc. For this purpose, inspection tools (not shown) may be included in the lithocell LC. If errors are detected, adjustments, for example, may be made to exposures of subsequent substrates or to other processing steps that are to be performed on the substrates W, especially if the inspection is done before other substrates W of the same batch or lot are still to be exposed or processed.

[0040] An inspection apparatus, which may also be referred to as a metrology apparatus, is used to determine properties of the substrates W, and in particular, how properties of different substrates W vary or how properties associated with different layers of the same substrate W vary from layer to layer. The inspection apparatus may alternatively be constructed to identify defects on the substrate W and may, for example, be part of the lithocell LC, or may be integrated into the lithographic apparatus LA, or may even be a stand-alone device. The inspection apparatus may measure the properties on a latent image (image in a resist layer after the exposure), or on a semi-latent image (image in a resist layer after a post-exposure bake step PEB), or on a developed resist image (in which the exposed or unexposed parts of the resist have been removed), or even on an etched image (after a pattern transfer step such as etching).

[0041] Typically the patterning process in a lithographic apparatus LA is one of the most critical steps in the processing which requires high accuracy of dimensioning and placement of structures on the substrate W. To ensure this high accuracy, three systems may be combined in a so called “holistic” control environment as schematically depicted in Figure 3. One of these systems is the lithographic apparatus LA which is (virtually) connected to a metrology tool MT (a second system) and to a computer system CL (a third system). The key of such “holistic” environment is to optimize the cooperation between these three systems to enhance the overall process window and provide tight control loops to ensure that the patterning performed by the lithographic apparatus LA stays within a process window. The process window defines a range of process parameters (e.g. dose, focus, overlay) within which a specific manufacturing process yields a defined result (e.g. a functional semiconductor device) - typically within which the process parameters in the lithographic process or patterning process are allowed to vary.

[0042] The computer system CL may use (part of) the design layout to be patterned to predict which resolution enhancement techniques to use and to perform computational lithography simulations and calculations to determine which mask layout and lithographic apparatus settings achieve the largest overall process window of the patterning process (depicted in Figure 3 by the double white arrow inthe first scale SCI). Typically, the resolution enhancement techniques are arranged to match the patterning possibilities of the lithographic apparatus LA. The computer system CL may also be used to detect where within the process window the lithographic apparatus LA is currently operating (e.g. using input from the metrology tool MT), so as to predict whether defects may be present due to e.g. sub-optimal processing (depicted in Figure 3 by the arrow pointing “0” in the second scale SC2).

[0043] The metrology tool MT may provide input to the computer system CL to enable accurate simulations and predictions, and may provide feedback to the lithographic apparatus LA to identify possible drifts, e.g. in a calibration status of the lithographic apparatus LA (depicted in Figure 3 by the multiple arrows in the third scale SC3).

[0044] The lithographic apparatus LA is configured to accurately reproduce the pattern onto the substrate. The positions and dimensions of the applied features need to be within certain tolerances. Position errors may occur due to an overlay error (often referred to as “overlay”). The overlay is the error in placing a first feature during a first exposure relative to a second feature during a second exposure. The lithographic apparatus minimizes the overlay errors by aligning each wafer accurately to a reference prior to patterning. This is done by measuring positions of alignment marks on the substrate using an alignment sensor. More information on the alignment procedure can be found in U.S. Patent Application Publication No. US20100214550, which is incorporated herein by reference. Pattern dimensioning (e.g., CD) errors may, for example, occur when the substrate is not positioned correctly with respect to a focal plane of the lithographic apparatus. These focal position errors may be associated with un-flatness of a substrate surface. The lithographic apparatus minimizes these focal positon errors by measuring the substrate surface topography prior to patterning using a level sensor. Substrate height corrections are applied during subsequent patterning to assure correct imaging (focusing) of the patterning device onto the substrate. More information on the level sensor system can be found in U.S. Patent Application Publication No. US20070085991, which is incorporated herein by reference.

[0045] Besides the lithographic apparatus LA and the metrology apparatus MT other processing apparatus may be used during IC production as well. An etching station (not shown) processes the substrates after exposure of the pattern into the resist. The etch station transfers the pattern from the resist into one or more layers underlying the resist layer. Typically etching is based on application of a plasma medium. Local etching characteristics may, for example, be controlled using temperature control of the substrate or directing the plasma medium using a voltage controlled ring. More information on etching control can be found in international Patent Application Publication No. WO2011081645 and U.S. Patent Application Publication No. US 20060016561 which are incorporated herein by reference.

[0046] During the manufacturing of the ICs, it is of great importance that the process conditions for processing substrates using processing apparatus, such as the lithographic apparatus or etching station, remain stable such that properties of the features remain within certain control limits. Stability of theprocess is of particular importance for features of the functional parts of the IC, i.e., the product features. To guarantee stable processing, process control capabilities need to be in place. Process control involves monitoring of processing data and implementation of means for process correction, e.g. control the processing apparatus based on characteristics of the processing data. Process control may be based on periodic measurement by the metrology apparatus MT, often referred to as “Advanced Process Control” (further also referenced to as APC). More information on APC can be found in U.S. Patent Application Publication No. US20120008127, which is incorporated herein by reference. A typical APC implementation involves periodic measurements on metrology features on the substrates to monitor and correct drifts associated with one or more processing apparatus. The metrology features reflect the response to process variations of the product features.

[0047] In US20120008127, a lithographic apparatus is calibrated by reference to a primary substrate. Using an apparatus which need not be the same as the one being calibrated, there is obtained an apparatus-specific fingerprint of the primary substrate. Using the same set-up there is then obtained an apparatus-specific fingerprint of a secondary substrate. The apparatus-specific fingerprint of the primary substrate is subtracted from the apparatus-specific fingerprint of the secondary substrate to obtain and store an apparatus-independent fingerprint of the secondary substrate. The secondary substrate and stored apparatus-independent fingerprint are subsequently used together in place of the primary substrate as a reference for the calibration of the lithographic apparatus to be calibrated. Initial set-up for a cluster of lithographic tools can be performed with less use of the costly primary substrate, and with less interruption to normal production. The initial set-up can be integrated with ongoing monitoring and re-calibration of the apparatuses.

[0048] The term fingerprint may refer to a main (systematic) contributor (“latent factor”) of a measured signal, and in particular a contributor connected to the performance impact on-wafer or to previous processing steps. Such a fingerprint can refer to substrate (grid) patterns (e.g. from alignment, leveling, overlay, focus, CD), field patterns (e.g., from intrafield alignment, leveling, overlay, focus, CD), substrate zone patterns (e.g., outermost radius of wafer measurements) or even patterns in scanner measurements related to wafer exposure (e.g., heating signature through-lot from reticle alignment measurements, temperature / pressure / servo profiles, etc.). Fingerprints may be comprised within a fingerprint collection, and may be encoded homogenously or heterogeneously therein.

[0049] As such, APC identifies correctable variation in a performance parameter such as overlay, and applies one set of corrections to a lot (batch) of wafers. In determining these corrections, corrections from previous lots are taken into account in order to avoid overcorrecting the noise in the measurements. For adequate smoothing of current corrections with previous ones, the history of corrections taken into account may match the context of the current lot. “Context” in this regard encompasses any parameters that identify variants arising within the same overall industrial process. The layer ID, layer type, product ID, product type, reticle ID and so forth are all context parametersthat may lead to different fingerprints in the finished performance. In addition to the individual scanners that may be used in a high-volume manufacturing (HVM) facility, the individual tools used for each of the coating, etching, and other steps involved in semiconductor manufacturing can also vary from lot to lot or wafer to wafer. Each of these tools can impose a particular error “fingerprint” on the products. Outside the field of semiconductor manufacturing, similar situations may arise in any industrial process.

[0050] The APC control loop described above has a primary task of monitoring drift in metrology data indicative of drift of the control parameter behavior and determining appropriate corrections for the control parameters to address this drift and maintain the measured metrology parameter values within specification (i.e., within a certain acceptable tolerance or “process window”) within which the IC device can be expected to function with good probability.

[0051] The APC control loop is one of a number of control loops which may be used in a lithographic exposure process. When a lithography system is first installed, it should be calibrated to ensure optimal operation. However, over time, system performance parameters will drift. A small amount of drift can be tolerated, but too much drift and the system will go out of specification. Consequently production may be stopped periodically for re-calibration. Calibrating the system more frequently gives a bigger process window, but at the cost of more scheduled downtime.

[0052] A scanner stability module may be used to reduce the number of these production stoppages. Such a scanner stability module may be configured to automatically drive the system towards a predefined baseline on a regular basis (typically every few days). To do this, it retrieves standard measurements taken from one or more monitor wafers using a metrology tool. The monitor wafer is exposed using a special reticle containing special scatterometry marks. From that day’s measurements, the scanner stability module determines how far the system has drifted from its baseline. It then calculates wafer-level overlay and focus correction sets. The lithography system then converts these correction sets into specific corrections for each exposure on subsequent production wafers.

[0053] For volume production, it is desirable to have full flexibility when assigning layers for exposure to a scanner. The alternative, layer-scanner dedication, would put monthly output capacity at risk, since any small disturbance of the lithocluster would directly show up in the output of that month. One known approach to overcome this risk is by so called (overlay) grid matching. All scanner grids are intentionally offset a little, such that all scanners more or less have the same (average) grid for overlay. This grid is often referred to as ‘holy’ or ‘golden’ grid. Each product layer can now be exposed on each scanner of the same type. This ‘golden’ grid is exposed and etched onto so called ‘reference wafers’. If these ‘golden’ matching wafers are used as the baseline for overlay stability control instead of random monitoring wafers, overlay grid matching and long-term stability can be achieved in a single automated step.

[0054] Figure 4 depicts the overall lithography and metrology method incorporating the scanner stability module 500 (essentially an application running on a server, in this example). Shown are three main process control loops. The first loop provides the local scanner control using the scanner stability module 500 and monitor wafers. The monitor wafer 505 is shown being passed from the main lithography unit 510, having been exposed to set the baseline parameters for focus and overlay. At a later time, metrology unit 515 reads these baseline parameters, which are then interpreted by the scanner stability module 500 so as to calculate correction routines so as to provide scanner feedback 550, which is passed to the main lithography unit 510, and used when performing further exposures.

[0055] The second loop is the aforementioned APC control loop for local scanner control on-product (determining focus, dose, and overlay). The exposed product wafer 520 is passed to metrology unit 515 where information relating to the critical dimensions, sidewall angles and overlay is determined and passed onto the APC module 525. This data is also passed to the scanner stability module 500. Process corrections 540 are made before the Manufacturing Execution System (MES) 535 takes over, providing scanner control to the main lithography unit 510, in communication with the scanner stability module 500.

[0056] The third loop is to allow metrology integration into the second APC loop (e.g. for double patterning). The post etched wafer 530 is passed to metrology unit 515 which again passes information relating to the critical dimensions, sidewall angles and overlay, read from the wafer, to the APC module. The loop continues the same as with the second loop.

[0057] The inline control loops used within a lithographic apparatus, such as the substrate alignment, reticle alignment and stage alignment control loops, have a tendency to drift apart from each other and with respect to the absolute location at which an exposure is being performed on a substrate. There is no stable reference within the lithographic apparatus which can be used as an absolute measurement to correct for this drift.

[0058] The main way presently used to keep the lithographic apparatus stable is to routinely perform exposures with respect to reference marks on a substrate, develop the substrate and measure it on a metrology tool (e.g. a scatterometry tool) or on the lithographic apparatus itself. By looking at the difference (e.g., positional differences) between the reference marks and the exposed layer (e.g., newly exposed structures having been exposed in the exposure step), the drift of the lithographic apparatus can be determined and corrected for. This is essentially what is done in lithographic apparatus calibration / setup and during the aforementioned control loops (scanner stability and / or APC).

[0059] It is presently recommended, for at least one of these control loops, to perform a drift calibration, i.e., a substrate exposure and measurement iteration, every three days on every lithographic apparatus. Each such iteration comprises complex substrate and data logistics. This is complex and time consuming.

[0060] Figure 5 illustrates such a substrate exposure and measurement iteration process as may be presently performed. At least one substrate or tool substrate 600, having been coated in a conventional or normal resist and comprising etched first structures (etched reference structures such as alignment marks), is received within a lithographic apparatus LA. Within lithographic apparatus LA, the etched reference structures are measured as part of a substrate alignment process 605, so as to align the substrate. Based on the alignment data from the alignment process 605, the substrate is exposed 610, e.g., with one or more monitor structures. The alignment 605 and exposure 610 steps may each be performed on respective measure and exposure stages of a dual-stage lithographic apparatus such as illustrated in Figure 1, although both steps may also be performed on a single stage lithographic apparatus.

[0061] The substrate is then removed from lithographic apparatus LA and the resist is developed 615. The exposed metrology structures (e.g., and the reference structures) are then measured 620 in a metrology device MET such as a scatterometer. The resultant metrology data is sent 625 to a processing unit or processing module PCM, on which a process control model or drift control model 630 is run. Such a model may be updated with the metrology data, so as to quantify any drift in any at least one parameter of interest, e.g., since a previous iteration of this method and / or initial calibration. The at least one parameter of interest may relate and / or describe positions of exposed structures on the substrate, such as overlay) The modeled drift and / or any resultant process corrections (e.g., lithographic apparatus setpoint corrections) are sent back 635 to the lithographic apparatus LA, such that any drift within the lithographic apparatus LA is corrected for 640.

[0062] To address at least some of the issues with this process, it is proposed to use latent resist to make each iteration of the expose / measure / model cycle much simpler and faster. After exposing a substrate with regular resist, it needs to be developed before it can be readout on a scatterometer or on the lithographic apparatus (e.g., using the alignment sensor). Latent resist, however, is a type of resist that does not need to be developed before it can be measured on the lithographic apparatus. This makes it possible to measure substrates immediately after being exposed, e.g., on the same lithographic apparatus, without any intervening processing steps.

[0063] The proposed method comprises measuring at least one exposure offset error relating to a lithographic apparatus; by: obtaining a substrate comprising a coating of a latent resist; performing at least a main exposure step to expose metrology structures into said latent resist; measuring at least said metrology structures in the undeveloped latent resist to obtain metrology data; and determining said exposure offset error from said metrology data. The measuring step is performed subsequently to said main exposure step without removing said substrate from the lithographic apparatus. The exposure offset error can then be modeled (e.g., within the lithographic apparatus) to determine corrections which correct for drift within the lithographic apparatus.

[0064] In an embodiment, the full calibration process, e.g., each iteration of exposing, measuring and modeling, are all performed on the same lithographic apparatus (although the modeling may stillbe performed on an offline processor module as an alternative). The main exposure step and the measuring step are performed without unloading the substrate between these steps; e.g., while maintaining the substrate clamped to the substrate stage / chuck. The measuring step may be performed using the alignment sensor of the lithographic apparatus (e.g., on a dedicated measurement stage or otherwise).

[0065] The proposed method may comprise a single exposure step to expose metrology structures. Alternatively, the method may comprise multiple (e.g., two) exposure steps, with a reference exposure step being performed (or having been performed at an earlier time) to expose reference structures or reference marks, and the main exposure step for exposing the metrology structures. In either case, at least the main exposure step, which may be the only exposure step, is immediately followed with a measurement of at least the structures having been just exposed in that main exposure step. “Immediately followed” in this context may comprise being measured without leaving the lithographic apparatus used to expose the substrate; e.g., being measured without unloading the substrate from the substrate stage to which it was clamped during the exposure step.

[0066] The method may comprise a method of measuring an exposure offset error, either in absolute terms or in relative terms, with reference to reference structures on the metrology structures.

[0067] In some embodiments, only the structures having been just exposed in the main exposure step are measured in the measurement step. The absolute measured position of these metrology structures may be used to determine an exposure offset error, which in turn may be used to model the process drift. Such an exposure offset error may comprise, for example an absolute measure of translation and rotation errors in the exposed metrology structures (e.g., in terms of up to 10 lower order parameters).

[0068] In other embodiments, a main measurement step may measure structures exposed in each of two previous exposure steps; e.g., reference structures exposed in a reference exposure step and said metrology structures exposed in a main exposure step. A positional difference of the measurement of the metrology structures and reference structures may be used to determine (e.g., may comprise) an exposure offset error. As such, the exposure offset error, and therefore any translation and rotation errors (e.g., in terms of up to 10 lower order parameters) in the metrology structures, may be determined relatively to the reference structures. Both of the exposure steps may have been performed during this calibration iteration or exposure / measurement iteration. Alternatively, the reference exposure step may have been previously performed and the resultant reference structures etched before performing this exposure / measurement iteration to expose and measure the metrology structures. In either case, there may be a first measurement step performed before the main exposure step, to measure and align the substrate to the reference structures.

[0069] Figure 6 is a flow diagram illustrating a first implementation of the proposed concept. A bare or empty substrate 650 (e.g., a drift monitoring substrate), having been coated in latent resist, is received within the lithographic apparatus LA. Metrology structures (e.g., alignment marks) areexposed 655 into the latent resist. Without unloading the substrate, a measurement step 660 is performed to measure the metrology structures just exposed in the previous step (the structures being measured in the undeveloped latent resist) to obtain metrology data. This measurement step 660 may comprise using the alignment sensor of the lithographic apparatus LA, e.g., to perform substrate alignment. The absolute measured positions of the exposed metrology structures may be used (e.g., may be assumed to comprise) the expose offset error. The metrology data is immediately available on the lithographic apparatus, such that the lithographic apparatus can model 665 and / or determine corrections 670 for process drift and / or lithographic apparatus drift (e.g., drift of the inline control loops) without intervention from any other system. Such corrections may be used in further exposures on production substrates using this lithographic apparatus in a production phase.

[0070] One notable feature of this method is that the substrate remains clamped on the stage after the exposure step, while the exposed metrology structures are immediately read out with the alignment sensor. Another notable feature is that no substrate alignment measurements are performed before exposing the substrate (and therefore a blank substrate may be used). Alignment measurements are only performed after exposing the substrate, on the metrology structures that have just been exposed. Because the substrate is not unloaded between exposure and measurement, the substrate load offset (often referred to as the wafer load grid) will be the same. That means the substrate alignment result (metrology step 660) will be an absolute measurement of the expose offset error, which is the measurement that is required for drift control, at least in terms of translation and rotation errors.

[0071] Due to certain technical issues (e.g., due to one or more of sensor drift, wafer stage zeroing and / or stage positioning drift), the absolute measurements of the aforementioned embodiment might not be sufficiently reliable. A more reliable method may comprise measuring the metrology structures with reference to previously exposed reference structures (reference alignment marks) on the same substrate. By performing alignment on these reference structures, both prior to exposing the metrology structures and also when reading out the exposed metrology structures, there is no need to assume that the coordinate system is absolute.

[0072] Figure 7 is a flow diagram illustrating a first such referenced calibration method according to the proposed concept. In this method, the substrate 700 is provided with etched reference structures (e.g., etched alignment marks), before being coated in latent resist. These etched reference structures may have been exposed in a previous reference exposure step, and subsequently etched before admittance into the lithographic apparatus LA (e.g., the reference structure may have been exposed in a first layer in conventional resist). For example, the substrate 700 of this embodiment may comprise a tool substrate, such as presently used in drift monitoring (e.g., used in the method illustrating in Figure 5). As such, the reference structures may comprise first layer structures (or layer n-1 structures) in a first layer on the substrate 700. The substrate 700 may be aligned in a first measurement step 705 by measuring the reference structures (e.g., using the alignment sensor of the lithographic apparatus LA).

[0073] A main exposure step 710 may comprise exposing metrology structures (e.g., alignment marks) on the substrate, e.g., such that they are exposed into the latent resist at positions determined with respect to the alignment measurement 705 performed on the reference structures. For example, the metrology structures may comprise second layer structures (or layer n structures) in a second (latent resist) layer on the substrate 700.

[0074] A second measurement step 715 may be performed to measure both of the reference structures (e.g., in the first layer) and the metrology structures (e.g., in the second layer), the latter being measured in the undeveloped latent resist. The exposure offset error may comprise, and therefore may be determined from, the difference of the metrology structures measurement and the reference structures measurement, as measured in this step.

[0075] As before, the substrate is not unloaded between the main exposure step and second measurement step, such that it remains clamped to the substrate stage. It also remains clamped between the first measurement step and main exposure step (i.e., steps 705 to 715 are performed without unloading the substrate).

[0076] Again, the lithographic apparatus can model 720 and / or correct 725 for process drift and / or lithographic apparatus drift using the metrology data obtained (and / or exposure offset error derived therefrom) in second measurement step 715.

[0077] Figure 8 is a flow diagram illustrating a variation of the method of Figure 7, but using selfexposed reference structures, e.g., reference structures exposed in latent resist coated on a blank substrate 800. A reference exposure step 805 may comprise exposing reference structures on the (bare) substrate. For example, the reference structures may comprise first layer structures (or layer n-1 structures) in a first layer on the substrate 800. As with the unreferenced example of Figure 6, these structures may be exposed without an initial alignment measurement being performed to align the substrate.

[0078] A first measurement step 810 may be performed to measuring the reference structures (e.g., using the alignment sensor of the lithographic apparatus LA) in the undeveloped latent resist, and performing substrate alignment on the reference structures.

[0079] A main exposure step 815 may comprise exposing metrology structures on the substrate, e.g., such that they are exposed with respect to the alignment measurement 810 performed on the reference structures. For example, the reference structures may comprise second layer structures (or layer n structures) in a second layer on the substrate 800.

[0080] Note that the concept of a first layer and second layer in this embodiment does not refer to different physical layers, but conceptual layers: more specifically a first exposure pass exposes the reference structures in the latent resist and a second exposure pass (mimicking the exposure of a second layer on the same substrate) exposes the metrology structures in the same physical layer of latent resist (e.g., at different locations).

[0081] A second measurement step 820 may be performed to measure both of the reference structures and the metrology structures. As before, the exposure offset error may comprise, and therefore may be determined from, the difference of the metrology structures measurement and the reference structures measurement, as measured in this step.

[0082] Again, the lithographic apparatus can model 825 and / or correct 830 for process drift and / or lithographic apparatus drift using the metrology data obtained (and / or exposure offset error derived therefrom) in second measurement step 820.

[0083] The methods disclosed herein will mainly provide measurements of translation and rotation errors. However, by extending the substrate alignment scheme, it may be possible to measure other parameters, in addition to translations and rotations. This may comprise measuring more structures to capture higher order parameters. However, it may be preferable to limit the number of structures to be measured to maximize availability of the lithographic apparatus for production.

[0084] The sequence in which a substrate is first exposed and then, without unloading the substrate, is readout on the measure side, is not a commonly supported sequence. These are two possible implementation methods. A first implementation method may comprise modifying present lithographic apparatus software to support alignment measurements before unloading a substrate. A second implementation method can be performed without major software changes, by using the virtual substrate exchange functionality to create multiple substrate cycles. In the first cycle the substrate can be exposed. Then in the second cycle, alignment measurements can be performed on the exposures of the first cycle. It can be appreciate that the software may need some adaption to select which alignment strategy is applied in which exposure cycle.

[0085] The methods disclosed herein can be used to keep the inline control loops stable, but may be unsuitable for other drifts such as lens, substrate table or grid drift control. These drifts may be monitored using other process, e.g., processes which do not rely, or rely less, on resist-based measurements. For translations and rotations however, resist-based measurements are the only possible option, and therefore the proposed methods provide an improved solution for addressing translation and rotation scanner drift. By controlling low order lithographic apparatus drift in this manner has the advantage that the APC loop is not contaminated with system drift. That is because such methods enable lag-free drift control of lower orders with limited availability loss (such a lag can be hours for present methods and only seconds for the proposed method). Further advantages comprise complexity reduction and ease-of-use, and reduction in use of the external (scatterometer) metrology tool, which is therefore freed for other process monitoring applications.

[0086] The concepts disclosed herein have, up to now, been described in the context of overlay control (e.g., to quantify translation and / or rotation errors and their drift in in the substrate (X / Y) plane). However, the concepts disclosed herein are also applicable to quantifying focus (i.e., defocus) in the Z direction normal to the substrate plane. Such a method may comprise performing a focus / leveling test using the well-known FOCAL reticle as is well known (e.g., as described inUS20090135389A1, which is incorporated herein by reference). The difference with a conventional focus test is that the exposed substrate comprising focal verification fields can be measured by the alignment sensor in the latent resist without developing the substrate. As such, as with other embodiments, this measurement may be done without removing the substrate from the lithographic apparatus between exposure and measurement, and possibly without unclamping / unloading the substrate between exposure and measurement.

[0087] Briefly, such a focus / leveling test for measuring focus of a lithographic apparatus comprises exposing the substrate full substrate coverage (verification) fields at a deliberate focus offset FO (i.e., at a deliberate defocus). The purpose of the focus offset FO is to be in a focus sensitive part of a so- called focal curve.

[0088] The FOCAL reticle used to expose a plurality of verification fields on a test substrate may comprise a plurality of marks (e.g., between 100 and 500 or between 200 and 300), which are named FOCAL marks. Each said FOCAL mark may comprise, for example, a plurality of horizontal and vertical chopped bars. The bars in the structures may have a range of linewidths and pitch sizes. Due to the particular dimensions of the structure, the linewidth of the chops will be focus sensitive according to the well-known Bossung principle. As result of this, a FOCAL mark not exposed in focus will have an alignment offset. This offset can be used to determine a focus error also referred to as defocus.

[0089] The verification fields are exposed using a focus offset. The focus offset may be determined by reference to a focal curve C(dZ) having already been exposed on the lithographic apparatus. The focal curve may comprise a plot of alignment offset of measured FOCAL marks as a function of defocus dZ. Around the focus offset, a focus range is defined in which there is a unique (e.g., monotonic) relationship between the alignment offset and defocus dZ. The focus offset is determined such that all the exposed FOCAL marks will stay within the usable focus range throughout the exposure. This means for example that the focus offset should not be too close to the dZ=0 axis since the alignment offset as function of dZ is zero which is not usable for the method. In an embodiment, the focus offset is selected so as to be in the middle of a working range where the focal curve C(dZ) is substantially linear since this is the region of maximum focus-versus alignment sensitivity.

[0090] After the exposure of the verification fields, an alignment offset for each of the verification marks is measured using for example the alignment sensor present in the lithographic apparatus without developing the resist, e.g., such that the substrate does not need to leave the lithographic apparatus (e.g., does not need to be unloaded). The measured alignment offsets for each of the verification marks are translated into defocus data using a transposed focal curve. In an embodiment this transposed focal curve is determined by transposing a section of the focal curve of the lithographic apparatus corresponding to the aforementioned defined focus range. The transposed focal curve is in fact the focus sensitivity of the apparatus.

[0091] This method may comprise a variation of the method illustrated in Figure 6. There is no advantage or reason to use reference structures in this focus embodiment.

[0092] Other aspects of the invention are set out in the following numbered clauses:1. A method of measuring at least one exposure offset error relating to a lithographic apparatus; the method comprising: obtaining a substrate comprising a coating of a latent resist; performing at least a main exposure step to expose metrology structures into said latent resist; measuring at least said metrology structures in the undeveloped latent resist to obtain metrology data; and determining said exposure offset error from said metrology data; wherein said measuring step is performed subsequently to said main exposure step without removing said substrate from the lithographic apparatus.2. A method as set out in clause 1, wherein said measuring step is performed subsequently to said main exposure step without unloading said substrate from a substrate support comprised within the lithographic apparatus between said exposure step and said measuring step.3. A method as set out in clauses 1 or 2, wherein said measuring step is performed using an alignment sensor comprised within the lithographic apparatus used to perform said main exposure step.4. A method as set out in any preceding clause, wherein said metrology structures comprise alignment marks.5. A method as set out in any preceding clause, wherein said metrology structures comprise focus sensitive structures and said main exposure step comprises exposing said metrology structures at a deliberate focus offset.6. A method as set out in clause 5, comprising translating said metrology data into focus data describing a focus of the lithographic apparatus during said main exposure step.7. A method as set out in any preceding clause, wherein said main exposure step is performed without performing a substrate alignment step prior to the main exposure step.8. A method as set out in clause 7, wherein said substrate comprises a blank substrate prior to said main exposure step.9. A method as set out in any of clauses 1 to 4, wherein said substrate comprises reference structures; and said method comprises, prior to said performing at least a main exposure step: measuring said reference structures to obtain reference metrology data; and aligning said substrate in accordance with said reference metrology data.10. A method as set out in clause 9, wherein said measurement step comprises measuring both of said metrology structures and reference structures to obtain said metrology data.11. A method as set out in clause 10, wherein said exposure offset error is determined from a difference of said metrology data as measured from said metrology structures and said metrology data as measured from said reference structures.12. A method as set out in any of clauses 9 to 11, comprising initial steps of: exposing said reference structures into said latent resist in a reference exposure step.13. A method as set out in clause 12, wherein said reference exposure step is performed without performing a substrate alignment step prior to the reference exposure step.14. A method as set out in clause 13, wherein said substrate comprises a blank substrate prior to said reference exposure step.15. A method as set out in any of the clauses 9 to 11, wherein said reference structures comprise etched reference structures in a layer below said latent resist.16. A method as set out in clause 15, comprising an initial step of exposing and etching said reference structures onto said substrate.17. A method as set out in any of the clauses 9 to 16, wherein said reference structures comprise alignment marks.18. A method as set out in any preceding clause, comprising modeling said metrology data and / or exposure offset error to determine a correction for drift of the lithographic apparatus.19. A method as set out in clause 18, wherein said modeling step is performed within the lithographic apparatus.20. A method as set out in clauses 18 or 19, wherein said drift relates to at least one or more of: translation, rotation and / or focus of exposed structures using the lithographic apparatus.21. A method as set out in clauses 18, 19 or 20, comprising exposing further substrates on said lithographic apparatus, wherein said exposures are corrected in accordance with the determined correction.22. A computer program comprising program instructions operable to perform the method of any of clauses 1 to 21, when run on a suitable apparatus.23. A non- transient computer program carrier comprising the computer program of clause 22.24. A processing system comprising a processor and a storage device comprising the computer program of clause 23.25. An exposure apparatus comprising: a projection system; an alignment sensor; and the processing system of clasue 24..

[0093] It should be appreciated that the metrology data used in the methods described herein may comprise synthetic metrology data (alternatively or in combination with non-synthetic metrology data measured from one or more physical wafers), e.g., as obtained via computational lithography techniques which simulate one or more steps of a semiconductor manufacturing process.

[0094] Although specific reference may be made in this text to the use of lithographic apparatus in the manufacture of ICs, it should be understood that the lithographic apparatus described herein may have other applications. Possible other applications include the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, flat-panel displays, liquidcrystal displays (LCDs), thin-film magnetic heads, etc.

[0095] Although specific reference may be made in this text to embodiments of the invention in the context of a lithographic apparatus, embodiments of the invention may be used in other apparatus. Embodiments of the invention may form part of a mask inspection apparatus, a metrology apparatus, or any apparatus that measures or processes an object such as a wafer (or other substrate) or mask (or other patterning device). These apparatus may be generally referred to as lithographic tools. Such a lithographic tool may use vacuum conditions or ambient (non- vacuum) conditions.

[0096] Although specific reference may have been made above to the use of embodiments of the invention in the context of optical lithography, it will be appreciated that the invention, where the context allows, is not limited to optical lithography and may be used in other applications, for example imprint lithography.

[0097] While specific embodiments of the invention have been described above, it will be appreciated that the invention may be practiced otherwise than as described. The descriptions above are intended to be illustrative, not limiting. Thus it will be apparent to one skilled in the art that modifications may be made to the invention as described without departing from the scope of the claims set out below.

Claims

CLAIMS1. A method of measuring at least one exposure offset error relating to a lithographic apparatus; the method comprising: obtaining a substrate comprising a coating of a latent resist; performing at least a main exposure step to expose metrology structures into said latent resist; measuring at least said metrology structures in the undeveloped latent resist to obtain metrology data; and determining said exposure offset error from said metrology data; wherein said measuring step is performed subsequently to said main exposure step without removing said substrate from the lithographic apparatus.

2. A method as claimed in claim 1, wherein said measuring step is performed subsequently to said main exposure step without unloading said substrate from a substrate support comprised within the lithographic apparatus between said exposure step and said measuring step.

3. A method as claimed in claim 1 or 2, wherein said measuring step is performed using an alignment sensor comprised within the lithographic apparatus used to perform said main exposure step.

4. A method as claimed in any preceding claim, wherein said metrology structures comprise focus sensitive structures and said main exposure step comprises exposing said metrology structures at a deliberate focus offset.

5. A method as claimed in any preceding claim, wherein said main exposure step is performed without performing a substrate alignment step prior to the main exposure step.

6. A method as claimed in claim 5, wherein said substrate comprises a blank substrate prior to said main exposure step.

7. A method as claimed in any of claims 1 to 3, wherein said substrate comprises reference structures; and said method comprises, prior to said performing at least a main exposure step: measuring said reference structures to obtain reference metrology data; and aligning said substrate in accordance with said reference metrology data.

8. A method as claimed in claim 7, comprising initial steps of: exposing said reference structures into said latent resist in a reference exposure step.

9. A method as claimed in claim 8, wherein said reference exposure step is performed without performing a substrate alignment step prior to the reference exposure step.

10. A method as claimed in claim 9, wherein said substrate comprises a blank substrate prior to said reference exposure step.

11. A method as claimed in any of claims 7, wherein said reference structures comprise etched reference structures in a layer below said latent resist.

12. A method as claimed in any of claims 7 to 11, wherein said reference structures comprise alignment marks.

13. A method as claimed in any preceding claim, comprising modeling said metrology data and / or exposure offset error to determine a correction for drift of the lithographic apparatus.

14. A method as claimed in claim 13, comprising exposing further substrates on said lithographic apparatus, wherein said exposures are corrected in accordance with the determined correction.

15. A computer program comprising program instructions operable to perform the method of any of claims 1 to 14, when run on a suitable apparatus.

16. A non-transient computer program carrier comprising the computer program of claim 15.

17. A processing system comprising a processor and a storage device comprising the computer program of claim 16.

18. An exposure apparatus comprising: a projection system; an alignment sensor; and the processing system of claim 17.

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