Readout circuit design for charged particle detection applications

The readout circuit design employing ring oscillators and a comparator enhances the detection of charged particles by improving sensitivity and accuracy, addressing the limitations of existing systems in low beam current applications.

WO2025131845A1PCT designated stage expired Publication Date: 2025-06-26ASML NETHERLANDS BV
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Patent Information

Application Number
PCT/EP2024/085372
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-21
Filing Date
2024-12-09
Publication Date
2025-06-26

AI Technical Summary

Technical Problem

Existing charged particle detection systems face challenges with signal-to-noise ratio (SNR) and system throughput, particularly at low beam currents, making it difficult to accurately detect and process consecutive electron arrival events.

Method used

The proposed solution involves a readout circuit design that uses a first and second ring oscillator, along with a comparator, to detect charged particle arrival events based on a phase difference between the two oscillators. The second ring oscillator receives charges from a charged particle sensing element, altering its delay time and output frequency, which is then compared with the reference output from the first ring oscillator to determine the presence of a charged particle.

Benefits of technology

This design improves the detection sensitivity and accuracy by reducing power consumption, dead time, and increasing response speed, enabling efficient detection of individual electron arrival events even at higher beam currents.

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Abstract

An electron counting detector includes a sensing element and a detection circuit configured to detect electron arrival events by comparing the relative frequencies or phases of two ring oscillators. A reference ring oscillator may be configured to output a reference signal to a comparator, and a detection ring oscillator may be configured to output a detection signal to the comparator. In the absence of an electron arrival event, the detection signal may remain correlated with the reference signal. When an electron arrives at the sensing element, charges form the sensing element are injected to an N-well of the detection ring oscillator, altering its oscillation frequency or phase. The altered frequency or phase of the detection oscillator with respect to the reference oscillator may be detected by the comparator as an electron arrival event.
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Description

READOUT CIRCUIT DESIGN FOR CHARGED PARTICLE DETECTION APPLICATIONSCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority of US application 63 / 613,597 which was filed on December 21, 2023 and which is incorporated herein in its entirety by reference.TECHNICAL FIELD

[0002] The description herein relates to detectors, and more particularly, to detectors that may be applicable to charged particle detection.BACKGROUND

[0003] Detectors may be used for sensing physically observable phenomena. For example, some charged particle beam tools, such as electron microscopes, comprise detectors that receive charged particles projected from a sample and that output detection signals. Detection signals may be used to reconstruct images of sample structures under inspection and may be used, for example, to reveal defects in the sample. Detection of defects in a sample is increasingly important in the manufacturing of semiconductor devices, which may include large numbers of densely packed, miniaturized integrated circuit (IC) components. Inspection systems may be provided for this purpose. For example, a charged particle (e.g., electron) beam microscope, such as a scanning electron microscope (SEM) or a transmission electron microscope (TEM), capable of resolution down to less than a nanometer, serves as a practical tool for inspecting IC components having a feature size that is sub- 100 nanometers. Electron microscopes work by irradiating a sample with an electron beam, then detecting secondary or backscattered electrons (or other types of secondary particles) on a detector. The secondary particles may form one or more beam spots on the detector surface.

[0004] Some detectors include charged particle counting functionality. With continuing miniaturization of semiconductor devices, inspection systems may use lower and lower beam currents in charged particle beam tools. Existing detection systems may be limited by signal-to-noise ratio (SNR) and system throughput, particularly when beam current reduces to, for example, pico-ampere ranges. Electron counting has been proposed to enhance SNR and to increase throughput in electron beam inspection systems, wherein the intensity of an incoming electron beam is acquired by counting the number of electrons that reach the detector, and then analyzing the frequency of electron arrival events.SUMMARY

[0005] Some embodiments of the present disclosure provide a charged particle detector. The charged particle detector may comprise: a charged particle sensing element; a first ring oscillator; a second ring oscillator; and a comparator. The second ring oscillator may be configured to receive aplurality of charges from the charged particle sensing element in response to a charged particle arrival event occurring at the charged particle sensing element. The comparator may be configured to compare a first output of the first ring oscillator with a second output of the second ring oscillator to detect the charged particle arrival event.

[0006] Some embodiments of the present disclosure provide a method of charged particle detection. The method may comprise: receiving a charged particle at a charged particle sensing element as a charged particle arrival event; releasing a plurality of charges from the charged particle sensing in response to the charged particle arrival event; receiving the plurality of charges at a detection ring oscillator; comparing, by a comparator, a detection output signal of the detection ring oscillator with a reference output signal of a reference ring oscillator; and determining that the charged particle arrival event occurred based on the comparison by the comparator.

[0007] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as may be claimed.BRIEF DESCRIPTION OF DRAWINGS

[0008] Fig. 1 is a schematic diagram illustrating an example charged-particle beam inspection system, consistent with embodiments of the present disclosure.

[0009] Fig. 2 is a schematic diagram illustrating an example multi-beam beam tool, consistent with embodiments of the present disclosure that can be a part of the charged-particle beam inspection system of Fig. 1.

[0010] Fig. 3 is a diagram illustrating a charged particle counting detector, according to a comparative embodiment.

[0011] Fig. 4A-D are diagrams illustrating example circuits for charged particle counting detection, consistent with embodiments of the present disclosure.

[0012] Fig. 5A-B are diagrams illustrating example circuits for charged particle counting detection, consistent with embodiments of the present disclosure.

[0013] Fig. 6A-B are diagrams illustrating example circuits for charged particle counting detection, consistent with embodiments of the present disclosure.

[0014] Fig. 7 is a flowchart illustrating a method that may be useful for charged particle beam measurement, consistent with embodiments of the disclosure.DETAILED DESCRIPTION

[0015] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The implementations set forth in the following description of exemplaryembodiments do not represent all implementations consistent with the disclosure. Instead, they are merely examples of apparatuses and methods consistent with aspects related to the subject matter recited in the appended claims. For example, although some embodiments are described in the context of utilizing charged-particle beams (e.g., electron beams), the disclosure is not so limited. Other types of charged particle beams may be similarly applied. Furthermore, other imaging systems may be used, such as optical imaging, photodetection, x-ray detection, or the like.

[0016] Electronic devices are constructed of circuits formed on a piece of semiconductor material called a substrate. The semiconductor material may include, for example, silicon, gallium arsenide, indium phosphide, or silicon germanium, or the like. Many circuits may be formed together on the same piece of silicon and are called integrated circuits or ICs. The size of these circuits has decreased dramatically so that many more of them can be fit on the substrate. For example, an IC chip in a smartphone can be as small as a thumbnail and yet may include over 2 billion transistors, the size of each transistor being less than l / 1000th the size of a human hair.

[0017] Making these ICs with extremely small structures or components is a complex, time- consuming, and expensive process, often involving hundreds of individual steps. Errors in even one step have the potential to result in defects in the finished IC, rendering it useless. Thus, one goal of the manufacturing process is to avoid such defects to maximize the number of functional ICs made in the process; that is, to improve the overall yield of the process.

[0018] One component of improving yield is monitoring the chip-making process to ensure that it is producing a sufficient number of functional integrated circuits. One way to monitor the process is to inspect the chip circuit structures at various stages of their formation. Inspection can be carried out using a scanning charged-particle microscope (“SCPM”). For example, an SCPM may be a scanning electron microscope (SEM). A SCPM can be used to image these extremely small structures, in effect, taking a “picture” of the structures of the wafer. The image can be used to determine if the structure was formed properly in the proper location. If the structure is defective, then the process can be adjusted, so the defect is less likely to recur.

[0019] The working principle of a SEM is similar to a camera. A camera takes a picture by receiving and recording intensity of light reflected or emitted from people or objects. A SEM takes a “picture” by receiving and recording energies or quantities of electrons reflected or emitted from the structures of the wafer. Before taking such a “picture,” an electron beam may be projected onto the structures, and when the electrons are reflected or emitted (“exiting”) from the structures (e.g., from the wafer surface, from the structures underneath the wafer surface, or both), a detector of the SEM may receive and record the energies or quantities of those electrons to generate an inspection image. To take such a “picture,” the electron beam may scan through the wafer (e.g., in a line-by-line or zigzag manner), and the detector may receive exiting electrons coming from a region under electronbeam projection (referred to as a “beam spot”). The detector may receive and record exiting electrons from each beam spot one at a time and join the information recorded for all the beam spots to generatethe inspection image. Some SEMs use a single electron beam (referred to as a “single-beam SEM”) to take a single “picture” to generate the inspection image, while some SEMs use multiple electron beams (referred to as a “multi-beam SEM”) to take multiple “sub-pictures” of the wafer in parallel and stitch them together to generate the inspection image. By using multiple electron beams, the SEM may provide more electron beams onto the structures for obtaining these multiple “sub-pictures,” resulting in more electrons exiting from the structures. Accordingly, the detector may receive more exiting electrons simultaneously and generate inspection images of the structures of the wafer with higher efficiency and faster speed.

[0020] Electrons exiting an object, such as a wafer, and then received by the detector of the SEM may cause the detector to generate electrical signals (e.g., current signals or voltage signals) commensurate to the energy of the exiting electrons and the intensity of the electron beam. For example, the amplitudes of the electrical signals may be commensurate to the charge or energy of the received exiting electrons. The detector may output the electrical signals to an image processor, and the image processor may process the electrical signals to form the image of structures of the wafer. A multi-beam SEM system uses multiple electron beams for inspection, and a detector of the multibeam SEM system may have multiple sections to receive them. Each section may have multiple sensing elements and may be used to form a “picture” of a sub-region of the wafer. The “picture” generated based on signals from each section of the detector may be merged to form a complete picture of the inspected wafer.

[0021] Many conventional readout circuit designs for electron counting detectors rely on a wide- bandwidth analog front end. This kind of readout circuit architecture suffers from a tradeoff between characteristics such as power consumption, response speed, dead time, and consecutive electron incoming events handling capability. For instance, using conventional analog front end designs, it is difficult to simultaneously achieve low power consumption with high response speed and low dead time. This makes it difficult to accurately and separately process a large number of consecutive electron arrival events at the detector. In addition, such architectures may require a separate time stamp generator to attach a time stamp to each of individual electron event. Because the performance of such readout circuits is limited by the performance of the analog front end, the circuit designs may not be able to unlock the full performance potential of the small device sizes currently available in advanced process nodes. Devices using these advanced process nodes may be improved by operating in the on-off mode of digital circuits rather than the linear operational modes of analog circuits.

[0022] Embodiments of the present disclosure provide an improved readout design for charged particle detectors. The readout design may detect a charged particle arrival event (such as an electron arrival event) based on a phase difference between two ring oscillators. Each ring oscillator may comprise a series of digital delay elements arranged in a loop. The first ring oscillator may comprise an input that is coupled to a reference signal and may be configured to output a reference frequency. Therefore the first ring oscillator may be referred to as a reference oscillator. The second ringoscillator may comprise an input coupled to the reference signal and may be further configured to receive a plurality of charges from a charged particle detection surface. The second ring oscillator may be referred to as a detection oscillator.

[0023] When a charged particle is incident on the detection surface, a plurality of charges is output from the detection surface and injected into the second ring oscillator, altering the charge in certain circuit elements, such as a well or a diffusion, and as a result, changing the bias voltage from that of corresponding elements in the first ring oscillator. Because the operational speed of a logic gate depends in part on its bias voltage, the delay time at each delay element in the detection oscillator may change in response to an electron arrival event. The altered delay time causes a change in the output frequency of the detection oscillator. Therefore, the first and second ring oscillators may output a same frequency in the absence of a charged particle arrival event, and output a different frequency in the presence of a charged particle arrival event. A phase comparator may be coupled to the first and second ring oscillators to detect this frequency difference and determine whether a charged particle arrival event has occurred.

[0024] Objects and advantages of the disclosure may be realized by the elements and combinations as set forth in the embodiments discussed herein. However, embodiments of the present disclosure are not necessarily required to achieve such exemplary objects or advantages, and some embodiments may not achieve any of the stated objects or advantages.

[0025] Without limiting the scope of the present disclosure, some embodiments may be described in the context of providing detection systems and detection methods in systems utilizing electron beams (“e-beams”). However, the disclosure is not so limited. Other types of charged particle beams may be similarly applied. Furthermore, systems and methods for detection may be used in other imaging systems, such as optical imaging, photon detection, x-ray detection, ion detection, or the like.

[0026] As used herein, unless specifically stated otherwise, the term “or” encompasses all possible combinations, except where infeasible. For example, if it is stated that a component may include A or B, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or A and B. As a second example, if it is stated that a component may include A, B, or C, then, unless specifically stated otherwise or infeasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0027] Relative dimensions of components in drawings may be exaggerated for clarity. Within the following description of drawings, the same or like reference numbers refer to the same or like components or entities, and only the differences with respect to the individual embodiments are described.

[0028] Fig. 1 illustrates an exemplary electron beam inspection (EBI) system 100 consistent with embodiments of the present disclosure. EBI system 100 may be used for imaging. As shown in Fig. 1, EBI system 100 includes a main chamber 101, a load / lock chamber 102, a beam tool 104, and an equipment front end module (EFEM) 106. Beam tool 104 is located within main chamber 101. EFEM106 includes a first loading port 106a and a second loading port 106b. EFEM 106 may include additional loading port(s). First loading port 106a and second loading port 106b receive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (wafers and samples may be used interchangeably). A “lot” is a plurality of wafers that may be loaded for processing as a batch.

[0029] One or more robotic arms (not shown) in EFEM 106 may transport the wafers to load / lock chamber 102. Load / lock chamber 102 is connected to a load / lock vacuum pump system (not shown) which removes gas molecules in load / lock chamber 102 to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from load / lock chamber 102 to main chamber 101. Main chamber 101 is connected to a main chamber vacuum pump system (not shown) which removes gas molecules in main chamber 101 to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by beam tool 104. Beam tool 104 may be a single-beam system or a multi-beam system.

[0030] A controller 109 is electronically connected to beam tool 104. Controller 109 may be a computer configured to execute various controls of EBI system 100. While controller 109 is shown in Fig. 1 as being outside of the structure that includes main chamber 101, load / lock chamber 102, and EFEM 106, it is appreciated that controller 109 may be a part of the structure.

[0031] In some embodiments, controller 109 may include one or more processors (not shown). A processor may be a generic or specific electronic device capable of manipulating or processing information. For example, the processor may include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), an optical processor, a programmable logic controllers, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a Programmable Logic Array (PLA), a Programmable Array Logic (PAL), a Generic Array Logic (GAL), a Complex Programmable Logic Device (CPLD), a Field- Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), and any type circuit capable of data processing. The processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network.

[0032] In some embodiments, controller 109 may further include one or more memories (not shown). A memory may be a generic or specific electronic device capable of storing codes and data accessible by the processor (e.g., via a bus). For example, the memory may include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or any type of storage device. The codes and data may include an operating system (OS) and one or more application programs (or “apps”) for specific tasks. Thememory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network.

[0033] Fig. 2 illustrates a schematic diagram of an exemplary multi-beam beam tool 104 (also referred to herein as apparatus 104) and an image processing system 290 that may be configured for use in EBI system 100 (Fig. 1), consistent with embodiments of the present disclosure.

[0034] Beam tool 104 comprises a charged-particle source 202, a gun aperture 204, a condenser lens 206, a primary charged-particle beam 210 emitted from charged-particle source 202, a source conversion unit 212, a plurality of beamlets 214, 216, and 218 of primary charged-particle beam 210, a primary projection optical system 220, a motorized wafer stage 280, a wafer holder 282, multiple secondary charged-particle beams 236, 238, and 240, a secondary optical system 242, and a charged- particle detection device 244. Primary projection optical system 220 can comprise a beam separator 222, a deflection scanning unit 226, and an objective lens 228. Charged-particle detection device 244 can comprise detection sub-regions 246, 248, and 250.

[0035] Charged-particle source 202, gun aperture 204, condenser lens 206, source conversion unit 212, beam separator 222, deflection scanning unit 226, and objective lens 228 can be aligned with a primary optical axis 260 of apparatus 104. Secondary optical system 242 and charged-particle detection device 244 can be aligned with a secondary optical axis 252 of apparatus 104.

[0036] Charged-particle source 202 can emit one or more charged particles, such as electrons, protons, ions, muons, or any other particle carrying electric charges. In some embodiments, charged- particle source 202 may be an electron source. For example, charged-particle source 202 may include a cathode, an extractor, or an anode, wherein primary electrons can be emitted from the cathode and extracted or accelerated to form primary charged-particle beam 210 (in this case, a primary electron beam) with a crossover (virtual or real) 208. For ease of explanation without causing ambiguity, electrons are used as examples in some of the descriptions herein. However, it should be noted that any charged particle may be used in any embodiment of this disclosure, not limited to electrons. Primary charged-particle beam 210 can be visualized as being emitted from crossover 208. Gun aperture 204 can block off peripheral charged particles of primary charged-particle beam 210 to reduce Coulomb effect. The Coulomb effect may cause an increase in size of probe spots.

[0037] Source conversion unit 212 can comprise an array of image-forming elements and an array of beam-limit apertures. The array of image-forming elements can comprise an array of microdeflectors or micro-lenses. The array of image-forming elements can form a plurality of parallel images (virtual or real) of crossover 208 with a plurality of beamlets 214, 216, and 218 of primary charged-particle beam 210. The array of beam-limit apertures can limit the plurality of beamlets 214, 216, and 218. While three beamlets 214, 216, and 218 are shown in Fig. 2, embodiments of the present disclosure are not so limited. For example, in some embodiments, the apparatus 104 may be configured to generate a first number of beamlets. In some embodiments, the first number of beamletsmay be in a range from 1 to 1000. In some embodiments, the first number of beamlets may be in a range from 200-500. In an exemplary embodiment, an apparatus 104 may generate 400 beamlets.

[0038] Condenser lens 206 can focus primary charged-particle beam 210. The electric currents of beamlets 214, 216, and 218 downstream of source conversion unit 212 can be varied by adjusting the focusing power of condenser lens 206 or by changing the radial sizes of the corresponding beam-limit apertures within the array of beam-limit apertures. Objective lens 228 can focus beamlets 214, 216, and 218 onto a wafer 230 for imaging, and can form a plurality of probe spots 270, 272, and 274 on a surface of wafer 230.

[0039] Beam separator 222 can be a beam separator of Wien filter type generating an electrostatic dipole field and a magnetic dipole field. In some embodiments, if they are applied, the force exerted by the electrostatic dipole field on a charged particle (e.g., an electron) of beamlets 214, 216, and 218 can be substantially equal in magnitude and opposite in a direction to the force exerted on the charged particle by magnetic dipole field. Beamlets 214, 216, and 218 can, therefore, pass straight through beam separator 222 with zero deflection angle. However, the total dispersion of beamlets 214, 216, and 218 generated by beam separator 222 can also be non-zero. Beam separator 222 can separate secondary charged-particle beams 236, 238, and 240 from beamlets 214, 216, and 218 and direct secondary charged-particle beams 236, 238, and 240 towards secondary optical system 242.

[0040] Deflection scanning unit 226 can deflect beamlets 214, 216, and 218 to scan probe spots 270, 272, and 274 over a surface area of wafer 230. In response to the incidence of beamlets 214, 216, and 218 at probe spots 270, 272, and 274, secondary charged-particle beams 236, 238, and 240 may be emitted from wafer 230. Secondary charged-particle beams 236, 238, and 240 may comprise charged particles (e.g., electrons) with a distribution of energies. For example, secondary charged-particle beams 236, 238, and 240 may be secondary electron beams including secondary electrons (energies < 50 eV) and backscattered electrons (energies between 50 eV and landing energies of beamlets 214, 216, and 218). Secondary optical system 242 can focus secondary charged-particle beams 236, 238, and 240 onto detection sub-regions 246, 248, and 250 of charged-particle detection device 244. Detection sub-regions 246, 248, and 250 may be configured to detect corresponding secondary charged-particle beams 236, 238, and 240 and generate corresponding signals (e.g., voltage, current, or the like) used to reconstruct an SCPM image of structures on or underneath the surface area of wafer 230.

[0041] The generated signals may represent intensities of secondary charged-particle beams 236, 238, and 240 and may be provided to image processing system 290 that is in communication with charged-particle detection device 244, primary projection optical system 220, and motorized wafer stage 280. The movement speed of motorized wafer stage 280 may be synchronized and coordinated with the beam deflections controlled by deflection scanning unit 226, such that the movement of the scan probe spots (e.g., scan probe spots 270, 272, and 274) may orderly cover regions of interests on the wafer 230. The parameters of such synchronization and coordination may be adjusted to adapt todifferent materials of wafer 230. For example, different materials of wafer 230 may have different resistance-capacitance characteristics that may cause different signal sensitivities to the movement of the scan probe spots.

[0042] The intensity of secondary charged-particle beams 236, 238, and 240 may vary according to the external or internal structure of wafer 230, and thus may indicate whether wafer 230 includes defects. Moreover, as discussed above, beamlets 214, 216, and 218 may be projected onto different locations of the top surface of wafer 230, or different sides of local structures of wafer 230, to generate secondary charged-particle beams 236, 238, and 240 that may have different intensities. Therefore, by mapping the intensity of secondary charged-particle beams 236, 238, and 240 with the areas of wafer 230, image processing system 290 may reconstruct an image that reflects the characteristics of internal or external structures of wafer 230.

[0043] In some embodiments, image processing system 290 may include an image acquirer 292, a storage 294, and a controller 296. Image acquirer 292 may comprise one or more processors. For example, image acquirer 292 may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, or the like, or a combination thereof. Image acquirer 292 may be communicatively coupled to charged-particle detection device 244 of beam tool 104 through a medium such as an electric conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, or a combination thereof. In some embodiments, image acquirer 292 may receive a signal from charged-particle detection device 244 and may construct an image. Image acquirer 292 may thus acquire SCPM images of wafer 230. Image acquirer 292 may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, or the like. Image acquirer 292 may be configured to perform adjustments of brightness and contrast of acquired images. In some embodiments, storage 294 may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer-readable memory, or the like. Storage 294 may be coupled with image acquirer 292 and may be used for saving scanned raw image data as original images, and postprocessed images. Image acquirer 292 and storage 294 may be connected to controller 296. In some embodiments, image acquirer 292, storage 294, and controller 296 may be integrated together as one control unit.

[0044] In some embodiments, image acquirer 292 may acquire one or more SCPM images of a wafer based on an imaging signal received from charged-particle detection device 244. An imaging signal may correspond to a scanning operation for conducting charged particle imaging. An acquired image may be a single image comprising a plurality of imaging areas. The single image may be stored in storage 294. The single image may be an original image that may be divided into a plurality of regions. Each of the regions may comprise one imaging area containing a feature of wafer 230. The acquired images may comprise multiple images of a single imaging area of wafer 230 sampled multiple times over a time sequence. The multiple images may be stored in storage 294. In someembodiments, image processing system 290 may be configured to perform image processing steps with the multiple images of the same location of wafer 230.

[0045] In some embodiments, image processing system 290 may include measurement circuits (e.g., analog-to-digital converters) to obtain a distribution of the detected secondary charged particles (e.g., secondary electrons). The charged-particle distribution data collected during a detection time window, in combination with corresponding scan path data of beamlets 214, 216, and 218 incident on the wafer surface, can be used to reconstruct images of the wafer structures under inspection. The reconstructed images can be used to reveal various features of the internal or external structures of wafer 230, and thereby can be used to reveal any defects that may exist in the wafer.

[0046] In some embodiments, the charged particles may be electrons. When electrons of primary charged-particle beam 210 are projected onto a surface of wafer 230 (e.g., probe spots 270, 272, and 274), the electrons of primary charged-particle beam 210 may penetrate the surface of wafer 230 for a certain depth, interacting with particles of wafer 230. Some electrons of primary charged-particle beam 210 may elastically interact with (e.g., in the form of elastic scattering or collision) the materials of wafer 230 and may be reflected or recoiled out of the surface of wafer 230. An elastic interaction conserves the total kinetic energies of the bodies (e.g., electrons of primary charged-particle beam 210) of the interaction, in which the kinetic energy of the interacting bodies does not convert to other forms of energy (e.g., heat, electromagnetic energy, or the like). Such reflected electrons generated from elastic interaction may be referred to as backscattered electrons (BSEs). Some electrons of primary charged-particle beam 210 may inelastically interact with (e.g., in the form of inelastic scattering or collision) the materials of wafer 230. An inelastic interaction does not conserve the total kinetic energies of the bodies of the interaction, in which some or all of the kinetic energy of the interacting bodies convert to other forms of energy. For example, through the inelastic interaction, the kinetic energy of some electrons of primary charged-particle beam 210 may cause electron excitation and transition of atoms of the materials. Such inelastic interaction may also generate electrons exiting the surface of wafer 230, which may be referred to as secondary electrons (SEs). Yield or emission rates of BSEs and SEs depend on, e.g., the material under inspection and the landing energy of the electrons of primary charged-particle beam 210 landing on the surface of the material, among others. The energy of the electrons of primary charged-particle beam 210 may be imparted in part by its acceleration voltage (e.g., the acceleration voltage between the anode and cathode of charged-particle source 202 in Fig. 2). The quantity of BSEs and SEs may be more or fewer (or even the same) than the injected electrons of primary charged-particle beam 210.

[0047] The images generated by SEM may be used for defect inspection. For example, a generated image capturing a test device region of a wafer may be compared with a reference image capturing the same test device region. The reference image may be predetermined (e.g., by simulation) and include no known defect. If a difference between the generated image and the reference image exceeds a tolerance level, a potential defect may be identified. For another example, the SEM may scan multipleregions of the wafer, each region including a test device region designed as the same, and generate multiple images capturing those test device regions as manufactured. The multiple images may be compared with each other. If a difference between the multiple images exceeds a tolerance level, a potential defect may be identified.

[0048] For ease of explanation without causing ambiguity, electrons are used as examples in some of the descriptions herein. However, it should be noted that any charged particle may be used in any embodiment of this disclosure, not limited to electrons. For instance, a source in a charged-particle beam tool can emit one or more charged particles, such as electrons, protons, ions, muons, or any other particle carrying electric charges. Furthermore, some embodiments of the present disclosure may use photons instead of charged particles, such as light in the visible, UV, DUV, EUV, x-ray, or any other wavelength range. For example, in a photon embodiment, a secondary beam spot may refer to reflected, refracted, diffracted, or scattered light from a sample upon which a primary light beam is incident. Therefore, while detectors in the present disclosure may be disclosed with respect to electron detection, some embodiments of the present disclosure may be directed to detecting other charged particles or photons.

[0049] Fig. 3 illustrates an example circuit 300 for charged particle counting in a comparative embodiment. Circuit 300 may be one of a plurality of circuits, each of which is provided for a corresponding sensing element in an array detector. Circuit 300 may be configured to process signals generated from a sensing element 311. Sensing element 311 may be configured to generate a response to a charged particle event. A charged particle event may include an electron arrival event. For example, in response to the arrival of an incoming electron at sensing element 311, sensing element 311 may be configured to generate charges or current due to the energy of the incoming electron. Sensing element 311 may comprise, e.g., a PIN diode. The charges or current may be generated within the sensing element and may be fed to circuitry connected to the sensing element. In some cases, the circuitry may be integrated with the sensing element.

[0050] As shown in Fig. 3, circuit 300 may include an input stage 310, a threshold detector 312, a storage cell multiplexer 313, an array 320 of storage cells, a converter 314, and a control unit 315. Array 320 may include a plurality of storage cells including a first storage cell 321, a second storage cell 322, and so on, up to, for example, an Nth storage cell 349. Storage cells 321 through 349 may include charge storage cells.

[0051] Input stage 310 may be configured to extract substantially all charges from sensing element 311 after they are generated. Threshold detector 312 may be configured to detect a signal level of incoming current from sensing element 311 and determine that a charged particle arrival event has occurred. Threshold detector 312 may be configured to detect a start or a stop of a charged particle arrival event and trigger the recording of information from sensing element 311.

[0052] Circuit 300 may further include a storage cell multiplexer 313 configured to selectively connect the output of input stage 310 to a plurality of storage cells 321-323 of storage cell array 320.Each storage cell may be configured to integrate a signal from the output of input stage 310. Integration may refer to a process of obtaining an accumulated value of charge or current over time (e.g., area under a curve). Integration may begin when threshold detector 312 indicates that an arrival event has started and end when threshold detector 312 indicates that the arrival event is over. The outputs of individual storage cells may be connected to converter 314, such as an analog-to-digital converter (ADC), for example.

[0053] Circuit 300 may be configured to interrogate the storage cells of array 320 after integration in a storage cell is complete. Interrogation may refer to obtaining information from a storage cell, such as a voltage value for determining, e.g., an energy level of an electron arrival event. Integration and interrogation may be ongoing when a detector is in operation. Integration results stored in storage cells may be interrogated and counting results may be sent to control unit 315. Such operations may occur at the individual sensing element level. Thus, for all sensing elements of a detector, separate integration and interrogation processes may be performed. Data may be processed and sent to an upper level control unit of the detector. An upper level control unit may be configured to determine electron counts based on data from lower level control units (e.g., control unit 315 at the sensing element level of a detector).

[0054] Control unit 315 may be configured to perform various functions associated with circuit 300. For example, control unit 315 may be configured to: (i) control the operation of sensing element level circuitry, (ii) generate data based on the detection results of electron arrival events, (iii) communicate with a higher level control unit (not shown), and (iv) communicate with neighboring control units in neighboring sensing element level circuits that are similar or identical to, e.g., circuit 300.

[0055] Further discussion of electron counting circuitry may be found in International Application No. PCT / EP2021 / 068676, which is incorporated herein by reference in its entirety.

[0056] Analog pipeline and storage cell array architecture of Fig. 3 may be complex and costly to manufacture. Increased complexity introduces an increased risk of malfunction. In addition to the cost and risks of malfunction, the architecture may have an undesirably higher power consumption within each sensing element level readout circuit. In low beam current applications where the architecture of Fig. 3 may be used, the analog pipeline architecture may suffer from a poor SNR due to the weakness of the detection signal and the noise introduced in the analog readout circuit. For example, in some applications the signal from a PIN diode electron detector may contain the charge of only about, e.g., 1000 electrons in response to a typical electron arrival event. Further, circuit 300 may require a wide bandwidth architecture coupled with threshold comparators capable of detecting single or multiple thresholds. This may suffer from lower response speeds and longer dead times, making it difficult to accurately detect individual events in higher beam current applications. Additionally, circuit 300 may only be usable in these very low beam current applications, and may not be capable of handling the higher beam currents of conventional inspection operations. Additionally, as discussed above, the overall performance of circuit 300 may be limited by its analog architecture. Therefore, it may bedesirable to provide a digital detection architecture capable of lower power consumption, faster response times, and lower dead times, to achieve rapid detection and time-stamping of individual electron arrival events in order to eliminate the tradeoffs found in analog pipeline architecture, and increase detection sensitivity and accuracy even at higher beam currents.

[0057] Figs. 4A-D schematically illustrate portions of an example circuit 400 for charged particle counting detection, consistent with embodiments of the present disclosure. Circuit 400 may comprise a first ring oscillator 430 and a second ring oscillator 440. The first and second ring oscillators may be coupled to a reference signal generator 453 and a phase comparator 450. Second ring oscillator may further be coupled to the output of a sensing element 411. Sensing element may be similar to, e.g., sensing element 311 of Fig. 3. For example, in some embodiments, sensing element 411 may comprise a PIN diode or other element configured to release a plurality of charges in response to an electron arrival event.

[0058] First ring oscillator 430 may comprise first plurality of digital delay elements (reference delay elements) 431 arranged in a ring such that an output of the final reference delay element 431 (at right in Fig. 4A) is connected to an input of the initial reference delay element 431 (at left in in Fig. 4A). Each reference delay element 431 may comprise, e.g., an identical construction and be configured to generate an output signal with a predetermined time delay based on an input signal. For example, reference delay elements 431 may comprise, e.g., digital delay elements such as a buffer amplifiers, inverters, multiplexers (MUXs) or another circuit element configured to produce a predictable time delay between an input and output signal. First ring oscillator 430 may receive an input reference signal from reference signal generator 453. The input reference signal may be input to the initial reference delay element 431 and output with a first time delay < i. The output from initial reference delay element 431 may then be transmitted to a next reference delay element. At the same time, the output may also be transmitted to phase comparator 450 via reference signal bus 451. The next reference delay element may output the signal with a second time delay <pz equal to the first time delay for a total delay of 2 x < i. This process may repeat up to a final reference delay element 431, at which point the cycle may repeat at the initial reference delay element 431. A cumulative reference signal may thus be output to phase comparator 450 having an oscillation frequency that depends on the time delays cp introduced by reference delay elements 431. First ring oscillator 430 may thus output a reference oscillation signal and may be referred to as a reference ring oscillator.

[0059] Like first ring oscillator 430, second ring oscillator 440 may comprise a second plurality of digital delay elements (detection delay elements) 441 arranged in a ring. In general, second ring oscillator 440 may operate in a similar manner to first ring oscillator 440. In some embodiments, first ring oscillator 430 and second ring oscillator 440 may comprise identical constructions. For example, in some embodiments as discussed below, first ring oscillator 430 and second ring oscillator 440 may each comprise a multiplying delay-locked loop (MDLL) configuration. However, unlike first ring oscillator 430, second ring oscillator 440 may be coupled to the output of sensing element 411 as wellas to reference signal generator 453. For example, as illustrated in Fig. 4B, sensing element 411 may be coupled to the N-well 443 of a PMOS or other P-transistor 442 in second ring oscillator 440. In some embodiments, N-well 443 may comprise a floating N-well. For instance, N-well 443 may be isolated from active power supply. In some embodiments, well 443 may comprise a P-well.P-transistor 442 may form a part of a delay element 441, such as initial delay element 441 of Fig. 4A. Meanwhile a corresponding N-well 433 in a corresponding P-transistor 432 of first ring oscillator 430 may have no such connection. As a result, when an electron arrival event occurs at sensing element 411, a plurality of charges may be injected to the N-well 443, thereby shifting the bias voltage at P-transistor 442. This shift in bias voltage may in turn change the operational speed of delay elements 441, resulting in time delays <paof detection delay elements 441 that are different from the corresponding time delays <p of reference delay elements 431. A detection signal may thus be output via detection signal bus 452 to phase comparator 450 having an oscillation frequency that depends on the time delays cpaintroduced by the detection delay elements 441. Second ring oscillator 440 may thus output a detection oscillation signal and may be referred to as a detection ring oscillator.

[0060] Phase comparator 450 may monitor the frequency / phase difference between the reference oscillation signal and the detection oscillation signal to determine when an electron arrival event has occurred. For example, in some embodiments phase comparator 450 may comprise a strong arm comparator. A strong arm comparator design may be useful in view of, e.g., low power consumption and high sensitivity. When a phase or frequency difference exceeds a predetermined threshold, phase comparator 450 may output a detection signal indicating that an electron arrival event has occurred at sensor 411. In some embodiments, phase comparator may be coupled to a signal readout 490. Signal readout 490 may be configured to output an event signal indicating that the charged particle arrival event was detected based on the comparison at phase comparator 450.

[0061] In some embodiments, the magnitude of a detected frequency or phase difference may be used to determine an energy level of the electron arrival event. For example, the amount of injected charges released from sensing element 411 is generally proportional to the kinetic energy of the electron arrival event that produced them. The shift in bias voltage (and thus change in delay values) is generally proportional to the amount of injected charges received at the N-well of the detection oscillator 440 from sensing element 411. Therefore magnitude of a measured phase difference can be utilized to implement an energy discrimination functionality in the circuit 400.

[0062] In some embodiments, the duration of a detection event may be tuned by coupling a resistor 409 to the path of injected charges from sensing element 411. Resistor 409 may provide a dissipation path for the integrated charges in, e.g., N-well 443. An appropriate resistance value for a given implementation will allow for accurate and rapid detection. For example, when a resistance value is too low, current may leak directly through resistor 409 without fully integrating at the N-well 443, thus degrading the detection signal. However, where resistance is too large, the charges may take toolong to dissipate out of the N-well, which may extend the detection period beyond a desired range. Thus may be detrimental to quick response or reset times and make it more difficult to detect successive electron arrival events. In some embodiments, a reset circuit may apply a reset signal to the detection oscillator to shorten the reset time. For instance, in some embodiments the reset circuit may be configured to trigger the draining of accumulated charge from N-well 443, or to synchronize the frequencies or phases of first and second ring oscillators 430 and 440.

[0063] In some embodiments, as seen in Fig. 4C, each of first ring oscillator 430 and second ring oscillator 440 may comprise a series of MUX elements 431 or 441 as the reference and detection delay elements. The series of MUX elements 431 and 441 may be configured as, e.g., first and second multiplying delay-locked loop (MDLL)-type ring oscillators. The MDLL configuration may achieve high sensitivity, low power consumption, fast response time, and low jitter in a small area. In some embodiments, each ring oscillator 430 and 440 may be configured to output an individual signal pulse for each cycle, having a total delay value <[>i as a sum of all delays between each MUX element 431. For example, in the illustrated configuration of Fig. 4C, first ring oscillator 430 may comprise seven MUX elements 431, and a signal may be output to phase comparator 450 each time a final MUX element 431 (at the right in Fig. 4C) outputs a signal to inverter 434. The same may be true of second ring oscillator 440, which may output total delay value <f>ia- From inverter 444. Using only a single phase detection per oscillator cycle may simplify clock synchronization and other processing hardware requirements in the system. In some embodiments, more or fewer delay elements may be employed to tune the total delay value <]>r.

[0064] Alternatively, as shown in Fig. 4D, a reference signal bus 451 and detection signal bus 452 may be used to detect a phase difference between each pair of MUX’s 431 / 441 at each stage of the ring oscillators 430 and 440. For example, each ring oscillator 430 and 440 may be configured to output a plurality of signals pulses for each cycle, each signal pulse corresponding to the output of an individual delay element 431 / 441 at an individual stage of the first and second ring oscillators. Phase comparator may measure a difference for each stage (<[>($N - $ON) and determine that an electron arrival event has occurred at a particular stage within the cycle. Under this configuration, the time resolution of detection may be improved at the expense of increased hardware requirements. For example, the timing resolution of detection in the circuit 400 may be smaller than the oscillation cycle of the first or second ring oscillators 430 / 440.

[0065] Figs. 5A-B schematically illustrates portions of an example circuit 500 for charged particle counting detection, consistent with embodiments of the present disclosure. Circuit 500 may comprise an event detector circuit 501 and a timing stamp generator circuit 502. Event detector circuit 501 may comprise: sensing element 511, reference signal generator 553, first ring oscillator 530, second ring oscillator 540 and a phase comparator 550. Event detector circuit 501 may correspond to, e.g., the portions of example circuit 400 discussed above with respect to Figs. 4A-D. For example, a sensingelement 511 may inject charges into a second ring oscillator 540 (such as at an N-well of a P-transistor, not shown) in response to an electron arrival event. Phase comparator 550 may monitor a frequency / phase difference $ -between the outputs of first and second ring oscillators 530 and 540. In some embodiments, as shown in Fig. 5B, circuit 500 may be employed in highly sensitive detection operations in which low energy electron arrival events must be detected. Therefore, a pre-amp stage 554 may be introduced between the first and second ring oscillators 530 / 540 and phase comparator 550 to boost the signal strength of the ring oscillators.

[0066] Timing stamp generator circuit 502 may comprise a timing stamp generator 553 and a serial peripheral interface (SPI) 514. Timing stamp generator may be synchronized to a clock cycle of first and second ring oscillators 530 and 540 as indicated by the arrows in Fig. 5A. When phase comparator detects a difference that exceeds a predetermined threshold, it may output a signal to timing stamp generator 553 to generate a time stamp documenting the electron arrival event. The time stamp generator may output the time stamp via SPI 514 to a control unit 515, which may record the electron arrival events and control the operation of circuit 500. In some embodiments, phase comparator 550 may simultaneously output a reset signal to second ring oscillator, or to both first and second ring oscillators, via a reset circuit 555 to reduce dead time in the detection circuit. In some embodiments, a reset signal may instead be generated at, e.g., time stamp generator 553, SPI 514 or control unit 515.

[0067] The arrangement of Figs. 4A-5B may provide a simplified mechanism for detecting individual electron arrival events with low dead times, low power consumption, at high speed and with high sensitivity. For example, the digital ring oscillators and phase comparator may replace much of the analog front-end architecture seen in Fig. 3. In some embodiments, the dead time of a readout circuit may be further reduced by arranging a plurality of ring oscillator systems for each sensing element, arranged in the form of a signal pipeline.

[0068] Figs. 6A-B schematically illustrate an example architecture for MDLLs 630 and 640, consistent with embodiments of the present disclosure. It should be understood that the architectures illustrated in Figs. 6A-B are merely examples. As is understood by a person having ordinary skill in the art, there are many alternative ways of implementing MDLL or other ring oscillators according to embodiments of the present disclosure.

[0069] Fig. 7 is a flowchart illustrating a method 700 for charged particle detection, consistent with embodiments of the disclosure. Method 700 may be performed by, e.g., a sensing element level circuit in a detector of a charged-particle beam system (such as circuits 400 or 500 of Figs. 4A to 5B). In some embodiments, the sensing element level circuit may include circuitry (e.g., a memory and a processor) programmed to implement method 700. In some embodiments, the method may be implemented by a controller of a charged particle apparatus, such as controller 109 in Fig. 1 or image processing system 290 of Fig. 2.

[0070] At step 701, a sensing element may receive charged particles at its sensing surface. For example, the sensing element may comprise part of a charged particle beam apparatus (such as, e.g., EBI system 100 of Fig. 1 or a beam tool 104 of Fig. 2), and as the charged particles may be emitted charged particles from a sample that has been irradiated with a charged particle beam of the charged particle beam apparatus. The reception of a charged particle may cause a plurality of charges to be released from the sensing element, and may constitute a charged particle arrival event.

[0071] At step 702, the plurality of charges released from the sensing element may be injected into a component of a detection ring oscillator. For example, the detection ring oscillator may comprise a series of digital delay elements, and the component may comprise an N-well or P-well of one of the digital delay elements. For example, in some embodiments, the plurality of digital delay elements may comprise a P-transistor, and the component may comprise an N-well of the P-transistor. In some embodiments the ring oscillator may comprise a multiplying delay-locked loop (MDLL).

[0072] The injected charge may cause a shift in the bias voltage of the detection ring oscillator, which may alter its frequency or phase with respect to a reference ring oscillator. For example, in some embodiments the reference ring oscillator may comprise a construction that is identical to the detection ring oscillator.

[0073] At step 703, the outputs of the detection ring oscillator and the reference ring oscillator may be compared. For example, the outputs of the detection ring oscillator and reference ring oscillator may be coupled to a comparator, such as a strong arm latch type comparator or another comparator.

[0074] At step 704, the comparator may determine that the charged particle arrival event has occurred based on, e.g., a value of a frequency or phase difference between the outputs of the detection and reference ring oscillators. For example, the comparator may be configured to output a positive detection signal when the measured value meets or exceeds a predetermined threshold.

[0075] At step 705, the positive detection signal from the comparator may be output to a time stamp generator. The time stamp generator may generate a time stamp indicating the time of the charged particle arrival event. This time stamp may be used to document and count the charged particle arrival event in the charged particle counting detector. In some embodiments the time stamp generator may be, e.g., synchronized with a clock cycle of the detection and reference ring oscillators.

[0076] In some embodiments, at step 706, a reset signal may be generated to reset the detection ring oscillator, or both the detection and reference ring oscillators. In some embodiments, the reset signal may be the output from the comparator simultaneously with the positive detection signal to quickly reset the detection circuit for a subsequent charged particle arrival event.

[0077] A non-transitory computer-readable medium may be provided that stores instructions for a processor of a controller (e.g., controller 109 in Fig. 1, image processing system 290 of Fig. 2, or controller 515 of Figs. 5A-B) for detecting a charged-particle beam according to the exemplary flowchart of Fig. 7 above, consistent with embodiments in the present disclosure. For example, the instructions stored in the non-transitory computer-readable medium may be executed by the circuitryof the controller for performing method 700 in part or in entirety. Common forms of non- transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid-state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read-Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read-Only Memory (PROM), and Erasable Programmable Read- Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), a cache, a register, any other memory chip or cartridge, and networked versions of the same.Embodiments of the present disclosure may further be described by the following clauses1. A charged particle detector, comprising: a charged particle sensing element; a first ring oscillator; a second ring oscillator; and a comparator, wherein the second ring oscillator is configured to receive a plurality of charges from the charged particle sensing element in response to a charged particle arrival event occurring at the charged particle sensing element; and the comparator is configured to compare a first output of the first ring oscillator with a second output of the second ring oscillator to detect the charged particle arrival event.2. The charged particle detector of clause 1, wherein the charged particle sensing element comprises a PIN diode.3. The charged particle detector of clause 1, further comprising: a reference signal generator, wherein the first ring oscillator and the second ring oscillator are coupled to the reference signal generator.4. The charged particle detector of clause 1, wherein: the second ring oscillator comprises a P-transistor having an N-well, and the second ring oscillator is configured to receive the plurality of charges from the charged particle sensing element at the N-well.5. The charged particle detector of clause 4, wherein: the N-well comprises a floating N-well.6. The charged particle detector of clause 4, wherein: the N-well is configured to have an altered voltage value in response to receiving the plurality of charges, and the second ring oscillator is configured to change an oscillation frequency of the second output based on the altered voltage value.7. The charged particle detector of clause 1, wherein the second output of the second ring oscillator is configured to change with respect to the first output of the first ring oscillator.8. The charged particle detector of clause 1, wherein: the first ring oscillator comprises a first plurality of delay elements arranged in a loop, and the second ring oscillator comprises a second plurality of delay elements arranged in a loop.9. The charged particle detector of clause 8, wherein the first plurality of delay elements and the second plurality of delay elements comprise an equal number of delay elements.10. The charged particle detector of clause 1, wherein the first ring oscillator and the second ring oscillator comprise an identical construction, except in that the first ring oscillator is not configured to receive charges from the charged particle sensing element.11. The charged particle detector of clause 1, wherein the first ring oscillator and the second ring oscillator comprise multiplying delay-locked loops (MDLLs).12. The charged particle detector of clause 1, wherein the first ring oscillator and the second ring oscillator are each configured to output a signal pulse to the comparator with each full oscillation cycle.13. The charged particle detector of clause 1, wherein the first ring oscillator and the second ring oscillator are each configured to output a plurality of signal pulses to the comparator with each full oscillation cycle.14. The charged particle detector of clause 13, wherein a timing resolution of detection in the charged particle detector is smaller than a full oscillation cycle of the second ring oscillator.15. The charged particle detector of clause 1, further comprising: a time stamp generator configured to generate a time stamp based on an output of the comparator.16. The charged particle detector of clause 1, further comprising: a reset circuit configured to reset one of the first ring oscillator or the second ring oscillator.17. The charged particle detector of clause 16, wherein the reset circuit is configured to synchronize an oscillation frequency or phase of the first ring oscillator with the second ring oscillator.18. The charged particle detector of clause 16, wherein the reset circuit is configured to drain the plurality charges from the second ring oscillator.19. The charged particle detector of clause 16, wherein the comparator is configured to output a reset signal to cause the reset circuit to reset the one of the first ring oscillator or the second ring oscillator.20. The charged particle detector of clause 1, further comprising: a resistor configured to dissipate the plurality of charges from the second ring oscillator.21. The charged particle detector of clause 1, further comprising:a signal readout configured to output an event signal indicating that the charged particle arrival event was detected based on the comparison.22. A method of charged particle detection, comprising: receiving a charged particle at a charged particle sensing element as a charged particle arrival event; releasing a plurality of charges from the charged particle sensing in response to the charged particle arrival event; receiving the plurality of charges at a detection ring oscillator; comparing, by a comparator, a detection output signal of the detection ring oscillator with a reference output signal of a reference ring oscillator; and determining that the charged particle arrival event occurred based on the comparison by the comparator.23. A non-transitory computer-readable medium that stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations comprising: receiving a charged particle at a charged particle sensing element as a charged particle arrival event; releasing a plurality of charges from the charged particle sensing in response to the charged particle arrival event; receiving the plurality of charges at a detection ring oscillator; comparing, by a comparator, a detection output signal of the detection ring oscillator with a reference output signal of a reference ring oscillator; and determining that the charged particle arrival event occurred based on the comparison by the comparator.24. The non-transitory computer-readable medium of clause 23, wherein the charged particle sensing element comprises a PIN diode.25. The non-transitory computer-readable medium of clause 23, wherein the set of instructions that is executable by the at least one processor cause the apparatus to further perform operations comprising: inputting a reference signal by a reference signal generator to the reference ring oscillator and the detection ring oscillator.26. The non-transitory computer-readable medium of clause 23, wherein: the detection ring oscillator comprises a P-transistor having an N-well, and the detection ring oscillator is configured to receive the plurality of charges from the charged particle sensing element at the N-well.27. The non-transitory computer-readable medium of clause 26, wherein: the N-well comprises a floating N-well.28. The non-transitory computer-readable medium of clause 26, wherein:the N-well is configured to have an altered voltage value in response to receiving the plurality of charges, and the detection ring oscillator is configured to change an oscillation frequency of the detection output signal based on the altered voltage value.29. The non-transitory computer-readable medium of clause 23, wherein the detection output signal of the detection ring oscillator is configured to change with respect to the reference output signal of the reference ring oscillator.30. The non-transitory computer-readable medium of clause 23, wherein: the reference ring oscillator comprises a first plurality of delay elements arranged in a loop, and the detection ring oscillator comprises a second plurality of delay elements arranged in a loop.31. The non-transitory computer-readable medium of clause 30, wherein the first plurality of delay elements and the second plurality of delay elements comprise an equal number of delay elements.32. The non-transitory computer-readable medium of clause 23, wherein the reference ring oscillator and the detection ring oscillator comprise an identical construction, except in that the detection ring oscillator is not configured to receive charges from the charged particle sensing element.33. The non-transitory computer-readable medium of clause 23, wherein the reference ring oscillator and the detection ring oscillator comprise multiplying delay-locked loops (MDLLs).34. The non-transitory computer-readable medium of clause 23, wherein the reference ring oscillator and the detection ring oscillator are each configured to output a signal pulse to the comparator with each full oscillation cycle.35. The non-transitory computer-readable medium of clause 23, wherein the set of instructions that is executable by the at least one processor cause the apparatus to further perform operations comprising: outputting a plurality of signal pulses from the reference ring oscillator and the detection ring oscillator to the comparator with each full oscillation cycle.36. The non-transitory computer-readable medium of clause 23, wherein the set of instructions that is executable by the at least one processor cause the apparatus to further perform operations comprising: determining that the charged particle arrival event occurred based on the comparison by the comparator at a timing resolution that is smaller than a full oscillation cycle of the detection ring oscillator.37. The non-transitory computer-readable medium of clause 23, wherein the set of instructions that is executable by the at least one processor cause the apparatus to further perform operations comprising:generating a time stamp by a time stamp generator based on an output of the comparator.38. The non-transitory computer-readable medium of clause 23, wherein the set of instructions that is executable by the at least one processor cause the apparatus to further perform operations comprising: resetting one of the reference ring oscillator or the detection ring oscillator by a reset circuit.39. The non-transitory computer-readable medium of clause 38, wherein the set of instructions that is executable by the at least one processor cause the apparatus to further perform operations comprising: synchronizing an oscillation frequency or phase of the reference ring oscillator with the detection ring oscillator by the reset circuit.40. The non-transitory computer-readable medium of clause 38, wherein the reset circuit is configured to drain the plurality charges from the detection ring oscillator.41. The non-transitory computer-readable medium of clause 38, wherein the set of instructions that is executable by the at least one processor cause the apparatus to further perform operations comprising: outputting a reset signal from the comparator to cause the reset circuit to reset the one of the reference ring oscillator or the detection ring oscillator.42. The non-transitory computer-readable medium of clause 23, further comprising: a resistor configured to dissipate the plurality of charges from the detection ring oscillator.43. The non-transitory computer-readable medium of clause 23, wherein the set of instructions that is executable by the at least one processor cause the apparatus to further perform operations comprising: outputting an event signal from a signal readout indicating that the charged particle arrival event was detected based on the comparison.

[0078] It will be appreciated that the embodiments of the present disclosure are not limited to the exact construction that has been described above and illustrated in the accompanying drawings and that various modifications and changes may be made without departing from the scope thereof. The present disclosure has been described in connection with various embodiments, other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.

Claims

CLAIMS1. A charged particle detector, comprising: a charged particle sensing element; a first ring oscillator; a second ring oscillator; and a comparator, wherein the second ring oscillator is configured to receive a plurality of charges from the charged particle sensing element in response to a charged particle arrival event occurring at the charged particle sensing element; and the comparator is configured to compare a first output of the first ring oscillator with a second output of the second ring oscillator to detect the charged particle arrival event.

2. The charged particle detector of claim 1, wherein the charged particle sensing element comprises a PIN diode.

3. The charged particle detector of claim 1, further comprising: a reference signal generator, wherein the first ring oscillator and the second ring oscillator are coupled to the reference signal generator.

4. The charged particle detector of claim 1, wherein: the second ring oscillator comprises a P-transistor having an N-well, and the second ring oscillator is configured to receive the plurality of charges from the charged particle sensing element at the N-well.

5. The charged particle detector of claim 4, wherein: the N-well is configured to have an altered voltage value in response to receiving the plurality of charges, and the second ring oscillator is configured to change an oscillation frequency of the second output based on the altered voltage value.

6. The charged particle detector of claim 1, wherein the second output of the second ring oscillator is configured to change with respect to the first output of the first ring oscillator.

7. The charged particle detector of claim 1, wherein: the first ring oscillator comprises a first plurality of delay elements arranged in a loop, and the second ring oscillator comprises a second plurality of delay elements arranged in a loop.

8. The charged particle detector of claim 1, wherein the first ring oscillator and the second ring oscillator comprise multiplying delay-locked loops (MDLLs).

9. The charged particle detector of claim 1, wherein the first ring oscillator and the second ring oscillator are each configured to output a signal pulse to the comparator with each full oscillation cycle.

10. The charged particle detector of claim 1, wherein the first ring oscillator and the second ring oscillator are each configured to output a plurality of signal pulses to the comparator with each full oscillation cycle.

11. The charged particle detector of claim 1 , further comprising: a time stamp generator configured to generate a time stamp based on an output of the comparator.

12. The charged particle detector of claim 1, further comprising: a reset circuit configured to reset one of the first ring oscillator or the second ring oscillator.

13. The charged particle detector of claim 1, further comprising: a resistor configured to dissipate the plurality of charges from the second ring oscillator.

14. The charged particle detector of claim 1, further comprising: a signal readout configured to output an event signal indicating that the charged particle arrival event was detected based on the comparison.

15. A non-transitory computer-readable medium that stores a set of instructions that is executable by at least one processor of an apparatus to cause the apparatus to perform operations comprising: receiving a charged particle at a charged particle sensing element as a charged particle arrival event; releasing a plurality of charges from the charged particle sensing in response to the charged particle arrival event; receiving the plurality of charges at a detection ring oscillator;comparing, by a comparator, a detection output signal of the detection ring oscillator with a reference output signal of a reference ring oscillator; and determining that the charged particle arrival event occurred based on the comparison by the comparator.

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