Magnetic sensor device

Abstract

A magnetic sensor device (1) comprises: an energizing circuit (3) that periodically excites a magnetic detection element (2); and a plurality of sample-and-hold circuits (41) that are electrically connected in parallel to the magnetic detection element (2). A peak detection clock signal generation unit: outputs a peak detection clock signal to each of the plurality of sample-and-hold circuits (41) at a different timing within one excitation period; compares a plurality of acquired hold signals using a peak detection unit; and detects a peak value or a peak timing of a voltage signal Vi.

Description

magnetic sensor device

[0001] The present invention relates to a magnetic sensor device.

[0002] A magnetic sensor device generally includes a sampling circuit synchronized with the timing of energizing the magnetic detection element, and the sampling timing is adjusted by, for example, a delay circuit using an RC circuit. In such cases, it is necessary to change the element constants of the resistors and capacitors that make up the delay circuit, or to manually adjust the timing of energizing the pulse current. Therefore, to reduce the number of steps, automation of the sampling timing setting is being considered.

[0003] For example, Patent Document 1 proposes a magnetic sensor including a magnetosensitive body and a coil, a sampler that samples an induced voltage generated in the coil to obtain a sampling voltage, and an automatic correction circuit that relatively adjusts the rising timing of the magnetosensitive body clock and the sampler clock based on the sampling voltage. The automatic correction circuit has a delay synchronization circuit with multiple cascade-connected delay elements, and is configured to detect the delay time until the first peak by observing the displacement of the sampling voltage over a predetermined period from the rising edge of the magnetosensitive body clock and set the sampler clock.

[0004] Japanese Patent Application Laid-Open No. 2022-100055

[0005] In the magnetic sensor disclosed in Patent Document 1, the automatic correction circuit uses a delay-locked loop circuit with a delay element to sequentially change the delay of the sampler clock to sample the voltage waveform. The automatic correction circuit then sequentially compares the input sampled voltage to search for the peak value and corrects the sampler clock for normal peak value detection using the delay corresponding to the timing of the peak value. This optimizes the sensing timing after automatic correction, making it possible to detect the sampling voltage corresponding to the peak timing based on the corrected sampler clock.

[0006] This automatic correction circuit delays sampling by a fixed amount for each sampling period, so it takes time to detect the peak voltage, and the voltage waveform may change during the time until detection, changing the peak value and sensitivity.In addition, because the sampler clock is corrected using a fixed delay corresponding to the peak value, if the voltage waveform changes after correction, the sensitivity may also change, and the peak value may not be detected correctly.

[0007] The present invention has been made in view of the above-mentioned problems, and aims to provide a magnetic sensor device that can accurately detect the peak value or peak timing of a voltage signal output from a magnetic detection element in a short period of time.

[0008] In order to solve the above problem, a magnetic sensor device according to one aspect of the present disclosure is a magnetic sensor device comprising: a magnetic detection element; a current supply circuit that periodically excites the magnetic detection element; a plurality of sample-and-hold circuits electrically connected in parallel to the magnetic detection element; a peak detection clock generation unit that generates a peak detection clock corresponding to each of the plurality of sample-and-hold circuits at different timings within one period of excitation by the current supply circuit for each of the plurality of sample-and-hold circuits; and a peak detection unit that compares a plurality of hold signals acquired by the plurality of sample-and-hold circuits when the peak detection clock is output, and detects a peak value or peak timing of a voltage signal output from the magnetic detection element.

[0009] In the magnetic sensor device having the above configuration, the peak detection clock generation unit generates peak detection clocks with different timings to be supplied to each of the plurality of sample-and-hold circuits within one excitation cycle of the energization circuit. The plurality of sample-and-hold circuits are electrically connected in parallel to the magnetic detection element and can acquire the voltage signal output from the magnetic detection element at different timings. The peak detection unit can detect the peak value or peak timing of the voltage signal by comparing the plurality of hold signals acquired at different timings within one cycle.

[0010] In this way, the magnetic sensor device configured as described above can simultaneously acquire and compare multiple hold signals corresponding to one excitation cycle using multiple sample-and-hold circuits. Therefore, the peak value or peak timing of the voltage signal can be detected quickly. For example, by adjusting the number of sample-and-hold circuits or the timing of the peak detection clock depending on the voltage signal, the peak value or peak timing of the voltage signal can be detected more accurately. Furthermore, there is little risk of being affected by changes in the voltage signal, as occurs when comparing voltage signals output with different cycles.

[0011] As described above, according to the above aspect, it is possible to provide a magnetic sensor device that can accurately detect the peak value or peak timing of a voltage signal output from a magnetic detection element in a short period of time.

[0012] FIG. 1 is a circuit diagram showing an example of the configuration of a magnetic sensor device according to embodiment 1. FIG. 2 is a timing chart showing the operation of the magnetic sensor device according to embodiment 1. FIG. 3 is a waveform diagram showing an example of a voltage signal generated by passing current through a magnetic detection element according to embodiment 1. FIG. 4 is a timing chart showing the operation of a magnetic sensor device according to comparative embodiment 1. FIG. 5 is a timing chart showing the operation of a magnetic sensor device according to comparative embodiment 2. FIG. 6 is a diagram showing an example of the circuit configuration of a magnetic sensor device according to embodiment 2. FIG. 7 is a timing chart showing the operation of a magnetic sensor device according to embodiment 2. FIG. 8 is a timing chart showing the operation of a signal processing circuit of a magnetic sensor device according to embodiment 3. FIG. 9 is a diagram showing an example of the circuit configuration of a magnetic sensor device according to embodiment 4. FIG. 10 is a timing chart showing the operation of a signal processing circuit of a magnetic sensor device according to embodiment 5. FIG. 11 is a timing chart showing the operation of a signal processing circuit of a magnetic sensor device according to embodiment 5. FIG. 12 is a timing chart showing the operation of a signal processing circuit of a magnetic sensor device according to a modified example of embodiment 5. FIG. 13 is a diagram showing an example of the circuit configuration of a magnetic sensor device according to embodiment 6. FIG. 14 is a timing chart showing the operation of a signal processing circuit of a magnetic sensor device according to embodiment 6. 13 is a timing chart showing an operation of a signal processing circuit of a magnetic sensor device according to a seventh embodiment.

[0013] Each embodiment will be specifically described below with reference to the drawings.

[0014] It should be noted that the embodiments described below are all comprehensive or specific examples, and the numerical values, shapes, components, arrangement positions and connection forms of the components shown in the embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, among the components in the following embodiments, components that are not described in the independent claims that represent the highest concept will be described as optional components.

[0015] Furthermore, although the magnetic sensor device of the present disclosure will be described based on the embodiments, the magnetic sensor device according to the present disclosure is not limited to the following embodiments. The following embodiments, modifications obtained by applying various modifications to the following embodiments that would occur to those skilled in the art without departing from the spirit of the present disclosure, and various devices incorporating the magnetic sensor device according to the present disclosure are also included in the present disclosure.

[0016] First Embodiment FIG. 1 is a circuit diagram showing an example of the configuration of a magnetic sensor device 1 according to a first embodiment.

[0017] [Basic configuration of magnetic sensor device 1] In FIG. 1 , the magnetic sensor device 1 includes a magnetic detection element 2, a current-carrying circuit 3, a magnetic detection circuit 4 including a plurality of sample-and-hold circuits 41, a control circuit 5 including a peak detection clock generation unit 51, and a signal processing circuit 6 including a peak detection unit 61.

[0018] The energizing circuit 3 periodically excites the magnetic detection element 2. The magnetic detection element 2 is excited by the energization from the energizing circuit 3 and generates a voltage signal Vi.

[0019] The plurality of sample-and-hold circuits 41 are electrically connected in parallel to the magnetic detection element 2. A voltage signal Vi generated in the magnetic detection element 2 is periodically input to the magnetic detection circuit 4, and is acquired as a hold signal SH at a predetermined timing in each of the plurality of sample-and-hold circuits 41.

[0020] The peak detection clock generating unit 51 generates a peak detection clock SHAp corresponding to each of the plurality of sample hold circuits 41 at different timings within one period of excitation by the energizing circuit 3. The peak detection clock SHAp is output to each of the plurality of sample hold circuits 41 at different predetermined timings.

[0021] The peak detection unit 61 detects the peak value or peak timing, which is the timing at which the voltage signal Vi output from the magnetic detection element 2 reaches a peak value. When the peak detection clock SHAp is output, the peak detection unit 61 compares the multiple hold signals SH acquired by the multiple sample-and-hold circuits 41. Based on the comparison result, the peak value or peak timing of the voltage signal Vi can be detected. As will be described later, the peak detection unit 61 in this embodiment is described as detecting the peak value among these hold signals SH. Note that the multiple hold signals SH are output from the magnetic detection circuit 4 as digital signals obtained by analog-to-digital conversion of their amplified signals, for example, and the peak detection unit 61 can detect the maximum signal among them as the peak value.

[0022] The control circuit 5 may further include a voltage change detection clock generation unit 52. The voltage change detection clock generation unit 52 generates a voltage change detection clock SHAc corresponding to each of the plurality of sample and hold circuits 41. The voltage change detection clock SHAc is output to each of the plurality of sample and hold circuits 41 at different predetermined timings.

[0023] The signal processing circuit 6 may further include a voltage change detection unit 62 that detects a voltage change in the voltage signal Vi. When the voltage change detection clock SHAc is output, the voltage change detection unit 62 compares the multiple hold signals SH acquired by the multiple sample-and-hold circuits 41. Then, based on the comparison result, it is possible to detect, for example, a voltage change corresponding to a rising edge of the voltage signal Vi.

[0024] The control circuit 5 can perform sampling for peak detection in the peak detection clock generation unit 51 using the detection result of the voltage change detection unit 62. In this case, the peak detection clock generation unit 51 generates the peak detection clock SHAp at a timing set based on the voltage change of the detected voltage signal Vi.

[0025] When the peak detection unit 61 performs peak detection processing after the voltage change detection processing by the voltage change detection unit 62, it is desirable to set the timing so that the peak detection clock SHAp is output after the point in time when the voltage change is detected, using the point in time when the voltage change is detected as a reference. This allows the peak detection unit 61 to efficiently perform peak detection processing using the hold signal SH acquired after the point in time when the voltage change is detected, and to reliably detect the peak value or peak timing of the voltage signal Vi in a short period of time.

[0026] The signal processing circuit 6 can alternately repeat, for example, the voltage change detection process by the voltage change detector 62 and the peak detection process by the peak detector 61 .

[0027] By alternately performing these processes, a peak detection clock SHAp is generated based on the voltage change of the voltage signal Vi detected by the voltage change detection process, and the peak value or peak timing of the voltage signal Vi is repeatedly detected by the peak detection process. As a result, even when, for example, changes in the voltage signal Vi are likely to occur, the frequency of the voltage change detection process increases, allowing the peak value or peak timing to be detected accurately in the peak detection process.

[0028] The interval at which the peak detection clock SHAp is generated (hereinafter also referred to as the "peak detection clock interval") is set to a predetermined constant interval, for example. Also, the interval at which the voltage change detection clock SHAc is generated (hereinafter also referred to as the "voltage change detection clock interval") is set to a predetermined constant interval.

[0029] The control circuit 5 can set the peak detection clock interval generated by the peak detection clock generating section 51 to be the same interval as the voltage change detection clock interval generated by the voltage change detection clock generating section 52, for example.

[0030] [Configuration of Each Part of Magnetic Sensor Device 1] Next, each part constituting the magnetic sensor device 1 of this embodiment will be specifically described. In Fig. 1 , the magnetic detection element 2 is, for example, a magneto-impedance (MI) element including a magneto-sensitive body 21 and a detection coil 22 (hereinafter, also referred to as an "MI element"). The magneto-sensitive body 21 is made of, for example, amorphous wire, and the detection coil 22 is wound around the magneto-sensitive body 21 with an insulating layer interposed therebetween. The MI element 2 outputs an induced voltage in the detection coil 22 as a voltage signal Vi when an excitation current is supplied to the magneto-sensitive body 21.

[0031] The energization circuit 3 periodically supplies an excitation current to the MI element 2. The excitation current may be, for example, a pulse current. Here, as an example, the energization circuit 3 is configured as a pulse energization circuit that can apply a pulse current to the magnetic sensitive element 21. The excitation current may be any periodic current, and may be, for example, a high-frequency current.

[0032] The energization circuit 3 here includes a pulse generating unit 31, a pair of switches 32a and 32b driven by a pulsed control signal MI_SW supplied from the pulse generating unit 31, and a resistor 33. One of the pair of switches, 32a, is inserted between one end of the magnetosensitive body 21 and a high-potential power supply AVDD, and the other of the pair, 32b, is inserted between the other end of the magnetosensitive body 21 and a low-potential power supply AVSS.

[0033] The control signal MI_SW causes the pair of switches 32 a, 32 b in the energization circuit 3 to simultaneously turn on or off, thereby starting or cutting off the supply of pulse current to the magnetosensitive element 21. As a result, the impedance of the magnetosensitive element 21 changes in response to the strength of the external magnetic field acting on the amorphous wire, and this change in magnetization generates an induced voltage across the detection coil 22. The ends of the detection coil 22 are electrically connected to a pair of signal lines 71, 72 leading to the sample-and-hold circuit 41 of the magnetic detection circuit 4.

[0034] The magnetic detection element 2 may be any element capable of detecting magnetism, and may be, in addition to the MI element 2, a Hall element, an MR element (magnetoresistive element), a GMR element (giant magnetoresistive element), a TMR element (tunnel junction magnetoresistive element), or the like.

[0035] The magnetic detection circuit 4 includes a plurality of sampling blocks B, each including one sample-and-hold circuit 41. The sample-and-hold circuit 41 includes a pair of switches 41 a and 41 b and a pair of capacitors 41 c and 41 d, which are provided corresponding to a pair of signal lines 71 and 72, respectively.

[0036] The number of sample-and-hold circuits 41 (m; m≧2) corresponds to the number of hold signals SH acquired for one excitation, and can be selected arbitrarily. Specifically, it is desirable that the number of sample-and-hold circuits 41 is set so that the signal processing circuit 6 has a sufficient number of sample-and-hold circuits 41 to detect the peak value of the voltage signal Vi by one voltage change detection process and one subsequent peak detection process.

[0037] Each sampling block B includes a sample-and-hold circuit 41 and an AD (Analog-Digital) conversion circuit 42. An amplifier circuit 43 is disposed between the sample-and-hold circuit 41 and the AD conversion circuit 42. The arrangement of the amplifier circuit 43 is not limited to this, and the sampling block B may not include the amplifier circuit 43.

[0038] The AD conversion circuit 42 performs analog-to-digital conversion processing (hereinafter also referred to as "AD conversion processing") to convert the analog hold signal SH into a digital signal. The amplifier circuit 43 amplifies the hold signal SH acquired by the sample-and-hold circuit 41 by a predetermined amplification factor and outputs the amplified signal to the AD conversion circuit 42.

[0039] Each sampling block B holds the hold signal SH as a digital signal that has been AD converted by an AD conversion circuit 42 , and outputs the digital signal to the signal processing circuit 6 .

[0040] The pair of signal lines 71, 72 each branch according to the number (m) of sampling blocks B, and each pair of branch signal lines is electrically connected to the inverting input terminal and non-inverting input terminal of the corresponding amplifier circuit 43 via a sample-and-hold circuit 41. The sample-and-hold circuit 41 simultaneously turns on or off a pair of switches 41 a, 41 b in response to a detection clock output from the control circuit 5, thereby opening or closing the pair of signal lines 71, 72.

[0041] At this time, the potential difference between the potential CA of the signal line 71 and the potential CB of the signal line 72 becomes a voltage signal Vi (Vi=CA-CB). This voltage signal Vi is acquired by the sample-and-hold circuit 41 at a timing according to the detection clock from the control circuit 5, and is output as a hold signal SH.

[0042] The control circuit 5 selectively connects each sample-and-hold circuit 41 to either a peak detection clock generator 51 or a voltage change detection clock generator 52, and outputs a peak detection clock SHAp or a voltage change detection clock SHAc. That is, each sample-and-hold circuit 41 is connected to the peak detection clock generator 51 during peak detection processing, and is connected to the voltage change detection clock generator 52 during voltage change detection processing.

[0043] Specifically, the peak detection clock generation unit 51 and the plurality of sample-and-hold circuits 41 are connected via signal lines that are opened and closed by the peak detection switches SWp, and the voltage change detection clock generation unit 52 and the plurality of sample-and-hold circuits 41 are connected via signal lines that are opened and closed by the voltage change detection switches SWc.

[0044] During the peak detection process, the control circuit 5 turns on the peak detection switch SWp and turns off the voltage change detection switch SWc. Also, during the voltage change detection process, the control circuit 5 turns on the voltage change detection switch SWc and turns off the peak detection switch SWp. As a result, a detection clock corresponding to each detection process is output to each of the multiple sample and hold circuits 41 at a predetermined timing during each detection process.

[0045] In addition, an AD conversion control signal for AD converting the hold signal SH in the AD conversion circuit 42 and the like are input at a predetermined timing to the sample hold block B. The digital signal after AD conversion is output to the voltage change detection unit 62 or the peak detection processing unit 61 of the signal processing circuit 6.

[0046] The peak detection clock generating unit 51 includes a delay circuit 511 in which a plurality of delay elements 512 are connected in series, and a multiplexer MUX1. The peak detection clock generating unit 51 is configured as a DLL (Delay Locked Loop) circuit that uses the sampling clock DLLCK as a reference and generates an internal clock whose phase is changed using the plurality of delay elements 512.

[0047] The delay circuit 511 can generate a signal delayed by a predetermined time relative to the input of the sampling clock DLLCK in accordance with the number (n+1) of delay elements 512, and output the signal as delay amounts d<0> to d<n>. The predetermined time that determines the delay amounts d<0> to d<n> can be set arbitrarily and corresponds to the sampling interval in the peak detection process.

[0048] The peak detection clock generation unit 51 uses the multiplexer MUX1 to select m of the delay amounts d<0> to d<n>, where n>m, corresponding to the number of sample-and-hold circuits 41. These delay amounts can then be supplied to the corresponding sample-and-hold circuits 41 as the peak detection clock SHAp. This allows a peak detection clock SHA having an arbitrary delay amount, for example, within the range of SHAp<0> to SHAp<n> shown in FIG. 1, to be selected and output to each sample-and-hold circuit 41. The same applies to the voltage change detection clock SHAc and other detection clocks SHA, which will be described later.

[0049] Similarly, the voltage change detection clock generation unit 52 includes a delay circuit 521 in which a plurality of delay elements 522 are connected in series, and a multiplexer MUX2. The delay circuit 521 generates delay amounts d<0> to d corresponding to the number (i+1) of delay elements 522, for example. The voltage change detection clock generation unit 52 uses the multiplexer MUX2 to select m of the delay amounts d<0> to d, which corresponds to the number of sample-and-hold circuits 41 (i>m). These delay amounts can then be supplied as the voltage change detection clock SHAc to the corresponding sample-and-hold circuits 41.

[0050] 2 is a timing chart showing the operation of each part of the magnetic sensor device 1, in which a voltage change detection process and a peak detection process are performed in this order by the signal processing circuit 6. FIG. 3 is a waveform diagram showing an example of a change in the voltage signal Vi generated in the MI element 2 in response to excitation by the energization circuit 3.

[0051] 2 , when a control signal MI_SW is output in synchronization with a sampling clock DLLCK, a voltage signal Vi is output from the MI element 2. The plurality of sample-and-hold circuits 41 acquire the voltage signal Vi at different timings based on a voltage change detection clock SHAc output from a voltage change detection clock generation unit 52.

[0052] In FIG. 3, when a pulse current is supplied to the MI element 2 by the energization from the energization circuit 3, the rising edge of the pulse current (period t Ｒ ) and falling (period t Ｆ ) (period t HIGH ), the voltage signal Vi rises with a delay, reaches a peak value, and then falls. At this time, the peak value of the voltage signal Vi corresponds to the strength of the external magnetic field to be detected. Note that the voltage signal Vi has a voltage waveform with a peak on the positive side or the negative side of the DC potential, depending on the direction of the external magnetic field. For simplicity, the case where the peak voltage exists on the positive side is shown here.

[0053] In order to accurately detect the external magnetic field to be detected, the magnetic sensor device 1 is required to accurately detect the peak value of the voltage signal Vi. To this end, the magnetic detection circuit 4 is provided with a plurality of sample-and-hold circuits 41, and sampling is performed according to the procedure shown in FIG.

[0054] In this example, the number of sample-and-hold circuits 41 is, for example, 17 (m=17), and the voltage change detection clock generator 52 selects 17 voltage change detection clocks SHAc<0> to SHAc<16>, which include rising edges of the sampling clock DLLCK. Each sample-and-hold circuit 41 acquires a voltage signal Vi at a predetermined timing. As a result, 17 samples are sampled at once with respect to the first sampling clock DLLCK, and 17 hold signals SH<0> to SH<16> are acquired.

[0055] The 17 hold signals SH<0> to SH<16> are each amplified by an amplifier circuit 43, and then the amplified signals are AD converted by an AD converter circuit 42 into digital signals that are output to the voltage change detector 62. The sampling intervals for the 17 samples correspond to the voltage change detection clock interval Δt, which is the interval at which the voltage change detection clocks SHAc<0> to SHAc<16> are generated. In other words, sampling is performed with a delay amount that is incremented by Δt.

[0056] The voltage change detection unit 62 compares the digital signals corresponding to the 17 hold signals SH<0> to SH<16> in numerical order. For example, for the hold signal SH<0> generated by the first voltage change detection clock SHAc<0> and the hold signal SH<1> generated by the second voltage change detection clock SHAc<1>, the difference between the corresponding digital signals is compared with a predetermined threshold. The comparison of the hold signals SH is then repeated until a voltage change to the positive side equal to or greater than the predetermined threshold is detected.

[0057] When a voltage change equal to or greater than a predetermined threshold is detected, the voltage change detection unit 62 terminates the voltage change detection process. In this case, the voltage change detection unit 62 outputs a detection result, assuming that a predetermined voltage change has been detected at the falling edge of the fourth voltage change detection clock SHAc<3>, at which the hold signal SH<3> is acquired. The detection result may include, for example, time information indicating the voltage change position (here, the delay amount d<3> corresponding to the voltage change detection clock SHAc<3>). The detection result is output to, for example, the control circuit 5 and stored in a memory (not shown), and serves as a reference when the peak detection clock generation unit 51 generates the peak detection clock SHAp.

[0058] Next, at the next sampling clock DLLCK, the signal processing circuit 6 uses the result of the voltage change detection process to perform peak detection process by the peak detection unit 61. In the peak detection process, the 17 sample-and-hold circuits 41 acquire the voltage signals Vi at different timings based on the peak detection clock SHAp output from the peak detection clock generation unit 51.

[0059] At this time, the peak detection clock generation unit 51 selects the peak detection clock SHAp so that the first sampling is performed at the same timing as the voltage change detection clock SHAc<3> at which the voltage change is detected. That is, 17 peak change detection clocks SHAp<3> to SHAp<19> are selected and output to the corresponding sample-and-hold circuits 41.

[0060] As a result, 17 samples are similarly taken for the next sampling clock DLLCK, and 17 hold signals SH are obtained. The obtained hold signals SH are similarly amplified by the amplifier circuit 43, converted into digital signals by the AD conversion circuit 42, and output to the peak detection unit 61. Hereinafter, the signal based on the hold signal SH (amplified signal, digital signal) will also be referred to as the hold signal SH as appropriate. Note that the sampling interval in the peak detection process is the same as in the voltage change detection process, and the peak detection clock interval Δt = the voltage change detection clock interval Δt.

[0061] The peak detection unit 61 compares the 17 hold signals SH<3> to SH<19> corresponding to the peak detection clocks SHAp<3> to SHAp<19> in numerical order to detect peak values. In the peak detection process, for example, the difference values ​​of the corresponding digital signals are sequentially compared for the hold signal SH<3> generated by the first peak detection clock SHAp<3> and the hold signal SH<4> generated by the second peak detection clock SHAp<4>. Comparison of the hold signals SH is then repeated until a change in the difference value indicates that the voltage signal Vi has changed from an increasing trend to a decreasing trend.

[0062] Here, it is assumed that the hold signal SH<8> generated by the peak detection clock SHAp<8> corresponds to the peak value of the voltage signal Vi. The peak detection unit 61 can detect the peak value by comparing the hold signal SH<8> with the hold signals SH before and after it. For example, the peak detection unit 61 can determine that a peak value has been detected when a voltage change of a predetermined threshold or more to the negative side is detected for the first time from the difference between the hold signal SH<8> generated by the peak detection clock SHAp<9>. Thereafter, the peak detection unit 61 outputs the detection result and ends the peak detection process.

[0063] The signal processing circuit 6 generates magnetic detection information based on the peak value detected by the peak detection unit 61 and outputs it to the outside. The magnetic detection information may be, for example, the magnitude or change of the external magnetic field to be detected, or position information of the object to be detected. Thereafter, the signal processing circuit 6 repeats the same process of performing voltage change detection processing and then peak detection processing. In this way, the change detection period of the voltage signal Vi and the peak detection period of the voltage signal Vi are alternately repeated in response to the sampling clock DLLCK.

[0064] According to this embodiment, the magnetic sensor device 1 can repeatedly perform the voltage change detection process and the peak detection process by using the multiple sample-and-hold circuits 41 to acquire the hold signal SH at multiple different timings for each excitation cycle of the MI element 2. In this case, the peak detection process can be efficiently performed using the results of the voltage change detection process, and the peak value of the voltage signal Vi can be reliably detected in a short time.

[0065] 2, when the MI element 2 is excited by the energization circuit 3 at a predetermined cycle, the rising edge of the control signal MI_SW may be shifted relative to the rising edge of the sampling clock DLLCK. The greater this shift, the longer the time from the rising edge of the sampling clock DLLCK to the rising edge of the voltage signal Vi. On the other hand, when the voltage signal Vi rises in response to the rising edge of the control signal MI_SW, it reaches its peak value relatively quickly.

[0066] In this embodiment, the magnetic sensor device 1 first detects a rising edge from the voltage change of the voltage signal Vi using the voltage change detection unit 62, and then detects a peak value from the change in the voltage signal Vi after the rising edge using the peak detection unit 61. In this way, by appropriately setting the number of sample-hold circuits 41 and sequentially detecting the voltage change and peak value of the voltage signal Vi using the signal processing circuit 6, it is possible to efficiently detect the peak value in a time equivalent to two sampling clocks.

[0067] (Comparative Example 1) FIG. 4 is a timing chart showing an example of the operation when detecting voltage changes and peaks using a conventional magnetic sensor device provided with one sample-and-hold circuit 41 for an MI element 2. In FIG.

[0068] Here, the delay amount for voltage change detection and peak detection is delayed by Δt using the sampling interval (Δt) in the first embodiment. As a result, when the control signal SMI is output to the MI element 2 in synchronization with the sampling clock CLK, the falling edge of the sampling signal SMPL, which is the hold position of the generated voltage signal Vi, is delayed by Δt for each sampling clock CLK.

[0069] In the example shown in Figure 4, for example, at the second sampling clock CLK (delay: 2 x Δt), the rising edge of the voltage signal Vi is detected by comparison with the first hold signal, and then at the Nth sampling clock CLK (delay: N x Δt), the peak position is detected by comparison of the (N-1)th to (N+1)th hold signals. In other words, it takes a time equivalent to two sampling clocks to detect the rising edge. Here, if Δt is 2 nsec and it is N nsec from the start of detection to the peak position, it will take a time equivalent to N / 2 sampling clocks to detect the peak.

[0070] Furthermore, as shown in Figure 4, the voltage waveform may change during the time until the peak is detected, and the peak value may change from the initial peak value. In such cases, the peak position or magnitude may change, which may result in longer detection times for the peak value or changes in sensitivity.

[0071] 5 is a timing chart showing an example of the operation of a conventional magnetic sensor device when sampling is performed with a fixed delay amount Δt opt ​​set in the device. The fixed delay amount Δt opt ​​is set in advance based on, for example, the peak position of the voltage signal Vi detected by the procedure shown in the first comparative example.

[0072] In this case, the control signal SMI is output in response to the sampling clock CLK, and each time the MI element 2 outputs a voltage signal Vi, the sample-and-hold circuit 41 acquires a hold signal at the same timing and detects the peak value. However, as shown by the arrow in Figure 5, for example, fluctuations may occur in the voltage signal Vi after the second sampling clock CLK, causing the amplitude to change. Therefore, if sampling is performed at a fixed timing, detection may not be performed at the peak position, and the sensitivity may change.

[0073] As described above, the procedure shown in Comparative Example 1 takes a long time to detect the peak value of the voltage signal Vi and cannot respond to changes in the voltage signal Vi. The procedure shown in Comparative Example 2 allows repeated detection of peak values, but is similarly unable to respond to changes in the voltage signal Vi. In contrast, the above-described first embodiment makes it possible to shorten the detection time while also being able to respond to voltage changes, resulting in a highly reliable magnetic sensor device 1.

[0074] (Embodiment 2) Fig. 6 is a circuit diagram showing an example of the configuration of a magnetic sensor device 1 according to embodiment 2, which differs from embodiment 1 above in part of the configuration of the control circuit 5. Fig. 7 is a timing chart showing the operation of the magnetic sensor device 1, in which the number of times peak detection processing is performed after voltage change detection processing in the signal processing circuit 6 is changed. In this embodiment, the basic configuration and basic operation of the magnetic sensor device 1 are the same as those of embodiment 1 above, and the following mainly describes the differences.

[0075] 6, the control circuit 5 includes a common detection clock generating unit 50. The common detection clock generating unit 50 has both the function of the peak detection clock generating unit 51 and the function of the voltage change detection clock generating unit 52 in the first embodiment.

[0076] Specifically, the detection clock generating unit 50 includes a common delay circuit 501 and a common multiplexer MUX. The common delay circuit 501 has a plurality of serially connected delay elements 502, and can function as the delay circuits 511 and 521 in the first embodiment. The common multiplexer MUX can function as the multiplexers MUX1 and MUX2 in the first embodiment.

[0077] Prior to peak detection processing, common delay circuit 501 generates delay amounts d<0> to d for voltage change detection processing, similar to delay circuit 521. Similar to voltage change detection clock generation unit 52, common detection clock generation unit 50 uses multiplexer MUX to select m delay amounts d<0> to d, which corresponds to the number of sample-and-hold circuits 41, and outputs the selected delay amounts as voltage change detection clock SHAc.

[0078] Furthermore, in the peak detection process, the common delay circuit 501 generates delay amounts d<0> to d<n> for the peak detection process, similar to the delay circuit 511. Similar to the peak detection clock generation unit 51, the common detection clock generation unit 50 selects m of the delay amounts d<0> to d<n>, corresponding to the number of sample-and-hold circuits 41, based on the result of the voltage change detection process. In this case, the common detection clock generation unit 50 can use the multiplexer MUX to select m delay amounts from the point in time after the voltage change was detected, and output them as the peak detection clock SHAp.

[0079] 7, the signal processing circuit 6 performs a voltage change detection process using the voltage change detection unit 62, and then performs peak detection process using the peak detection unit 61 multiple times in succession. Here, the signal processing circuit 6 repeats a cycle of performing, for example, two peak detection processes after one voltage change detection process.

[0080] In this embodiment, the procedure for voltage change detection processing by the voltage change detector 62 and the procedure for peak detection processing by the peak detector 61 are the same as those in the first embodiment. That is, the common detection clock generator 50 outputs the voltage change detection clock SHAc in response to the first sampling clock DLLCK, and voltage change detection processing is performed. The voltage change detector 62 performs a comparison based on the acquired multiple hold signals SH to detect a voltage change in the voltage signal Vi.

[0081] Furthermore, for the next sampling clock DLLCK, the common detection clock generation unit 50 outputs a peak detection clock SHAp based on the detection result of the voltage change, and peak detection processing is performed. The peak detection unit 61 performs a comparison based on the acquired multiple hold signals SH, detects the peak value of the voltage signal Vi, and outputs the result.

[0082] Furthermore, the same peak detection process is performed on the next sampling clock DLLCK. After that, the signal processing circuit 6 determines that the number of peak detection processes has reached a predetermined number, and causes the voltage change detection unit 62 to perform voltage change detection again on the next sampling clock DLLCK.

[0083] In this way, a state in which a change detection period of the voltage signal Vi is followed by a peak detection period of the voltage signal Vi is repeated in response to the sampling clock DLLCK. Note that in this embodiment, the number of times the peak detection process is repeated is just an example, and can be set to any number of times, such as 2, 3, or more.

[0084] According to this embodiment, the magnetic sensor device 1 includes a detection clock generating unit 50 common to the control circuit 5, and therefore, with a simpler configuration, it is possible to obtain the same effects as those of the above-described embodiment 1. Furthermore, in the signal processing circuit 6, the peak detection unit 61 can continuously perform peak detection processing by effectively utilizing a single detection result by the voltage change detection unit 62, thereby making it possible to detect the peak value of the voltage signal Vi more quickly and accurately.

[0085] In the configuration of this embodiment, the common detection clock generating unit 50 may alternately generate the voltage change detection clock SHAc and the peak detection clock SHAp, and the voltage change detection process and the peak detection process may be repeated alternately, as in the above-described embodiment 1. Furthermore, in the configuration of the above-described embodiment 1, as in the present embodiment, after performing the voltage change detection process based on the voltage change detection clock SHAc generated by the voltage change detection clock generating unit 52, the peak detection process based on the peak detection clock SHAp generated by the peak detection clock generating unit 51 may be repeated multiple times.

[0086] 8 is a timing chart showing the operation of the magnetic sensor device 1 according to the third embodiment, which differs from the first embodiment in the setting of the detection clock interval in each detection process of the signal processing circuit 6. In this embodiment, the basic configuration and basic operation of the magnetic sensor device 1 are the same as those of the first embodiment, and the following mainly describes the differences.

[0087] 8, the detection clocks output from the control circuit 5 during detection processing by the signal processing circuit 6 are set to different intervals: a voltage change detection clock interval Δtc, which is the sampling interval in the voltage change detection unit 62, and a peak detection clock interval Δtp, which is the sampling interval in the peak detection unit 61. Specifically, the peak detection clock interval Δtp is set to be shorter than the voltage change detection clock interval Δtc.

[0088] Here, as an example, a case is shown in which the time from the rising edge of the sampling clock DLLCK to the rising edge of the voltage signal Vi due to the control signal MI_SW is relatively long. In this case, the period for detecting changes in the voltage signal Vi is longer than in the first embodiment, and it is desirable to set the voltage change detection clock interval Δtc so that it is a sufficiently long period that certainly includes the output period of the control signal MI_SW.

[0089] Specifically, the voltage change detection clock interval Δtc can be set to an interval longer than the voltage change detection clock interval Δt in the above-described embodiment 1. As a result, at the first sampling clock DLLCK, a voltage change is detected, for example, by a hold signal SH<3> generated by the voltage change detection clock SHAc<3> (for example, SHA<3> shown in FIG. 8 ).

[0090] On the other hand, the peak detection clock interval Δtp in the peak detection process is desirably a sufficiently short interval that allows the peak value of the voltage signal Vi to be detected with the desired accuracy. Specifically, the peak detection clock interval Δtp is shorter than the voltage change detection clock interval Δtc, and here, for example, is set to 1 / 2 of Δtc. It can also be set to be approximately equal to or shorter than the voltage change detection clock interval Δt in the first embodiment (Δt≧Δtp=Δtc / 2). As a result, in the next sampling clock DLLCK, sampling begins with the peak detection clock SHAp<6>, which corresponds to the voltage change detection clock SHAc<3>. For example, the peak value is detected by the hold signal SH<12> generated by the peak detection clock SHAp<12> (e.g., SHA<12> shown in FIG. 8).

[0091] According to this embodiment, the sampling intervals using the plurality of sample-and-hold circuits 41 are set long during the voltage change detection process, so that the voltage change detection unit 62 can reliably detect voltage changes regardless of the time until the rise of the voltage signal Vi or the voltage waveform of the voltage signal Vi. Furthermore, when detecting a peak value using the voltage change detection results, the sampling intervals are set shorter, so that the peak value of the voltage signal Vi can be detected with high accuracy.

[0092] 8, when the time from the rising edge of the sampling clock DLLCK to the rising edge of the voltage signal Vi is relatively long, the time required for the voltage change detection unit 62 to detect a voltage change becomes longer at the same sampling interval as in the first embodiment. Alternatively, depending on the waveform of the voltage signal Vi, the time from the rising edge to the peak value becomes relatively long, and it tends to take a long time to detect a voltage change.

[0093] Therefore, by adopting a longer voltage change detection clock interval Δtc as in the present embodiment, it is possible to reliably detect voltage changes without increasing the number of samples. Furthermore, by performing the subsequent peak detection process at a shorter peak detection clock interval Δtp from the detected voltage change position, it is possible to efficiently perform the detection process while ensuring the detection accuracy of the peak value.

[0094] In addition, the same effects as those of the above-described embodiment 1 can be obtained. Furthermore, in the configuration of the above-described embodiment 2, as in the present embodiment, the voltage change detection clock interval Δtc in the voltage change detection unit 62 and the peak detection clock interval Δtp in the peak detection unit 61 can be set to different intervals, for example, so that the voltage change detection clock interval Δtc is greater than the peak detection clock interval Δtp. In this case, the common detection clock generation unit 50 can, for example, extract a portion of the delay amounts d<0> to d<n> for the peak detection process so that the delay amounts are at desired equal intervals, and generate the delay amounts d<0> to d for the voltage change detection process.

[0095] 9 is a diagram showing an example of the circuit configuration of a magnetic sensor device 1 according to embodiment 4, which differs from embodiment 1 above in the configuration of the control circuit 5 and the signal processing circuit 6. Also, FIG. 10 is a timing chart showing the operation of the magnetic sensor device 1, which differs from embodiment 1 above in the settings of the detection process in the signal processing circuit 6. In this embodiment, the basic configuration and basic operation of the magnetic sensor device 1 are the same as those of embodiment 1 above, and the following mainly describes the differences.

[0096] 9, the control circuit 5 includes a peak detection clock generator 51 that outputs a peak detection clock SHAp, and the signal processing circuit 6 includes a peak detector 61. In this embodiment, the magnetic sensor device 1 does not include a circuit for detecting voltage changes, and does not include the voltage change detection clock generator 52 and the voltage change detector 62 in the first embodiment.

[0097] In this embodiment, when generating the peak detection clock SHAp, the peak detection clock generation unit 51 selects a preset number m of delay amounts d<0> to d<n> from the delay amounts d<0> to d<n> generated by the delay circuit 501 in accordance with the number of sample and hold circuits 41. The multiple sample and hold circuits 41 perform sampling based on the peak detection clock SHAp, and the peak detection unit 61 performs comparison based on the multiple acquired hold signals SH to detect the peak value of the voltage signal Vi.

[0098] 10 shows an example in which the rising edge of the sampling clock DLLCK and the rising edge of the voltage signal Vi caused by the control signal MI_SW are approximately synchronized. In this case, when the sampling clock DLLCK rises, the voltage signal Vi rises quickly, so that it is possible to repeatedly detect only the peak value without detecting the voltage change.

[0099] In the peak detection clock generation unit 51, for example, similarly to the voltage change detection clock generation unit 52 in the first embodiment, 17 peak detection clocks SHAp<0> to SHAp<16> including the rising edges of the sampling clock DLLCK are generated and output to the corresponding 17 sample and hold circuits 41. As a result, 17 samples are performed with respect to the sampling clock DLLCK, and 17 hold signals SH are acquired.

[0100] The hold signal SH acquired by 17 samplings is input to the peak detection unit 61 of the signal processing circuit 6 as a digital signal obtained by AD converting the amplified signal, and the signals are compared in order to detect the peak value. Here, as an example, peak values ​​are repeatedly detected in the hold signal SH<7> generated by the peak detection clock SHAp<7> (for example, SHA<7> shown in FIG. 10). In this manner, the peak detection process by the peak detection unit 61 is repeatedly performed.

[0101] According to this embodiment, the magnetic sensor device 1 can omit a circuit for detecting voltage changes, and can more quickly and accurately detect the peak value of the voltage signal Vi with a simpler configuration. In addition, the same effects as those of the first embodiment can be obtained.

[0102] In this embodiment, the peak detection clock SHAp generated by the peak detection clock generation unit 51 can be determined in advance by conducting a test, for example, at the time of shipping the magnetic sensor device 1. If the magnetic sensor device 1 is used in a stable environment and the magnetic detection circuit 4 includes a sufficient number of sample-and-hold circuits 41 for detecting peak values, the voltage change detection clock generation unit 52 may not be included, which enables faster magnetic detection.

[0103] In the above-described embodiment, the peak value of the voltage signal Vi is detected based on a plurality of hold signals SH acquired at different timings through a single peak detection process by the peak detection unit 61. However, the peak timing may be detected, or two peak detection processes may be performed by combining a detection process for detecting the peak timing with a detection process for detecting the peak value.

[0104] In the latter case, from the viewpoint of noise reduction, it is desirable to perform the second peak detection process at the same timing. Specifically, in the multiple sample-and-hold circuits 41, first, sampling is performed based on different peak detection clocks SHAp, as in the above-described embodiment. Next, the acquired multiple hold signals SH are compared to detect the peak timing of the voltage signal Vi. Furthermore, within the next excitation cycle, sampling is performed based on the detected peak timing, and the acquired multiple hold signals SH are averaged. In this way, multiple synchronized hold signals SH are obtained using the results of the first peak detection, and further, noise components contained in these signals are removed by averaging, thereby enabling the peak value of the voltage signal Vi to be detected. Below, a configuration example in which peak values ​​are detected by two detection processes is described.

[0105] 11 is a diagram showing an example of the circuit configuration of a magnetic sensor device 1 according to embodiment 5, which differs from embodiment 4 above in part of the configuration of the peak detection clock generation unit of the control circuit 5 and the peak detection unit of the signal processing circuit 6. Also, FIG. 12 is a timing chart showing the operation of the magnetic sensor device 1, which differs from embodiment 4 above in the settings for peak detection processing in the signal processing circuit 6. In this embodiment, the basic configuration and basic operation of the magnetic sensor device 1 are the same as those of embodiment 4 above, and the following mainly describes the differences.

[0106] 11, the control circuit 5 includes a first peak detection clock generator 531 that generates a first peak detection clock SHAp1 and a second peak detection clock generator 532 that generates a second peak detection clock SHAp2. The signal processing circuit 6 includes a first peak detector 611 and a second peak detector 612, and is configured to perform peak detection processing as the first peak detection clock SHAp1 and the second peak detection clock SHAp2 are output, respectively.

[0107] In this embodiment, the first peak detection clock generating unit 531 corresponds to the peak detection clock generating unit 51 in the fourth embodiment, and includes a delay circuit 511 in which a plurality of delay elements 512 are connected in series, and a multiplexer MUX1. As a result, m delay amounts d<0> to d<n> corresponding to the number of sample-and-hold circuits 41 are selected from the delay amounts d<0> to d<n> generated by the delay circuit 511, and a first peak detection clock SHAp1 is generated. The first peak detection clock SHAp1 is output to each of the m sample-and-hold circuits 41 at different timings within one period of excitation by the energization circuit 3, and a hold signal SH based on the first peak detection clock SHAp1 is obtained.

[0108] The m hold signals SH acquired by the m sample-and-hold circuits 41 are amplified and AD-converted to digital signals, which are then input to a first peak detection unit 611. The first peak detection unit 611 sequentially compares the input signals based on the hold signals SH, and when a peak timing that is a peak position is detected, the detection result including corresponding time information (e.g., delay amount d) is stored in a memory (not shown). When the first peak detection unit 611 detects a peak timing, a second peak detection clock SHAp2 corresponding to each of the m sample-and-hold circuits 41 is generated based on a control signal including the time information.

[0109] The second peak detection clock generating unit 532 has a configuration similar to that of the first peak detection clock generating unit 531, and here, the second peak detection clock generating unit 532 is configured using the delay circuit 511 and multiplexer MUX1 that are also used with the first peak detection clock generating unit 531. This makes it possible to generate the first peak detection clock SHAp1 and the second peak detection clock SHAp2 without changing the configuration of the control circuit 5.

[0110] The second peak detection clock generation unit 532 selects a delay amount d corresponding to the detected peak timing from the delay amounts d<0> to d<n> generated by the delay circuit 511 within one cycle of the next excitation, and generates a second peak detection clock SHAp2. The second peak detection clock generation unit 532 can output the second peak detection clock SHAp2 generated using the selected delay amount d for all m sample-and-hold circuits 41, for example. In this case, sampling is performed at the same timing in the m sample-and-hold circuits 41, and hold signals SH based on the second peak detection clock SHAp2 are acquired. The second peak detection unit 612 can calculate the peak value by, for example, performing an averaging process on the input signal based on the acquired m hold signals SH.

[0111] 12 shows an example in which peak detection is performed by the first peak detection unit 611 and the second peak detection unit 612 when the rising edges of the sampling clock DLLCK and the voltage signal Vi occur at approximately the same timing, as in the fourth embodiment. In this case, the first peak detection unit 611 detects the peak timing (peak detection period of the voltage signal Vi; first time) without detecting a voltage change, and the second peak detection unit 612 detects the peak value (peak detection period of the voltage signal Vi; second time).

[0112] Specifically, during the first peak detection period, 17 first peak detection clocks SHAp1<0> to SHAp1<16>, including the rising edges of the sampling clock DLLCK, are generated and output to 17 sample-and-hold circuits 41, respectively, to obtain 17 hold signals SH. Here, the peak value is detected in the hold signal SH<7> corresponding to the first peak detection clock SHAp1<7> (for example, SHA<7> shown in FIG. 12).

[0113] Therefore, during the second peak detection period, a delay amount d<7> corresponding to the peak position is selected for the next sampling clock DLLCK, and a second peak detection clock SHAp2<7> is output to all 17 sample-and-hold circuits 41. Signals based on the 17 hold signals SH acquired by the 17 sample-and-hold circuits 41 are input to the second peak detector 612, and the second peak detector 612 calculates the peak value as an average value obtained by, for example, averaging processing.

[0114] As a result, even if the acquired sample-and-hold signals SH vary due to, for example, individual variations among the multiple sample-and-hold circuits 41, the detection variation can be reduced by averaging the multiple sample-and-hold signals SH. To improve the reliability of magnetic detection by the magnetic sensor device 1, it is necessary to increase the signal-to-noise ratio (SNR) and improve magnetic resolution. In this embodiment, synchronous averaging is used to achieve this. Furthermore, since 17 hold signals SH can be acquired at once, both noise reduction and time saving are achieved, contributing to improved reliability. Note that, during the second peak detection period, it is not necessary for all of the multiple sample-and-hold circuits 41 to use the same delay amount d. For example, the second peak detection clock SHAp2 may be generated to include timing corresponding to the selected delay amount d and timings before and after the selected delay amount d.

[0115] For example, as a modification of this embodiment, if a delay amount d<7> is selected from the peak timing in the first peak detection period, delay amounts d<6> to d<8>, including those before and after the first peak detection period, can be used in the second peak detection period, as shown in Fig. 13. Specifically, the delay amount d<6> can be selected for a plurality of sample-and-hold circuits 41 including those corresponding to the first peak detection clocks SHAp1<0> to SHAp1<1>, the delay amount d<8> can be selected for a plurality of sample-and-hold circuits 41 including those corresponding to the first peak detection clock SHAp1<16>, and the delay amount d<7> can be selected for the remaining sample-and-hold circuits to generate the second peak detection clocks SHAp2<6> to SHAp2<8>.

[0116] In this way, the 17 sample-and-hold circuits 41 can be divided into multiple groups, and the delay amount d can be set for each group. This makes it possible to accurately detect the peak value by averaging the sample-and-hold signals SH obtained using multiple delay amounts d, even if the peak position is difficult to determine in the first peak detection due to, for example, the waveform of the voltage signal Vi or the clock interval settings.

[0117] According to this embodiment, the signal processing circuit 6 includes the first peak detection unit 611 and the second peak detection unit 612, and therefore the timing of peak detection by the second peak detection unit 612 can be set using the peak timing detected by the first peak detection unit 611. Furthermore, by acquiring a plurality of synchronized sample-and-hold signals SH and performing averaging processing, it is possible to reduce noise components and improve the SNR, and it is possible to more accurately detect the peak value of the voltage signal Vi in a short period of time. Other advantageous effects are also obtained that are similar to those of the fourth embodiment.

[0118] 14 is a diagram showing an example of the circuit configuration of a magnetic sensor device 1 according to embodiment 6, in which the voltage change detection unit 62 in embodiment 1 is added to the configuration of embodiment 5. Also, FIG. 15 is a timing chart showing the operation of the magnetic sensor device 1, in which a voltage change detection process similar to embodiment 1 is performed before the peak detection process. In this embodiment, the basic configuration and basic operation of the magnetic sensor device 1 are the same as those in embodiment 5, and the following mainly describes the differences.

[0119] 14, the control circuit 5 includes a first peak detection clock generator 531 that generates a first peak detection clock SHAp1 and a second peak detection clock generator 532 that generates a second peak detection clock SHAp2, as in the fifth embodiment. Furthermore, the control circuit 5 includes a voltage change detection clock generator 52 that generates a voltage change detection clock SHAc, as in the first embodiment.

[0120] The signal processing circuit 6 also includes a voltage change detection unit 62 similar to that in the first embodiment, which performs voltage change detection processing based on the voltage change detection clock SHAc, and a first peak detection unit 611 and a second peak detection unit 612 similar to those in the fifth embodiment, which perform peak detection processing as the first peak detection clock SHAp1 and the second peak detection clock SHAp2 are output, respectively.

[0121] 15 , in this embodiment, the procedure for voltage change detection processing by voltage change detector 62 is the same as that in the above-described embodiment 1, and the procedure for peak detection processing by first peak detector 611 and second peak detector 612 is the same as that in the above-described embodiment 5. That is, in order to detect the timing of the rising edge of voltage signal Vi relative to the first sampling clock DLLCK, first, voltage change detection clock generator 52 generates voltage change detection clock SHAc and outputs it to the plurality of sample-and-hold circuits 41.

[0122] Specifically, 17 voltage change detection clocks SHAc<0> to SHAc<16> are generated, and 17 hold signals SH are acquired by 17 sample-and-hold circuits 41. The voltage change detection unit 62 sequentially compares signals based on the acquired 17 hold signals SH to detect voltage changes. Here, a voltage change caused by the rising edge of the voltage signal Vi is detected by a hold signal SH<3> generated by the voltage change detection clock SHAc<3> (e.g., SHA<3> shown in FIG. 15). The detection result is output to the control circuit 5, for example, and stored in a memory (not shown), for use in the subsequent peak detection process.

[0123] In this case, the peak detection process is performed twice so that sampling starts at the same timing as the voltage change detection clock SHAc<3>. Specifically, the first peak detection clock generation unit 531 first generates 17 first peak detection clocks SHAp1<3> to SHAp1<19> for the first first peak detection process and outputs them to the corresponding sample-and-hold circuits 41. As a result, 17 samples are performed for the next sampling clock DLLCK, and 17 hold signals SH are obtained.

[0124] The first peak detector 611 sequentially compares the signals based on the acquired 17 hold signals SH to detect the timing of the peak value. Here, the peak timing is detected by the hold signal SH<8> generated by the first peak detection clock SHAp1<8> (e.g., SHA<8> shown in FIG. 15 ). The detection result is output to the control circuit 5, for example, and stored in a memory (not shown), and is used in the second second peak detection process.

[0125] Specifically, so that the second peak detection process is performed at the same timing as the first, the second peak detection clock generation unit 532 outputs the second peak detection clock SHAp2<8> to all sample and hold circuits 41. As a result, signals based on the 17 hold signals SH acquired by the 17 sample and hold circuits 41 are input to the second peak detection unit 612, and the peak value is calculated as an average value by, for example, averaging processing.

[0126] In this case, too, after the voltage change detection unit 62 detects a voltage change (a voltage change detection period of the voltage signal Vi), the first peak detection unit 611 detects a peak timing (a peak detection period of the voltage signal Vi; first time), and the second peak detection unit 612 detects a peak value (a peak detection period of the voltage signal Vi; second time). The sampling intervals in the first peak detection process and the second peak detection process are the same as those in the voltage change detection process (i.e., peak detection clock interval Δt = voltage change detection clock interval Δt).

[0127] According to this embodiment, when the rising timing of the sampling clock DLLCK and the voltage signal Vi differs, the voltage change process is performed in advance, and the result can be used to perform two peak detection processes.Then, by using the result of the first peak detection to acquire multiple synchronized signals in the second time and performing averaging, it is possible to improve the SNR and enable more accurate peak detection.

[0128] 16 is a timing chart showing the operation of the magnetic sensor device 1 according to embodiment 7, which differs from embodiment 6 in the setting of the detection clock intervals in the voltage change detection process and the peak detection process. In this embodiment, the basic configuration and basic operation of the magnetic sensor device 1 are the same as those in embodiment 6, and the following mainly describes the differences.

[0129] 16 , in this embodiment, the signal processing circuit 6 sets the voltage change detection clock interval Δtc in the voltage change detector 62 to an interval different from the peak detection clock interval Δtp in the first peak detector 611 and the second peak detector 612. Specifically, similar to the third embodiment, the voltage change detection clock interval Δtc in the voltage change detector 62 is set to be longer than the peak detection clock interval Δtp in the first peak detector 611 and the second peak detector 612 (i.e., voltage change detection clock interval Δtc > peak detection clock interval Δtp).

[0130] As an example, the voltage change detection clock generation unit 52 sets the voltage change detection clock interval Δtc so that the sampling interval is about half that during peak detection processing, and generates 17 voltage change detection clocks SHAc<0> to SHAc<16>. The peak detection clock interval Δtp generated by the peak detection clock generation unit 51 can be equal to or shorter than that in the sixth embodiment (i.e., Δt≧Δtp=Δtc / 2).

[0131] At this time, 17 hold signals SH are acquired for the sampling clock DLLCK, and a voltage change is detected by the hold signal SH<3> generated by the voltage change detection clock SHAc<3> (for example, SHA<3> shown in FIG. 16 ) by the voltage change detection unit 62. Using this result, the first peak detection clock generation unit 531 generates 17 first peak detection clocks SHAp1<6> to SHAp1<22> so that sampling is started at the timing when a voltage change is detected for the next sampling clock DLLCK.

[0132] The first peak detector 611 detects peak timing from the hold signals SH acquired by the 17 sample-and-hold circuits 41. As a result, for example, the hold signal SH<12> generated by the first peak detection clock SHAp1<12> (e.g., SHA<12> shown in FIG. 16 ) is used as the peak position, and peak detection processing is performed at the same timing with respect to the next sampling clock DLLCK. That is, the second peak detection clock generator 532 generates the second peak detection clock SHAp1<12> for all sample-and-hold circuits 41, and sampling is performed at the same timing in the 17 sample-and-hold circuits 41. Then, in the second peak detector 612, signals based on the acquired 17 hold signals SH are subjected to, for example, arithmetic averaging processing to calculate peak values.

[0133] According to this embodiment, even when the time from the rising edge of the sampling clock DLLCK to the rising edge of the voltage signal Vi is relatively long, the voltage change detection unit 62 can reliably detect the voltage change (the voltage change detection period of the voltage signal Vi). After the first peak detection unit 611 detects the peak timing (the peak detection period of the voltage signal Vi; the first time), the second peak detection unit 612 detects the peak value (the peak detection period of the voltage signal Vi; the second time), thereby improving the SNR and enabling the peak value to be detected more accurately in a short time.

[0134] In the above-described first to seventh embodiments, the timing of excitation of the MI element 2 by the energization circuit 3 is described as corresponding to the rising edge of the pulse-like control signal MI_SW, but it can also be corresponding to the falling edge of the control signal MI_SW. Also, as described above, the voltage signal Vi may have a voltage waveform with a negative peak, in which case the voltage change detection unit 62 will detect a voltage change of the voltage signal Vi to the negative side.

[0135] The present invention is not limited to the above-described embodiments, and can be applied to various embodiments within the scope of the present invention.

Claims

1. A magnetic sensor device comprising: a magnetic detection element; a current supply circuit that periodically excites the magnetic detection element; a plurality of sample-and-hold circuits electrically connected in parallel to the magnetic detection element; a peak detection clock generation unit that generates a peak detection clock corresponding to each of the plurality of sample-and-hold circuits at different timings within one period of excitation by the current supply circuit for each of the plurality of sample-and-hold circuits; and a peak detection unit that detects the peak value or peak timing of a voltage signal output from the magnetic detection element by comparing a plurality of hold signals obtained by the plurality of sample-and-hold circuits when the peak detection clock is output.

2. The magnetic sensor device of claim 1, further comprising: a voltage change detection clock generation unit that generates a voltage change detection clock corresponding to each of the multiple sample and hold circuits at different timings within one period of excitation by the current supply circuit for each of the multiple sample and hold circuits; and a voltage change detection unit that detects voltage changes in the voltage signal by comparing multiple hold signals acquired by the multiple sample and hold circuits when the voltage change detection clock is output, wherein the peak detection clock generation unit generates the peak detection clock at a timing set based on the voltage change in the voltage signal.

3. The magnetic sensor device according to claim 2, wherein the voltage change detection section performs a process of detecting a voltage change in the voltage signal and the peak detection section performs a process of detecting a peak in the voltage signal, the process being repeated alternately.

4. The magnetic sensor device according to claim 2, wherein the voltage change detection section performs a voltage change detection process on the voltage signal, and then the peak detection section performs a peak detection process on the voltage signal multiple times.

5. A magnetic sensor device as described in any one of claims 2 to 4, wherein, for each of the multiple sample and hold circuits, the voltage change detection clock interval when the voltage change detection clock is generated and the peak detection clock interval when the peak detection clock is generated are set to the same interval.

6. A magnetic sensor device as described in any one of claims 2 to 4, wherein, for each of the multiple sample-and-hold circuits, the peak detection clock interval when the peak detection clock is generated is set shorter than the voltage change detection clock interval when the voltage change detection clock is generated.

7. A magnetic sensor device as claimed in any one of claims 1 to 4, wherein the peak detection clock generating unit generates the peak detection clock at a timing set based on the excitation timing by the current-carrying circuit, and the peak detection process of the voltage signal is repeatedly performed by the peak detection clock generating unit.

8. A magnetic sensor device as claimed in any one of claims 1 to 4, wherein the magnetic detection element comprises a magnetic sensitive body and a detection coil, an induced voltage generated in the detection coil when an excitation current is supplied to the magnetic sensitive body is output as the voltage signal, and the current supply circuit periodically supplies the excitation current to the magnetic detection element.

9. The magnetic sensor device according to claim 8, further comprising a signal processing circuit that generates magnetic detection information based on a peak value of the voltage signal.

10. The magnetic sensor device of claim 1, further comprising: a first peak detection clock generation unit that generates a first peak detection clock which is the peak detection clock; the peak detection unit that is a first peak detection unit that detects the peak timing; and a second peak detection clock generation unit that generates a second peak detection clock corresponding to each of the plurality of sample and hold circuits within one cycle following excitation by the current-carrying circuit when the peak timing is detected by the first peak detection unit; and a second peak detection unit that detects a peak value of a voltage signal output from the magnetic detection element by averaging a plurality of hold signals acquired by the plurality of sample and hold circuits when the second peak detection clock is output, and wherein the second peak detection clock generation unit generates the second peak detection clock based on the peak timing.

11. The magnetic sensor device according to claim 10, wherein the second peak detection clock generating section sets the timing at which the second peak detection clock corresponding to each of the plurality of sample and hold circuits is generated to the peak timing.

12. The magnetic sensor device described in claim 10, wherein the second peak detection clock generating unit sets the timing at which the second peak detection clock corresponding to each of the multiple sample and hold circuits is generated to include the peak timing and the timing before and after it.

13. The magnetic sensor device according to any one of claims 10 to 12, wherein the peak detection process of the voltage signal by the first peak detection section and the peak detection process of the voltage signal by the second peak detection section are alternately repeated.

14. A magnetic sensor device as claimed in any one of claims 10 to 12, further comprising: a voltage change detection clock generation unit that generates a voltage change detection clock corresponding to each of the multiple sample and hold circuits at different timings within one period of excitation by the current supply circuit for each of the multiple sample and hold circuits; and a voltage change detection unit that detects a voltage change in the voltage signal by comparing multiple hold signals acquired by the multiple sample and hold circuits when the voltage change detection clock is output, wherein the peak detection clock generation unit generates the peak detection clock at a timing set based on the voltage change in the voltage signal.

15. A magnetic sensor device as described in claim 14, wherein the voltage change detection process of the voltage signal by the voltage change detection unit, the peak detection process of the voltage signal by the first peak detection unit, and the peak detection process of the voltage signal by the second peak detection unit are alternately repeated.

16. A magnetic sensor device as described in claim 15, wherein for each of the plurality of sample-and-hold circuits, the peak detection clock interval when the peak detection clock is generated is set to be the same as the voltage change detection clock interval when the voltage change detection clock is generated or shorter than the voltage change detection clock interval.

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