Quantum state preparation circuit generation method and apparatus, device, and storage medium
By dividing the qubit set and exchanging the permutation operator, the Dicke state preparation circuit is optimized, and the problem of insufficient circuit depth under grid limitation is solved, and more efficient quantum state preparation is achieved.
Patent Information
- Application Number
- PCT/CN2024/105952
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-25
- Filing Date
- 2024-07-17
- Publication Date
- 2025-07-03
AI Technical Summary
The existing Dicke state preparation circuit has not reached the optimal circuit depth under grid limitations, and there is a large room for improvement, especially in superconducting quantum devices. The connectivity limitation of the dual qubit gate leads to a large depth of the preparation circuit.
By dividing n qubits into multiple qubit sets, and using a permutation operator to exchange quantum states, combining the allocation operator and unitary operator, parallel operation of the quantum state preparation circuit is realized, the total number of weight allocations in Hamming is reduced, and the circuit depth is optimized.
It effectively reduces the circuit depth of the quantum state preparation circuit, improves the parallelism and efficiency of the quantum state preparation circuit, and is suitable for Dicke state preparation under grid limitation.
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Figure CN2024105952_03072025_PF_FP_ABST
Abstract
Description
Method, device, equipment and storage medium for generating quantum state preparation circuit
[0001] This application claims priority to Chinese patent application No. 202311800954.6, filed on December 25, 2023, entitled “Method, device, equipment and storage medium for preparing quantum states”, the entire contents of which are incorporated herein by reference. Technical Field
[0002] The embodiments of the present application relate to the field of quantum technology, and in particular to a method, apparatus, device, and storage medium for generating a quantum state preparation circuit. Background Art
[0003] In the field of quantum computing, Dicke states are an important type of entangled state, with widespread applications in quantum networks, quantum game theory, and quantum algorithms. In superconducting quantum devices, two-qubit gates can only act on certain qubit pairs to achieve qubit entanglement. This means that superconducting quantum devices have qubit connectivity restrictions (such as grid limitations). To prepare Dicke states on quantum devices, it is crucial to design Dicke state preparation circuits that incorporate these qubit connectivity restrictions.
[0004] Currently, under grid constraints, the circuit depth of the best Dicke state preparation circuit is Used to define The upper bound of n is the number of quantum bits, k is the Hamming weight when n quantum bits are in the Dicke state, and the theoretical lower bound of the depth of the Dicke state preparation circuit is Ω(n2). Ω(n2) is used to define the lower bound of n2, and n2 is the number of quantum bits corresponding to the rows of the grid. That is, the existing Dicke state preparation circuit is not the circuit with the optimal circuit depth in the asymptotic sense, and it still has a lot of room for improvement.
[0005] Summary of the Invention
[0006] The embodiments of the present application provide a method, apparatus, device, and storage medium for generating a quantum state preparation circuit. The technical solution is as follows:
[0007] According to one aspect of an embodiment of the present application, a method for generating a quantum state preparation circuit is provided, the method being executed by a computer device, the method comprising:
[0008] Obtaining n quantum bits under grid constraints and initial quantum states of the n quantum bits, where n is a positive integer;
[0009] Dividing the n qubits into a plurality of qubit sets, each qubit set including k qubits, wherein connections of the k qubits satisfy a subgrid restriction, subgrids corresponding to the subgrid restriction are combined into a grid corresponding to the grid restriction, and k is a positive integer less than n;
[0010] In the process of recursively decomposing the n qubits under the grid constraint with the qubit set as a unit, determining a distribution operator set, a permutation operator set, a unitary operator set, and a preparation operator architecture, wherein each distribution operator in the distribution operator set is used to distribute the Hamming weight of the first quantum state to the multiple qubit sets in combination with each permutation operator in the permutation operator set, and to entangle the multiple qubit sets with each other, the permutation operator is used to exchange the quantum state between two of the qubit sets, and each unitary operator in the unitary operator set is used to evolve the quantum state of the qubit set to the first quantum state, and the preparation operator architecture is used to indicate the operational relationship between the distribution operator, the permutation operator, and the unitary operator;
[0011] Under the operational relationship constraints indicated by the preparation operator architecture, the various distribution operators, the various permutation operators and the various unitary operators are combined to obtain a quantum state preparation operator, and the quantum state preparation operator is used to generate a quantum state preparation circuit, and the quantum state preparation circuit is used to act on the n quantum bits so that the quantum state of the n quantum bits evolves from the initial quantum state to the first quantum state.
[0012] According to one aspect of an embodiment of the present application, a device for generating a quantum state preparation circuit is provided, the device comprising:
[0013] An initial quantum state acquisition module, used to obtain n quantum bits under grid constraints and the initial quantum state of the n quantum bits, where n is a positive integer;
[0014] a qubit partitioning module, configured to partition the n qubits into a plurality of qubit sets, wherein the qubit set includes k qubits, the connections of the k qubits satisfy a subgrid restriction, the subgrids corresponding to the subgrid restriction are combined into a grid corresponding to the grid restriction, and k is a positive integer less than n;
[0015] An operator set determination module is used to determine a distribution operator set, a permutation operator set, a unitary operator set, and a preparation operator architecture in the process of recursively decomposing the n qubits with the qubit set as a unit and under the grid constraint, wherein each distribution operator in the distribution operator set is used to combine with each permutation operator in the permutation operator set to distribute the Hamming weight of the first quantum state to the multiple qubit sets, and to entangle the multiple qubit sets with each other, the permutation operator is used to exchange the quantum state between two of the qubit sets, and each unitary operator in the unitary operator set is used to evolve the quantum state of the qubit set to the first quantum state, and the preparation operator architecture is used to indicate the operational relationship between the distribution operator, the permutation operator, and the unitary operator;
[0016] A preparation operator determination module is used to combine the various allocation operators, the various permutation operators and the various unitary operators under the operation relationship constraints indicated by the preparation operator architecture to obtain a quantum state preparation operator, wherein the quantum state preparation operator is used to generate a quantum state preparation circuit, and the quantum state preparation circuit is used to act on the n quantum bits so that the quantum state of the n quantum bits evolves from the initial quantum state to the first quantum state.
[0017] According to one aspect of an embodiment of the present application, a computer device is provided, comprising a processor and a memory, wherein a computer program is stored in the memory, and the computer program is loaded and executed by the processor to implement the above-mentioned method for generating a quantum state preparation circuit.
[0018] According to one aspect of an embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored. The computer program is loaded and executed by a processor to implement the above-mentioned method for generating a quantum state preparation circuit.
[0019] According to one aspect of an embodiment of the present application, a computer program product is provided, comprising a computer program stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium and executes the computer program, causing the computer device to perform the aforementioned method for generating a quantum state preparation circuit.
[0020] According to one aspect of an embodiment of the present application, a quantum chip is provided, which includes a quantum state preparation circuit constructed by executing the above-mentioned method for generating a quantum state preparation circuit.
[0021] The technical solutions provided by the embodiments of the present application may have the following beneficial effects:
[0022] Due to grid restrictions, the allocation operator can only allocate weights to two adjacent qubit sets, such as allocating the weight of an allocated qubit set to an adjacent unallocated qubit set. However, the embodiments of the present application, by combining the quantum state exchange function of the permutation operator, can pull the quantum states of two adjacent qubit sets apart. For example, for two adjacent allocated qubit sets, under grid restrictions, the permutation operator can replace the quantum state of one of the allocated qubit sets with the quantum state of an unallocated qubit set. In this way, the replaced unallocated qubit set can allocate weights to the adjacent unallocated qubit set, while the other allocated qubit set can allocate weights to the replaced allocated qubit set, which is conducive to improving the parallelism of weight allocation. Therefore, for n qubits under grid restrictions, by utilizing a permutation operator with the function of exchanging the quantum states of two qubit sets, enough allocation operators can be used simultaneously to allocate Hamming weights to multiple qubit sets each time. That is, for the quantum state preparation circuit corresponding to the quantum state preparation operator, by utilizing the subcircuit that implements the permutation operator, a sufficient number of subcircuits that implement the allocation operator function can simultaneously operate on multiple qubit sets to achieve Hamming weight distribution. This improves the operational parallelism of the quantum state preparation circuit for Hamming weight distribution, thereby reducing the total number of Hamming weight distribution cycles required. Given a fixed number of quantum gate layers in the subcircuit that implements the allocation operator function, as the total number of Hamming weight distribution cycles required decreases, the total number of quantum gate layers required by the quantum state preparation circuit also decreases, effectively reducing the circuit depth of the quantum state preparation circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] FIG1 is a schematic diagram of an implementation environment of a solution provided by an embodiment of the present application;
[0024] FIG2 is a flow chart of a method for generating a quantum state preparation circuit provided by one embodiment of the present application;
[0025] FIG3 is a schematic diagram of a quantum bit set provided by one embodiment of the present application;
[0026] FIG4 is a schematic diagram of a quantum bit set provided by another embodiment of the present application;
[0027] FIG5 is a flowchart of a method for determining an allocation operator, a permutation operator, and a unitary operator provided by one embodiment of the present application;
[0028] Figures 6-12 exemplarily illustrate a schematic diagram of a recursive decomposition of n qubits under grid constraints;
[0029] FIG13 is a block diagram of a device for generating a quantum state preparation circuit according to an embodiment of the present application;
[0030] FIG14 is a block diagram of a device for generating a quantum state preparation circuit according to another embodiment of the present application;
[0031] FIG15 is a structural block diagram of a computer device provided in one embodiment of the present application. DETAILED DESCRIPTION
[0032] Before introducing the technical solutions of this application, some of the terms involved in this application are explained. The following related explanations can be combined with the technical solutions of the embodiments of this application as optional solutions, and they all fall within the scope of protection of the embodiments of this application. The embodiments of this application include at least part of the following contents.
[0033] 1. Quantum computing: A computing method based on quantum logic, such as leveraging the superposition and entanglement of quantum states to rapidly complete computational tasks. The basic unit of data storage is the qubit.
[0034] 2. Qubit: The basic unit of quantum computing. Traditional computers use 0 and 1 as the basic units of binary. However, quantum computing can process 0 and 1 simultaneously, and the system can be in a linear superposition of 0 and 1: |ψ> = α|0> + β|1>, where α and β represent the complex probability amplitude of the system at 0 and 1. Their squared modulus |α| 2 ,|β| 2 represent the probabilities of being 0 and 1 respectively.
[0035] 3. Quantum state: The quantum state of a system can be represented as a linear combination of basis states. For example, for a 1-qubit system, all possible basis states are 0 and 1, while for a 3-qubit system, all possible basis states are 000, 001, 010, 011, 100, 101, 110, 111, a total of 8. Let these basis states be φ i , then the quantum state can be expressed as ∑ i c i φ i , where c i are the linear combination coefficients.
[0036] 4. Quantum circuit: A representation of a quantum universal computer, representing the hardware implementation of a corresponding quantum algorithm or program within the quantum gate model. A quantum circuit acts on quantum states, generating new quantum states and performing quantum computations. A quantum circuit can be composed of a sequence of quantum gates and measurements, with computations performed by quantum gates. It can also be referred to as a quantum circuit.
[0037] 5. Circuit depth of a quantum circuit: This refers to the number of layers or depth of gate operations within a quantum circuit. A quantum circuit is the fundamental unit used to describe quantum computing and consists of qubits and quantum gates. If the circuit depth of a quantum circuit is equal to the number of quantum gate layers, it corresponds to the parallel execution time of the quantum algorithm. Due to the decoherence of qubits, i.e., entanglement decreases over time, a smaller circuit depth is preferred to ensure optimal quantum circuit operation.
[0038] 6. Qubit connectivity restrictions: In superconducting quantum devices, two-qubit gates (CNOTs) can only operate on specific qubit pairs. There are several different types of qubit connectivity restrictions, the most common of which are path restrictions and grid restrictions. Designing quantum circuits for Dicke states under these restrictions is crucial.
[0039] Path restriction: For n consecutive qubits, a two-qubit gate (CNOT) is only allowed to act on two adjacent qubits. The n-qubit circuit is said to be path restricted, denoted as Path n .
[0040] Grid restriction: In an n-qubit circuit arranged in a two-dimensional grid, a two-qubit gate is allowed to act only on two adjacent qubits. The n-qubit circuit is said to be grid restricted and is denoted by: It represents a two-dimensional grid of size n1×n2, satisfying the constraints of n=n1n2 and n1≤n2.
[0041] Among them, path restriction is a special grid restriction:
[0042] 7. Dicke states: These are an important type of entangled state with widespread applications in quantum networks, quantum game theory, and quantum algorithms. In particular, Dicke states serve as the initial quantum state for quantum algorithms that solve combinatorial problems, such as variational quantum algorithms and adiabatic computing, which are noisy medium-scale quantum algorithms.
[0043] The Dicke state is an equally weighted superposition of all n quantum states under the Hamming weight k constraint. For example, the (n, k)-Dicke state is defined as follows:
[0044] Here, the Hamming weight hw(x) represents the number of base states 1 in the n-qubit set x, and the binomial coefficient The individual qubits in an n-qubit circuit in the Dicke state are entangled with each other.
[0045] For example, the (4, 2)-Dicke state can be represented as follows:
[0046] 8. Dicke state preparation circuit: This refers to a circuit that, through a series of operations, places multiple qubits in the Dicke state, which can be implemented as a quantum circuit. This Dicke state preparation circuit can act on n qubits, causing the quantum state of these n qubits to evolve to the Dicke state.
[0047] Grid-confined n-qubit Dicke state preparation circuit C n , which can be used to prepare Dicke states And its two-qubit gate satisfies the grid restriction.
[0048] 9. Parallelism of quantum circuits: Multiple computations can be performed on the same quantum circuit at the same time. For example, the same quantum circuit can simultaneously calculate the function f(x) at different values of x.
[0049] 10. Superconducting Quantum Chip: The central processing unit of a quantum computer, which uses the superposition principle and quantum entanglement of quantum mechanics to perform calculations. It has strong parallel processing capabilities and can solve some problems that are difficult for classical computers to calculate.
[0050] 11. [n] and [n]0 represent the integer sets {1, 2,…, n} and {0, 1, 2,…, n} respectively.
[0051] 12. Symbol 0 k and 1 k They represent a quantum bit set consisting of k basis states of 0 and k basis states of 1, respectively, that is, there are k quantum bits in the quantum bit set whose basis states are 0 or 1.
[0052] 13. If V represents a set of quantum bits, then the symbol |ψ> V represents the quantum state |ψ> of |V|-qubits, that is, the quantum state of the qubit set V.
[0053] 14. Dicke state unitary transformation (also called Dicke state unitary operator): It is used to evolve the quantum state of a qubit set to a Dicke state. For example, an n-qubit Dicke state unitary transformation acting on a qubit set S is satisfy:
[0054] in, Indicates a state, [k]0 represents the set of integers {0, 1, 2, …, k}.
[0055] 15. Weight distribution transformation (also called distribution operator): It is used to distribute the Hamming weight of a qubit set to it and another qubit set. For example, let S1 and S2 represent qubit sets of size k and disjoint, and all 2k qubits in S1 and S2 are in the path constraint Path n For any integer n≥m≥k, the weight distribution of a 2k-qubit is transformed satisfy:
[0056] in, like Then the binomial coefficient Here n is 2k.
[0057] The weight distribution transformation is a transformation that acts on the quantum bit sets S1 and S2. Its function is to 1 is allocated to S1 and S2, and each allocation method is given a different weight. For example, when S1 has 1, if i 1 and 1 is allocated to S2 and S1 respectively, then this allocation scheme can be given a weight
[0058] 16. Permutation transformations (also called permutation operators) under grid constraints: They can be used to exchange the basis states of qubits at corresponding positions in two qubit sets. For example, for any permutation π∈Sn of n elements, the permutation Uπ that satisfies the following transformation is called a permutation transformation.
[0059] Among them, x n is the nth element.
[0060] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.
[0061] Please refer to FIG1 , which shows a schematic diagram of an implementation environment of a solution provided by an embodiment of the present application. The implementation environment of the solution may include: a terminal device 10 and a server 20 .
[0062] The terminal device 10 may refer to any electronic device with strong computing capabilities, such as a mobile phone, desktop computer, tablet computer, laptop computer, PC (Personal Computer), vehicle-mounted terminal, intelligent robot, smart TV, multimedia playback device, etc. In some feasible examples, the terminal device 10 may also be implemented as a server, which is not limited in the embodiments of the present application.
[0063] The terminal device 10 can be used to construct a quantum state preparation operator for preparing a first quantum state (such as a Dicke state) for n quantum bits under grid constraints. For example, the terminal device 10 can be an industrial intelligent device for making a quantum state preparation circuit, such as a lithography device, a robotic arm, and other equipment required for industrial production. After constructing the quantum state preparation operator, it can construct a quantum state preparation circuit 40 (such as a quantum chip) based on the quantum state preparation operator. By operating the n quantum bits through the quantum state preparation circuit 40, the quantum state of the n quantum bits can be evolved into a first quantum state.
[0064] The quantum state preparation circuit 40 can be integrated into various smart terminals, such as smart phones, tablet computers, laptops, desktop computers, smart speakers, smart watches, smart home appliances, multimedia playback devices, PCs (Personal Computers), smart robots, vehicle terminals, wearable devices and other electronic devices, but the embodiments of the present application are not limited to this.
[0065] Optionally, a client of a target application for constructing a quantum state preparation operator and a quantum state preparation circuit is installed and run in the terminal device 10, and the server 20 is used to provide background services for the client of the target application in the terminal device 10. For example, the server 20 can be a background server of the target application. The server 20 can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers. It can also be a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms. The embodiments of the present application are not limited to this.
[0066] The terminal device 10 and the server 20 can communicate with each other via a network 30. The network 30 can be a wired network or a wireless network.
[0067] Below, the technical solution provided by this application will be introduced and explained through method embodiments.
[0068] Please refer to Figure 2, which shows a flow chart of a method for generating a quantum state preparation circuit provided by one embodiment of the present application. The execution subject of each step of the method can be the terminal device 10 in the implementation environment of the solution shown in Figure 1. For the sake of ease of description, only the execution subject of each step is described as the "client in the terminal device 10". The method can include at least one of the following steps (201-204):
[0069] Step 201: Obtain n quantum bits under grid constraints and the initial quantum states of the n quantum bits, where n is a positive integer.
[0070] The distribution of n qubits under the grid constraint satisfies the grid constraint. For example, each vertex of the grid has a qubit, and the edges of the grid indicate that a two-qubit gate can be added between the two qubits corresponding to that edge. If there is no edge between two qubits, a two-qubit gate cannot be added between them, meaning that the two qubits cannot be directly entangled.
[0071] The present embodiment of the present application does not limit the grid restriction. It can be a path restriction (i.e., the corresponding grid is a one-dimensional grid), a two-dimensional grid restriction (i.e., the corresponding grid is a two-dimensional grid), or a three-dimensional grid restriction (i.e., the corresponding grid is a three-dimensional grid). The present embodiment of the present application uses a two-dimensional grid restriction as an example to illustrate the method for generating a quantum state preparation circuit.
[0072] In one example, each row of the grid corresponds to n2 qubits, and each column of the grid corresponds to n1 qubits, i.e., the grid has n1 rows and n2 columns, n = n1n2, n2 ≥ n1, where n1 is a positive integer and n2 is a positive integer. For example, referring to Figure 1, the n qubits are distributed according to the two-dimensional grid shown in Figure 1. The number of vertices of the two-dimensional grid matches the number of qubits, with a qubit distributed at each vertex. The connections between the qubits satisfy the edge constraints of the two-dimensional grid. A two-qubit gate can be added between two qubits with edge constraints to generate entanglement.
[0073] The above-mentioned initial quantum state is used to indicate the initial basis state of each of the n quantum bits (such as all are 0) and the initial entanglement relationship between the n quantum bits (such as no entanglement). The embodiment of the present application does not limit the initial quantum state of the n quantum bits.
[0074] Step 202: divide the n qubits into multiple qubit sets, each qubit set includes k qubits, the connection of the k qubits satisfies the subgrid restriction, the subgrids corresponding to the subgrid restriction are combined into a grid corresponding to the grid restriction, and k is a positive integer less than n.
[0075] Optionally, under grid constraints, n qubits are divided into multiple qubit sets, such as dividing the grid into multiple sub-grids, and the qubits corresponding to each sub-grid are determined as a qubit set, which can also be called a qubit string or qubit set.
[0076] In one example, n qubits can be evenly divided into multiple qubit sets, that is, each qubit includes k qubits, n qubits can be evenly divided into n / k qubit sets, and the grid can be evenly divided into n / k subgrids. The subgrid restriction means that the connection of each qubit in the qubit set satisfies the subgrid. The embodiment of the present application does not limit the grid division method, which can be set and adjusted according to actual usage requirements.
[0077] For example, when k≥n2 / n1, the rows of the subgrid correspond to qubits, the columns of the subgrid correspond to For example, referring to FIG3 , the grid 300 is divided into n / k qubits. In each row and column of the grid 300, there are subgrids, each subgrid corresponds to k qubits. For any i, j∈[2 r ], the quantum bit set corresponding to the sub-grid in row i and column j is denoted as S i,j Without loss of generality, in order to facilitate the introduction of the technical solutions provided by the embodiments of the present application, the embodiments of the present application are as follows: and Integers are used as examples for illustration.
[0078] Optionally, in If both are not integers, the grid can be re-divided as follows. For example, the grid is divided into sub-grids of different sizes, but the number of quantum bits is on the order of O(k). The grid is divided into OK, Column subgrid. Line and front The size of the column subgrid is Before the last column The size of the subgrid is No. Front of column The size of the subgrid is No. Before the trip The size of the subgrid is No. Rank The subgrid size of the column is
[0079] In the case of 1≤k≤n2 / n1, the rows of the subgrid correspond to k qubits, and the columns of the subgrid correspond to 1 qubit. For example, referring to FIG4, the grid 300 is divided into n / k subgrids of size 1×k, and each row of the grid 300 corresponds to There are n1 subgrids in each column of grid 300, and each subgrid corresponds to k qubits. For any i∈[n1], j∈[n2 / k], the set of qubits corresponding to the subgrid in row i and column j is denoted as S i,j Without loss of generality, in order to facilitate the introduction of the technical solutions provided by the embodiments of the present application, the embodiments of the present application use n / k as the example. Integers are used as examples for illustration.
[0080] In one example, the value of k is equal to the Hamming weight of a first quantum state, where the first quantum state is the quantum state to which the n qubits need to evolve, such as a Dicke state. For example, the value of k is equal to the Hamming weight that results in the n qubits being in the Dicke state.
[0081] Optionally, after dividing the n qubits into multiple qubit sets, the multiple qubit sets can be initialized so that the quantum state of the n qubits smoothly evolves from the initial quantum state to the first quantum state. Exemplarily, the quantum state of the first qubit set from the left in the first row of the multiple qubit sets is replaced with 1, and the quantum states of the remaining qubit sets in the multiple qubit sets are replaced with 0. That is, the basis states of the k qubits corresponding to the first subnet in the upper left corner of the grid are all initialized to 1, and the basis states of the remaining n-qubits are all initialized to 0. This facilitates distributing the Hamming weight of the first quantum state to each qubit set, so that the above-mentioned n qubit sets satisfy the Hamming weight of the first quantum state.
[0082] For example, referring to Figure 3, when the initial basis states of n qubits are all 0, Acting on the first quantum bit set S 1,1 On the first quantum bit set S 1,1 The basis states of the k qubits in are initialized to 1. For the remaining nk qubits, no action is required.
[0083] Optionally, due to the Effect on Available on Without loss of generality, the embodiment of the present application can set k≤n / 2, that is, for k≤n / 2, when preparing the After the quantum state preparation operator is obtained, effect A quantum state preparation operator for k>n / 2 is prepared, which can effectively reduce the workload of constructing the quantum state preparation operator.
[0084] Step 203, in the process of recursively decomposing n quantum bits under grid constraints with quantum bit sets as units, determine a distribution operator set, a permutation operator set, a unitary operator set, and a preparation operator architecture, wherein each distribution operator in the distribution operator set is used to combine with each permutation operator in the permutation operator set to distribute the Hamming weight of the first quantum state to multiple quantum bit sets, and to make the multiple quantum bit sets entangled with each other, the permutation operator is used to exchange the quantum state between two quantum bit sets, and each unitary operator in the unitary operator set is used to make the quantum state of the quantum bit set evolve to the first quantum state, and the preparation operator architecture is used to indicate the operational relationship between the distribution operator, the permutation operator and the unitary operator.
[0085] In an embodiment of the present application, recursive decomposition is a process of gradually re-decomposing the above-mentioned multiple qubit sets from a whole into n / k qubit sets of size k (i.e., the qubit sets after conversion described below). For example, the multiple qubit sets are first divided into two qubit sets as a whole, and then the two qubit sets are divided into 4 qubit sets respectively, until the n qubits are divided into qubit sets of size k. Optionally, the size of the re-decomposed qubit set is consistent with the size of the original qubit set, the position of the re-decomposed qubit set is consistent with the position of the original qubit set, and the quantum state of the re-decomposed qubit set is different from the quantum state of the original qubit set.
[0086] Recursive decomposition under grid constraints refers to the process of dividing the quantum bit set according to the constraints of the grid. For example, referring to Figure 3, under the constraints of grid 300, 2 r ×2 r The quantum bit set is divided into two parts: S L and S R , represents the portion corresponding to the left side of the grid 300 (i.e., the multiple quantum bit sets corresponding to the left side), represents the part corresponding to the right side of the grid 300 (i.e., the multiple quantum bit sets corresponding to the right side). This process is called a recursive decomposition process. Under the constraints of the grid 300, we can respectively L and S R Divide, this process is called another recursive decomposition process, and by analogy, n quantum bits can be re-divided into 2 r ×2 r A set of quantum bits.
[0087] The recursive decomposition includes multiple recursive decomposition processes, and the distribution operator set includes the distribution operators in each recursive decomposition process. The distribution operator set is used to transfer the Hamming weight of the first quantum state from the first quantum bit set (S 1,1 ) are allocated to each quantum bit set (S 1,1 to ), and each quantum bit set (S 1,1 to ) are entangled with each other.
[0088] The permutation operator set includes the permutation operators used in each recursive decomposition process, and the permutation operator set is used to assist the allocation operator set in allocating the Hamming weight of the first quantum state. For example, for two adjacent allocated qubit sets, under grid constraints, the permutation operator can be used to permute the quantum state of one of the allocated qubit sets to the quantum state of an unallocated qubit set. In this way, the permuted unallocated qubit set can allocate weights to its adjacent unallocated qubit set, while the other allocated qubit set can allocate weights to the permuted allocated qubit set. Thus, for n qubits under grid constraints, by combining the allocation operator and the permutation operator to allocate the Hamming weight of the first quantum state to multiple qubit sets, the Hamming weights of multiple qubit sets can be allocated simultaneously based on multiple allocation operators, thereby improving the operational parallelism of the quantum state preparation operator composed of the allocation operator and the permutation operator, and effectively reducing the number of quantum gate layers required for the quantum state preparation circuit used to implement the quantum state preparation operator.
[0089] The preparation operator architecture in the embodiment of the present application may refer to a formula, relational expression, etc. with allocation operators, permutation operators and unitary operators as elements, which can reflect the usage of allocation operators, permutation operators and unitary operators in each recursive decomposition process, as well as the relationship between the recursive decomposition processes.
[0090] In one example, since the recursive decomposition method is the same when k≥n2 / n1 and 1≤k≤n2 / n1, the following description will be made using k≥n2 / n1 as an example.
[0091] Step 203a, in the lateral direction of the grid, with the quantum bit set as the unit, multiple quantum bit sets are recursively decomposed multiple times horizontally under the grid constraint to obtain multiple quantum bit columns, wherein the row width of the quantum bit column is the same as the row width of the sub-grid, and the column width of the quantum bit column is the same as the column width of the grid.
[0092] Optionally, the embodiment of the present application divides the recursive decomposition into horizontal recursive decomposition and vertical recursive decomposition. The horizontal recursive decomposition refers to the process of dividing n quantum bits according to the horizontal direction (n2) of the grid (that is, the size in the vertical direction remains unchanged), and the vertical recursive decomposition refers to the process of dividing n quantum bits according to the longitudinal direction (n1) of the grid (that is, the size in the horizontal direction remains unchanged).
[0093] A qubit column is a qubit set that is arranged in columns. Each column of qubit sets corresponding to a grid can form a qubit column, and two adjacent qubit columns can be combined into a large qubit column. For example, referring to FIG3 , for grid 300, the first column of subgrids S in grid 300 is composed of 1,1 to The quantum bit set obtained by combining the corresponding quantum bit sets is a quantum bit sequence. After multiple horizontal recursive decompositions, we can get 2 r The size is ) of quantum bit arrays.
[0094] For example, in the first horizontal recursive decomposition process, the horizontal recursive decomposition process may include the following contents:
[0095] 1. Divide multiple quantum bit sets into two first-order initial quantum bit sequences under grid constraints.
[0096] Optionally, taking the quantum bit set as a unit, n quantum bits are evenly divided into two first-order initial quantum bit sequences under the grid constraint, each first-order initial quantum bit sequence includes 2 r-1 qubit arrays, such as S above L and S R .
[0097] 2. Assign weights to the first quantum bit set from the left and the second quantum bit set from the left in the first row of the first first-order initial quantum bit sequence from the left to obtain the adjusted first first-order initial quantum bit sequence.
[0098] For example, based on the above embodiment, S L (The first 1st order initial quantum bit column from the left) in the first row S 1,1 (first qubit set from the left) and S 1,2 (The second quantum bit set from the left) is weighted and the adjusted S is obtained L .
[0099] Among them, weight distribution refers to the S 1,1 The Hamming weight assigned to S 1,1 and S 1,2 .
[0100] 3. Perform quantum state exchange on the second quantum bit set from the left in the first row of the adjusted first first-order initial quantum bit sequence and the first quantum bit set from the left in the first row of the second first-order initial quantum bit sequence to obtain two first-order quantum bit sequences.
[0101] For example, the adjusted S L In the first row of S 1,2 , and S R In the first row (the second first-order initial quantum bit column from the left) (The first quantum bit set from the left) performs quantum state exchange to obtain two first-order quantum bit sequences (denoted as the final S L and finally S R ).
[0102] Among them, quantum state exchange refers to the exchange of S 1,2 and The quantum state of .
[0103] In the second and subsequent horizontal recursive decomposition processes, the horizontal recursive decomposition process may include the following:
[0104] 1. During the r-th horizontal recursive decomposition process, for each r-1-th order quantum bit sequence, the r-1-th order quantum bit sequence is divided into two r-th order initial quantum bit sequences under the grid constraint, where r is an integer greater than 1.
[0105] Optionally, after the first horizontal recursive decomposition, two first-order quantum bit arrays can be obtained, and after the rth horizontal recursive decomposition, two r There are r-th order quantum bit sequences. In the case of , the embodiment of the present application completes the horizontal recursive decomposition. That is, when the row width of the r-th order quantum bit column is the same as the row width of the sub-grid, the r-th order quantum bit column can be determined as the quantum bit column.
[0106] Due to S 1,2 and After quantum state exchange, the embodiments of the present application can perform horizontal recursive decomposition of two first-order qubit sequences in parallel. This helps improve the operational parallelism of the quantum state preparation operator, effectively reducing the number of quantum gate layers required for the quantum state preparation circuit used to implement the quantum state preparation operator. Because the decomposition method for each r-1th order qubit sequence is the same, the embodiments of the present application illustrate the decomposition of any first-order qubit sequence.
[0107] For example, with the final S L For example, under the constraint of grid 300, the final S L (r-1th order quantum bit array) is evenly divided into S LLand S LR (2 initial quantum bit sequences of order r). For the final S R , under the constraint of grid 300, the final S R Divide into S RL and S RR (2 initial quantum bit sequences of order r), a total of 2 2 An initial quantum bit sequence of order r.
[0108] 2. Assign weights to the first quantum bit set from the left and the second quantum bit set from the left in the first row of the first r-th order initial quantum bit sequence from the left to obtain an adjusted first r-th order initial quantum bit sequence.
[0109] For the final S L , for S LL In the first row of S 1,1 and S 1,2 Perform weight distribution and obtain the adjusted S LL For the final S R , for S RL In the first line of and Perform weight distribution and obtain the adjusted S RL .
[0110] 3. Exchange the quantum states of the second quantum bit set from the left in the first row of the adjusted first r-th order initial quantum bit sequence and the first quantum bit set from the left in the first row of the second r-th order initial quantum bit sequence to obtain two r-th order quantum bit sequences.
[0111] The adjusted S LL In the first row of S 1,2 , and S LR In the first line of Perform quantum state exchange to obtain two r-th order quantum bit sequences; after adjusting S RL In the first line of and S RR In the first line of Perform quantum state exchange to obtain two r-th order quantum bit sequences.
[0112] Step 203b: During the multiple horizontal recursive decomposition processes, the allocation operator and the permutation operator corresponding to each horizontal recursive decomposition are determined, and a sub-preparation operator architecture corresponding to the horizontal recursive decomposition is constructed.
[0113] For example, in the first horizontal recursive decomposition process, step 203b may include the following:
[0114] 1. Based on the first quantum bit set from the left and the second quantum bit set from the left in the first row of the first-order initial quantum bit column from the left, determine the distribution operator corresponding to the first horizontal recursive decomposition.
[0115] Optionally, since the n quantum bits are divided into two first-order quantum bit sequences during the first horizontal recursive decomposition process, the Hamming weight of the first quantum state can be assigned to the two first-order quantum bit sequences.
[0116] For example, the weight distribution transformation can be used to construct the distribution operator corresponding to the first horizontal recursive decomposition, which can be expressed as follows:
[0117] 2. Based on the second quantum bit set from the left in the first row of the adjusted first first-order initial quantum bit column and the first quantum bit set from the left in the first row of the second first-order initial quantum bit column from the left, determine the permutation operator corresponding to the first horizontal recursive decomposition.
[0118] Optionally, since in the grid S 1,1 and S 1,2 Adjacent, in order to enable the subsequent replacement transformation to be implemented in parallel, the embodiment of the present application exchanges S 1,2 and The quantum state of , can be constructed based on the permutation transformation under grid restriction, and the permutation operator corresponding to the first horizontal recursive decomposition can be expressed as follows:
[0119] 3. Based on two first-order quantum bit arrays, determine the sub-preparation operator architecture corresponding to the first horizontal recursive decomposition.
[0120] For example, for any The construction process of the sub-preparation operator architecture corresponding to the first lateral recursive decomposition of the n-qubit Dicke state unitary transformation can be as follows:
[0121] Without loss of generality, the above n / 2 is an integer. Optionally, the sub-preparation operator architecture corresponding to the first horizontal recursive decomposition can be expressed as follows:
[0122] in, Can be decomposed into and
[0123] In the rth horizontal recursive decomposition process, step 203b may include the following:
[0124] 1. For each r-1th order quantum bit sequence, based on the first quantum bit set from the left and the second quantum bit set from the left in the first row of the first r-th order initial quantum bit sequence from the left, determine the sub-allocation operator corresponding to the r-1th order quantum bit sequence in the rth horizontal recursive decomposition.
[0125] Optionally, each r-1th order quantum bit sequence can be divided into two r-th order initial quantum bit sequences, and for each r-1th order quantum bit sequence, its corresponding unitary operator can be decomposed into a combination of the unitary operators corresponding to the two r-th order initial quantum bit sequences, the distribution operator and the permutation operator.
[0126] For example, for It can be expressed as follows:
[0127] That is to say Can be further decomposed into
[0128] Among them, for S L Divide into two parts, denoted as S LL and S LR In S L The first two qubit sets S in the first row 1,1 and S 1,2 Upper action weight distribution transformation Then use the replacement Exchange S 1,2 and S L,R The first qubit set in the upper left corner Finally, in parallel in S LL and S LR Act on n / 2 2 -Dicke state unitary transformation of quantum bits and
[0129] Optionally, The decomposition method and The same, no further details will be given here. and They act on two non-intersecting grids, so they can be implemented in parallel, which is beneficial to improving the operational parallelism of the quantum state preparation operator and effectively reducing the number of quantum gate layers required for the quantum state preparation circuit used to implement the quantum state preparation operator.
[0130] For example, in the second horizontal recursive decomposition process, two sub-allocation operators can be obtained: and
[0131] 2. Based on the second quantum bit set from the left in the first row of the adjusted first r-th order initial quantum bit column and the first quantum bit set from the left in the first row of the second r-th order initial quantum bit column, determine the sub-permutation operator corresponding to the r-1-th order quantum bit column in the r-th horizontal recursive decomposition.
[0132] For example, in the second horizontal recursive decomposition process, two sub-permutation operators can be obtained: and
[0133] 3. Based on the sub-allocation operators corresponding to the r-th horizontal recursive decomposition of each r-1th order quantum bit sequence, the allocation operator corresponding to the r-th horizontal recursive decomposition is obtained.
[0134] Optionally, the sub-distribution operators corresponding to the r-1th order quantum bit columns in the rth horizontal recursive decomposition may be collectively referred to as the distribution operators corresponding to the rth horizontal recursive decomposition.
[0135] 4. Based on the sub-permutation operators corresponding to the r-th horizontal recursive decomposition of each r-1th order quantum bit sequence, the permutation operator corresponding to the r-th horizontal recursive decomposition is obtained.
[0136] Optionally, the sub-permutation operators corresponding to the r-1th order quantum bit columns in the r-th horizontal recursive decomposition may be collectively referred to as the permutation operators corresponding to the r-th horizontal recursive decomposition.
[0137] 5. Based on the two r-th order quantum bit sequences corresponding to each r-1-th order quantum bit sequence and the sub-preparation operator architecture corresponding to the r-1-th horizontal recursive decomposition, determine the sub-preparation operator architecture corresponding to the r-th horizontal recursive decomposition.
[0138] Optionally, the decomposition relation of the unitary operator corresponding to each r-1th order quantum bit sequence is substituted into the sub-preparation operator architecture corresponding to the r-1th horizontal recursive decomposition to obtain the sub-preparation operator architecture corresponding to the rth horizontal recursive decomposition.
[0139] This decomposition is continued recursively until the n-qubit Dicke state unitary transformation is decomposed into 2 r indivual The Dicke state unitary transformation of the quantum bit is the Dicke state unitary transformation acting on the j-th column subgrid After that, stop the horizontal recursive decomposition.
[0140] Optionally, for the last horizontal recursive decomposition, since it is no longer necessary to perform Hamming weight distribution in the horizontal direction, quantum state exchange may no longer be performed, that is, for the last horizontal recursive decomposition, there is no need to construct a permutation operator.
[0141] Step 203c: For each quantum bit column, in the longitudinal direction of the grid, with the quantum bit set as the unit, the quantum bit column is recursively decomposed multiple times in the longitudinal direction under the grid constraint to obtain multiple converted quantum bit sets, wherein the converted quantum bit sets correspond one to one with the quantum bit sets, the row width of the converted quantum bit set is the same as the row width of the sub-grid, and the column width of the converted quantum bit set is the same as the column width of the sub-grid.
[0142] Optionally, after getting 2 r After the quantum bit array, 2 r This is beneficial for improving the operational parallelism of the quantum state preparation operator. For example, in the vertical direction of the grid, multiple qubit sequences are simultaneously subjected to multiple vertical recursive decompositions under the constraints of the grid, using qubit sets as units. Since the vertical recursive decompositions of each qubit sequence are the same, this embodiment of the application only uses the vertical recursive decomposition of a particular qubit sequence as an example for explanation.
[0143] The converted qubit sets satisfy the Hamming weight of the first quantum state and are entangled with each other. Each qubit set corresponds to a converted qubit set, and the converted qubit set and its corresponding qubit set have the same size, dimensions, and position.
[0144] For example, in the first vertical recursive decomposition process, step 203c may include the following:
[0145] 1. For each qubit column, divide the qubit column into two first-order initial qubit rows under grid constraints.
[0146] In the embodiment of the present application, a quantum bit row refers to a quantum bit set obtained by arranging multiple quantum bit sets in rows, and two adjacent quantum bit rows can be combined into a large quantum bit row.
[0147] For example, referring to FIG3 , taking the first qubit column from the left in the grid 300 as an example, it can be evenly divided into two first-order initial qubit rows: S U and S D , Represents the upper half of the first quantum bit column from the left, Represents the lower half corresponding to the first quantum bit column from the left.
[0148] 2. Assign weights to the first quantum bit set and the second quantum bit set in the first first-order initial quantum bit row to obtain the adjusted first first-order initial quantum bit row.
[0149] For example, for S US in 1,1 and S 1,2 Perform weight distribution and obtain the adjusted S U .
[0150] 3. Exchange the quantum states of the second quantum bit set from the previous row in the adjusted first first-order initial quantum bit row and the first quantum bit set from the previous row in the second first-order initial quantum bit row to obtain two first-order quantum bit rows.
[0151] For example, for the adjusted S U S in 1,2 , and S D in By exchanging quantum states, we can obtain two first-order quantum bit rows.
[0152] In the s-th vertical recursive decomposition process, step 203c may include the following:
[0153] 1. For each s-1th order quantum bit row, divide the s-1th order quantum bit row into two rth order initial quantum bit rows under the grid constraint, where s is an integer greater than 1.
[0154] 2. Assign weights to the first qubit set and the second qubit set in the first s-th order initial qubit row to obtain an adjusted first s-th order initial qubit row.
[0155] 3. Exchange the quantum states of the second quantum bit set from the previous row in the adjusted first s-th initial quantum bit row and the first quantum bit set from the previous row in the second s-th initial quantum bit row to obtain two s-th quantum bit rows.
[0156] Optionally, in a case where the column width of the s-th order quantum bit row is the same as the column width of the sub-grid, the s-th order quantum bit row is determined as the converted quantum bit set.
[0157] For example, using the same method as horizontal recursive decomposition, Perform multiple recursive decompositions until the Dicke state unitary transformation with a size of k-qubits is decomposed. until.
[0158] Step 203d: During the multiple vertical recursive decomposition processes, the allocation operator and the permutation operator corresponding to each vertical recursive decomposition are determined, and a preparation operator architecture is constructed based on the sub-preparation operator architecture.
[0159] During the first vertical recursive decomposition process, step 203d may include the following:
[0160] 1. For each qubit sequence, determine the allocation operator corresponding to the first vertical recursive decomposition based on the first qubit set and the second qubit set in the first 1st-order initial qubit row.
[0161] Optionally, the allocation operator corresponding to the first vertical recursive decomposition can be expressed as follows:
[0162] 2. Based on the second qubit set from the previous row of the adjusted first first-order initial qubits and the first qubit set from the previous row of the second first-order initial qubits, determine the permutation operator corresponding to the first vertical recursive decomposition.
[0163] Alternatively, the permutation operator corresponding to the first vertical recursive decomposition can be expressed as follows:
[0164] 3. Based on two first-order quantum bit rows and the sub-preparation operator architecture corresponding to the horizontal recursive decomposition, the sub-preparation operator architecture corresponding to the first vertical recursive decomposition is constructed.
[0165] Optionally, each The decomposition relation of is brought into the sub-preparation operator architecture corresponding to the horizontal recursive decomposition, and the sub-preparation operator architecture corresponding to the first vertical recursive decomposition can be obtained.
[0166] In the s-th vertical recursive decomposition process, step 203d may include the following:
[0167] 1. For each s-1th order qubit row, determine the sub-allocation operator corresponding to the s-1th order qubit row in the sth vertical recursive decomposition based on the first qubit set and the second qubit set in the first s-th order initial qubit row.
[0168] Optionally, the sub-allocation operator corresponding to the s-1th order quantum bit row in the sth vertical recursive decomposition is determined in the same way as the allocation operator corresponding to the 1st vertical recursive decomposition, and will not be repeated here.
[0169] 2. Based on the first quantum bit set from the previous row of the adjusted s-th initial quantum bit row and the first quantum bit set from the previous row of the second s-th initial quantum bit row, determine the sub-permutation operator corresponding to the s-1-th quantum bit row in the s-th vertical recursive decomposition.
[0170] Optionally, the sub-permutation operator corresponding to the s-1th order quantum bit row in the sth vertical recursive decomposition is determined in the same way as the permutation operator corresponding to the 1st vertical recursive decomposition, and will not be repeated here.
[0171] 3. Based on the sub-distribution operators corresponding to each s-1th order quantum bit row in the sth vertical recursive decomposition, the distribution operator corresponding to the sth vertical recursive decomposition is obtained.
[0172] 4. Based on the sub-permutation operators corresponding to each s-1th order quantum bit row in the sth vertical recursive decomposition, obtain the permutation operator corresponding to the sth vertical recursive decomposition.
[0173] 5. Based on the two s-th order qubit rows corresponding to each s-1-th order qubit row and the sub-preparation operator architecture corresponding to the s-1-th vertical recursive decomposition, determine the sub-preparation operator architecture corresponding to the s-th vertical recursive decomposition.
[0174] Optionally, the decomposition relation of the unitary operator corresponding to each s-1th order quantum bit row is brought into the sub-preparation operator architecture corresponding to the s-1th vertical recursive decomposition, and the sub-preparation operator architecture corresponding to the sth vertical recursive decomposition can be constructed.
[0175] Optionally, for the last vertical recursive decomposition, since it is no longer necessary to perform Hamming weight distribution in the vertical direction, quantum state exchange may no longer be performed, that is, for the last vertical recursive decomposition, there is no need to construct a permutation operator.
[0176] Step 203e: Obtain a set of allocation operators based on the allocation operators corresponding to each horizontal recursive decomposition and the allocation operators corresponding to each vertical recursive decomposition.
[0177] Optionally, the allocation operators may be sorted according to the order of recursive decomposition to obtain a set of allocation operators.
[0178] Step 203f: Obtain a permutation operator set based on the permutation operators corresponding to each horizontal recursive decomposition and the permutation operators corresponding to each vertical recursive decomposition.
[0179] Optionally, the permutation operators may be sorted according to the order of recursive decomposition to obtain a permutation operator set.
[0180] Step 203g: Determine the unitary operator of each converted quantum bit set to obtain a unitary operator set.
[0181] For example, based on the Dcike state unitary transformation, the Dicke state unitary operator of each converted quantum bit set is constructed, and then the Dicke state unitary operators are sorted in the order of recursive decomposition to obtain the Dicke state unitary operator set. Among them, the Dcike state unitary transformation is used to evolve the quantum state of the quantum bit set to the Dicke state. Optionally, the Dicke state unitary operator of each converted quantum bit set can be constructed in parallel (that is, it can act in parallel on each converted quantum bit set so that the quantum state of each converted quantum bit set evolves to the Dicke state), which is conducive to further improving the construction efficiency of the quantum state preparation operator and the operational parallelism of the quantum state preparation operator, so that the number of quantum gate layers required for the quantum state preparation circuit used to realize the quantum state preparation operator is effectively reduced, thereby reducing the circuit depth of the quantum state preparation circuit corresponding to the quantum state preparation operator.
[0182] Step 204: Under the constraints of the operation relationship indicated by the preparation operator architecture, combine the various allocation operators, the various permutation operators, and the various unitary operators to obtain a quantum state preparation operator. The quantum state preparation operator is used to generate a quantum state preparation circuit. The quantum state preparation circuit is used to act on n quantum bits so that the quantum state of the n quantum bits evolves from an initial quantum state to a first quantum state.
[0183] Optionally, each distribution operator, each permutation operator, and each unitary operator may be placed at a corresponding position in the preparation operator architecture to obtain a quantum state preparation operator.
[0184] For example, and Placed in At the corresponding position in , the quantum state preparation operator can be obtained.
[0185] In one example, taking the Dicke state as an example, since the n-qubit Dicke state unitary transformation can be decomposed into multiple k-qubit Dicke state unitary transformations, multiple weight distribution transformations, and multiple permutation transformations, the embodiment of the present application can process multiple k-qubit unitary transformations through multiple weight distribution transformations and multiple permutation transformations under the operation relationship constraints indicated by the preparation operator architecture to obtain a Dicke state preparation operator. Then step 204 may also include the following content:
[0186] 1. In the longitudinal direction of the grid, each unitary operator is divided according to every two adjacent converted quantum bit sets to obtain multiple unitary operator pairs.
[0187] For example, referring to FIG3, the converted S 1,1 The corresponding unitary operator, and the transformed S 2,1The corresponding unitary operator is determined as a unitary operator pair. For example, the converted S 1,2 The corresponding unitary operator, and the converted S 2,2 The corresponding unitary operators are determined as a unitary operator pair.
[0188] 2. Obtain the Kronecker product of multiple pairs of unitary operators.
[0189] For example, for the transformed S 1,1 and the converted S 2,1 , the Kronecker product of the corresponding unitary operator pair can be expressed as follows:
[0190] 3. According to the operation relationship indicated by the preparation operator architecture, determine the position and operation symbol of each Kronecker product, each distribution operator and each permutation operator in the preparation operator architecture.
[0191] For example, to prepare the operator architecture For example, based on the preparation operator architecture, we can get and The positions and operator symbols in the prepared operator architecture are as follows: the positions are the first, second and third positions respectively, and the operator symbols are “·” and “·” respectively.
[0192] 4. According to the positions and operation symbols of each Kronecker product, each distribution operator and each permutation operator in the preparation operator architecture, each Kronecker product, each distribution operator and each permutation operator are combined to obtain a quantum state preparation operator.
[0193] For example, according to and The position and operator symbol in the preparation operator architecture are and By combining them, we can get the corresponding quantum state preparation operator.
[0194] The quantum state preparation operators in the embodiments of the present application can reflect the logical relationship of operations, such as the logical relationship of operations acting on n qubits. For example, the Dicke state preparation operator can reflect the action logic of the distribution operator and the permutation operator in each recursive decomposition process, as well as the action logic of the Dicke state unitary operator of each converted qubit set after the n qubits are decomposed.
[0195] Optionally, the quantum state preparation operator can be used to implement a quantum state preparation circuit to operate on n quantum bits. Exemplarily, each operator in the quantum state preparation operator can be implemented as a corresponding functional module, and the functional module can be implemented as a subcircuit (such as a quantum circuit) for implementing the function. By combining the functional modules according to the quantum state preparation operator, a quantum state preparation circuit can be obtained. The quantum state preparation operator can be used to indicate the order in which the functional modules act on the n quantum bits. For example, the above-mentioned recursive decomposition process (such as the above-mentioned horizontal recursive decomposition process and the vertical recursive decomposition process) corresponds to the order in which each group of functional modules acts, and each operator involved in a recursive decomposition process can generate a corresponding group of functional modules.
[0196] Optionally, n quantum bits can be operated on by a quantum state preparation circuit corresponding to a quantum state preparation operator so that the quantum state of the n quantum bits evolves from an initial quantum state to a first quantum state. For example, through the technical solution provided in the embodiment of the present application, under grid constraints, a Dicke state preparation operator for an n-qubit Dicke state unitary transformation can be constructed, and then a Dicke state preparation circuit corresponding to the Dicke state preparation operator is prepared, and the Dicke state preparation circuit is applied to n quantum bits, so that the quantum state of the n quantum bits can evolve from the initial quantum state to the Dicke state. The Dicke state preparation circuit corresponding to the Dicke state preparation operator can first perform a weight distribution transformation and a permutation transformation under grid constraints on the n quantum bits in sequence to distribute the Hamming weight of the Dicke state to n / k quantum bit sets, and then perform a k-qubit Dicke state unitary transformation on the n / k quantum bit sets in parallel, so that the quantum state of the n quantum bits can evolve from the initial quantum state to the Dicke state.
[0197] In summary, the technical solution provided by the embodiment of the present application is subject to grid restrictions, and the allocation operator can only allocate weights to two adjacent quantum bit sets, such as allocating the weight of an allocated quantum bit set to an unallocated quantum bit set adjacent to it. However, the embodiment of the present application, by combining the quantum state exchange function of the permutation operator, can pull the quantum states of two adjacent quantum bit sets apart. For example, for two adjacent allocated quantum bit sets, under the grid restriction, the quantum state of one of the allocated quantum bit sets can be replaced by the quantum state of an unallocated quantum bit set through the permutation operator. In this way, the replaced unallocated quantum bit set can allocate weights to the unallocated quantum bit set adjacent to it, and the other allocated quantum bit set can allocate weights to the replaced allocated quantum bit set, which is conducive to improving the parallelism of weight allocation. Therefore, for n quantum bits under the grid restriction, by utilizing the permutation operator with the function of exchanging the quantum states of two quantum bit sets, enough allocation operators can be used simultaneously to allocate Hamming weights to multiple quantum bit sets each time. That is, for the quantum state preparation circuit corresponding to the quantum state preparation operator, by utilizing the subcircuit that implements the permutation operator, a sufficient number of subcircuits that implement the allocation operator function can simultaneously operate on multiple qubit sets to achieve Hamming weight distribution. This improves the operational parallelism of the quantum state preparation circuit for Hamming weight distribution, thereby reducing the total number of Hamming weight distribution cycles required. Given a fixed number of quantum gate layers in the subcircuit that implements the allocation operator function, as the total number of Hamming weight distribution cycles required decreases, the total number of quantum gate layers required by the quantum state preparation circuit also decreases, effectively reducing the circuit depth of the quantum state preparation circuit.
[0198] In addition, by adopting the technical solution provided in the embodiment of the present application, the generation of quantum state preparation circuits under arbitrary grid constraints can be realized, thereby effectively improving the scope of application of the technical solution provided in the embodiment of the present application, and further expanding the preparation scope of quantum state preparation circuits.
[0199] In some embodiments, taking the generation of a Dicke state preparation circuit of n qubits under grid constraints as an example, the technical solutions provided in the embodiments of the present application may include the following:
[0200] Referring to FIG6 , the embodiment of the present application divides n qubits into 16 qubit sets of size k, that is, the grid 600 is evenly divided into 16 subgrids of size k. Each qubit set is constrained by its corresponding subgrid. For example, the qubit sets corresponding to these subgrids are denoted as S i,j ; where i∈[4], j∈[4].
[0201] In the first recursive decomposition process, as shown in Figure 6, in the quantum bit set S1,1 and S 1,2 Upper effect (That is, the distribution operator corresponding to the first recursive decomposition can be realized by the corresponding subcircuit in the Dicke state preparation circuit), and S 1,1 The corresponding Hamming weight is assigned to S 1,1 and S 1,2 Among them, S 1,1 The corresponding Hamming weight is the Hamming weight when n qubits are in the Dicke state, and the Hamming weights of the remaining qubit sets are all 0.
[0202] Then, as shown in FIG7 , at S 1,1 and S 1,3 The upper action P(S 1,2 ,S 1,3 ) (i.e., the permutation operator corresponding to the first recursive decomposition can be realized by the corresponding subcircuit in the Dicke state preparation circuit) to 1,1 and S 1,3 Perform quantum state exchange.
[0203] Optionally, the sub-preparation operator architecture corresponding to the first recursive decomposition can be expressed as follows:
[0204] Where L represents the eight subgrids on the left (i.e., the eight qubits on the left), and R represents the eight subgrids on the right (i.e., the eight qubits on the right). The n-qubit Dicke unitary transformation can be decomposed into two n / 2-qubit Dicke unitary transformations, a permutation transformation, and a weight distribution transformation.
[0205] In the second recursive decomposition process, as shown in Figure 8, in the quantum bit set S 1,1 and S 1,2 Upper effect (i.e., the sub-allocation operator corresponding to the second recursive decomposition), S 1,1 The assigned Hamming weight is again assigned to S 1,1 and S 1,2 , and in the quantum bit set S 1,3 and S 1,4 Upper effect (i.e. the sub-allocation operator corresponding to the second recursive decomposition), S 1,3 The Hamming weight assigned to S 1,3 and S 1,4 At the same time, the quantum bit arrays are entangled with each other.
[0206] Optionally, the sub-preparation operator architecture corresponding to the second recursive decomposition can be expressed as follows:
[0207] Among them, LL represents the first column of quantum bit sets (i.e., S 1,1 To S 4,1 The first qubit column is composed of 1 qubits, LR represents the second qubit column, RL represents the third qubit column, and RR represents the fourth qubit column. The n / 2-qubit Dicke unitary transformation can be decomposed into two n / 4-qubit Dicke unitary transformations, a permutation transformation, and a weight distribution transformation.
[0208] In the third recursive decomposition process, as shown in Figure 9, for any 1≤i≤4, in the quantum bit set S 1,i and S 2,i Upper effect That is, in parallel in S 1,1 and S 2,1 Upper effect (i.e., the sub-allocation operator corresponding to the third recursive decomposition), in S 1,2 and S 2,2 Upper effect In S 1,3 and S 2,3 Upper effect And in S 1,4 and S 2,4 Upper effect
[0209] Then, as shown in Figure 10, for any 1≤i≤4, in the quantum bit set S 2,i and S 3,i The upper action P(S 2,i ,S 3,i ), in exchange for S 2,i and S 3,i The quantum state of S. 2,1 and S 3,1 The upper action P(S 2,1 ,S 3,1 ) (i.e., the sub-permutation operator corresponding to the third recursive decomposition), in S 2,2 and S 3,2 The upper action P(S 2,2 ,S 3,2 ), in S 2,3 and S 3,3 The upper action P(S 2,3 ,S 3,3 ), and in S 2,4 and S 3,4 The upper action P(S 2,4 ,S 3,4 ).
[0210] Optionally, the sub-preparation operator architecture corresponding to the third recursive decomposition can be expressed as follows:
[0211] The n / 4-qubit Dicke state unitary transformation can be decomposed into two n / 8-qubit Dicke state unitary transformations (which can be implemented by corresponding subcircuits in the Dicke state preparation circuit), a permutation transformation and a weight distribution transformation.
[0212] In the fourth recursive decomposition process, as shown in Figure 11, for any 1≤i≤2 and 1≤j≤4, in the quantum bit set S 2i-1,j and S 2i,j Upper effect That is, in parallel in S 1,1 and S 2,1 Upper effect In S 1,2 and S 2,2 Upper effect In S 1,3 and S 2,3 Upper effect In S 1,4 and S 2,4 Upper effect And in S 3,4 and S 4,4 Upper effect
[0213] As shown in Figure 12, for any 1≤i≤4 and 1≤j≤4, in the quantum bit set S i,j Upper effect That is, in parallel in S 1,1 、S 1,2 ,…,S 4,4 Act on the Dicke state unitary transformation.
[0214] Alternatively, the sub-preparation operator architecture corresponding to the fourth recursive decomposition can be expressed as follows:
[0215] The n / 8-qubit Dicke state unitary transformation can be decomposed into two n / 16-qubit Dicke state unitary transformations, a permutation transformation and a weight distribution transformation.
[0216] Optionally, the distribution operator, permutation operator and unitary operator corresponding to the four recursive decompositions are respectively brought into the sub-preparation operator architecture corresponding to the fourth recursive decomposition to obtain the Dicke state preparation operator, and then based on the Dicke state preparation operator, the Dicke state preparation circuit is obtained.
[0217] Optionally, the Dicke state preparation circuit can follow the above four recursive decomposition processes, and sequentially apply the sub-circuit corresponding to the operator in each recursive decomposition process to n quantum bits, so that the n quantum bits can evolve into the Dicke state.
[0218] In some embodiments, the calculation process of the circuit depth corresponding to the quantum state preparation circuit implemented based on the above quantum state preparation operator can be as follows:
[0219] Let T(n) denote the circuit depth of the Dicke state preparation circuit that implements the n-qubit Dicke state unitary transformation. In the first recursive decomposition process, the n-qubit Dicke state unitary transformation is decomposed into a weight distribution transformation acting on 2k consecutive qubits on the path. A permutation transformation and two parallel n / 2-qubit Dicke state unitary transformations.
[0220] Since in the quantum bit set S 1,1 and S 1,2 There is a path in It can be implemented by a quantum circuit with a circuit depth of O(k), that is, the distribution operator is implemented by a quantum circuit with a circuit depth of O(k).
[0221] Permutation Transformation The function is to convert S 1,2 Each row of qubits and The quantum bits in the corresponding row exchange their base states. 1,2 and The distance in the grid is O(n2 / 2). Under the path restriction, the permutation transformation of each row can be realized by a quantum circuit of depth O(n2 / 2). Since these rows do not intersect each other, the permutation transformation It can be implemented by a quantum circuit with a circuit depth of O(n2 / 2). Similarly, the permutation transformation of each row can be implemented by a quantum circuit with a circuit depth of O(n1 / 2), that is, the permutation operator can be implemented by a quantum circuit with a circuit depth of O(n1 / 2) or O(n2 / 2).
[0222] Two parallel n / 2-qubit Dicke state unitary transformations can be implemented by a quantum circuit with a circuit depth of T(n / 2). The circuit depth of each horizontal recursive decomposition can be expressed as follows:
[0223] The circuit depth of each vertical recursive decomposition can be expressed as follows:
[0224] because Then T(n) = T(k) + O(k log(n / k)) + O(n²). Under the path restriction, the unitary operator is implemented by a quantum circuit with a circuit depth of O(k). That is, the unitary transformation of the Dicke state of a k-qubit can be implemented by a quantum circuit with a depth of T(k) = O(k).
[0225] Therefore, in the grid Under this restriction, the circuit depth of the Dicke state unitary transformation is (k log(n / k)+n²), which means that the circuit depth of the quantum state preparation circuit corresponding to the quantum state preparation operator is O(k log(n / k)+n²).
[0226] In addition, under grid constraints, the depth of the Dicke state preparation circuit is lower bounded by Ω(n²). When k ≤ O(n² / log(n)), the circuit depth of the Dicke state preparation circuit is O(log(n / k)k+n²)=O(n²), which matches the lower bound Ω(n²). Therefore, when k ≤ O(n² / log(n)), the circuit depth of the Dicke state preparation circuit provided by the embodiment of the present application is optimal.
[0227] The following are device embodiments of the present application, which can be used to implement the method embodiments of the present application. For details not disclosed in the device embodiments of the present application, please refer to the method embodiments of the present application.
[0228] Please refer to Figure 13, which shows a block diagram of a device for generating a quantum state preparation circuit according to one embodiment of the present application. The device 1300 may include: an initial quantum state acquisition module 1301, a qubit partitioning module 1302, an operator set determination module 1303, and a preparation operator determination module 1304.
[0229] The initial quantum state acquisition module 1301 is used to obtain n quantum bits under grid constraints and the initial quantum states of the n quantum bits, where n is a positive integer.
[0230] The quantum bit partitioning module 1302 is used to partition the n quantum bits into multiple quantum bit sets, where the quantum bit set includes k quantum bits, the connection of the k quantum bits satisfies the subgrid restriction, the subgrids corresponding to the subgrid restriction are combined into a grid corresponding to the grid restriction, and k is a positive integer less than n.
[0231] The operator set determination module 1303 is used to determine the allocation operator set, the permutation operator set, the unitary operator set, and the preparation operator architecture in the process of recursively decomposing the n quantum bits under the grid constraint with the quantum bit set as a unit, wherein each allocation operator in the allocation operator set is used to combine with each permutation operator in the permutation operator set to allocate the Hamming weight of the first quantum state to the multiple quantum bit sets, and to make the multiple quantum bit sets entangled with each other, the permutation operator is used to exchange the quantum state between two quantum bit sets, and each unitary operator in the unitary operator set is used to make the quantum state of the quantum bit set evolve to the first quantum state, and the preparation operator architecture is used to indicate the operational relationship between the allocation operator, the permutation operator and the unitary operator.
[0232] The preparation operator determination module 1304 is used to combine the various allocation operators, the various permutation operators and the various unitary operators under the operation relationship constraints indicated by the preparation operator architecture to obtain a quantum state preparation operator, wherein the quantum state preparation operator is used to generate a quantum state preparation circuit, and the quantum state preparation circuit is used to act on the n quantum bits so that the quantum state of the n quantum bits evolves from the initial quantum state to the first quantum state.
[0233] In some embodiments, as shown in FIG14 , the operator set determination module 1303 includes: a horizontal decomposition submodule 1303 a , an operator determination submodule 1303 b , and a vertical decomposition submodule 1303 c .
[0234] The horizontal decomposition submodule 1303a is used to recursively decompose the multiple quantum bit sets multiple times in the horizontal direction of the grid, with the quantum bit sets as units under the grid constraints, to obtain multiple quantum bit columns, wherein the row width of the quantum bit columns is the same as the row width of the sub-grid, and the column width of the quantum bit columns is the same as the column width of the grid.
[0235] The operator determination submodule 1303b is used to determine the allocation operator and the permutation operator corresponding to each horizontal recursive decomposition during the multiple horizontal recursive decompositions, and to construct a sub-preparation operator architecture corresponding to the horizontal recursive decompositions.
[0236] The vertical decomposition submodule 1303c is used to, for each of the quantum bit columns, recursively decompose the quantum bit columns multiple times in the vertical direction of the grid with the quantum bit set as a unit under the grid constraint to obtain multiple converted quantum bit sets, wherein the converted quantum bit sets correspond one-to-one to the quantum bit sets, the row width of the converted quantum bit set is the same as the row width of the sub-grid, and the column width of the converted quantum bit set is the same as the column width of the sub-grid.
[0237] The operator determination submodule 1303b is further used to determine the allocation operator and permutation operator corresponding to each vertical recursive decomposition during the multiple vertical recursive decompositions, and to construct the preparation operator architecture based on the sub-preparation operator architecture.
[0238] The operator determination submodule 1303b is further configured to obtain the allocation operator set based on the allocation operators corresponding to each horizontal recursive decomposition and the allocation operators corresponding to each vertical recursive decomposition.
[0239] The operator determination submodule 1303b is further configured to obtain the permutation operator set based on the permutation operators corresponding to the respective horizontal recursive decompositions and the permutation operators corresponding to the respective vertical recursive decompositions.
[0240] The operator determination submodule 1303b is further configured to determine the unitary operator of each of the converted quantum bit sets to obtain the unitary operator set.
[0241] In some embodiments, the value of k is equal to the Hamming weight of the first quantum state; the horizontal decomposition submodule 1303a is configured to:
[0242] During the first horizontal recursive decomposition process, the multiple qubit sets are divided into two first-order initial qubit sequences under the grid constraint; weights are assigned to the first qubit set from the left and the second qubit set from the left in the first row of the first first-order initial qubit sequence to obtain an adjusted first first-order initial qubit sequence; and quantum states are exchanged between the second qubit set from the left in the first row of the adjusted first first-order initial qubit sequence and the first qubit set from the left in the first row of the second first-order initial qubit sequence to obtain two first-order qubit sequences;
[0243] Alternatively, during the r-th horizontal recursive decomposition process, for each r-1-th order qubit sequence, the r-1-th order qubit sequence is divided into two r-th order initial qubit sequences under the grid constraint, where r is an integer greater than 1; weights are assigned to the first qubit set from the left and the second qubit set from the left in the first row of the first r-th order initial qubit sequence to obtain an adjusted first r-th order initial qubit sequence; and quantum states are exchanged between the second qubit set from the left in the first row of the adjusted first r-th order initial qubit sequence and the first qubit set from the left in the first row of the second r-th order initial qubit sequence to obtain two r-th order qubit sequences;
[0244] In which case, when the row width of the r-th order quantum bit column is the same as the row width of the sub-grid, the r-th order quantum bit column is determined as the quantum bit column.
[0245] In some embodiments, the operator determination submodule 1303b is configured to:
[0246] During the first horizontal recursive decomposition, based on the first quantum bit set from the left and the second quantum bit set from the left in the first row of the first first-order initial quantum bit sequence from the left, a distribution operator corresponding to the first horizontal recursive decomposition is determined; based on the second quantum bit set from the left in the first row of the adjusted first first-order initial quantum bit sequence and the first quantum bit set from the left in the first row of the second first-order initial quantum bit sequence from the left, a permutation operator corresponding to the first horizontal recursive decomposition is determined; based on the two first-order quantum bit sequences, a sub-preparation operator architecture corresponding to the first horizontal recursive decomposition is determined;
[0247] Alternatively, during the r-th horizontal recursive decomposition process, for each r-1th order quantum bit sequence, based on the first quantum bit set from the left and the second quantum bit set from the left in the first row of the first r-th order initial quantum bit sequence from the left, determine the sub-allocation operator corresponding to the r-1th order quantum bit sequence in the r-th horizontal recursive decomposition process; based on the second quantum bit set from the left in the first row of the adjusted first r-th order initial quantum bit sequence and the first quantum bit set from the left in the first row of the second r-th order initial quantum bit sequence from the left, determine the sub-allocation operator corresponding to the r-1th order quantum bit sequence in the r-th horizontal recursive decomposition process. The sub-permutation operator corresponding to the recursive decomposition; based on the sub-allocation operator corresponding to each of the r-1th order quantum bit sequences in the r-th horizontal recursive decomposition, the allocation operator corresponding to the r-th horizontal recursive decomposition is obtained; based on the sub-permutation operator corresponding to each of the r-1th order quantum bit sequences in the r-th horizontal recursive decomposition, the permutation operator corresponding to the r-th horizontal recursive decomposition is obtained; based on the two r-th order quantum bit sequences corresponding to each of the r-1th order quantum bit sequences and the sub-preparation operator architecture corresponding to the r-1th horizontal recursive decomposition, the sub-preparation operator architecture corresponding to the r-1th horizontal recursive decomposition is determined.
[0248] In some embodiments, the vertical decomposition submodule 1303c is used to:
[0249] During the first vertical recursive decomposition process, for each of the qubit columns, the qubit column is divided into two first-order initial qubit rows under the grid constraint; weights are assigned to the first qubit set and the second qubit set in the first first-order initial qubit row to obtain an adjusted first first-order initial qubit row; and quantum states of the second qubit set in the adjusted first first-order initial qubit row and the first qubit set in the second first-order initial qubit row are exchanged to obtain two first-order qubit rows;
[0250] Alternatively, during the s-th vertical recursive decomposition process, for each s-1-th order qubit row, the s-1-th order qubit row is divided into two r-th order initial qubit rows under the grid constraint, where s is an integer greater than 1; weights are assigned to the first qubit set and the second qubit set in the first s-th order initial qubit row to obtain an adjusted first s-th order initial qubit row; and quantum states of the second qubit set in the adjusted first s-th order initial qubit row and the first qubit set in the second s-th order initial qubit row are exchanged to obtain two s-th order qubit rows;
[0251] Wherein, when the column width of the s-th order quantum bit row is the same as the column width of the sub-grid, the s-th order quantum bit column is determined as the converted quantum bit set.
[0252] In some embodiments, the operator determination submodule 1303b is further configured to:
[0253] During the first vertical recursive decomposition, for each of the qubit columns, based on the first qubit set and the second qubit set in the first first-order initial qubit row, the allocation operator corresponding to the first vertical recursive decomposition is determined; based on the second qubit set in the adjusted first first-order initial qubit row and the first qubit set in the second first-order initial qubit row, the permutation operator corresponding to the first vertical recursive decomposition is determined; based on the two first-order qubit rows and the sub-preparation operator architecture corresponding to the horizontal recursive decomposition, a sub-preparation operator architecture corresponding to the first vertical recursive decomposition is constructed;
[0254] Alternatively, during the s-th vertical recursive decomposition process, for each s-1th order quantum bit row, based on the first quantum bit set and the second quantum bit set in the first s-th order initial quantum bit row, the sub-allocation operator corresponding to the s-1th order quantum bit row in the s-th vertical recursive decomposition is determined; based on the first quantum bit set in the first s-th order initial quantum bit row after adjustment, and the first quantum bit set in the second s-th order initial quantum bit row, the sub-allocation operator corresponding to the s-1th order quantum bit row in the s-th vertical recursive decomposition is determined. ; based on the sub-allocation operators corresponding to each of the s-1th order quantum bit rows in the s-th vertical recursive decomposition, obtain the allocation operator corresponding to the s-th vertical recursive decomposition; based on the sub-allocation operators corresponding to each of the s-1th order quantum bit rows in the s-th vertical recursive decomposition, obtain the permutation operator corresponding to the s-th vertical recursive decomposition; based on the two s-th order quantum bit rows corresponding to each of the s-1th order quantum bit rows, and the sub-preparation operator architecture corresponding to the s-1th vertical recursive decomposition, determine the sub-preparation operator architecture corresponding to the s-th vertical recursive decomposition.
[0255] In some embodiments, the preparation operator determination module 1304 is further configured to:
[0256] In the longitudinal direction of the grid, the unitary operators are divided according to every two adjacent converted quantum bit sets to obtain a plurality of unitary operator pairs;
[0257] Obtaining the Kronecker products of the plurality of unitary operator pairs;
[0258] Determining the positions and operation symbols of the Kronecker products, the allocation operators, and the permutation operators in the preparation operator architecture according to the operation relationship indicated by the preparation operator architecture;
[0259] According to the positions and operation symbols of the Kronecker products, the distribution operators and the permutation operators in the preparation operator architecture, the Kronecker products, the distribution operators and the permutation operators are combined to obtain the quantum state preparation operator.
[0260] In some embodiments, as shown in FIG14 , the apparatus 1300 further includes: a quantum state initialization module 1305 .
[0261] The quantum state initialization module 1305 is configured to replace the quantum state of the first quantum bit set from the left in the first row of the plurality of quantum bit sets with 1, and replace the quantum states of the remaining quantum bit sets in the plurality of quantum bit sets with 0.
[0262] In some embodiments, each row of the grid corresponds to n2 qubits, and each column of the grid corresponds to n1 qubits, where n=n1n2, n2≥n1, n1 is a positive integer, and n2 is a positive integer;
[0263] In the case of k≥n2 / n1, the rows of the subgrid correspond to qubits, the columns of the subgrid correspond to qubits;
[0264] Alternatively, in the case of 1≤k≤n2 / n1, the rows of the sub-grid correspond to k quantum bits, and the columns of the sub-grid correspond to 1 quantum bit.
[0265] In some embodiments, the distribution operator is implemented by a quantum circuit with a circuit depth of O(k), the permutation operator is implemented by a quantum circuit with a circuit depth of O(n1 / 2) or O(n2 / 2), the unitary operator is implemented by a quantum circuit with a circuit depth of O(k), and the circuit depth of the quantum state preparation circuit corresponding to the quantum state preparation operator is O(k log(n / k)+n2).
[0266] In summary, the technical solution provided by the embodiment of the present application is subject to grid restrictions, and the allocation operator can only allocate weights to two adjacent quantum bit sets, such as allocating the weight of an allocated quantum bit set to an unallocated quantum bit set adjacent to it. However, the embodiment of the present application, by combining the quantum state exchange function of the permutation operator, can pull the quantum states of two adjacent quantum bit sets apart. For example, for two adjacent allocated quantum bit sets, under the grid restriction, the quantum state of one of the allocated quantum bit sets can be replaced by the quantum state of an unallocated quantum bit set through the permutation operator. In this way, the replaced unallocated quantum bit set can allocate weights to the unallocated quantum bit set adjacent to it, and the other allocated quantum bit set can allocate weights to the replaced allocated quantum bit set, which is conducive to improving the parallelism of weight allocation. Therefore, for n quantum bits under the grid restriction, by utilizing the permutation operator with the function of exchanging the quantum states of two quantum bit sets, enough allocation operators can be used simultaneously to allocate Hamming weights to multiple quantum bit sets each time. That is, for the quantum state preparation circuit corresponding to the quantum state preparation operator, by utilizing the subcircuit that implements the permutation operator, a sufficient number of subcircuits that implement the allocation operator function can simultaneously operate on multiple qubit sets to achieve Hamming weight distribution. This improves the operational parallelism of the quantum state preparation circuit for Hamming weight distribution, thereby reducing the total number of Hamming weight distribution cycles required. Given a fixed number of quantum gate layers in the subcircuit that implements the allocation operator function, as the total number of Hamming weight distribution cycles required decreases, the total number of quantum gate layers required by the quantum state preparation circuit also decreases, effectively reducing the circuit depth of the quantum state preparation circuit.
[0267] It should be noted that the apparatus provided in the above embodiments, when implementing its functions, is only illustrated by the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the apparatus and method embodiments provided in the above embodiments are based on the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.
[0268] Please refer to Figure 15, which shows a block diagram of a computer device provided in one embodiment of the present application. The computer device can be used to implement the method for generating a quantum state preparation circuit provided in the above embodiment, which specifically includes the following contents.
[0269] The computer device 1500 includes a central processing unit (CPU, central processing unit), GPU (graphics processing unit), and FPGA (field programmable gate array) 1501, a system memory 1504 including RAM (random-access memory) 1502 and ROM (read-only memory) 1503, and a system bus 1505 connecting the system memory 1504 and the central processing unit 1501. The computer device 1500 also includes a basic input / output system (I / O system) 1506 for facilitating information transmission between various components within the server, and a mass storage device 1507 for storing an operating system 1513, application programs 1514, and other program modules 1515.
[0270] The basic input / output system 1506 includes a display 1508 for displaying information and an input device 1509 such as a mouse and keyboard for user input. Both the display 1508 and the input device 1509 are connected to the central processing unit 1501 via an input / output controller 1510 connected to the system bus 1505. The basic input / output system 1506 may also include an input / output controller 1510 for receiving and processing input from a variety of other devices such as a keyboard, mouse, or electronic stylus. Similarly, the input / output controller 1510 also provides output to a display screen, printer, or other types of output devices.
[0271] The mass storage device 1507 is connected to the central processing unit 1501 via a mass storage controller (not shown) connected to the system bus 1505. The mass storage device 1507 and its associated computer-readable media provide non-volatile storage for the computer device 1500. In other words, the mass storage device 1507 may include a computer-readable medium (not shown) such as a hard disk or a CD-ROM (Compact Disc Read-Only Memory) drive.
[0272] Without loss of generality, the computer-readable medium may include computer storage media and communication media. Computer storage media include volatile and non-volatile, removable and non-removable media implemented by any method or technology for storing information such as computer-readable instructions, data structures, program modules or other data. Computer storage media include RAM, ROM, EPROM (Erasable Programmable Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), flash memory or other solid-state storage technology, CD-ROM, DVD (Digital Video Disc) or other optical storage, tape cassettes, magnetic tape, disk storage or other magnetic storage devices. Of course, those skilled in the art will appreciate that the computer storage media is not limited to the above-mentioned ones. The above-mentioned system memory 1504 and mass storage device 1507 can be collectively referred to as memory.
[0273] According to an embodiment of the present application, the computer device 1500 can also be connected to a remote computer on a network such as the Internet for operation. That is, the computer device 1500 can be connected to the network 1512 via the network interface unit 1511 connected to the system bus 1505. Alternatively, the network interface unit 1511 can be used to connect to other types of networks or remote computer systems (not shown).
[0274] The memory further includes a computer program, which is stored in the memory and configured to be executed by one or more processors to implement the method for generating the quantum state preparation circuit.
[0275] In some embodiments, a computer-readable storage medium is further provided, wherein the storage medium stores a computer program, and when the computer program is executed by a processor, the computer program implements the above-mentioned method for generating a quantum state preparation circuit.
[0276] Optionally, the computer-readable storage medium may include: ROM (Read-Only Memory), RAM (Random Access Memory), SSD (Solid State Drives), or an optical disk, etc. Among them, the random access memory may include ReRAM (Resistance Random Access Memory) and DRAM (Dynamic Random Access Memory).
[0277] In some embodiments, a computer program product is further provided, comprising a computer program stored in a computer-readable storage medium. A processor of a computer device reads the computer program from the computer-readable storage medium and executes the computer program, causing the computer device to perform the aforementioned method for generating a quantum state preparation circuit.
[0278] In some embodiments, a quantum chip is further provided, which includes a quantum state preparation circuit constructed by executing the above-mentioned method for generating a quantum state preparation circuit.
[0279] It should be noted that, in the embodiment of the present application, before collecting the relevant data of the user and during the process of collecting the relevant data of the user, a prompt interface, pop-up window or voice prompt information can be displayed. The prompt interface, pop-up window or voice prompt information is used to prompt the user that its relevant data is currently being collected, so that the present application only starts to execute the relevant steps of obtaining the relevant data of the user after obtaining the confirmation operation issued by the user on the prompt interface or pop-up window. Otherwise (that is, when the confirmation operation issued by the user on the prompt interface or pop-up window is not obtained), the relevant steps of obtaining the relevant data of the user are terminated, that is, the relevant data of the user is not obtained. In other words, all user data collected by this application are processed strictly in accordance with the requirements of relevant national laws and regulations. The informed consent or separate consent of the personal information subject is obtained with the consent and authorization of the user, and the subsequent data use and processing behavior is carried out within the scope of authorization of laws and regulations and personal information subjects, and the collection, use and processing of relevant user data need to comply with the relevant laws, regulations and standards of relevant countries and regions. For example, the grid restrictions, quantum bits, quantum state preparation circuits, etc. involved in this application are all obtained with full authorization.
[0280] It should be understood that the "multiple" mentioned in this article refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship. In addition, the step numbers described in this article only illustrate a possible execution sequence between the steps. In some other embodiments, the above steps may not be executed in the order of the numbers, such as two steps with different numbers are executed at the same time, or two steps with different numbers are executed in the opposite order to the diagram. The embodiments of the present application do not limit this.
[0281] The above description is merely an exemplary embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.
Claims
1. A method for generating a quantum state preparation circuit, which is executed by a computer device, and the method includes: Obtaining n qubits under grid constraints and the initial quantum states of the n qubits, where n is a positive integer; Dividing the n qubits into multiple qubit sets, where each qubit set includes k qubits, and the connections of the k qubits satisfy sub-grid constraints, and the sub-grids corresponding to the sub-grid constraints are combined into the grid corresponding to the grid constraints, and k is a positive integer less than n; During the recursive decomposition of the n qubits under the grid constraints with the qubit set as a unit, determining an assignment operator set, a permutation operator set, a unitary operator set, and a preparation operator architecture, where each assignment operator in the assignment operator set is used to combine each permutation operator in the permutation operator set to distribute the Hamming weight of the first quantum state to the multiple qubit sets and to entangle the multiple qubit sets with each other, the permutation operator is used to exchange the quantum states between two qubit sets, each unitary operator in the unitary operator set is used to evolve the quantum state of the qubit set to the first quantum state, and the preparation operator architecture is used to indicate the operation relationship between the assignment operator, the permutation operator, and the unitary operator; Under the constraint of the operation relationship indicated by the preparation operator architecture, combining each assignment operator, each permutation operator, and each unitary operator to obtain a quantum state preparation operator, and the quantum state preparation operator is used to generate a quantum state preparation circuit, and the quantum state preparation circuit is used to act on the n qubits to evolve the quantum states of the n qubits from the initial quantum states to the first quantum states.
2. The method according to claim 1, wherein, The determining the assignment operator set, the permutation operator set, the unitary operator set, and the preparation operator architecture during the recursive decomposition of the n qubits under the grid constraints with the qubit set as a unit includes: In the horizontal direction of the grid, with the qubit set as a unit, performing multiple horizontal recursive decompositions on the multiple qubit sets under the grid constraints to obtain multiple qubit columns, where the row width of the qubit column is the same as the row width of the sub-grid, and the column width of the qubit column is the same as the column width of the grid; During the multiple horizontal recursive decomposition processes, determining the assignment operator and the permutation operator corresponding to each horizontal recursive decomposition, and constructing the sub-preparation operator architecture corresponding to the horizontal recursive decomposition; For each qubit column, in the vertical direction of the grid, with the qubit set as a unit, performing multiple vertical recursive decompositions on the qubit column under the grid constraints to obtain multiple transformed qubit sets, where the transformed qubit sets correspond to the qubit sets one by one, the row width of the transformed qubit set is the same as the row width of the sub-grid, and the column width of the transformed qubit set is the same as the column width of the sub-grid; During the multiple vertical recursive decomposition processes, determine the distribution operator and permutation operator corresponding to each vertical recursive decomposition, and based on the sub-preparation operator architecture, construct the preparation operator architecture; Based on the distribution operator corresponding to each horizontal recursive decomposition and the distribution operator corresponding to each vertical recursive decomposition, obtain the set of distribution operators; Based on the permutation operator corresponding to each horizontal recursive decomposition and the permutation operator corresponding to each vertical recursive decomposition, obtain the set of permutation operators; Determine the unitary operator of each of the transformed qubit sets to obtain the set of unitary operators.
3. The method according to claim 2, wherein, The value of k is equal to the Hamming weight of the first quantum state; In the horizontal direction of the grid, with the qubit sets as units, perform multiple horizontal recursive decompositions on the multiple qubit sets under the grid constraint to obtain multiple qubit columns, including: During the first horizontal recursive decomposition process, under the grid constraint, divide the multiple qubit sets into 2 first-order initial qubit columns; perform weight distribution on the first qubit set and the second qubit set from the left in the first row of the first first-order initial qubit column from the left to obtain the adjusted first first-order initial qubit column; perform quantum state exchange on the second qubit set from the left in the first row of the adjusted first first-order initial qubit column and the first qubit set from the left in the first row of the second first-order initial qubit column from the left to obtain 2 first-order qubit columns; Or, During the r-th horizontal recursive decomposition process, for each (r - 1)-th order qubit column, under the grid constraint, divide the (r - 1)-th order qubit column into 2 r-th order initial qubit columns, where r is an integer greater than 1; perform weight distribution on the first qubit set and the second qubit set from the left in the first row of the first r-th order initial qubit column from the left to obtain the adjusted first r-th order initial qubit column; perform quantum state exchange on the second qubit set from the left in the first row of the adjusted first r-th order initial qubit column and the first qubit set from the left in the first row of the second r-th order initial qubit column from the left to obtain 2 r-th order qubit columns; Among them, when the row width of the r-th order qubit column is the same as the row width of the sub-grid, the r-th order qubit column is determined as the qubit column.
4. The method according to claim 3, wherein, During the multiple horizontal recursive decomposition processes, determine the distribution operator and permutation operator corresponding to each horizontal recursive decomposition, and construct the sub-preparation operator architecture corresponding to the horizontal recursive decomposition, including: In the first horizontal recursive decomposition process, based on the first qubit set and the second qubit set from the left in the first row of the first-order initial qubit column starting from the left, determine the allocation operator corresponding to the first horizontal recursive decomposition; based on the second qubit set from the left in the first row of the adjusted first-order initial qubit column starting from the left, and the first qubit set from the left in the first row of the second first-order initial qubit column starting from the left, determine the permutation operator corresponding to the first horizontal recursive decomposition; based on the two first-order qubit columns, determine the sub-preparation operator architecture corresponding to the first horizontal recursive decomposition; Or, In the r-th horizontal recursive decomposition process, for each (r - 1)-th order qubit column, based on the first qubit set and the second qubit set from the left in the first row of the r-th order initial qubit column starting from the left, determine the sub-allocation operator corresponding to the (r - 1)-th order qubit column in the r-th horizontal recursive decomposition; based on the second qubit set from the left in the first row of the adjusted r-th order initial qubit column starting from the left, and the first qubit set from the left in the first row of the second r-th order initial qubit column starting from the left, determine the sub-permutation operator corresponding to the (r - 1)-th order qubit column in the r-th horizontal recursive decomposition; based on the sub-allocation operators corresponding to each (r - 1)-th order qubit column in the r-th horizontal recursive decomposition, obtain the allocation operator corresponding to the r-th horizontal recursive decomposition; based on the sub-permutation operators corresponding to each (r - 1)-th order qubit column in the r-th horizontal recursive decomposition, obtain the permutation operator corresponding to the r-th horizontal recursive decomposition; based on the two r-th order qubit columns corresponding to each (r - 1)-th order qubit column, and the sub-preparation operator architecture corresponding to the (r - 1)-th horizontal recursive decomposition, determine the sub-preparation operator architecture corresponding to the r-th horizontal recursive decomposition.
5. The method according to any one of claims 2 to 4, wherein For each of the qubit columns, in the longitudinal direction of the grid, taking the qubit set as a unit, perform multiple longitudinal recursive decompositions on the qubit column under the grid restriction to obtain multiple transformed qubit sets, including: In the first longitudinal recursive decomposition process, for each of the qubit columns, under the grid restriction, divide the qubit column into two first-order initial qubit rows; perform weight allocation on the first qubit set and the second qubit set from the top in the first first-order initial qubit row from the top to obtain the adjusted first first-order initial qubit row; perform quantum state exchange on the second qubit set from the top in the adjusted first first-order initial qubit row and the first qubit set from the top in the second first-order initial qubit row from the top to obtain two first-order qubit rows; Or, In the s-th vertical recursive decomposition process, for each (s - 1)-th order qubit row, under the grid constraint, the (s - 1)-th order qubit row is divided into two r-th order initial qubit rows, where s is an integer greater than 1; weight assignment is performed on the first qubit set and the second qubit set from the top in the first s-th order initial qubit row from the top to obtain the adjusted first s-th order initial qubit row; for the second qubit set from the top in the adjusted first s-th order initial qubit row, and the first qubit set from the top in the second s-th order initial qubit row from the top, quantum state exchange is performed to obtain two s-th order qubit rows; Among them, when the column width of the s-th order qubit row is the same as the column width of the sub-grid, the s-th order qubit column is determined as the transformed qubit set. In the multiple vertical recursive decomposition processes, the allocation operator and the permutation operator corresponding to each vertical recursive decomposition are determined, and on the basis of the sub-preparation operator architecture, the preparation operator architecture is constructed, including:
6. The method according to claim 5, wherein, In the first vertical recursive decomposition process, for each qubit column, based on the first qubit set and the second qubit set from the top in the first 1st order initial qubit row from the top, the allocation operator corresponding to the first vertical recursive decomposition is determined; based on the second qubit set from the top in the adjusted first 1st order initial qubit row, and the first qubit set from the top in the second 1st order initial qubit row from the top, the permutation operator corresponding to the first vertical recursive decomposition is determined; based on the two 1st order qubit rows and the sub-preparation operator architecture corresponding to the horizontal recursive decomposition, the sub-preparation operator architecture corresponding to the first vertical recursive decomposition is constructed; Or, In the s-th vertical recursive decomposition process, for each (s - 1)-th order qubit row, based on the first qubit set and the second qubit set from the top in the first (s)-th order initial qubit row from the top, determine the sub-allocation operator corresponding to the (s - 1)-th order qubit row in the s-th vertical recursive decomposition; based on the first qubit set from the top in the adjusted first (s)-th order initial qubit row, and the first qubit set from the top in the second (s)-th order initial qubit row from the top, determine the sub-permutation operator corresponding to the (s - 1)-th order qubit row in the s-th vertical recursive decomposition; based on the sub-allocation operators corresponding to each of the (s - 1)-th order qubit rows in the s-th vertical recursive decomposition, obtain the allocation operator corresponding to the s-th vertical recursive decomposition; based on the sub-permutation operators corresponding to each of the (s - 1)-th order qubit rows in the s-th vertical recursive decomposition, obtain the permutation operator corresponding to the s-th vertical recursive decomposition; based on the two (s)-th order qubit rows corresponding to each of the (s - 1)-th order qubit rows, and the sub-preparation operator architecture corresponding to the (s - 1)-th vertical recursive decomposition, determine the sub-preparation operator architecture corresponding to the s-th vertical recursive decomposition.
7. The method according to any one of claims 2 to 6, wherein Under the operation relation constraints indicated by the preparation operator architecture, combining each of the allocation operators, each of the permutation operators, and each of the unitary operators to obtain the quantum state preparation operator includes: In the vertical direction of the grid, divide each of the unitary operators in the manner of every two adjacent transformed qubit sets to obtain a plurality of unitary operator pairs; Obtain the Kronecker product of each of the plurality of unitary operator pairs; According to the operation relations indicated by the preparation operator architecture, determine the positions and operation symbols of each of the Kronecker products, each of the allocation operators, and each of the permutation operators in the preparation operator architecture; According to the positions and operation symbols of each of the Kronecker products, each of the allocation operators, and each of the permutation operators in the preparation operator architecture, combine each of the Kronecker products, each of the allocation operators, and each of the permutation operators to obtain the quantum state preparation operator.
8. The method according to any one of claims 1 to 7, wherein Before determining the allocation operator set, the permutation operator set, the unitary operator set, and the preparation operator architecture in the process of recursively decomposing the n qubits under the grid constraint with the qubit set as the unit, further includes: Permute the quantum state of the first qubit set from the left in the first row of the plurality of qubit sets to 1, and permute the quantum states of the remaining qubit sets in the plurality of qubit sets to 0.
9. The method according to any one of claims 1 to 8, wherein, Each row of the grid corresponds to n2 qubits, each column of the grid corresponds to n1 qubits, n = n1n2, n2 ≥ n1, n1 is a positive integer, and n2 is a positive integer; When k≥n2 / n1, the rows of the sub-grid correspond to qubits, the column of the sub-grid corresponds to qubits; Or, When 1 ≤ k ≤ n2 / n1, each row of the sub-grid corresponds to k qubits, and each column of the sub-grid corresponds to 1 qubit.
10. The method according to claim 9, wherein, The distribution operator is implemented by a quantum circuit with a circuit depth of O(k), the permutation operator is implemented by a quantum circuit with a circuit depth of O(n1 / 2) or O(n2 / 2), the unitary operator is implemented by a quantum circuit with a circuit depth of O(k), and the quantum state preparation circuit corresponding to the quantum state preparation operator has a circuit depth of O(k log(n / k) + n2).
11. A generating device for a quantum state preparation circuit, the device comprising: An initial quantum state acquisition module, configured to acquire n qubits under grid constraints and the initial quantum state of the n qubits, where n is a positive integer; A qubit partitioning module, configured to partition the n qubits into a plurality of qubit sets, each qubit set including k qubits, and the connections of the k qubits satisfy sub-grid constraints, and the sub-grids corresponding to the sub-grid constraints are combined into the grid corresponding to the grid constraints, where k is a positive integer less than n; An operator set determination module, configured to determine a distribution operator set, a permutation operator set, a unitary operator set, and a preparation operator architecture during the recursive decomposition of the n qubits under the grid constraints with the qubit sets as units, where each distribution operator in the distribution operator set is used to combine each permutation operator in the permutation operator set to distribute the Hamming weight of the first quantum state to the plurality of qubit sets and to entangle the plurality of qubit sets with each other, the permutation operator is used to exchange the quantum states between two of the qubit sets, each unitary operator in the unitary operator set is used to evolve the quantum state of the qubit set to the first quantum state, and the preparation operator architecture is used to indicate the operation relationship between the distribution operator, the permutation operator, and the unitary operator; A preparation operator determination module, configured to combine each distribution operator, each permutation operator, and each unitary operator under the constraint of the operation relationship indicated by the preparation operator architecture to obtain a quantum state preparation operator, the quantum state preparation operator being used to generate a quantum state preparation circuit, and the quantum state preparation circuit being used to act on the n qubits to evolve the quantum state of the n qubits from the initial quantum state to the first quantum state.
12. A computer device, the computer device comprising a processor and a memory, and a computer program is stored in the memory, and the computer program is loaded and executed by the processor to implement the method for generating a quantum state preparation circuit according to any one of claims 1 to 10 above.
13. A computer-readable storage medium, in which a computer program is stored, and the computer program is loaded and executed by a processor to implement the method for generating a quantum state preparation circuit according to any one of claims 1 to 10 above.
14. A computer program product, the computer program product comprising a computer program stored in a computer-readable storage medium, and a processor reads and executes the computer program from the computer-readable storage medium to implement the method for generating a quantum state preparation circuit according to any one of claims 1 to 10.
15. A quantum chip, the quantum chip comprising a quantum state preparation circuit generated by the method for generating a quantum state preparation circuit according to any one of claims 1 to 10.
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