Data transmission system, device and method

Abstract

The present application provides a data transmission system, method and apparatus. The data transmission system comprises a first peripheral component interconnect express (PCIe) device; a second PCIe device; and a photoelectric composite cable communicatively connected to the first PCIe device and the second PCIe device. The photoelectric composite cable comprises: an optical cable part, used for transmitting a first data signal between the first PCIe device and the second PCIe device, wherein the first data signal comprises an optical signal corresponding to a high-speed data signal; and an electrical cable part, used for transmitting a second data signal between the first PCIe device and the second PCIe device, wherein the second data signal comprises an electrical signal corresponding to a low-speed signal.

Description

Data transmission system, device and method

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on January 5, 2024, with application number 202410020240.1 and application name “Data transmission system, method and device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of data transmission technology, and in particular to a data transmission system, device and method. Background Art

[0004] With the increasing prevalence and deepening of digital transformation, more and more enterprises are establishing data centers. To support the massive traffic growth within data centers, enterprises are often replacing Ethernet architectures with network architectures based on Peripheral Component Interconnect Express (PCIe). Establishing optical links based on PCIe optical interconnects enables the creation of high-performance cluster networks.

[0005] In the PCIe optical interconnect scenario, for specific low-speed signals such as sideband signals corresponding to specific PCIe functions, the relevant technology usually converts the specific low-speed signals into optical signals through an optoelectronic conversion module and transmits them based on optical fibers. Summary of the Invention

[0006] Each exemplary embodiment of the present application provides a data transmission system, device, and method.

[0007] In a first aspect, an embodiment of the present application provides a data transmission system, comprising a first peripheral component high-speed interconnect PCIe device; a second PCIe device; and an optoelectronic hybrid cable for communication connecting the first PCIe device and the second PCIe device; wherein the optoelectronic hybrid cable comprises: an optical cable portion for transmitting a first data signal between the first PCIe device and the second PCIe device, and the first data signal comprises an optical signal corresponding to a high-speed data signal; and an electrical cable portion for transmitting a second data signal between the first PCIe device and the second PCIe device, and the second data signal comprises an electrical signal corresponding to a low-speed signal.

[0008] In this embodiment, the first PCIe device may be a PCIe host, and the second PCIe device may be a PCIe device.

[0009] Through this embodiment, high-speed data signals are transmitted in the form of optical signals, while PCIe low-speed signals are transmitted through electrical signals, thereby achieving fast transmission of PCIe low-speed signals and reducing data transmission costs and transmission delays.

[0010] In one embodiment, the first PCIe device includes: a first PCIe bus; and a first optoelectronic conversion module for converting the high-speed data signal from the first PCIe bus into the first data signal; wherein the optical cable portion is used to transmit the first data signal from the first optoelectronic conversion module to the second PCIe device.

[0011] In one embodiment, the second PCIe device includes a second PCIe bus and a second photoelectric conversion module, wherein the second photoelectric conversion module is used to convert the first data signal from the optical cable portion into the high-speed data signal and transmit it to the second PCIe bus.

[0012] In one embodiment, the cable portion is further configured to transparently transmit the second data signal from the first PCIe bus to the second PCIe bus.

[0013] In one embodiment, the low-speed signal includes multiple low-speed signals, and the first PCIe device further includes: a first microcontroller, used to encode the multiple low-speed signals from the first PCIe bus into the second data signal, and send the second data signal to the second PCIe device through the cable portion, wherein the second data signal is a one-way signal.

[0014] In one embodiment, the second PCIe device further includes: a second microcontroller for receiving the second data signal from the cable portion, decoding the second data signal into the multiple low-speed signals, and transmitting the multiple low-speed signals to the second PCIe bus.

[0015] In one embodiment, the cable portion includes a pair of signal cables, and the pair of signal cables are respectively used to transmit a clock signal line signal and a bidirectional data line signal.

[0016] In one embodiment, the types of the first optoelectronic conversion module and the second optoelectronic conversion module include at least one of a pluggable optical module, an onboard optical OBO module, a near-package optical NPO module, or a co-package optical CPO module. Preferably, the pluggable optical module is an active optical cable AOC optical module.

[0017] In one embodiment, the first photoelectric conversion module is the AOC optical module, and the first photoelectric conversion module is plugged into the first PCIe device; or the first photoelectric conversion module is the OBO module, and the first photoelectric conversion module is integrated into the first PCIe device.

[0018] In one embodiment, the second photoelectric conversion module is the AOC optical module, and the second photoelectric conversion module is plugged into the second PCIe device; or the second photoelectric conversion module is the OBO module, and the second photoelectric conversion module is integrated into the second PCIe device.

[0019] In one embodiment, the low-speed signal includes a sideband signal, a power signal and a ground signal. Preferably, the sideband signal includes at least a reference clock signal, a device presence detection signal, a wake-up signal, a power-on signal and a global reset signal.

[0020] In one embodiment, the optical cable portion and the electrical cable portion of the optical / electrical hybrid cable are separated within the first PCIe device and / or the second PCIe device.

[0021] In one embodiment, the high-speed data signal includes a data signal whose signal edge time in the PCIe bus is less than 4 to 6 times the interconnection transmission delay.

[0022] In one embodiment, the low-speed signal includes a data signal having a signal edge time greater than or equal to 4 to 6 times the interconnection transmission delay in the PCIe bus.

[0023] In one embodiment, the optical cable portion includes at least one optical fiber, and the number of the optical fibers is equal to or greater than the number of PCIe channels in the first data signal. Preferably, the number of the optical fibers is twice the number of PCIe channels in the first data signal.

[0024] In one embodiment, the cable portion includes at least one signal cable, and the number of the signal cables is equal to or greater than the number of electrical signals in the second data signal.

[0025] Each exemplary embodiment of the present application provides a data transmission system, including an optical-electrical hybrid cable, a high-speed serial computer expansion PCIe host, and a PCIe device; the optical-electrical hybrid cable includes an optical cable portion and an electrical cable portion; wherein the optical cable portion is used to transmit a first data signal between the PCIe host and the PCIe device; the first data signal includes an optical signal corresponding to a high-speed data signal of a PCIe bus; and the electrical cable portion is used to transmit a second data signal between the PCIe host and the PCIe device; the second data signal includes an electrical signal corresponding to a low-speed signal of the PCIe bus.

[0026] In one embodiment, the PCIe bus includes a first PCIe bus and a second PCIe bus; the PCIe host is provided with the first PCIe bus and a first photoelectric conversion module; the PCIe device is provided with the second PCIe bus and a second photoelectric conversion module; wherein, the first photoelectric conversion module is used to convert the high-speed data signal sent by the first PCIe bus into the first data signal; the optical cable portion is used to transmit the first data signal from the first photoelectric conversion module to the second photoelectric conversion module; the second photoelectric conversion module is used to convert the first data signal into the high-speed data signal and transmit it to the second PCIe bus.

[0027] In one embodiment, the cable portion is used to transparently transmit the second data signal sent by the first PCIe bus to the second PCIe bus; the number of signal cables included in the cable portion is the same as the number of low-speed signals included in the second data signal.

[0028] In one embodiment, the PCIe host further includes a first microcontroller; the first microcontroller is configured to encode multiple low-speed signals sent by the first PCIe bus into one second data signal.

[0029] In one embodiment, the PCIe device also includes a second microcontroller; the cable portion is used to transmit the second data signal from the first microcontroller to the second microcontroller; the second microcontroller is used to receive the second data signal transmitted by the cable portion, decode the second data signal into multiple low-speed signals, and transmit the multiple low-speed signals to the second PCIe bus.

[0030] In one embodiment, the cable portion includes a pair of signal cables; and the pair of signal cables is used to transmit a clock signal line signal and a bidirectional data line signal.

[0031] In one embodiment, the optical cable portion includes a plurality of optical fibers; and the number of the optical fibers corresponds to the number of PCIe lanes.

[0032] In one embodiment, types of the first optoelectronic conversion module and the second optoelectronic conversion module include active optical cables AOC, on-board optical modules OBO, near-package optical modules NPO, or co-package optical modules CPO.

[0033] In a second aspect, an embodiment of the present application provides a data transmission device, which is connected to a first peripheral component high-speed interconnect PCIe device through an optoelectronic hybrid cable, the optoelectronic hybrid cable including an optical cable portion and an electrical cable portion, wherein the data transmission device transmits a first data signal between the optical cable portion and the first PCIe device, and the first data signal includes an optical signal corresponding to a high-speed data signal; and the data transmission device transmits a second data signal between the electrical cable portion and the first PCIe device, and the second data signal includes an electrical signal corresponding to a low-speed signal.

[0034] In a third aspect, an embodiment of the present application provides a data transmission method, which is applied to a data transmission system, wherein the data transmission system includes a first peripheral component high-speed interconnect PCIe device, a second PCIe device, and an optoelectronic hybrid cable for communication connection between the first PCIe device and the second PCIe device, and the optoelectronic hybrid cable includes an optical cable portion and an electrical cable portion. The method includes: transmitting a first data signal between the first PCIe device and the second PCIe device through the optical cable portion, and the first data signal includes an optical signal corresponding to the high-speed data signal of the PCIe bus; and transmitting a second data signal between the first PCIe device and the second PCIe device through the cable portion; the second data signal includes an electrical signal corresponding to the low-speed signal of the PCIe bus.

[0035] In one embodiment, the PCIe bus includes a first PCIe bus and a second PCIe bus; the PCIe host is provided with the first PCIe bus and a first photoelectric conversion module; the PCIe device is provided with the second PCIe bus and a second photoelectric conversion module; the first data signal is transmitted between the PCIe host and the PCIe device through the optical cable portion, and the method also includes: converting the high-speed data signal sent by the first PCIe bus into the first data signal through the first photoelectric conversion module; transmitting the first data signal from the first photoelectric conversion module to the second photoelectric conversion module through the optical cable portion; and converting the first data signal into the high-speed data signal through the second photoelectric conversion module and transmitting it to the second PCIe bus.

[0036] In one embodiment, transmitting the second data signal between the PCIe host and the PCIe device through the cable portion includes: transparently transmitting the second data signal sent by the first PCIe bus to the second PCIe bus through the cable portion; the number of signal cables included in the cable portion is the same as the number of low-speed signals included in the second data signal.

[0037] In one embodiment, the PCIe host further includes a first microcontroller; and the method further includes: encoding, by the first microcontroller, multiple low-speed signals sent by the first PCIe bus into one second data signal.

[0038] In one embodiment, the PCIe device further includes a second microcontroller; transmitting the second data signal between the PCIe host and the PCIe device through the cable portion includes: transmitting the second data signal from the first microcontroller to the second microcontroller through the cable portion; and receiving the second data signal transmitted by the cable portion through the second microcontroller, decoding the second data signal into multiple low-speed signals, and transmitting the multiple low-speed signals to the second PCIe bus.

[0039] In one embodiment, the cable portion includes a pair of signal cables; the pair of signal cables is used to transmit clock signal line signals and bidirectional data line signals.

[0040] In one embodiment, the optical cable portion includes a plurality of optical fibers; the number of the optical fibers corresponds to the number of PCIe channels.

[0041] In one embodiment, types of the first optoelectronic conversion module and the second optoelectronic conversion module include active optical cables AOC, on-board optical modules OBO, near-package optical modules NPO, or co-package optical modules CPO.

[0042] In a fourth aspect, an embodiment of the present application provides a data transmission device, which is applied to a data transmission system, including an optoelectronic hybrid cable, a peripheral component high-speed interconnection PCIe host and a PCIe device; the optoelectronic hybrid cable includes an optical cable part and an electrical cable part; the device includes: a first transmission module, used to transmit a first data signal between the PCIe host and the PCIe device through the optical cable part; the first data signal includes an optical signal corresponding to the high-speed data signal of the PCIe bus; and a second transmission module, used to transmit a second data signal between the PCIe host and the PCIe device through the electrical cable part; the second data signal includes an electrical signal corresponding to the low-speed signal of the PCIe bus.

[0043] The data transmission system, device, method, and apparatus provided by the embodiments of the present application include a hybrid optical cable, a PCIe host for high-speed interconnection of peripheral components, and a PCIe device. The hybrid optical cable includes an optical cable portion and an electrical cable portion, wherein the optical cable portion is used to transmit a first data signal between the PCIe host and the PCIe device; the first data signal includes an optical signal corresponding to a high-speed data signal of the PCIe bus; and the electrical cable portion is used to transmit a second data signal between the PCIe host and the PCIe device; the second data signal includes an electrical signal corresponding to a low-speed signal of the PCIe bus. In this way, the data transmission system can transmit high-speed data signals based on the optical cable portion and directly transmit low-speed signals based on the electrical cable portion, thereby ensuring the rapid transmission of PCIe data information without requiring special processing of the low-speed signal, thereby reducing transmission costs and transmission latency. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0045] FIG1 is a schematic diagram comparing application scenarios provided in related applications and embodiments of the present application.

[0046] FIG2 is a schematic diagram of a data transmission system provided in an embodiment of the present application.

[0047] FIG3 is a schematic diagram of a low-speed signal provided by an embodiment of the present application being partially transmitted through a cable.

[0048] FIG4 is a schematic diagram of a low-speed signal provided in an embodiment of the present application being partially transmitted through a cable after encoding processing.

[0049] FIG5 is a schematic diagram of PCIe data transmission provided in an embodiment of the present application.

[0050] FIG6 is a schematic diagram of PCIe data transmission provided by another embodiment of the present application.

[0051] FIG7 is a schematic diagram of PCIe data transmission provided by another embodiment of the present application.

[0052] FIG8 is a flow chart of a data transmission method provided in an embodiment of the present application.

[0053] FIG9 is a schematic structural diagram of a data transmission device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] In order to enable those skilled in the art to better understand the technical solution of the present application, the present application is further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments and drawings described herein are only used to explain the present application, and are not limitations of the present application. It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data need to comply with relevant laws, regulations and standards, and provide corresponding operation portals for users to choose to authorize or refuse.

[0055] In the description of the embodiments of the present application, unless otherwise specified, “ / ” means or, for example, A / B can mean A or B; “and / or” in the text is merely a description of the association relationship of associated objects, indicating that three relationships may exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, “multiple” refers to two or more than two.

[0056] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to imply or suggest relative importance or implicitly indicate the number of the technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of this application, unless otherwise specified, "plurality" means two or more.

[0057] In the description of the embodiments of the present application, unless otherwise specified, the meaning of "connection" should be understood as an electrical connection, optical connection or wireless connection with communication function.

[0058] As data centers continue to expand, and to support the massive traffic growth within them, data centers can replace Ethernet with a network architecture based on the Peripheral Component Interconnect Express (PCIe) protocol. In most current data centers, the local PCIe protocol within the central processing unit (CPU) is converted to Ethernet via network interface cards (NICs) and local area network (LAN) adapter cards on the motherboard. Consequently, PCIe is limited to communication within a single server, while Ethernet is used for server-to-server connections within a rack and rack-to-rack connections at the top of the rack (Tor).

[0059] Furthermore, using adapters to convert PCIe to Ethernet has several drawbacks: requiring the use of various input / output (I / O) interconnect technologies, increased latency, higher cost, space usage, and higher power consumption. Therefore, using native PCIe throughout the data center is highly beneficial. To adopt this strategy, adapter cards can be replaced with PCIe cards, which act as network interfaces. This allows the PCIe protocol to be used within the rack for server-to-server connections and, further, for rack-to-rack connections.

[0060] The Peripheral Component Interconnect Special Interest Group (PCI-SIG) has developed the base specification that defines the PCIe architecture, signaling, protocols, and software. It also includes electromechanical specifications for PCIe cards that define the interface form factor, and PCIe external cabling specifications that define external interface connectors and cables. However, there are currently no specifications or standards for transmitting the PCIe protocol over optical links. Copper cables are difficult to meet long-distance interconnection scenarios due to their high loss, high latency, and high power consumption. Optical transmission has become the trend in PCIe interconnection due to its advantages such as low loss, low latency, immunity to electromagnetic interference, low distortion of transmitted signals, low power consumption, and cost savings. Non-transparent bridging communication over optical fiber links allows the aggregation of remote hosts, enabling the acquisition of high-performance cluster networks based on the PCIe protocol.

[0061] The demand for PCIe optical interconnects is reflected in two aspects. On the one hand, in long-distance interconnection scenarios between servers (i.e., between PCIe hosts and PCIe devices) and between racks based on the PCIe protocol, the transmission distance is long and less sensitive to latency. On the other hand, the PCIe 6.0 specification uses a high-order modulation method called Pulse Amplitude Modulation (PAM4) with 4-level pulse amplitude modulation, which can increase the transmission rate to 64 gigabits per second (GT / s). At the same time, the release of the high-speed serial protocol specification for Compute eXpress Link (CXL) 3.0 based on PCIe 6.0 expands the scope of memory sharing and memory expansion to multiple hosts, further increasing the demand for resource pooling. This scenario not only has requirements for transmission distance but is also sensitive to latency.

[0062] In PCIe optical interconnect scenarios, using optical links to transmit PCIe data is relatively simple. However, PCIe contains some low-speed signals for specific functions, such as hot plugging, receiver detection, electrical idle support, and linear clock channel sideband signals.

[0063] In related technologies, PCIe's specific functional signals are usually converted from electrical signals into optical signals using multiple optoelectronic conversion modules, which are then transmitted through multiple optical fibers and then converted into electrical signals for processing at the receiving end using multiple optoelectronic converters.

[0064] This method has a high cost for data transmission because the optoelectronic conversion module for specific low-speed signals needs to be customized, and the optoelectronic conversion process for specific low-speed signals also increases the transmission delay. This data transmission method in the related art requires the use of multiple optoelectronic conversion modules, and the optoelectronic conversion modules for PCIe specific low-speed signals need to be specially customized. It is impossible to reuse the existing modules in the Ethernet industry chain, and the system cost is relatively high. In addition, multiple optoelectronic conversion modules increase system delay, which is not conducive to the expansion of memory applications. In addition, the PCIe specification does not have any provisions on how to handle the above-mentioned special signals. Therefore, PCIe equipment manufacturers have different processing methods for PCIe. If optoelectronic conversion is used, different customizations may be required for different manufacturers, which is costly and poses certain challenges in terms of availability.

[0065] Each exemplary embodiment of the present application provides a data transmission system, method, and apparatus.

[0066] In some embodiments, the data transmission system is a PCIe optical interconnect system based on a hybrid optical / electrical cable. The hybrid optical / electrical cable comprises an optical cable portion and an electrical cable portion. The high-speed data signals of the PCIe bus are transmitted through the optical cable portion, while the low-speed signals are transmitted through the electrical cable portion. Thus, in embodiments of the present application, no special processing of sideband signals is required, enabling rapid transmission of low-speed signals such as sideband signals. This system is applicable to devices from any PCIe vendor and exhibits low transmission latency.

[0067] Figure 1 is a schematic diagram comparing application scenarios provided by the related art and the embodiments of the present application. Referring to the related art shown in the left block diagram of Figure 1, in the PCIe optical interconnection scenario, the low-speed PCIe signal typically needs to be converted by an optoelectronic conversion module and then transmitted via optical fiber. This transmission method is costly and has a large data transmission latency.

[0068] In the embodiment of the present application as shown in the right block diagram of Figure 1, the PCIe optical interconnection system transmits data through an optical-electrical hybrid cable, wherein the optical cable portion is used to transmit optical signals corresponding to high-speed data signals, and the electrical cable portion is used to transmit electrical signals corresponding to low-speed signals. This enables rapid transmission of PCIe low-speed signals without the need for optical-electrical conversion processing of the low-speed signals, thereby reducing transmission costs and transmission delays.

[0069] The following is a detailed description of the solutions shown in this application through specific embodiments. It should be noted that the following embodiments can exist independently or in combination with each other, and the same or similar contents will not be repeated in different embodiments.

[0070] Figure 2 is a schematic diagram of a data transmission system according to an embodiment of the present application. Referring to Figure 2 , the data transmission system includes an optical-electrical hybrid cable 201, a PCIe host 202, and a PCIe device 203. The optical-electrical hybrid cable 201 includes an optical cable portion (optical cable) and an electrical cable portion (electrical cable).

[0071] The optical cable portion is used to transmit a first data signal between a PCIe host and a PCIe device. The first data signal comprises an optical signal corresponding to a high-speed data signal of the PCIe bus. The electrical cable portion is used to transmit a second data signal between the PCIe host and the PCIe device. The second data signal comprises an electrical signal corresponding to a low-speed signal of the PCIe bus.

[0072] In embodiments of the present application, a data transmission system may include an optical-electrical hybrid cable for interconnecting data between a PCIe host and a PCIe device. The optical-electrical hybrid cable 201 includes an optical cable portion and an electrical cable portion. The optical cable portion may be an optical fiber. The electrical cable portion may specifically be a copper cable, but may also include cables made of other materials, such as gold, silver, or aluminum, and is not limited in this embodiment of the present application.

[0073] The first data signal may be an optical signal corresponding to a high-speed data signal of a PCIe bus. A high-speed data signal may refer to a data signal in a PCIe bus whose "signal edge time is less than 4 to 6 times the interconnect transmission delay." In traditional signal integrity (SI), the high-speed data signal depends on the edge rate of the signal and the path length of the circuit board circuit. When the two have a certain proportional relationship, the signal can be considered a high-speed data signal.

[0074] The second data signal may be an electrical signal corresponding to a low-speed signal of the PCIe bus. The low-speed signal may be, for example, a sideband signal. The low-speed signal may be a data signal in the PCIe bus that does not fall within the category of "a signal edge time less than 4 to 6 times the interconnect transmission delay."

[0075] In a possible implementation, the low-speed signal includes at least one of a sideband signal, a power signal, or a ground signal.

[0076] In the embodiments of the present application, sideband signals in PCIe refer to signals that are not part of the PCIe protocol specification and need to be transmitted through separate pins. Sideband signals are optional in the PCI bus and are generally used within a processor system and cannot be separated from the processor environment.

[0077] Common sideband signals in PCIe include: 100MHz reference clock signal (CREFCLK), device presence detection signal (CPRSNT#), wake-up signal (CWAKE#), power-on signal (CPWRON#), and global reset signal (CPERST#). Of course, sideband signals also include other types of signals, which are not limited in the embodiments of the present application. The power signal can refer to the power-related signal in the PCIe bus. The ground signal refers to the ground signal (Ground, GND) in the PCIe bus.

[0078] In an embodiment of the present application, a data transmission system can transmit a first data signal via an optical cable portion. For example, a PCIe host can transmit the first data signal to a PCIe device via the optical cable portion of an optoelectronic hybrid cable. Simultaneously, the data transmission system can transmit a second data signal via the cable portion of the optoelectronic hybrid cable. For example, a PCIe host can transmit the second data signal to a PCIe device via the cable portion. In this way, the data transmission system, based on the cable portion, can directly and rapidly transmit low-speed signals within the PCIe bus without requiring special processing of the low-speed signals, thereby reducing system costs and transmission latency.

[0079] In a possible implementation, the PCIe bus includes a first PCIe bus and a second PCIe bus, the PCIe host includes the first PCIe bus, and the PCIe device includes the second PCIe bus.

[0080] In one embodiment, a PCIe host is provided with a first PCIe bus and a first photoelectric conversion module, and a PCIe device is provided with a second PCIe bus and a second photoelectric conversion module.

[0081] The first photoelectric conversion module is used to convert the high-speed data signal transmitted by the first PCIe bus into a first data signal. The optical cable portion is used to transmit the first data signal from the first photoelectric conversion module to the second photoelectric conversion module. The second photoelectric conversion module is used to convert the first data signal into a high-speed data signal and transmit it to the second PCIe bus.

[0082] In an embodiment of the present application, a first PCIe bus in a PCIe host can send a high-speed data signal to a first optical-electrical conversion module. The first optical-electrical conversion module can convert the high-speed data signal to obtain a first data signal. The PCIe host can then transmit the first data signal from the first optical-electrical conversion module to a second optical-electrical conversion module in a PCIe device via an optical cable portion in an optical-electrical hybrid cable. The second optical-electrical conversion module in the PCIe device can convert the first data signal into a high-speed data signal and transmit the high-speed data signal to a second PCIe bus in the PCIe device. In this way, the data transmission system can achieve rapid transmission of high-speed data signals on the PCIe bus via the optical cable portion.

[0083] In one possible implementation, the optical cable portion includes multiple optical fibers, and the number of the optical fibers corresponds to the number of PCIe channels.

[0084] In an embodiment of the present application, an optical-electrical hybrid cable is composed of a plurality of optical fibers and a plurality of cables. The number of optical fibers corresponds to the number of PCIe channels, that is, the number of channels for high-speed data signals is consistent with the number of channels of the PCIe device slot, which can generally be x1, x4, x8, and x16. Since each channel includes the transmission and reception of data, the number of optical fibers in the optical cable portion is generally twice the number of channels. Of course, in another possible embodiment, the number of optical fibers in the optical cable portion can also be the same as the number of channels, so that each optical fiber can realize the transmission and reception of data. The specific correspondence between the number of optical fibers and the number of PCIe channels can be flexibly set based on actual needs, and this embodiment of the present application does not limit this. There is no specific limit to the length of the optical-electrical hybrid cable, which is generally between 1 meter and 100 meters. The optical fiber can be in the form of single-mode optical fiber, multi-mode optical fiber, multi-core optical fiber, or hollow optical fiber, and this embodiment of the present application does not limit this.

[0085] In order to comply with the PCIe standard, the optoelectronic conversion module needs to comply with the PCIe data channel and provide optoelectronic conversion (Electrical-to-Optical or Optical-to-Electrical, EO / OE) on the data channel, capable of transmitting signals at 2.5, 5.0, 8.0, 16, 32 or 64Gb / s (or higher) per channel, depending on the PCIe level implemented. In addition, each transmit channel and each receive channel can be coupled to a separate optical fiber. For example, when the number of PCIe channels is x4, 8 optical fibers are required, of which 4 optical fibers are used for data transmission and the remaining 4 optical fibers are used for data reception.

[0086] In one possible implementation, the optoelectronic conversion module may provide one transmitting channel and one receiving channel, thereby realizing a full-duplex data channel that can be used for PCIe1.0 to PCIe6.0 speeds (or higher).

[0087] In an embodiment of the present application, when the data transmission system transmits the second data signal through the cable portion, multiple low-speed signals can be directly transmitted through multiple signal cables respectively. This does not require the setting of low-speed signal coupling equipment and has a simple structure.

[0088] In other embodiments, the data transmission system can also encode multiple low-speed signals to form a second data signal for transmission. This can reduce the number of signal cables required for the cable portion and lower cable costs. The following describes the two specific low-speed signal transmission methods.

[0089] Low-speed signal transmission method 1:

[0090] In one possible implementation, the cable portion is used to transparently transmit the second data signal sent by the first PCIe bus to the second PCIe bus; the number of signal cables included in the cable portion is the same as the number of low-speed signals included in the second data signal.

[0091] In an embodiment of the present application, the first PCIe bus in the PCIe host can transparently transmit the second data signal corresponding to the low-speed signal directly to the second PCIe bus of the PCIe device through the cable portion. The number of signal cables required in the cable portion is the same as the number of low-speed signals included in the second data signal (or more redundant). For example, the second data signal may include 7 types of low-speed signals, and the corresponding cable portion also requires 7 signal cables, each of which can realize the transmission and reception of a single low-speed signal. In this way, the low-speed signal in the PCIe bus can be transparently transmitted directly through the cable portion, with low latency, simple development work, no need to change software configuration and timing, and fewer changes to the PCIe system.

[0092] Figure 3 is a schematic diagram of a PCIe low-speed signal transmitted through a cable portion provided by an embodiment of the present application. As shown in Figure 3, at the PCIe host end, the PCIe bus contains a PCIe high-speed data signal and a low-speed signal. The high-speed data signal sent by the first PCIe bus is converted into an optical signal (i.e., a first data signal) by a first photoelectric conversion module, transmitted through the optical fiber (optical cable portion) in the photoelectric hybrid cable, converted into a high-speed data signal by a second photoelectric conversion module at the PCIe device end, and then the high-speed data signal is transmitted to the second PCIe bus of the PCIe device. The low-speed signal in the first PCIe bus is directly transmitted to the second PCIe bus at the device end through the cable portion in the photoelectric hybrid cable. The low-speed signal may include a power signal, a ground signal (GND), a clock signal (CREFCLK), a position signal (CPRSNT#), a wake-up signal (CWAKE#), a power-on signal (CPWRON#), and a reset signal (CPERST#).

[0093] Low-speed signal transmission method 2:

[0094] In a possible implementation, the PCIe host further includes a first microcontroller configured to encode multiple low-speed signals sent by the first PCIe bus into one second data signal.

[0095] In one possible embodiment, the PCIe device also includes a second microcontroller; the cable portion is used to transmit a second data signal from the first microcontroller to the second microcontroller; the second microcontroller is used to receive the second data signal transmitted by the cable portion, decode the second data signal into multiple low-speed signals, and transmit the multiple low-speed signals to the second PCIe bus.

[0096] In an embodiment of the present application, a PCIe host of a data transmission system may include a first microcontroller, and a PCIe device may include a second microcontroller. The microcontroller may be used to encode multiple signals into one signal or decode one signal into multiple signals. The controller may specifically adopt a field programmable gate array (FPGA) chip, an application specific integrated circuit chip (ASIC), a chip microcontroller unit (MCU), or other chips that can implement this function. The control method and communication protocol may be in the form of a bidirectional two-wire synchronous serial bus (I2C), a serial peripheral interface (SPI), a management data input / output (MDIO), and a controller area network bus (CAN). The embodiment of the present application does not limit the specific type, control method, and communication protocol of the microcontroller.

[0097] In an embodiment of the present application, the PCIe host and the PCIe device in the data transmission system both include a microcontroller translation unit. The first microcontroller in the PCIe host can encode the multiple low-speed signals of the first PCIe bus into one second data signal, and then send the second data signal to the second microcontroller in the PCIe device through the cable part in the optoelectronic hybrid cable. The second microcontroller then performs decoding processing. After receiving the second data signal, the second microcontroller in the PCIe device can decode the second data signal to obtain multiple low-speed signals, and then transmit the multiple low-speed signals to the second PCIe bus to realize the transmission of low-speed signals. In this way, by encoding and transmitting the low-speed signals, the number of signal cables in the cable part of the optoelectronic hybrid cable can be reduced.

[0098] In a possible implementation, the cable portion includes a pair of signal cables; the pair of signal cables is used to transmit clock signal line signals and bidirectional data line signals.

[0099] In an embodiment of the present application, a PCIe host and a PCIe device in a data transmission system are both provided with a microcontroller, which can be used to realize the encoding of coupling multiple low-speed signals into a second data signal and the decoupling of a second data signal into a decoding of multiple low-speed signals. In this way, the transmission and reception of the second data signal can be transmitted through a pair of signal cables in the cable portion, which can reduce the number of signal cables used in the cable portion. For example, the two signal cables can be used for the transmission of clock signal line (SCL) signals and bidirectional serial data line (SDA) signals, respectively. Each signal cable can perform signal transmission (bidirectional transmission). The cable portion can be a copper cable or other conductive material. The cable type of the cable portion can be a coaxial cable or a twisted pair cable, etc., which is not limited in the embodiment of the present application.

[0100] FIG4 is a schematic diagram of a PCIe low-speed signal encoded and processed and transmitted through a cable portion according to an embodiment of the present application. As shown in FIG4 , the PCIe host includes a first microcontroller, and the PCIe device includes a second microcontroller. Multiple low-speed signals from the first PCIe bus pass through the first microcontroller, and the first microcontroller encodes the multiple low-speed signals into a second data signal. The PCIe host then sends the second data signal to the PCIe device via the cable portion, and the PCIe device decodes the second data signal into multiple low-speed signals through the second microcontroller, thereby achieving decoding and translation at the other end. This data transmission method can reduce the number of signal cables in the cable portion.

[0101] In some embodiments, in the first microcontroller, MCU or logic chip encoding can be used to encode multiple low-speed signals into one second data signal, and logic or timing coordination can be performed on the PCIe device to decode one second data signal into multiple low-speed signals.

[0102] It should be noted that in the embodiments of the present application, the PCIe host and PCIe device in the data transmission system transmit PCIe bus data via an optical-electrical hybrid cable. In this case, the optical-electrical hybrid cable can be an integrated cable structure obtained by mixing the optical cable portion and the electrical cable portion. However, within the PCIe host and PCIe device, the optical cable portion and the electrical cable portion can be separated. The optical cable portion is connected to the PCIe bus via a first optical-electrical conversion module; the electrical cable portion can be connected directly to the PCIe bus or connected to the PCIe bus through a microcontroller, which is not limited in the embodiments of the present application. In this way, the connection between the data transmission system and the optical-electrical hybrid cable is more flexible and more scalable.

[0103] In a possible implementation, types of the first optoelectronic conversion module and the second optoelectronic conversion module include active optical cables AOC, on-board optical modules OBO, near-package optical modules NPO, or co-package optical modules CPO.

[0104] In an embodiment of the present application, the types of optoelectronic conversion modules (first optoelectronic conversion module and second optoelectronic conversion module) may include pluggable optical modules (for example, active optical cable (AOC) optical modules), on-board optics (OBO) modules, near packaged optics (NPO) modules or co-packaged optics (CPO) modules, etc., and the packaging forms may include QSF+, QSFP, QSFP-DD, CDFP, OSFP, OSFP-XD, etc. The embodiment of the present application does not limit the specific type and packaging form of the optoelectronic conversion module.

[0105] In the embodiment of the present application, the photoelectric conversion module (the first photoelectric conversion module and the second photoelectric conversion module) may specifically include a laser, a driver (Driver), a photoelectric detector (PD), a trans-impedance amplifier (TIA), and optional digital signal processing (DSP). The types of photoelectric conversion modules include but are not limited to a multi-mode vertical cavity surface-emitting laser (VCSEL) solution, a directly modulated laser (DML) solution, an externally modulated laser (EML) solution, a silicon optical modulation solution, and a thin film lithium niobate modulation solution. Lasers include but are not limited to VCSEL, FB laser (Fabry Perot, FP), distributed feedback (DFB), distributed Bragg reflector (DBR), and the like. The photodetector PD includes, but is not limited to, a P-type semiconductor-impurity-N-type semiconductor (positive-intrinsic-negative, PIN), an avalanche photodiode (APD), and other forms. Of course, the specific type of the photoelectric conversion module and the specific types of each component can be flexibly selected based on actual needs, and the embodiments of the present application do not limit this.

[0106] Figure 5 is a schematic diagram of PCIe data transmission provided by an embodiment of the present application. As shown in Figure 5, in this embodiment, the PCIe device has x1 channel, and the optoelectronic conversion module used is an AOC (active optical cable). The module includes a transmitter optical subassembly (TOSA), a receiver optical subassembly (ROSA), and a driver. The TOSA includes a VCSEL laser, and the ROSA includes a PD and a TIA.

[0107] Specifically, the high-speed data transmission (Tx) signal of the first PCIe bus of the PCIe host is modulated by the driver into the laser signal in the TOSA to obtain the first data signal, which is then transmitted to the ROSA in the AOC module of the PCIe device through the multimode optical fiber (optical cable part) in the optical-electrical hybrid cable. The PD in the ROSA converts the received optical signal (first data signal) into an electrical signal (high-speed data signal), which is amplified and transmitted to the second PCIe bus of the PCIe device via the TIA. The communication process between the PCIe device and the PCIe host is consistent with the above process. In this way, two multimode optical fibers are required for signal transmission and reception. At the same time, the low-speed signal of the first PCIe bus of the PCIe host is transparently transmitted to the second PCIe bus of the PCIe device through the cable part of the optical-electrical hybrid cable (copper cable in Figure 5). The low-speed signal includes 7 types of signals, which can be transmitted using 7 copper cables.

[0108] In this embodiment, the AOC is pluggable, thereby improving the flexibility of system configuration.

[0109] FIG6 is a schematic diagram of PCIe data transmission provided by another embodiment of the present application. As shown in FIG6 , in this embodiment, the number of channels of the PCIe device is x1, and the optoelectronic conversion module used is an onboard optical (OBO) module. The module includes a TOSA, a ROSA, and a Driver, wherein the TOSA includes a VCSEL laser, and the ROSA includes a PD and a TIA. Specifically, the high-speed data Tx signal of the first PCIe bus of the PCIe host is modulated by the Driver into the laser signal in the TOSA to obtain a first data signal, which is then transmitted to the ROSA in the AOC module of the PCIe device through the multimode optical fiber (optical cable part) in the optoelectronic hybrid cable. The PD in the ROSA converts the received optical signal into an electrical signal, and transmits it to the second PCIe bus of the PCIe device via the TIA amplification. The communication process between the PCIe device end and the PCIe host end is consistent with the above process, so two multimode optical fibers are required for sending and receiving signals. At the same time, the low-speed signals from the PCIe host's first PCIe bus are transparently transmitted via the copper cables in the optical-electrical hybrid cable to the PCIe device's second PCIe bus. These low-speed signals include seven types of signals, requiring seven copper cables for transmission. Figure 6 differs from Figure 5 in that the OBO module is onboard and lacks the pluggable AOC feature, but it improves the integration between the PCIe host and the PCIe device.

[0110] FIG7 is a schematic diagram of PCIe data transmission provided by another embodiment of the present application. As shown in FIG7 , the number of channels of the PCIe device is x1, and the optoelectronic conversion module used is an AOC (active optical cable). The module includes a TOSA, a ROSA, and a Driver, wherein the TOSA includes a VCSEL laser, and the ROSA includes a PD and a TIA. Specifically, the high-speed data Tx signal of the first PCIe bus of the PCIe host is modulated by the Driver into the laser signal in the TOSA to obtain the first data signal, which is then transmitted to the ROSA in the AOC module of the PCIe device through the multimode optical fiber in the optoelectronic hybrid cable. The PD in the ROSA converts the received optical signal into an electrical signal, and amplifies it via the TIA and transmits it to the second PCIe bus at the PCIe device end.

[0111] In this embodiment, the communication process between the PCIe device and the PCIe host is consistent with the process described in the embodiments of Figures 5 and 6 above, so two optical fibers are required for signal transmission and reception. Simultaneously, the PCIe host and PCIe device incorporate a microcontroller (MCU) responsible for encoding multiple low-speed signals into one signal for transmission. The I2C protocol can be used, and the multiple low-speed signals can be the seven low-speed signals shown in Figure 7 . The first microcontroller on the PCIe host encodes the seven low-speed signals to obtain a second data signal, specifically including a clock signal line and a bidirectional data line. This signal is then transmitted via the copper cable in the optical-electrical hybrid cable to the second microcontroller of the PCIe device. The second microcontroller decodes the second data signal into multiple low-speed signals and transmits them to the second PCIe bus. In this way, the PCIe low-speed signal can be transmitted via two copper cables, reducing the number of copper cables in the optical-electrical hybrid cable.

[0112] Alternatively, in the above embodiment, the AOC optical module may be replaced by an OBO module.

[0113] Compared to the related art method of transmitting PCIe sideband signals by using photoelectric / electro-optical conversion, the data transmission system in the embodiment of the present application directly transmits PCIe low-speed signals such as sideband signals through the cable portion of the photoelectric hybrid cable, and transmits PCIe high-speed data signals through the optical cable portion, which can reduce loss and delay, save costs, and transmit sideband signals through copper cables and other cables, saving photoelectric / electro-optical conversion devices, saving costs, and reducing delay and power consumption. In addition, since the PCIe standard specification does not define the processing method for sideband signals, different PCIe equipment manufacturers have inconsistent processing of sideband signals. If photoelectric / electro-optical conversion devices are used, they need to be customized for different manufacturer types, resulting in higher costs. However, the embodiment of the present application is based on the cable portion for fast transmission, and there is no need for special processing of low-speed signals. It has wide adaptability and can be applied to any PCIe equipment manufacturer.

[0114] In addition, the data transmission method in the embodiment of the present application is simple, flexible and reliable. High-speed data signals and low-speed signals such as sideband signals are transmitted separately. Ethernet optical transmission can be reused for the transmission of high-speed data signals, and low-speed signals such as sideband signals can be directly transmitted through cables, which can enhance the reliability and stability of the system.

[0115] The data transmission method in PCIe optical interconnection in the embodiment of the present application is applicable to PCIe devices launched by different manufacturers. These PCIe devices from different manufacturers usually have inconsistent processing of low-speed signals such as sideband signals. It is difficult to achieve interconnection and interoperability of different PCIe devices through optical fiber connection alone. However, the PCIe optical interconnection method based on optical-electrical hybrid cables in the embodiment of the present application allows high-speed data signals to be transmitted through optical fibers and low-speed signals such as sideband signals to be transmitted through cables such as copper cables, which can reduce system costs and transmission delays.

[0116] Based on the above exemplary embodiments, Figure 8 is a schematic flow chart of a data transmission method provided in an embodiment of the present application. This data transmission method is applied to a data transmission system comprising an optical-electrical hybrid cable, a PCIe host with a high-speed peripheral component interconnect (PCIe), and a PCIe device. The optical-electrical hybrid cable comprises an optical cable portion and an electrical cable portion. As shown in Figure 8, the data transmission method includes the following steps.

[0117] S801. Transmit a first data signal between a PCIe host and a PCIe device via an optical cable; the first data signal includes an optical signal corresponding to a high-speed data signal of a PCIe bus.

[0118] S802: Transmit a second data signal between the PCIe host and the PCIe device through the cable portion; the second data signal includes an electrical signal corresponding to a low-speed signal of the PCIe bus.

[0119] In one possible implementation, a PCIe bus includes a first PCIe bus and a second PCIe bus; a PCIe host is provided with the first PCIe bus and a first photoelectric conversion module; a PCIe device is provided with a second PCIe bus and a second photoelectric conversion module; and transmitting a first data signal between the PCIe host and the PCIe device via an optical cable portion includes:

[0120] Converting the high-speed data signal sent by the first PCIe bus into a first data signal through a first photoelectric conversion module;

[0121] transmitting the first data signal from the first optical-electrical conversion module to the second optical-electrical conversion module through the optical cable portion; and

[0122] The first data signal is converted into a high-speed data signal by the second photoelectric conversion module and transmitted to the second PCIe bus.

[0123] In one possible implementation, transmitting the second data signal between the PCIe host and the PCIe device through the cable portion includes:

[0124] The second data signal sent by the first PCIe bus is transparently transmitted to the second PCIe bus through the cable portion; the number of signal cables included in the cable portion is the same as the number of low-speed signals included in the second data signal.

[0125] In a possible implementation, the PCIe host further includes a first microcontroller; and the method further includes:

[0126] The first microcontroller encodes the multiple low-speed signals sent by the first PCIe bus into a second data signal.

[0127] In one possible implementation, the PCIe device further includes a second microcontroller; and transmitting the second data signal between the PCIe host and the PCIe device through the cable portion includes:

[0128] transmitting a second data signal from the first microcontroller to the second microcontroller via the cable portion;

[0129] A second data signal transmitted by the cable portion is received by the second microcontroller, the second data signal is decoded into multiple low-speed signals, and the multiple low-speed signals are transmitted to the second PCIe bus.

[0130] In a possible implementation, the cable portion includes a pair of signal cables; the pair of signal cables is used to transmit clock signal line signals and bidirectional data line signals.

[0131] In one possible implementation, the optical cable portion includes multiple optical fibers; the number of optical fibers corresponds to the number of PCIe channels.

[0132] In a possible implementation, types of the first optoelectronic conversion module and the second optoelectronic conversion module include active optical cable AOC optical modules, on-board optical OBO modules, near-package optical NPO modules, or co-package optical CPO modules.

[0133] The specific implementation of each step in the above-mentioned data transmission method can refer to the aforementioned description of the data transmission system, and can achieve the same functions and technical effects. The embodiments of the present application will not be repeated here. Figure 9 is a structural schematic diagram of a data transmission device provided in an embodiment of the present application. Referring to Figure 9, the data transmission device 90 is applied to a data transmission system, and the data transmission system includes an optical-electrical hybrid cable, a peripheral component high-speed interconnection PCIe host and a PCIe device; the optical-electrical hybrid cable includes an optical cable portion and an electrical cable portion; the data transmission device 90 may include:

[0134] A first transmission module 91 is configured to transmit a first data signal between a PCIe host and a PCIe device via an optical cable; the first data signal includes an optical signal corresponding to a high-speed data signal of a PCIe bus;

[0135] The second transmission module 92 is used to transmit a second data signal between the PCIe host and the PCIe device through the cable portion; the second data signal includes an electrical signal corresponding to a low-speed signal of the PCIe bus.

[0136] In one possible implementation, the PCIe bus includes a first PCIe bus and a second PCIe bus; the PCIe host is provided with the first PCIe bus and a first photoelectric conversion module; the PCIe device is provided with a second PCIe bus and a second photoelectric conversion module; the first transmission module 91 is specifically configured to:

[0137] Converting the high-speed data signal sent by the first PCIe bus into a first data signal through a first photoelectric conversion module;

[0138] transmitting the first data signal from the first optical-electrical conversion module to the second optical-electrical conversion module via the optical cable portion;

[0139] The first data signal is converted into a high-speed data signal by the second photoelectric conversion module and transmitted to the second PCIe bus.

[0140] In a possible implementation, the second transmission module 92 is specifically configured to:

[0141] The second data signal sent by the first PCIe bus is transparently transmitted to the second PCIe bus through the cable portion; the number of signal cables included in the cable portion is the same as the number of low-speed signals included in the second data signal.

[0142] In a possible implementation, the PCIe host further includes a first microcontroller; and the device 90 is further configured to:

[0143] The first microcontroller encodes the multiple low-speed signals sent by the first PCIe bus into a second data signal.

[0144] In a possible implementation, the PCIe device further includes a second microcontroller; a second transmission module 92, specifically configured to:

[0145] transmitting a second data signal from the first microcontroller to the second microcontroller via the cable portion;

[0146] A second data signal transmitted by the cable portion is received by the second microcontroller, the second data signal is decoded into multiple low-speed signals, and the multiple low-speed signals are transmitted to the second PCIe bus.

[0147] In a possible implementation, the cable portion includes a pair of signal cables; the pair of signal cables is used to transmit clock signal line signals and bidirectional data line signals.

[0148] In one possible implementation, the optical cable portion includes multiple optical fibers; the number of optical fibers corresponds to the number of PCIe channels.

[0149] In a possible implementation, types of the first optoelectronic conversion module and the second optoelectronic conversion module include active optical cable AOC optical modules (pluggable optical modules), onboard optical OBO modules, near-package optical NPO modules, or co-package optical CPO modules.

[0150] The data transmission device 90 provided in the embodiment of the present application can execute the technical solution shown in the above method embodiment. Its implementation principle and beneficial effects are similar and will not be repeated here.

[0151] In this application, the term "include" and its variations may refer to non-restrictive inclusion; the term "or" and its variations may refer to "and / or". In this application, the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. In this application, "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship.

[0152] The above are only some embodiments of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as within the scope of protection of the present application.

Claims

1. A data transmission system, comprising: A first Peripheral Component Interconnect Express (PCIe) device; A second PCIe device; And An optical-electrical hybrid cable communicatively connecting the first PCIe device and the second PCIe device; Wherein, the optical-electrical hybrid cable includes: An optical cable portion for transmitting a first data signal between the first PCIe device and the second PCIe device, and the first data signal includes an optical signal corresponding to a high-speed data signal; and A cable portion for transmitting a second data signal between the first PCIe device and the second PCIe device, and the second data signal includes an electrical signal corresponding to a low-speed signal.

2. The system according to claim 1, wherein The first PCIe device includes: A first PCIe bus; and A first optical-electrical conversion module for converting the high-speed data signal from the first PCIe bus into the first data signal; Wherein, the optical cable portion is used to transmit the first data signal from the first optical-electrical conversion module to the second PCIe device.

3. The system according to claim 2, wherein The second PCIe device includes a second PCIe bus and a second optical-electrical conversion module, wherein, The second optical-electrical conversion module is used to convert the first data signal from the optical cable portion into the high-speed data signal and transmit it to the second PCIe bus.

4. The system according to claim 3, wherein The cable portion is also used to transparently transmit the second data signal from the first PCIe bus to the second PCIe bus.

5. The system according to claim 3 or 4, wherein The low-speed signal includes multiple low-speed signals, and the first PCIe device further includes: A first microcontroller for encoding the multiple low-speed signals from the first PCIe bus into the second data signal and sending the second data signal to the second PCIe device through the cable portion, wherein the second data signal is a single signal.

6. The system according to claim 5, wherein The second PCIe device further includes: A second microcontroller for receiving the second data signal from the cable portion, decoding the second data signal into the multiple low-speed signals, and transmitting the multiple low-speed signals to the second PCIe bus.

7. The system according to claim 5 or 6, wherein The cable portion includes a pair of signal cables, and the pair of signal cables are respectively used to transmit a clock signal line signal and a bidirectional data line signal.

8. The system according to any one of claims 2 to 7, wherein, The types of the first optical-electrical conversion module and the second optical-electrical conversion module include at least one of a pluggable optical module, an on-board optical (OBO) module, a near-packaged optical (NPO) module, or a co-packaged optical (CPO) module. Preferably, the pluggable optical module is an active optical cable (AOC) optical module.

9. The system according to claim 8, wherein The first optical-electrical conversion module is the AOC optical module, and the first optical-electrical conversion module is plugged into the first PCIe device; or The first optical-electrical conversion module is the OBO module, and the first optical-electrical conversion module is integrated within the first PCIe device.

10. The system according to claim 8 or 9, wherein, The second optical-electrical conversion module is the AOC optical module, and the second optical-electrical conversion module is plugged into the second PCIe device; or The second optoelectronic conversion module is the OBO module, and the second optoelectronic conversion module is integrated in the second PCIe device.

11. The system according to any one of claims 1 to 10, wherein The low-speed signals include sideband signals, power supply signals, and ground signals. Preferably, the sideband signals at least include a reference clock signal, a device presence detection signal, a wake-up signal, a power-on signal, and a global reset signal.

12. The system according to any one of claims 1 to 11, wherein, The optical cable portion and the cable portion of the optical-electrical hybrid cable are separated within the first PCIe device and / or the second PCIe device.

13. The system according to any one of claims 1 to 12, wherein, The high-speed data signals include data signals in the PCIe bus whose signal edge time is less than 4 to 6 times the interconnect transmission delay.

14. The system according to any one of claims 1 to 12, wherein, The low-speed signals include data signals in the PCIe bus whose signal edge time is greater than or equal to 4 to 6 times the interconnect transmission delay.

15. The system according to any one of claims 1 to 14, wherein, The optical cable portion includes at least one optical fiber, and the number of optical fibers is equal to or greater than the number of PCIe channels in the first data signal. Preferably, the number of optical fibers is twice the number of PCIe channels in the first data signal.

16. The system according to any one of claims 1 to 15, wherein, The cable portion includes at least one signal cable, and the number of signal cables is equal to or greater than the number of electrical signals in the second data signal.

17. A data transmission device, the data transmission device is connected to a first Peripheral Component Interconnect Express (PCIe) device through an optical-electrical hybrid cable, the optical-electrical hybrid cable includes an optical cable portion and a cable portion, wherein, The data transmission device transmits a first data signal to the first PCIe device through the optical cable portion, and the first data signal includes an optical signal corresponding to a high-speed data signal; And The data transmission device transmits a second data signal to the first PCIe device through the cable portion, and the second data signal includes an electrical signal corresponding to a low-speed signal.

18. A data transmission method, applied to the data transmission system according to any one of claims 1 to 16, wherein, The data transmission system includes a first Peripheral Component Interconnect Express (PCIe) device, a second PCIe device, and an optical-electrical hybrid cable communicatively connecting the first PCIe device and the second PCIe device, and the optical-electrical hybrid cable includes an optical cable portion and a cable portion. The method includes: Transmitting a first data signal between the first PCIe device and the second PCIe device through the optical cable portion, and the first data signal includes an optical signal corresponding to the high-speed data signal of the PCIe bus; and Transmitting a second data signal between the first PCIe device and the second PCIe device through the cable portion; the second data signal includes an electrical signal corresponding to the low-speed signal of the PCIe bus.

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