Electronic device comprising heat dissipation member

Abstract

The present disclosure relates to an electronic device. An electronic device, according to one embodiment of the present disclosure, may comprise: a first substrate including a first surface and a second surface facing an opposite direction from the first surface; a second substrate including a third surface facing the first surface and a fourth surface facing an opposite direction from the third surface; an interposer disposed between the first surface and the third surface; an electronic component disposed on the fourth surface; a communication circuit including a communication component; at least one power management circuit including a switching circuit and an output capacitor configured to supply power supplied from the switching circuit to the communication component; and a heat dissipation member which is solid at room temperature and is disposed in a space defined by the first substrate, the second substrate, and the interposer so as to overlap the electronic component when viewed in a direction perpendicular to the fourth surface, wherein an output capacitor of the at least one power management circuit may be disposed on the first substrate or the second substrate, and may not overlap the heat dissipation member when viewed in the direction perpendicular to the fourth surface.

Description

Electronic devices including heat dissipation elements

[0001] The present disclosure relates to electronic devices, and for example, to electronic devices including heat dissipation structures for electronic components.

[0002] Electronic devices can refer to devices that perform specific functions based on their embedded programs, such as home appliances, electronic notebooks, portable multimedia players, mobile communication terminals, tablet PCs, audio / video devices, desktop / laptop computers, or in-vehicle navigation systems. For example, these electronic devices can output stored information as audio or video.

[0003] As the integration of electronic devices increases and ultra-high-speed and / or high-capacity wireless communications become more widespread, a single electronic device, such as a mobile terminal, can now incorporate a variety of functions. For example, in addition to communication functions, entertainment functions such as gaming, multimedia functions such as music and video playback, communication and security functions such as mobile banking, and even calendar management or electronic wallet functions are being integrated into a single electronic device. These electronic devices are also becoming smaller for convenient portability.

[0004] According to one embodiment of the present disclosure, an electronic device may include a first substrate including a first side and a second side facing in an opposite direction to the first side.

[0005] According to one embodiment of the present disclosure, the electronic device may include a second substrate including a third side facing the first side and a fourth side facing in an opposite direction of the third side.

[0006] According to one embodiment of the present disclosure, the electronic device may include an interposer disposed between the first side and the third side.

[0007] According to one embodiment of the present disclosure, the interposer can surround at least a portion of the heat dissipation member.

[0008] According to one embodiment of the present disclosure, the electronic device may include an electronic component disposed on the fourth surface.

[0009] According to one embodiment of the present disclosure, an electronic device may include a communication circuit including a communication component.

[0010] According to one embodiment of the present disclosure, an electronic device may include at least one power management circuit including a switching circuit.

[0011] According to one embodiment of the present disclosure, the power management circuit may include an output capacitor configured to supply power supplied from the switching circuit to the communication component.

[0012] According to one embodiment of the present disclosure, an electronic device may include a heat dissipation member that is solid at room temperature.

[0013] According to one embodiment of the present disclosure, the heat dissipation member may be arranged in a space defined by the first substrate, the second substrate, and the interposer so as to overlap the electronic component when viewed in a direction perpendicular to the fourth surface.

[0014] According to one embodiment of the present disclosure, the output capacitor of the at least one power management circuit may be disposed on the first substrate or the second substrate.

[0015] According to one embodiment of the present disclosure, the output capacitor of the at least one power management circuit may be disposed on any one of the first side, the second side, the third side, or the fourth side.

[0016] According to one embodiment of the present disclosure, the output capacitor of the at least one power management circuit may not overlap the heat dissipation member when viewed in a direction perpendicular to the fourth surface.

[0017] FIG. 1 is a block diagram of an electronic device within a network environment according to various embodiments.

[0018] FIG. 2 is a perspective view of an electronic device showing a front side of the electronic device according to one embodiment of the present disclosure.

[0019] FIG. 3 is an exploded perspective view of an electronic device showing a front side of the electronic device according to one embodiment of the present disclosure.

[0020] FIG. 4 is a cross-sectional view of a substrate assembly according to one embodiment of the present disclosure, taken along line A-A' shown in FIG. 3.

[0021] FIG. 5 is a block diagram of a portion of an electronic device, illustrating a communication circuit and a power management circuit of the electronic device, according to one embodiment of the present disclosure.

[0022] FIG. 6 is a schematic circuit diagram of the power management circuit illustrated in FIG. 5, according to one embodiment of the present disclosure.

[0023] FIG. 7 is a plan view of a portion of a substrate assembly according to one embodiment of the present disclosure.

[0024] FIG. 8 is a cross-sectional view of a substrate assembly according to one embodiment of the present disclosure.

[0025] FIG. 9 is a plan view of a first substrate and a second substrate according to another embodiment of the present disclosure.

[0026] FIG. 10 is a plan view of a first substrate according to one embodiment of the present disclosure.

[0027] FIG. 11 is a plan view of a portion of a substrate assembly according to one embodiment of the present disclosure.

[0028] FIG. 12 illustrates a portion of a process for manufacturing a substrate assembly according to one embodiment of the present disclosure.

[0029] The following description of the accompanying drawings may provide an understanding of various exemplary implementations of the present disclosure, including the claims and their equivalents. While the exemplary embodiments disclosed in the following description include numerous specific details to aid understanding, they are to be considered as one of various exemplary embodiments. Accordingly, those skilled in the art will appreciate that various changes (e.g., additions or omissions of components, and combinations of various implementations / embodiments and their features) and modifications may be made to the various implementations described herein without departing from the scope and technical spirit of the disclosure. Furthermore, for the sake of clarity and conciseness, descriptions of well-known functions, components, and / or configurations may be omitted.

[0030] The terms and words used in the following description and claims are not limited to their reference meanings and can be used to clearly and consistently describe one embodiment of the present disclosure. Therefore, it will be apparent to those skilled in the art that the following description of various implementations of the disclosure is provided for illustrative purposes, not for the purpose of limiting the scope of the disclosure and its equivalents.

[0031] Unless the context clearly dictates otherwise, the singular forms of "a," "an," and "the" should be understood to include plural meanings. Thus, for example, "a component surface" could be understood to include one or more of the surfaces of the component.

[0032] FIG. 1 is a block diagram of an electronic device (101) within a network environment (100) according to various embodiments.

[0033] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) via a first network (198) (e.g., a short-range wireless communication network), or may communicate with at least one of an electronic device (104) or a server (108) via a second network (199) (e.g., a long-range wireless communication network). In one embodiment, the electronic device (101) may communicate with the electronic device (104) via the server (108). According to one embodiment, the electronic device (101) may include a processor (120), a memory (130), an input module (150), an audio output module (155), a display module (160), an audio module (170), a sensor module (176), an interface (177), a connection terminal (178), a haptic module (179), a camera module (180), a power management module (188), a battery (189), a communication module (190), a subscriber identification module (196), or an antenna module (197). In some embodiments, the electronic device (101) may omit at least one of these components (e.g., the connection terminal (178)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (176), the camera module (180), or the antenna module (197)) may be integrated into one component (e.g., the display module (160)).

[0034] The processor (120) may, for example, execute software (e.g., a program (140)) to control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) and perform various data processing or operations. According to one embodiment, as at least a part of the data processing or operations, the processor (120) may store commands or data received from other components (e.g., a sensor module (176) or a communication module (190)) in a volatile memory (132), process the commands or data stored in the volatile memory (132), and store result data in a non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or an auxiliary processor (123) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together with the main processor (121). For example, when the electronic device (101) includes the main processor (121) and the auxiliary processor (123), the auxiliary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a given function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as a part thereof.

[0035] The auxiliary processor (123) may control at least a portion of functions or states associated with at least one component (e.g., a display module (160), a sensor module (176), or a communication module (190)) of the electronic device (101), for example, on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (123) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (180) or a communication module (190)). In one embodiment, the auxiliary processor (123) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (108)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0036] The memory (130) can store various data used by at least one component (e.g., processor (120) or sensor module (176)) of the electronic device (101). The data can include, for example, software (e.g., program (140)) and input data or output data for commands related thereto. The memory (130) can include volatile memory (132) or non-volatile memory (134).

[0037] The program (140) may be stored as software in the memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0038] The input module (150) can receive commands or data to be used in a component of the electronic device (101) (e.g., a processor (120)) from an external source (e.g., a user) of the electronic device (101). The input module (150) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0039] The audio output module (155) can output audio signals to the outside of the electronic device (101). The audio output module (155) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0040] The display module (160) can visually provide information to an external party (e.g., a user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0041] The audio module (170) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150), output sound through the sound output module (155), or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (101).

[0042] The sensor module (176) can detect the operating status (e.g., power or temperature) of the electronic device (101) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (176) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0043] The interface (177) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (101) with an external electronic device (e.g., the electronic device (102)). In one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0044] The connection terminal (178) may include a connector through which the electronic device (101) may be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0045] The haptic module (179) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. According to one embodiment, the haptic module (179) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0046] The camera module (180) can capture still images and videos. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0047] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

[0048] A battery (189) may power at least one component of the electronic device (101). In one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0049] The communication module (190) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may operate independently from the processor (120) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (194) (e.g., a local area network (LAN) communication module, or a power line communication module). Among these communication modules, the corresponding communication module can communicate with an external electronic device (104) via a first network (198) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (199) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules can be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can verify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) by using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (196).

[0050] The wireless communication module (192) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). The NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and connection of multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (192) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (192) can support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), an external electronic device (e.g., the electronic device (104)), or a network system (e.g., the second network (199)). According to one embodiment, the wireless communication module (192) can support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.

[0051] The antenna module (197) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (197) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). In one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (198) or the second network (199), may be selected from the plurality of antennas, for example, by the communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device via the selected at least one antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (197).

[0052] According to various embodiments, the antenna module (197) may form a mmWave antenna module. In one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high-frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high-frequency band.

[0053] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0054] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) via a server (108) connected to a second network (199). Each of the external electronic devices (102 or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations executed in the electronic device (101) may be executed in one or more of the external electronic devices (102, 104, or 108). For example, when the electronic device (101) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (101) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (101) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server utilizing machine learning and / or a neural network. According to one embodiment, the external electronic device (104) or the server (108) may be included in the second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0055] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.

[0056] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0057] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0058] Various embodiments of the present document may be implemented as software (e.g., a program (140)) including one or more instructions stored in a storage medium (e.g., an internal memory (136) or an external memory (138)) readable by a machine (e.g., an electronic device (101)). For example, a processor (e.g., a processor (120)) of the machine (e.g., an electronic device (101)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0059] According to one embodiment, the method according to various embodiments disclosed in this document may be provided as a computer program product. The computer program product may be traded between sellers and buyers as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or may be provided through an application store (e.g., Play Store). TM ) or directly between two user devices (e.g., smart phones), online distribution (e.g., downloading or uploading). In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily created in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0060] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0061] FIG. 2 is a perspective view of an electronic device (101) illustrating a front side (210A) of the electronic device (101) according to one embodiment of the present disclosure.

[0062] Referring to FIG. 2, an electronic device (101) according to one embodiment of the present disclosure may include a first surface (or front surface) (210A), a second surface (or back surface) (not shown), and a third surface (or side surface) (210C) surrounding a space between the first surface (210A) and the second surface (210B).

[0063] According to one embodiment of the present disclosure, the first surface (210A) may be formed by a front plate (202) that is substantially transparent or at least partially transparent (e.g., a glass plate including various coating layers, or a polymer plate). The second surface (or back surface) (not shown) may be formed by a substantially opaque back plate (not shown). The side surface (210C) may be formed by a side structure (or “side bezel structure”) (218) that is joined to the front plate (202) and the back plate (211) and includes metal and / or polymer.

[0064] According to one embodiment of the present disclosure, the electronic device (101) may include at least one of a display (220), an audio module (203, 207, 214), a sensor module (204), a key input device (217), a light emitting element (206), and a connector hole (208, 209).

[0065] According to one embodiment of the present disclosure, the display (220) may be visually exposed, for example, through a substantial portion of the front plate (202). In one embodiment, at least a portion of the display (220) may be visually exposed through the front plate (202) forming the first surface (210A) or through a portion of a side surface (210C). In one embodiment, the corners of the display (220) may be formed to be substantially identical to the adjacent outer shape of the front plate (202).

[0066] According to one embodiment of the present disclosure, the audio module (203, 207, 214) may include a microphone hole (203) and a speaker hole (207, 214). The microphone hole (203) may have a microphone disposed therein for acquiring external sounds, and in one embodiment, multiple microphones may be disposed so as to detect the direction of sounds. The speaker hole (207, 214) may include an external speaker hole (207) and a receiver hole (214) for calls. In one embodiment, the speaker hole (207, 214) and the microphone hole (203) may be implemented as a single hole, or a speaker may be included without the speaker hole (207, 214) (e.g., a piezo speaker).

[0067] According to one embodiment of the present disclosure, the sensor module (204) may generate an electrical signal or data value corresponding to an internal operating state of the electronic device (101) or an external environmental state. The sensor module (204) may include, for example, a first sensor module (204) (e.g., a proximity sensor) and / or a second sensor module (not shown) (e.g., a fingerprint sensor) disposed on a first surface (210A) of the housing (210). The fingerprint sensor may be disposed on the first surface (210A) (e.g., a display (220)) of the housing (210) as well as the second surface (not shown) or side surface (210C). The electronic device (101) may further include, for example, at least one of a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0068] According to one embodiment of the present disclosure, a camera device (205) may be disposed on a first surface (210A) of an electronic device (101). The camera device (205) may include one or more lenses, an image sensor, and / or an image signal processor.

[0069] According to one embodiment of the present disclosure, the key input device (217) may be disposed on a side surface (210C) of the housing (210). In one embodiment, the electronic device (101) may not include some or all of the above-mentioned key input devices (217), and the key input devices (217) that are not included may be implemented in other forms, such as soft keys, on the display (220).

[0070] According to one embodiment of the present disclosure, the light-emitting element (206) may be disposed, for example, on the first surface (210A) of the housing (210). The light-emitting element (206) may provide, for example, status information of the electronic device (101) in the form of light. In one embodiment, the light-emitting element (206) may provide a light source that is linked to the operation of, for example, the camera module (205). The light-emitting element (206) may include, for example, an LED, an IR LED, and a xenon lamp.

[0071] The connector holes (208, 209) may include a first connector hole (208) that can accommodate a connector (e.g., a USB connector) for transmitting and receiving power and / or data with an external electronic device, and / or a second connector hole (e.g., an earphone jack) (209) that can accommodate a connector for transmitting and receiving audio signals with an external electronic device.

[0072] FIG. 3 is an exploded perspective view of an electronic device (101) showing the front side of the electronic device (101) according to one embodiment of the present disclosure.

[0073] Referring to FIG. 3, an electronic device (101) according to one embodiment of the present disclosure may include a side structure (231), a first support member (232) (e.g., a bracket), a display (220), at least one printed circuit board (or board assembly) (240a, 240b), a battery (250), a second support member (260), an antenna, a camera assembly (214), and a back plate (211). When including a plurality of printed circuit boards (240a, 240b), the electronic device (101) may include at least one flexible printed circuit board (240c) to electrically connect different printed circuit boards. For example, the printed circuit board (240a, 240b) may include a first substrate assembly (240a) disposed on one side (e.g., upper side or Y direction) of the battery (250) and a second substrate assembly (240b) disposed on the other side (e.g., lower side or -Y direction) of the battery (250), and the first substrate assembly (240a) and the second substrate assembly (240b) may be electrically connected by a flexible printed circuit board (240c).

[0074] According to one embodiment of the present disclosure, the first support member (232) may be provided in at least a portion in a flat shape. In one embodiment, the first support member (232) may be disposed inside the electronic device (101) and connected to the side structure (231), or may be formed integrally with the side structure (231). The first support member (232) may be formed of, for example, a metallic material and / or a non-metallic (e.g., a polymer) material. When the first support member (232) is at least partially formed of a metallic material, the side structure (231) or a portion of the first support member (232) may function as an antenna. The first support member (232) may have a display (220) coupled to one surface (e.g., in the Z direction) and a substrate assembly (240a, 240b) coupled to the other surface (e.g., in the −Z direction). The substrate assembly (240a, 240b) may include, for example, an interposer, a processor, memory, and / or an interface. The processor may include, for example, one or more of a central processing unit, an application processor, a graphics processing unit, an image signal processor, a sensor hub processor, or a communication processor.

[0075] According to one embodiment of the present disclosure, the front plate (202) may be coupled to the support member (232) via an adhesive member. The front plate (202) may be referred to as a "cover" or a "front cover." The rear plate (211) may be referred to as a "cover" or a "rear cover." The edge of the cover (211) may be supported by the support member (232).

[0076] According to one embodiment of the present disclosure, the first support member (232) and the side structure (231) may be combined to form a front case or housing (230). The housing (230) may also be referred to as a frame (230). According to one embodiment, the housing (230) may accommodate a substrate assembly (240a, 240b) or a battery (250).

[0077] In one embodiment of the present disclosure, the housing (230) may form at least a portion of the exterior of the electronic device (101). The housing (230) may include a side structure (231), a first support member (232), a front plate (202), and a rear plate (211). In one embodiment of the present disclosure, the 'front or rear of the housing (230)' may refer to the front plate (202) or the rear cover (211). In one embodiment, the first support member (232) is disposed between the front plate (202) and the rear plate (211), and may function as a structure for arranging electrical / electronic components, such as a substrate assembly (240a, 240b) or a camera assembly (214).

[0078] According to one embodiment of the present disclosure, the interface may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, and / or an audio interface. The interface may electrically or physically connect the electronic device (101) to an external electronic device, for example, and may include a USB connector, an SD card / MMC connector, or an audio connector.

[0079] According to one embodiment of the present disclosure, the second support member (260) may include, for example, an upper support member (260a) and a lower support member (260b). In one embodiment, the upper support member (260a) may be arranged to surround the substrate assembly (240a, 240b) (e.g., the first substrate assembly (240a)) together with a portion of the first support member (232). For example, the upper support member (260a) of the second support member (260) may be arranged to face the first support member (232) with the first substrate assembly (240a) therebetween.

[0080] In one embodiment of the present disclosure, the lower support member (260b) of the second support member (260) may be disposed to face the first support member (232) with the second substrate assembly (240b) therebetween. Circuit devices implemented in the form of integrated circuit chips (e.g., processors, communication modules, or memories) or various electrical / electronic components may be disposed on the printed circuit boards (240a, 240b), and according to an embodiment, the printed circuit boards (240a, 240b) may be provided with an electromagnetic shielding environment from the second support member (260). In one embodiment, the lower support member (260b) may be utilized as a structure on which electrical / electronic components such as a speaker module, an interface (e.g., a USB connector, an SD card / MMC connector, or an audio connector) may be disposed.

[0081] In one embodiment of the present disclosure, electrical / electronic components such as a speaker module, interfaces (e.g., a USB connector, an SD card / MMC connector, or an audio connector) may be arranged on an additional printed circuit board (not shown). For example, the lower support member (260b) may be arranged to surround the additional printed circuit board together with another portion of the first support member (232).

[0082] According to one embodiment of the present disclosure, a battery (250) is a device for supplying power to at least one component of an electronic device (101), and may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell. At least a portion of the battery (250) may be disposed substantially on the same plane as, for example, a printed circuit board (240a, 240b). The battery (250) may be disposed integrally within the electronic device (101), or may be disposed detachably from the electronic device (101).

[0083] Although not shown, the antenna may include a conductive pattern implemented on the surface of the second support member (260), for example, through a laser direct structuring process. In one embodiment, the antenna may include a printed circuit pattern formed on the surface of a thin film, and the thin film-type antenna may be disposed between the back plate (211) and the battery (250). The antenna may include, for example, a near field communication (NFC) antenna, a wireless charging antenna, and / or a magnetic secure transmission (MST) antenna. The antenna may, for example, perform short-range communication with an external device or wirelessly transmit and receive power required for charging. In one embodiment, another antenna structure may be formed by the side structure (231) and / or a portion or a combination of the first support member (232).

[0084] According to one embodiment of the present disclosure, the electronic device (101) may include a heat dispersion member (V). As an example, the heat dispersion member (V) may be disposed on the first support member (232). Heat generated inside the electronic device (101) may be dispersed through the heat dispersion member (V) or released to the outside of the electronic device (101). For example, heat generated in the first substrate assembly (240a) may be transferred to the battery (250) through the heat dispersion member. For example, the heat dispersion member may include a vapor chamber or a heat pipe.

[0085] FIG. 4 is a cross-sectional view of a substrate assembly (300) according to one embodiment of the present disclosure, taken along the line AA` illustrated in FIG. 3. As an example, the matters relating to the first substrate assembly (240a) described with reference to FIG. 3 may be substantially equally applied to the substrate assembly (300) illustrated in FIG. 4, to the extent that they are not mutually disposed.

[0086] The Z-axis (+Z, -Z) illustrated in Fig. 4 may correspond to the Z-axis illustrated in Figs. 2 and 3. The +Z direction illustrated in Fig. 4 may be the same as the direction in which the Z-axis illustrated in Fig. 3 is directed, and the -Z direction illustrated in Fig. 4 may be the same as the direction opposite to the direction in which the Z-axis illustrated in Fig. 3 is directed.

[0087] Referring to FIG. 4, a substrate assembly (300) according to one embodiment of the present disclosure may include a first substrate (310). The first substrate (310) may include a first surface (311) and a second surface (312) facing in an opposite direction of the first surface (311) (i.e., facing away from each other). As an example, the first substrate (310) may include a printed circuit board having at least one electrical component (part) mounted on the first surface (311) and / or the second surface (312). In one embodiment, the first substrate may be a printed circuit board having one or more electrical components mounted on the first surface (311) and / or the second surface (312).

[0088] According to one embodiment of the present disclosure, a substrate assembly (300) may include a second substrate (320). The second substrate (320) may include a third surface (321) facing with a first surface (311) of a first substrate (310). The second substrate (320) may include a fourth surface (322) facing in an opposite direction from the third surface (321) (i.e., facing away from each other). As an example, the second substrate (320) may include a printed circuit board having at least one electrical component mounted on the third surface (321) and the fourth surface (322). In one embodiment, the second substrate may be a printed circuit board having one or more electrical components mounted on the third surface (321) and / or the fourth surface (322).

[0089] According to one embodiment of the present disclosure, the electronic device (101) may include a heat dissipation member (350) disposed between a first surface (311) of a first substrate (310) and a third surface (321) of a second substrate (320). The heat dissipation member (350) may partially or fully contact the first surface (311) and / or the third surface (321). A portion of the heat dissipation member (350) may contact the third surface (321) through between components (340) disposed on the third surface (321). The components (340) may be arranged on the first surface (311) and a portion of the heat dissipation member (350) may contact the first surface (311) between components arranged on the first surface (311).

[0090] According to one embodiment of the present disclosure, the heat dissipation member (350) can contact the first surface (311) of the first substrate (310). The heat dissipation member (350) can contact the third surface (321) of the second substrate (320). The heat dissipation member (350) can contact at least one of the components (340) arranged on the first surface (311) or the third surface (321).

[0091] According to one embodiment of the present disclosure, the heat dissipation member (350) may be disposed on the first surface (311) of the first substrate (310). The heat dissipation member (350) may be adhered to the first surface (311). As an example, an adhesive layer may be disposed between the first surface (311) and the heat dissipation member (350). As an example, the adhesive layer may include an adhesive made of an acrylic material or an adhesive made of a hot melt material. In another embodiment, the heat dissipation member (350) may be attached to the third surface (321) via the adhesive. In some embodiments, the heat dissipation member (350) may have adhesive properties that enable it to be adhered to the first surface (311) and / or the third surface (321).

[0092] According to one embodiment of the present disclosure, the heat dissipation member (350) may be in a solid phase at room temperature. For example, the room temperature (Tr) may be a temperature of 15 degrees Celsius to 25 degrees Celsius. The heat dissipation member (350) may be in a solid phase at the operating temperature of the electronic component (E1) (e.g., 45 degrees Celsius to 65 degrees Celsius). The heat dissipation member (350) may gradually soften as the temperature increases. For example, when the electronic component (E1) is operated, the temperature of the heat dissipation member (350) increases due to the heat generated from the electronic component (E1), and accordingly, the heat dissipation member (350) may change into a softer solid or gel phase compared to when it is at room temperature.

[0093] According to one embodiment of the present disclosure, the heat dissipation member (350) may exhibit thermally responsive behavior, in which properties such as phase or thermal conductivity change in response to temperature. For example, the heat dissipation member (350) may be in a solid state at room temperature, but may transition to a gel phase when heated by absorbing ambient heat. This phase transition may improve the heat dissipation efficiency of the heat dissipation member (350). The heat dissipation member (350) may include a heat dissipation material, a phase change material, and a matrix material. A more detailed description of the materials included in the heat dissipation member (350) will be described below.

[0094] According to one embodiment of the present disclosure, when the heat dissipation member (350) is in a solid state at room temperature, the transport, placement, or assembly of the heat dissipation member (350) may be easier compared to when it is in a liquid or gel state. In addition, when the heat dissipation member (350) is in a solid state, it has a certain level of rigidity, so that defects such as dents or compression of the heat dissipation member (350) that may occur during the assembly and transport processes can be reduced. In addition, by providing the heat dissipation member (350) in a solid state at room temperature and / or during deposition when manufacturing the electronic device (101), the use of a liquid-type heat-emitting material can be avoided during the manufacturing process. This can facilitate the placement of other components or eliminate the need for holes for injection, detection, and exhaust in one or more substrates or other components. Furthermore, since the placement of the heat dissipation material can be more easily controlled, the task of accommodating it within a predetermined space / area becomes easier, thereby increasing the degree of freedom in design, and thus reducing the influence of the placement of the heat dissipation material on the position of components.

[0095] According to one embodiment of the present disclosure, the heat dissipating member (350) may include heat dissipating particles. As an example, the heat dissipating particles may include an electrical insulator such as aluminum oxide (Al2O3) or aluminum nitride (AlN). As another example, the heat dissipating particles may include carbon fiber, graphene, boron nitride (BN), silicon carbide (SiC), magnesium oxide (MgO), or manganese oxide (ZnO).

[0096] According to one embodiment of the present disclosure, the heat dissipation member (350) may include a phase change material. The phase change material may include a thermoresponsive material based on temperature, and may include a thermoplastic polymer (i.e., the phase change material may change its phase or partially change its phase based on its temperature). As an example, the phase change material may change from a solid to a gel or a liquid when the temperature increases (i.e., when the melting point or phase transition temperature is reached), and may include a paraffin-based material that is a temperature-sensitive material. However, the phase change material may have any form that provides the desired thermal properties (i.e., the desired phase change properties and / or heat dissipation / conduction properties), and is not limited to a paraffin-based material. When the heat dissipation member (350) is in a solid state, for example, when it is in a gel state, there may be partial movement / expansion of the heat dissipation member (350) that provides improved contact / enclosure with the heat generating component, so when the heat dissipation member (350) is in a solid state, the use of the phase change material may reduce the accuracy of placement of the heat dissipation member (350) relative to the required heat generating component.

[0097] According to one embodiment of the present disclosure, the heat dissipation member (350) may include a matrix material configured to maintain the heat dissipation member (350) in a gel phase rather than a liquid phase when the melting point is passed. The matrix material functions as a frame of the heat dissipation member (350), thereby substantially maintaining the shape of the heat dissipation member (350) even when the temperature of the heat dissipation member (350) rises. As an example, the matrix material may include a rubber-based material.

[0098] According to one embodiment of the present disclosure, the heat dissipating member (350) may include about 75 to 90 wt% (weight percentage) of the heat dissipating particles, about 5 to 15 wt% of the matrix material, and / or about 5 to 15 wt% of the phase change material. The composition ratio of the heat dissipating particles, the matrix material, and / or the phase change material included in the heat dissipating member (350) may have any composition ratio value suitable for providing a phase change material exhibiting the designed behavior, and is not limited to the above examples.

[0099] According to one embodiment of the present disclosure, the substrate assembly (300) may include an interposer (330) disposed between a first surface (311) of a first substrate (310) and a third surface (321) of a second substrate (320). The first substrate (310) and the second substrate (320) may be electrically connected through the interposer (330). The interposer (330) may be electrically connected to the first substrate (310) through a first soldering portion (361). The interposer (330) may be electrically connected to the second substrate (320) through a second soldering portion (362). As an example, the interposer (330) may be connected to the first substrate (310) and the second substrate (320) through vias (not shown) included in the first substrate (310) and the second substrate (320).

[0100] According to one embodiment of the present disclosure, the interposer (330) may surround at least a portion of the heat dissipation member (350). As an example, the interposer (330) may extend annularly along edges of the first substrate (310) and the second substrate (320). More specifically, the interposer (330) may extend along an edge (311e, see FIG. 9) of the first side (311) of the first substrate (310) and / or an edge of the third side (321) of the second substrate (320). According to another embodiment of the present disclosure (not shown), the interposer (330) may partially surround the heat dissipation member (350). As an example, the interposer (330) may entirely surround the heat dissipation member (350) together with other structures (e.g., side walls, etc.). In some embodiments, the interposer (330) may be formed by a plurality of interposer members.

[0101] According to one embodiment of the present disclosure, the substrate assembly (300) may include a first surface (311) of a first substrate (310), a third surface (321) of a second substrate (320), and an internal space (331) that is at least partially surrounded or at least partially defined by an interposer (330). A heat dissipation member (350) may be disposed in the internal space (331) to completely or partially fill the internal space (331).

[0102] According to one embodiment of the present disclosure, an electronic device (101) may include an electronic component (E1) disposed on a fourth surface (322) of a second substrate (320). The electronic component (E1) may generate heat during operation. As an example, the electronic component (E1) may be an application processor including multiple processing cores (e.g., processing cores B1 and B2 of FIG. 11).

[0103] According to one embodiment of the present disclosure, an electronic device (101) may include a volatile memory (E2) disposed on an electronic component (E1). The volatile memory (E2) may be operatively connected to the electronic component (E1). As an example, the volatile memory (E2) may be a dynamic random access memory (DRAM). In some embodiments, the volatile memory (E2) may be separated from the electronic component (E1).

[0104] According to one embodiment of the present disclosure, the electronic device (101) may include a shield can (420) (or shielding member) disposed on a fourth surface (322) of a second substrate (320). The shield can (420) may fully or partially surround the electronic component (E1) and the volatile memory (E2). The shield can (420) may be connected to a grounding configuration (not shown) of the electronic device (101) via the substrate assembly (300). The shield can (420) may have a hole / opening / window formed on a top surface.

[0105] According to one embodiment of the present disclosure, the electronic device (101) may include a shielding cover (440) (or shielding lid) covering the hole of the shielding can (420). The shielding cover (440) may be in contact with the shielding can (420). As an example, the shielding cover (440) may be bonded to the shielding can (420) using a conductive adhesive. The shielding cover (440) and the shielding can (420) may shield noise generated from the electronic component (E1). The shielding can (420) and the shielding cover (440) may surround the electronic component (E1), the volatile memory (E2), and the heat dissipation material (430). The above shielding cover (440) and / or shield can (420) can shield the electronic component (E1) and / or the volatile memory (E2) from external electromagnetic radiation, and / or can receive electromagnetic radiation generated by the electronic component (E1) and / or the volatile memory (E2).

[0106] According to one embodiment of the present disclosure, the substrate assembly (300) may include a heat dissipation material (430) disposed between the volatile memory (E2) and the shielding cover (440) and / or the shield can (420). By the heat dissipation material (430), heat generated in the electronic component (E1) and the volatile memory (E2) may be transferred to the shielding cover (440) and / or the shield can (420). In some embodiments, the heat dissipation material (430) may be disposed completely or partially between the electronic component (E1) and the shielding cover (440) and / or the shield can (420).

[0107] According to one embodiment of the present disclosure, the heat dissipating material (430) may have a predetermined viscosity. For example, the heat dissipating material (430) may not significantly deviate from the space between the volatile memory (E2) and the shielding cover (440) due to its viscosity even when the electronic device (101) collides with an external structure. As an example, the heat dissipating material (430) may include heat dissipating particles (e.g., Al2O3 and / or AlN), additives (curing agents and / or catalysts), silicone resin, and / or silicone oil.

[0108] According to one embodiment of the present disclosure, an electronic device (101) may include at least one communication component (T1, T2) disposed on a second surface (312) of a first substrate (310). The electronic device (101) may include a shield can (370) (or shielding member) surrounding the communication components (T1, T2). FIG. 4 exemplarily illustrates a state in which a first communication component (T1) and a second communication component (T2) are disposed inside a shield can (370). The shield can (370) may be formed by a plurality of shielding members.

[0109] According to one embodiment of the present disclosure, at least one communication component (T1, T2) may be implemented as a part of a communication circuit (T, see FIG. 5) (e.g., communication module (190) of FIG. 1). For example, at least one communication component (T1, T2, T3, see FIG. 5) may include an intermediate frequency integrated circuit (IFIC), a transceiver, a front-end module (FEM), and / or a power amplifier, which will be described in detail below.

[0110] FIG. 5 is a block diagram of a portion of an electronic device (101) showing a communication circuit (T) and a power management circuit (P) of the electronic device (101) according to one embodiment of the present disclosure.

[0111] Referring to FIG. 5, an electronic device (101) according to one embodiment of the present disclosure may include a communication circuit (T) (e.g., a communication module (190) of FIG. 1). The communication circuit (T) may be connected to antennas (A1, A2) (e.g., an antenna module (197) of FIG. 1). As an example, antennas (A1, A2) that receive radio waves or transmit radio waves to the outside may be determined by the communication circuit (T), and the electronic device (101) may receive radio waves from the outside or transmit radio waves to the outside through the antennas (A1, A2).

[0112] According to one embodiment of the present disclosure, a communication circuit (T) may include a first communication component (T1), a second communication component (T2), and / or a third communication component (T3). The second communication component (T2) may be connected to a first antenna (A1). The third communication component (T3) may be connected to the second antenna (A2). As an example, the second communication component (T2) may include an integrated frequency integrated circuit (IFIC), and the third communication component (T3) may include a radio frequency integrated circuit (RFIC). Although FIG. 5 illustrates two antennas (A1, A2) and three communication circuits (T1, T2, T3), the electronic device (101) may have any number of such components and may take any suitable form.

[0113] An electronic device (101) according to one embodiment of the present disclosure may include a power management circuit (P) (e.g., a power management module (180) of FIG. 1) electrically connected to a communication circuit (T). The power management circuit (P) may be configured to supply power (i.e., voltage and / or current) to the communication circuit (T). The power management circuit (P) may control power supplied from a battery (250) and supply it to a communication component (T1, T2, T3) or an area of ​​the communication circuit (T). The power management circuit (P) may include a first power management circuit (P1), a second power management circuit (P2), and / or a third power management circuit (P3), which are exemplary, and the number of power management circuits (P) is not limited thereto.

[0114] According to one embodiment of the present disclosure, the second power management circuit (P2) may perform a function of supplying, converting, or controlling current of power supplied from a battery (250) to supply power to the first power management circuit (P1), the third power management circuit (P3), or the second communication component (T2). As an example, the second power management circuit (P2) may include an IF PMIC (integrated frequency power management integrated circuit), and the second communication component (T2) may include an IFIC (integrated frequency integrated circuit).

[0115] According to one embodiment of the present disclosure, the second power management circuit (P2) can supply power to the first power management circuit (P1). The first power management circuit (P1) can control the power supplied from the second power management circuit (P2) and supply it to the first communication component (T1). As an example, the first power management circuit (P1) can include an envelope tracking modulator (ET Modulator), and the first communication component (T1) can include a power amplifier.

[0116] According to one embodiment of the present disclosure, the second power management circuit (P2) can supply power to the third power management circuit (P3). The third power management circuit (P3) can control the power supplied from the second power management circuit (P2) and supply it to the third communication component (T3). As an example, the third power management circuit (P3) can include a radio frequency power management integrated circuit (RF PMIC), and the third communication component (T3) can include a radio frequency integrated circuit (RFIC).

[0117] FIG. 6 illustrates a schematic circuit diagram of a power management circuit (P) (e.g., a first power management circuit (P1), a second power management circuit (P2), or a third power management circuit (P3)) illustrated in FIG. 5 according to one embodiment of the present disclosure. The description of the power management circuit (P) with reference to FIG. 6 can be substantially equally applied to each of the first power management circuit (P1), the second power management circuit (P2), and the third power management circuit (P3), and for convenience of explanation, the description will be based on the power management circuit (P) below.

[0118] Referring to FIG. 6, according to one embodiment of the present disclosure, a power management circuit (P) may include a switching circuit (S). The switching circuit (S) may be supplied with power (Vin) from an input capacitor (I) or another component capable of supplying power input. The switching circuit (S) may include a switching element (e.g., a switching transistor). The power management circuit (P) may be configured to stabilize the supplied voltage (Vin) by controlling the on-off time ratio of the switching circuit (S) and supply it to a load (L). As an example, the switching circuit (S) may be implemented as at least a part of an integrated circuit including a switched mode power supply (SMPS), such as a power management integrated circuit (PMIC).

[0119] According to one embodiment of the present disclosure, a power management circuit (P) may include an output capacitor (C). The power management circuit (P) may supply power (Vout) to a load (L, e.g., a communication circuit (T) of FIG. 5) through the output capacitor (C). The output capacitor (C) may be electrically connected to a switching circuit (S). The output capacitor (C) may stabilize power output from the switching circuit (S) and supply it to the load (L).

[0120] According to one embodiment of the present disclosure, when power is applied to the output capacitor (C) as the switching circuit (S) is repeatedly turned on and off, vibration and noise may be generated in the output capacitor (C). As an example, the output capacitor (C) may include a ceramic capacitor including a dielectric having a piezoelectric characteristic. When power is applied to the output capacitor (C) as a result of the on-off control of the switching circuit (S), the dielectric having the piezoelectric characteristic may contract and expand repeatedly, causing the output capacitor (C) to vibrate. In addition, the vibration generated in the output capacitor (C) may be amplified into an audible noise that can be perceived by a user through the solid heat dissipation member (350) as a medium.

[0121] According to one embodiment of the present disclosure, as an example, when a user's ear approaches an area of ​​the electronic device (101) (e.g., the receiver hole (214) of FIG. 2) (e.g., during a call), the capacitor noise coupled and / or amplified through the heat dissipation member (350) may be transmitted to the user (i.e., audible). However, when the output capacitor (C) is disposed on the second surface (312) or the fourth surface (322), the output capacitor (C) included in the power management circuit (P) and the heat dissipation member (350) may be disposed so as not to overlap each other, thereby reducing the occurrence of the audible noise. As another example, when the output capacitor (C) is disposed on the first surface (311) or the third surface (321), the audible noise generated by the output capacitor (C) can be suppressed from being transmitted to the outside of the electronic device (101) by preventing the output capacitor (C) from contacting the heat dissipation member (350) and / or from overlapping the heat dissipation member (350). In other words, the audible effect of the output capacitor (C) on the user can be reduced by increasing the degree of isolation between the output capacitor (C) (and / or the entire power management circuit) and the outside of the electronic device (101) and / or the heat dissipation member (350) (i.e., by reducing the degree of acoustic coupling). Although the output capacitor (C) is referenced, other components of the power management circuit that may cause noise and / or vibration may also be considered. Additionally, components other than the power management circuit or its components that cause noise and / or vibration may be positioned so as to have an appropriate positional relationship with the heat sink to reduce noise transmission to the user during a call or while the electronic device is in operation (i.e., when the user is using it or in standby mode).In some embodiments, a noise generating component (e.g., an output capacitor or power management circuit) may be positioned in a space (331) between the first substrate, the second substrate, and the interposer that does not include the heat dissipation member, or may be positioned outside the space defined by the first substrate, the second substrate, and the interposer. Alternatively, the noise generating component may be positioned across both regions so as not to overlap the heat dissipation member.

[0122] FIG. 7 is a plan view of a portion of a substrate assembly (300) according to one embodiment of the present disclosure. FIG. 7 may be understood as a plan view of a portion of the substrate assembly (300) when viewed from above the fourth surface (322) of the second substrate (320) (toward the first substrate (310)). FIG. 8 is a cross-sectional view of the substrate assembly (300) according to one embodiment of the present disclosure. The description regarding the coordinate axes (+Z, -Z) described with reference to FIG. 4 may be equally applied to the coordinate axes (+Z, -Z) illustrated in FIG. 8.

[0123] Referring to FIGS. 7 and 8, FIG. 7 illustrates a coordinate axis including a plurality of directions (D1, D2, D3, D4), and FIG. 8 illustrates a coordinate axis including a plurality of directions (+Z, -Z, D3, D4). The first direction (D1) and the second direction (D2) may be opposite to each other. The third direction (D3) and the fourth direction (D4) may be opposite to each other. As an example, the first direction (D1) may be understood as a direction in which the Y-axis illustrated in FIGS. 2 and 3 faces, and the second direction (D2) may be understood as a direction opposite to the direction in which the Y-axis faces, but is not limited thereto. As an example, the third direction (D3) may be understood as a direction in which the X-axis illustrated in FIGS. 2 and 3 faces, and the fourth direction (D4) may be understood as a direction opposite to the direction in which the X-axis faces, but is not limited thereto.

[0124] Referring to FIGS. 7 and 8, according to one embodiment of the present disclosure, when viewed from above the fourth surface (322) of the second substrate (320), the heat dissipation member (350) may at least partially overlap the electronic component (E1). Heat generated from the electronic component (E1) may be transferred to the heat dissipation member (350) through the second substrate (320). The electronic component (E1) may be effectively heat dissipated by the heat dissipation member (350).

[0125] According to one embodiment of the present disclosure, when viewed from above the fourth side (322) of the second substrate (320) (in a direction perpendicular to the fourth side (322), the electronic component (E1) may not overlap with the power management circuit (P). The power management circuit (P) may include a first power management circuit (P1) spaced apart from the electronic component (E1) in a first direction (D1) when viewed from above the fourth side (322). The first power management circuit (P1) may be located on the first side (D1) of the electronic component (E1).

[0126] According to one embodiment of the present disclosure, the power management circuit (P) may include a second power management circuit (P2) spaced apart from the electronic component (E1) in a second direction (D2) when viewed from above the fourth side (322) of the second substrate (320). The second power management circuit (P2) may be located on the second side (D2) of the electronic component (E1).

[0127] According to one embodiment of the present disclosure, the power management circuit (P) may include a third power management circuit (P3) spaced apart from the electronic component (E1) in a second direction (D2) when viewed from above the fourth side (322) of the second substrate (320). The third power management circuit (P3) may be located on the second side (D2) of the electronic component (E1). The third power management circuit (P3) may or may not overlap with the second power management circuit (P2) when viewed from above the fourth side (322) of the second substrate (320). In other words, the power management circuits (P1, P2, and / or P3) may be located on opposite sides of the heat dissipation member (350) or the electronic component (E1).

[0128] According to one embodiment of the present disclosure, a power management circuit (P) (e.g., a first power management circuit (P1), a second power management circuit (P2), or a third power management circuit (P3)) may be disposed on a first substrate (310) and / or a second substrate (320). The power management circuit (P) may be disposed on any one of the first surface (311), the second surface (312), the third surface (321), or the fourth surface (322). An output capacitor (C, see FIG. 6) included in the power management circuit (P) may be disposed on any one of the first surface (311), the second surface (312), the third surface (321), or the fourth surface (322). As an example, the first power management circuit (P1) and the second power management circuit (P2) may be disposed on the fourth surface (322), and the third power management circuit (P3) may be disposed on the third surface (321). As another example, the first power management circuit (P1) and the second power management circuit (P2) may be disposed on the third surface (321), and the third power management circuit (P3) may be disposed on the first surface (311). However, any combination of power management circuits and surfaces may be realized. Furthermore, when viewed from above the fourth surface (322) (or another surface), the power management circuits may overlap when they are on the same surface and / or on different surfaces.

[0129] According to one embodiment of the present disclosure, the heat dissipation member (350) may overlap the electronic component (E1) and / or the non-volatile memory (M) when viewed from above the fourth surface (322) of the second substrate (320). When viewed from above the fourth surface (322), the power management circuit (P) may not overlap the heat dissipation member (350). When viewed in a direction perpendicular to the fourth surface (322), an output capacitor (C, see FIG. 6) included in the power management circuit (P) may not overlap the heat dissipation member (350). For example, the footprints of the power management circuit (P) (or at least one noise generating component) and the heat dissipation member (350) may not overlap when viewed from above the fourth surface (322). The power management circuits may be arranged on each surface so as not to overlap the heat dissipation member (350). In the present disclosure, the output capacitor or the entire power management circuit including the output capacitor may be considered as a noise generating component, and therefore, when the absence of overlap is mentioned, it may mean at least one of the output capacitor of the power management circuit and / or the power management circuit (P1, P2, P3).

[0130] According to one embodiment of the present disclosure, the heat dissipation member (350) may be positioned between the first power management circuit (P1) and the second power management circuit (P2) when viewed from above the fourth surface (322), such that the power management circuits (P1, P2) are around the outer side of the heat dissipation member (350) when viewed from above the fourth surface (322). The heat dissipation member (350) may be positioned between the first power management circuit (P1) and the third power component (P3) when viewed from above the fourth surface (322), such that the power management circuits (P1, P3) are around the outer side of the heat dissipation member (350) when viewed from above the fourth surface (322). The arrangements of FIGS. 7 and 8 allow the extent of the heat dissipation member (350) to be extended in the D4 / D3 direction, thereby increasing the overlap between the heat dissipation member (350) and non-noise generating components (e.g., E1, E2, M, EP1, EP2). In other words, when noise generating components are arranged together with the heat dissipation member (350) or located only on one side thereof, the coverage of the heat dissipation member (350) can be extended without overlapping with the noise generating components. For example, the coverage of the heat dissipation member may not be limited by the power management circuit in the D3 / D4 axis. Therefore, the degree of freedom in optimization / design with respect to the arrangement of the heat dissipation member may be increased (reduction of acoustic coupling of noise generating components), and therefore, thermal management within the electronic device may be improved.

[0131] According to one embodiment of the present disclosure, when viewed from above on the fourth side (322) of the second substrate (320), the nonvolatile memory (M) can be spaced apart from the electronic component (E1) in one direction (e.g., the third direction (D3)). When viewed from above on the fourth side (322), the heat dissipation member (350) can overlap the electronic component (E1) and the nonvolatile memory (M) and can extend along the one direction (e.g., the third direction (D3)). When viewed from above on the fourth side (322), the plurality of power management circuits (P1, P2, P3) can be spaced apart from the electronic component (E1) in a direction (e.g., the first direction (D1) or the second direction (D2)) substantially perpendicular to the one direction (e.g., the third direction (D3)). Accordingly, the arrangement of electronic components (E1), non-volatile memory (M), and power management circuits (P1, P2, P3) can be optimized, and the space efficiency of the substrate assembly (300, see FIG. 4) can be increased while maintaining non-overlapping of the power management circuit (P) and the heat dissipation member (350).

[0132] According to one embodiment of the present disclosure, the electronic device (101) may include a power management component (EP1, EP2, e.g., a power management integrated circuit (PMIC)) disposed on a second substrate (320). The power management component (EP1, EP2) may be configured to control power supplied from a battery (250, see FIG. 3) and supply it to the electronic component (E1).

[0133] According to one embodiment of the present disclosure, the power management components (EP1, EP2) can control the power supplied to the electronic component (E1) in a manner substantially identical to the power control method of the power management circuit (P) described with reference to FIG. 6. As an example, the power management components (EP1, EP2) can include a switching circuit (e.g., the switching circuit (S) of FIG. 6).

[0134] According to one embodiment of the present disclosure, the power management components (EP1, EP2) may be spaced apart from the electronic component (E1) in a third direction (D3) or a fourth direction (D4) when viewed from above the fourth surface (322) of the second substrate (320) (in a direction perpendicular to the fourth surface (322). The power management components (EP1, EP2) may include a first power management component (EP1) spaced apart from the electronic component (E1) in the third direction (D3). The power management components (EP1, EP2) may include a second power management component (EP2) spaced apart from the electronic component (E1) in the fourth direction (D4). In some embodiments, the power management components (EP1, EP2) may be spaced apart from the electronic component (E1) in the first direction (D1) or the second direction (D2).

[0135] According to one embodiment of the present disclosure, when viewed from above on the fourth side (322) of the second substrate (320), the first power management component (EP1) may be positioned on the third side (D3) of the electronic component (E1) between the first side (D1) and the second side (D2) of the electronic component (E1). When viewed from above on the fourth side (322) of the second substrate (320), the second power management component (EP2) may be positioned on the fourth side (D4) of the electronic component (E1) between the first side (D1) and the second side (D2) of the electronic component (E1).

[0136] According to one embodiment of the present disclosure, when viewed from above the fourth side (322) of the second substrate (320), at least one of the first power management component (EP1) and the second power management component (EP2) may overlap the heat dissipation member (350). When viewed from above the fourth side (322) of the second substrate (320), at least one of the first power management component (EP1) and the second power management component (EP2) may not overlap the electronic component (E1). As an example, FIGS. 7 and 8 illustrate embodiments in which the first power management component (EP1) and the second power management component (EP2) overlap the heat dissipation member (350) and do not overlap the electronic component (E1). That is, the power management circuit (P) that supplies power to the communication circuit (T) may or may not overlap with the heat dissipation member (350), while the power management components (EP1, EP2) may or may not overlap with the heat dissipation member (350).

[0137] According to one embodiment of the present disclosure, an electronic device (101) may include a plurality of decoupling capacitors (D) configured to stabilize power supplied to an electronic component (E1). The plurality of decoupling capacitors (D) may be disposed on a third surface (321) of a second substrate (320). The plurality of decoupling capacitors (D) may be located in an area (D) illustrated in FIGS. 7 and 8 . The decoupling capacitors (D) may be electrically connected to the electronic component (E1) through the second substrate. As an example, the decoupling capacitors (D) may be connected to the electronic component (E1) through a via (not illustrated) included in the second substrate (320).

[0138] According to one embodiment of the present disclosure, when viewed from above the fourth side (322) of the second substrate (320), the decoupling capacitors (D) may overlap with the electronic component (E1). When viewed from above the fourth side (322) of the second substrate (320), the decoupling capacitors (D) may overlap with the heat dissipation member (350).

[0139] According to one embodiment of the present disclosure, the electronic device (101) may include a nonvolatile memory (M) disposed on a fourth surface (322) of a second substrate (320). The nonvolatile memory (M) may be positioned around an electronic component (E1). The nonvolatile memory (M) may not overlap the electronic component (E1) when viewed from above the fourth surface (322). The nonvolatile memory (M) may overlap the first power management component (EP1) when viewed from above the fourth surface (322).

[0140] FIG. 9 is a plan view of a first substrate (310) and a second substrate (320) according to another embodiment of the present disclosure. The description regarding the coordinate axes (D1, D2, D3, D4) described with reference to FIG. 7 can be equally applied to the coordinate axes (D1, D2, D3, D4) illustrated in FIG. 9.

[0141] The description of the third power management circuit (P3) described with reference to FIGS. 5 to 7 can be substantially identically applied to the third power management circuit (P3`) of the same name illustrated in FIG. 9, to the extent that they are not arranged together. The third power management circuit (P3`) illustrated in FIG. 9 may differ from the third power management circuit (P3) illustrated in FIG. 7 in that it overlaps with the second power management circuit (P2).

[0142] Referring to FIG. 9, according to another embodiment of the present disclosure, power management circuits (P1, P2, P3`) may be disposed on any one of the first surface (311), the second surface (312), the third surface (321), or the fourth surface (322). When viewed from above the fourth surface (322) of the second substrate (320), the power management circuits (P1, P2, P3`) may not overlap with the heat dissipation member (350). When viewed from above the fourth surface (322) of the second substrate (320), the third power management circuit (P3`) may overlap with the second power management circuit (P2). As an example, the second power management circuit (P2) and the third power management circuit (P3`) may be respectively disposed on one or the other of the first surface (311), the second surface (312), the third surface (321), or the fourth surface (322). That is, as long as the power management circuit does not overlap the heat dissipation member (350), the power management circuit may be disposed at any suitable location, overlapping each other, or on another component.

[0143] Fig. 10 is a plan view of a first substrate (310) according to one embodiment of the present disclosure. The description regarding the coordinate axes (D1, D2, D3, D4) described with reference to Fig. 7 can be equally applied to the coordinate axes (D1, D2, D3, D4) illustrated in Fig. 10.

[0144] According to one embodiment of the present disclosure, the electronic device (101) may include at least one electronic element disposed on a first surface (311) of a first substrate (310) or a third surface (321) of a second substrate (320). For convenience of explanation, FIG. 10 illustrates, by way of example, a case where the at least one electronic element is disposed on the first surface (311). The electric elements may be disposed adjacent to each other to perform a predetermined function. A plurality of electric elements disposed adjacent to each other may form an electric circuit (G) to perform the predetermined function.

[0145] According to one embodiment of the present disclosure, a substrate assembly (300) may include at least one electrical circuit (G1, G2, G3, G4). The electrical circuits (G1, G2, G3, G4) may be mounted on a first surface (311) of a first substrate (310). The electrical circuits (G1, G2, G3, G4) may be positioned between a heat dissipation member (350) and an interposer (330). The electrical circuits (G1, G2, G3, G4) may include a plurality of electrical elements. As an example, the electrical element may include a capacitor, an inductor, or a transistor.

[0146] According to one embodiment of the present disclosure, a plurality of electric circuits (G1, G2, G3, G4) may be arranged. At least one (G3) of the plurality of electric circuits (G1, G2, G3, G4) may be arranged adjacent to the interposer (330). Accordingly, an area on which a heat dissipation member (350) is arranged on the first surface (311) of the first substrate (310) may be secured, and the heat dissipation member (350) may be arranged on a wider area on the first surface (311).

[0147] According to one embodiment of the present disclosure, when viewed from above the fourth side (322) of the second substrate (320) or when viewed from above the first side (311) of the first substrate (310), the plurality of electric circuits (G1, G2, G3, G4) may not overlap with the power management circuits (P1, P2). Accordingly, the height of the substrate assembly (300) (e.g., the height in the Z-axis direction of FIG. 3) may be minimized.

[0148] FIG. 11 is a plan view of a portion of a substrate assembly (1300) according to one embodiment of the present disclosure. The description regarding the coordinate axes (D1, D2, D3, D4) described with reference to FIG. 7 can be equally applied to the coordinate axes (D1, D2, D3, D4) illustrated in FIG. 11.

[0149] Referring to FIG. 11, according to one embodiment of the present disclosure, an electronic component (E1) may include a processor (e.g., an application processor) (e.g., the processor 120 of FIG. 1) including a plurality of processing cores (B1, B2). The processing cores (B1, B2) may be a CPU or a GPU of the processor. The heat dissipation member (1350) may overlap at least one of the plurality of processing cores (B1, B2) when viewed from above the fourth surface (322) of the second substrate (320), and may not overlap with the power management circuits (P1, P2, P3). Accordingly, the heat dissipation member (1350) may be arranged so as to intensively dissipate heat to an area (e.g., the processing cores (B1, B2)) with a high amount of heat generation inside the electronic component (E1), while not overlapping with the power management circuits (P1, P2, P3), which are noise-generating areas. As a result, the heat dissipation efficiency from the electronic component (E1) can be improved by maintaining or slightly reducing the heat transferred while reducing the amount of heat dissipation member (1350).

[0150] Although the specific arrangement of the components has been shown and described with reference to FIG. 4-11, the arrangement of the components is not limited thereto, and any configuration may be applied in which the power management circuit (P) or a portion thereof that generates noise and / or one or more of the output capacitors (C) that generate noise of the power management circuit (P) do not overlap with the heat dissipating member. In some embodiments, different power management circuits (P1, P2, P3) and / or their output capacitors may generate different levels of noise, and a louder noise source may not overlap with the heat dissipating member, while a quieter noise source may partially or completely overlap with the heat dissipating member. In another example, one or more of the power management circuits (P1, P2, P3) and / or their output capacitors may not overlap with the heat dissipating member when the heat dissipating member is solid, but may at least partially overlap due to movement and / or expansion of the heat dissipating member when the heat dissipating member is not solid.

[0151] FIG. 12 illustrates a portion of a process for manufacturing a substrate assembly (300) according to one embodiment of the present disclosure. The description regarding the coordinate axes (+Z, -Z) described with reference to FIG. 4 can be equally applied to the coordinate axes (+Z, -Z) illustrated in FIG. 12.

[0152] The manufacturing process of the substrate assembly (300) illustrated in FIG. 12 is exemplary, and the manufacturing process of the substrate assembly (300, 1300) according to various embodiments of the present disclosure will not be limited to the method illustrated in FIG. 12.

[0153] Referring to FIG. 12, after a heat dissipation member (350) is placed in advance on a first substrate (310), reflow soldering is performed to join the first substrate (310) and the interposer (320), thereby manufacturing a substrate assembly (300) in which a heat dissipation member (350) is placed in an internal space (331, see FIG. 4).

[0154] When the first substrate (310) is heated while a heat dissipation member (350) is placed on the first surface (311) of the first substrate (310) and a solder solution (362) is applied to the edge of the first surface (311) of the first substrate (310) (e.g., the edge (311e) of FIGS. 9 and 10), the heat dissipation member (350G) can be softened by at least partially becoming a gel.

[0155] When the pre-assembled interposer (330) and the second substrate (320) are pressed so that the soft gel-state heat dissipation member (350G) is compressed, the gel-state heat dissipation member (350G) can be compressed as the first substrate (310) and the second substrate (320) come closer. The compressed gel-state heat dissipation member (350G) can flow between the components (340) arranged on the third surface (321) of the second substrate (320) and come into contact with the third surface (321).

[0156] Thereafter, when the substrate assembly (300) is sufficiently cooled, the heat dissipation member (350S) in the gel phase placed in the internal space (331) can be transitioned from the gel phase to the solid phase. When heat is generated as the electronic component (E1) operates, the heat dissipation member (350) can absorb the generated heat and at least partially soften, so that the heat of the electronic component (E1) can be effectively dissipated through the heat dissipation member (350).

[0157] As electronic components (e.g., application processors) become more integrated and their performance improves, their heat generation increases. Failure to reduce the temperature of these components due to heat generation can impact the performance of electronic devices (e.g., performance degradation due to throttling). Consequently, extensive research is being conducted on heat dissipation structures for electronic components.

[0158] The problem to be solved in the present disclosure may be to provide a heat dissipation structure in which the arrangement of a heat dissipation member and components around the heat dissipation member is optimized.

[0159] The problem to be solved in the present disclosure may be to block and / or reduce vibrations generated in an electrical component (e.g., a capacitor) from being amplified through a heat dissipation member that acts as a medium.

[0160] The problem to be solved in this disclosure is not limited to the problem mentioned above, and may be determined in various ways without departing from the spirit and scope of this disclosure.

[0161] An electronic device according to various embodiments of the present disclosure can provide a heat dissipation structure in which the arrangement of the heat dissipation member and components is optimized by compactly arranging components arranged around the heat dissipation structure and the heat dissipation member.

[0162] An electronic device according to various embodiments of the present disclosure can prevent vibrations of an electric element from being amplified through a heat dissipation member acting as a medium by arranging a heat dissipation member and an electric element (e.g., a capacitor) that is a source of vibrations so as not to overlap each other.

[0163] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly understood by a person having ordinary skill in the art to which the present disclosure belongs from the above description.

[0164] According to one embodiment of the present disclosure, an electronic device (101) may include a first substrate (310) including a first side (311) and a second side (312) facing in an opposite direction of the first side.

[0165] According to one embodiment of the present disclosure, the electronic device (101) may include a second substrate (320) including a third surface (321) facing the first surface and a fourth surface (322) facing in an opposite direction of the third surface.

[0166] According to one embodiment of the present disclosure, the electronic device (101) may include an interposer (330) disposed between the first side and the third side.

[0167] According to one embodiment of the present disclosure, the interposer (330) may surround at least a portion of the heat dissipation member.

[0168] According to one embodiment of the present disclosure, the electronic device (101) may include an electronic component (E1) disposed on the fourth surface.

[0169] According to one embodiment of the present disclosure, an electronic device (101) may include a communication circuit (T) including communication components (T1, T2, T3).

[0170] According to one embodiment of the present disclosure, the electronic device (101) may include at least one power management circuit (P) including a switching circuit (S).

[0171] According to one embodiment of the present disclosure, the power management circuit (P) may include an output capacitor (C) configured to supply power supplied from the switching circuit (S) to the communication components (T1, T2, T3).

[0172] According to one embodiment of the present disclosure, the electronic device (101) may include a heat dissipation member (350) that is solid at room temperature.

[0173] According to one embodiment of the present disclosure, the heat dissipation member (350) may be placed in a space defined by the first substrate, the second substrate, and the interposer so as to overlap with the electronic component when viewed in a direction perpendicular to the fourth surface.

[0174] According to one embodiment of the present disclosure, the output capacitor (C) of the at least one power management circuit (P) may be disposed on the first substrate or the second substrate.

[0175] According to one embodiment of the present disclosure, the output capacitor (C) of the at least one power management circuit (P) may be arranged on any one of the first side (311), the second side (312), the third side (321), or the fourth side (322).

[0176] According to one embodiment of the present disclosure, the output capacitor (C) of the at least one power management circuit (P) may not overlap the heat dissipation member when viewed in a direction perpendicular to the fourth surface.

[0177] According to one embodiment of the present disclosure, the heat dissipation member (350) may include a paraffin-based phase change material that is solid at room temperature.

[0178] According to one embodiment of the present disclosure, the heat dissipation member (350) may include a matrix material configured to maintain the heat dissipation member in a gel phase at a temperature higher than the melting point of the phase change material.

[0179] According to one embodiment of the present disclosure, audible noise generated by an output capacitor (C) of the at least one power management circuit (P1, P2, P3) that does not come into contact with the heat dissipation member can be suppressed from being transmitted to the outside of the electronic device.

[0180] According to one embodiment of the present disclosure, the output capacitor may include a dielectric having a piezoelectric characteristic.

[0181] According to one embodiment of the present disclosure, the heat dissipation member may not overlap with the output capacitor of the power management circuit when viewed from above the fourth surface.

[0182] According to one embodiment of the present disclosure, the heat dissipation member can be in contact with the first surface.

[0183] According to one embodiment of the present disclosure, the heat dissipation member can contact at least one of the third surface or at least one component (340) disposed on the third surface.

[0184] According to one embodiment of the present disclosure, the at least one power management circuit may include at least one of a radio frequency power management integrated circuit (RF PMIC, P3), an envelope tracking modulator (ET Modulator, P1), or an intermediate frequency power management integrated circuit (IF PMIC, P2).

[0185] According to one embodiment of the present disclosure, when viewed in a direction perpendicular to the fourth surface, the electronic component may not overlap the at least one power management circuit.

[0186] According to one embodiment of the present disclosure, the at least one power management circuit may include a first power management circuit (P1) positioned on a first side (D1) of the electronic component when viewed in a direction perpendicular to the fourth surface.

[0187] According to one embodiment of the present disclosure, the at least one power management circuit may include a second power management circuit (P2) located on a second side (D2) of the electronic component opposite to the first side when viewed in a direction perpendicular to the fourth surface.

[0188] According to one embodiment of the present disclosure, the heat dissipation member may be positioned between the first power management circuit and the second power management circuit when viewed in a direction perpendicular to the fourth surface.

[0189] According to one embodiment of the present disclosure, the electronic device (101) may include a power management component (EP1) disposed on the second substrate and configured to control power supplied to the electronic component.

[0190] According to one embodiment of the present disclosure, the power management component may be located on a third side (D3) of the electronic component between the first side and the second side when viewed from above the fourth side.

[0191] According to one embodiment of the present disclosure, the power management component may overlap the heat dissipation member when viewed from above the fourth surface.

[0192] According to one embodiment of the present disclosure, the heat dissipation member can be adhered to the first surface of the first substrate.

[0193] According to one embodiment of the present disclosure, the heat dissipation member can contact the third surface of the second substrate.

[0194] According to one embodiment of the present disclosure, the electronic device (101) may include an electric circuit (G1, G2, G3, G4) including a plurality of electric elements arranged on the first side or the third side.

[0195] According to one embodiment of the present disclosure, the electrical circuit (G1, G2, G3, G4) may be positioned closer to the interposer than to the heat dissipation member.

[0196] According to one embodiment of the present disclosure, the at least one power management circuit may be disposed on the first side or the third side and positioned closer to the interposer than to the heat dissipation member.

[0197] According to one embodiment of the present disclosure, the electronic component may include a processor (e.g., an application processor) including a plurality of processing cores (B1, B2).

[0198] According to one embodiment of the present disclosure, the heat dissipation member may overlap at least one of the plurality of processing cores when viewed in a direction perpendicular to the fourth surface.

[0199] According to one embodiment of the present disclosure, the electronic device (101) may include a power management component (EP1, EP2) disposed on the second substrate and configured to control power supplied to the electronic component.

[0200] According to one embodiment of the present disclosure, the power management component may overlap the heat dissipation member when viewed in a direction perpendicular to the fourth surface.

[0201] According to one embodiment of the present disclosure, the power management component may not overlap the electronic component when viewed in a direction perpendicular to the fourth surface.

[0202] According to one embodiment of the present disclosure, the electronic device (101) may include a decoupling capacitor (D) configured to stabilize power supplied to the electronic component.

[0203] According to one embodiment of the present disclosure, the decoupling capacitor (D) may be arranged on the third surface so as to overlap with the electronic component when viewed from above the fourth surface.

[0204] According to one embodiment of the present disclosure, the decoupling capacitor may overlap the heat dissipation member when viewed in a direction perpendicular to the fourth surface.

[0205] According to one embodiment of the present disclosure, the electronic device (101) may include a nonvolatile memory (M) disposed on the fourth surface.

[0206] According to one embodiment of the present disclosure, a non-volatile memory (M) may be located around the electronic component.

[0207] According to one embodiment of the present disclosure, the non-volatile memory may overlap the power management component when viewed from above the fourth surface.

[0208] According to one embodiment of the present disclosure, the non-volatile memory may not overlap the electronic component when viewed from above the fourth surface.

[0209] According to one embodiment of the present disclosure, the electronic component may include a volatile memory (E2) disposed on top of the electronic component.

[0210] According to one embodiment of the present disclosure, the electronic component may include an application processor including a plurality of processing cores (B1, B2) and may be operatively connected to the volatile memory.

[0211] Although the detailed description of this document has described specific embodiments, it will be apparent to those skilled in the art that various modifications are possible without departing from the scope of this document.

[0212] Furthermore, although features are described in combination in this disclosure, the scope of this disclosure is not limited to such combinations. In particular, this disclosure encompasses alternative combinations unless explicitly stated to be incompatible, and features may be omitted from the described combinations if they do not directly interact with other functions / components of the embodiment or are not necessary to achieve the benefits of the embodiment. Features described separately may be combined to form one or more embodiment.

Claims

1. In electronic devices, A first substrate (310) including a first side (311) and a second side (312) facing in an opposite direction to the first side; A second substrate (320) including a third surface (321) facing the first surface and a fourth surface (322) facing in an opposite direction to the third surface; An interposer (330) positioned between the first side and the third side; Electronic components (E1) arranged on the fourth surface; A communication circuit (T) including communication components (T1, T2, T3); At least one power management circuit (P) including a switching circuit (S), and an output capacitor (C) configured to supply power supplied from the switching circuit (S) to the communication components (T1, T2, T3); and It includes a heat dissipation member (350) that is solid at room temperature and is arranged in a space defined by the first substrate, the second substrate, and the interposer so as to overlap with the electronic component when viewed in a direction perpendicular to the fourth surface. The output capacitor (C) of at least one power management circuit (P) is An electronic device disposed on the first substrate or the second substrate and not overlapping with the heat dissipation member when viewed in a direction perpendicular to the fourth surface.

2. In paragraph 1, The above heat dissipation member (350) is: Paraffin-based phase change material that is solid at room temperature; and An electronic device comprising a matrix material configured to maintain the heat dissipation member in a gel phase at a temperature higher than the melting point of the phase change material.

3. In paragraph 1 or 2, The above output capacitor (C) is An electronic device spaced from the heat dissipation member (350) so as to reduce acoustic coupling between the output capacitor (C) and the heat dissipation member (350).

4. In any one of paragraphs 1 to 3, The above output capacitor is an electronic device including a dielectric having a piezoelectric characteristic.

5. In any one of paragraphs 1 to 4, The above heat dissipation member is, An electronic device that contacts the first surface and contacts at least one of the third surface or at least one component (340) arranged on the third surface.

6. In any one of paragraphs 1 to 5, At least one power management circuit (P) of the above, An electronic device including at least one of an RF PMIC (radio frequency power management integrated circuit, P3), an ET Modulator (envelope tracking modulator, P1), and an IF PMIC (intermediate frequency power management integrated circuit, P2).

7. In any one of paragraphs 1 to 6, An electronic device in which, when viewed in a direction perpendicular to the fourth surface, the electronic component does not overlap with the at least one power management circuit.

8. In any one of paragraphs 1 to 7, At least one power management circuit: A first power management circuit (P1) located on the first side (D1) of the electronic component when viewed in a direction perpendicular to the fourth surface; and A second power management circuit (P2) is included, positioned on a second side (D2) of the electronic component opposite to the first side when viewed in a direction perpendicular to the fourth surface, The above heat dissipation member is, An electronic device positioned between the first power management circuit and the second power management circuit when viewed in a direction perpendicular to the fourth surface.

9. In paragraph 8, Further comprising a power management component (EP1) arranged on the second substrate and configured to control power supplied to the electronic component; The above power management components are: An electronic device positioned on a third side (D3) of the electronic component between the first side and the second side when viewed in a direction perpendicular to the fourth surface, and overlapping the heat dissipation member.

10. In any one of paragraphs 1 to 9, The above heat dissipation member is, An electronic device adhered to a first surface of the first substrate and in contact with a third surface of the second substrate.

11. In any one of paragraphs 1 to 10, An electronic device further comprising an electric circuit (G1, G2, G3, G4) comprising a plurality of electric elements arranged on the first side or the third side and positioned closer to the interposer than the heat dissipation member.

12. In any one of paragraphs 1 to 11, At least one power management circuit, An electronic device disposed on the first side or the third side and positioned closer to the interposer than the heat dissipation member.

13. In any one of paragraphs 1 to 8 and paragraphs 10 to 12, It further includes a power management component (EP1, EP2) arranged on the second substrate and configured to control power supplied to the electronic component. The above power management components are: An electronic device that overlaps the heat dissipation member and does not overlap the electronic component when viewed in a direction perpendicular to the fourth surface.

14. In paragraph 13, Further comprising a decoupling capacitor (D) arranged on the third surface so as to overlap the electronic component when viewed in a direction perpendicular to the fourth surface, and configured to stabilize power supplied to the electronic component; The above decoupling capacitor is, An electronic device overlapping the heat dissipation member when viewed in a direction perpendicular to the fourth surface.

15. In paragraph 13, Further comprising a nonvolatile memory (M) disposed on the fourth surface and positioned adjacent to the electronic component, The above non-volatile memory is, An electronic device that overlaps with the power management component and does not overlap with the electronic component when viewed in a direction perpendicular to the fourth surface.

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