Image processing method and apparatus

Abstract

Provided are an image processing method and apparatus, which relate to the technical field of media, and can perform adaptive filtering in view of the permission of a user during the process of image encoding and decoding. The method comprises: determining permission values of other pixels in a preset window where a pixel to be filtered in a current encoding unit is located, wherein if a first pixel is located in an adaptive correction filtering unit corresponding to the current encoding unit, a permission value of the first pixel is acquired from a permission storage unit corresponding to the first pixel, if the first pixel is located outside the adaptive correction filtering unit corresponding to the current encoding unit, the permission value of a pixel, which is closest to the first pixel, in the adaptive correction filtering unit is used as the permission value of the first pixel, or, a permission value of a first sample is acquired from a permission storage unit corresponding to the first sample, and the first pixel is any one of the other pixels; and on the basis of the permission values of the other pixels and a permission value of the pixel to be filtered, determining whether filtering needs to be skipped for the pixel to be filtered.

Description

An Image Processing Method and Apparatus This application claims the priority of a Chinese patent application titled "An Image Processing Method and Apparatus" with the application number 202410040143.9 and filed with the National Intellectual Property Administration on January 9, 2024, and also claims the priority of a Chinese patent application titled "An Image Processing Method and Apparatus" with the application number 202410178268.8 and filed with the National Intellectual Property Administration on February 8, 2024. The entire content of which is incorporated herein by reference. Technical Field This application relates to the field of media technology, and particularly to an image processing method and apparatus. Background Art In the process of video image coding and decoding, filtering the image can improve the quality of the video image. Currently, in scenarios involving privacy protection (or called permission protection), how to perform image adaptive filtering to flexibly adapt to the needs of different users still needs further research. Summary of the Invention This application provides an image processing method and apparatus, which can perform adaptive filtering in combination with the user's permissions during the image coding and decoding process. This application adopts the following technical solutions: In a first aspect, this application provides an image processing method, including: determining the permission values of other pixels within a preset window where the pixel to be filtered in the current coding unit is located; wherein, if a first pixel is within the adaptive correction filtering unit corresponding to the current coding unit, obtaining the permission value of the first pixel from the permission storage unit corresponding to the first pixel; if the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit, using the permission value of the pixel closest to the first pixel within the adaptive correction filtering unit as the permission value of the first pixel, or obtaining the permission value of the first sample from the permission storage unit corresponding to the first sample; the first pixel is any one of the other pixels; and determining whether to skip filtering the pixel to be filtered based on the permission values of the other pixels and the permission value of the pixel to be filtered. In this application, a pixel is a sample in the image. Therefore, the pixel can be replaced with a sample. The above-mentioned pixel to be filtered can also be called a sample to be filtered, and other pixels can be called other samples, and the first pixel can be called the first sample. In the image processing method provided by this application, in a privacy protection scenario, for the pixels to be filtered in the current coding unit, it is possible to determine whether to skip filtering based on the permission values of other pixels within a preset window where the pixels to be filtered are located. Among them, for other samples within the adaptive correction filtering unit and other samples outside the adaptive correction filtering unit corresponding to the current coding unit, this application provides a solution for determining their permission values, and can perform adaptive filtering in combination with the user's permissions during the image encoding and decoding process. Furthermore, the image processing method provided by this application can save cache during the image filtering process and does not require caching the true permission values of other samples outside the adaptive correction filtering unit. Furthermore, when other samples are located outside the slice and cross-slice filtering is not supported, this method can also estimate the permission values of other samples for use in determining whether to skip filtering for the samples to be filtered. In a possible implementation, if there are pixels among other pixels whose permission values are greater than the permission value of the pixel to be filtered, it is determined to skip filtering for the pixel to be filtered; otherwise, it is determined that filtering is required for the pixel to be filtered. In a possible implementation, the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit, including: the first pixel is outside the image boundary where the current coding unit is located; or, the first pixel is outside the boundary of the slice to which the pixel to be filtered belongs, and the current coding unit does not support adaptive correction filtering across the slice boundary; or, the first pixel is outside the upper boundary or lower boundary of the adaptive correction filtering unit corresponding to the current coding unit. In a possible implementation, the above-mentioned preset window includes samples (x + i, y + j); where (x, y) represents the sample to be filtered; i, j = -3, -2, -1, 0, 1, 2, 3. In a second aspect, this application provides an image processing device, which includes various modules for implementing the method described in any one of the first aspect and its possible implementations. This image processing device has the function of implementing the behaviors in the method examples described in any one of the above-mentioned first aspect and its possible implementations. The function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions. In a third aspect, this application provides an image processing device, including at least one processor and a memory. The at least one processor executes a program or instruction stored in the memory so that the image processing device implements the method described in any one of the above-mentioned first aspect or its possible implementations. Optionally, in this application, the above-mentioned image processing device can be an encoding device or a decoding device, or, this image processing device is a part of an encoding device or a decoding device, and is not specifically limited. Fourthly, the present application further provides a computer-readable storage medium for storing a computer program, where the computer program includes a method for implementing the method described in the above first aspect or any possible implementation manner thereof. Fifthly, the present application further provides a computer program product containing instructions, which, when running on a computer, enables the computer to implement the method described in the above first aspect or any possible implementation manner thereof. Sixthly, the present application further provides a chip, including: an input interface, an output interface, and at least one processor. Optionally, the chip further includes a memory. The at least one processor is configured to execute the code in the memory, and when the at least one processor executes the code, the chip implements the method described in the above first aspect or any possible implementation manner thereof. Optionally, the above chip may also be an integrated circuit. The decoding device, computer storage medium, computer program product, and chip provided by the present application are all used to execute the method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the method provided above, and will not be elaborated here. Description of the Drawings FIG. 1a is an exemplary block diagram of a decoding system provided by an embodiment of the present application; FIG. 1b is an exemplary block diagram of a video decoding system provided by an embodiment of the present application; FIG. 2 is an exemplary block diagram of a video encoder provided by an embodiment of the present application; FIG. 3 is an exemplary block diagram of a video decoder provided by an embodiment of the present application; FIG. 4 is an exemplary schematic diagram of a candidate image block provided by an embodiment of the present application; FIG. 5 is an exemplary block diagram of a video decoding device provided by an embodiment of the present application; FIG. 6 is an exemplary block diagram of a device provided by an embodiment of the present application; FIG. 7 is a schematic diagram of adaptively correcting filter coefficients provided by an embodiment of the present application; FIG. 8 is another schematic diagram of adaptively correcting filter coefficients provided by an embodiment of the present application; FIG. 9 is a schematic flowchart of an image processing method provided by an embodiment of the present application; FIG. 10 is a schematic diagram of a preset window provided by an embodiment of the present application; FIG. 11 is a schematic diagram of a privacy area, a non-privacy area, and a preset window in an image provided by an embodiment of the present application; FIG. 12 is a schematic diagram of a determination process of a sample permission value provided by an embodiment of the present application; FIG. 13 is a schematic diagram of an image processing device provided by an embodiment of the present application; FIG. 14 is a schematic structural diagram of a chip provided by an embodiment of the present application; FIG. 15 is a schematic structural diagram of an electronic device provided by an embodiment of the present application; FIG. 16 is a schematic structural diagram of an image processing device provided by an embodiment of the present application. Detailed implementation manners As used herein, the term "and / or" is merely a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. In the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the embodiments of the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Rather, using words such as "exemplary" or "for example" is intended to present relevant concepts in a specific manner. In the description of the embodiments of the present application, unless otherwise specified, the meaning of "a plurality" refers to two or more. Data encoding and decoding includes two parts: data encoding and data decoding. Data encoding is performed on the source side (or generally referred to as the encoder side), and generally includes processing (for example, compressing) the original data to reduce the amount of data required to represent the original data (so as to store and / or transmit more efficiently). Data decoding is performed on the destination side (or generally referred to as the decoder side), and generally includes performing inverse processing relative to the encoder side to reconstruct the original data. The "encoding and decoding" of data involved in the embodiments of the present application should be understood as "encoding" or "decoding" of data. The encoding part and the decoding part are also collectively referred to as encoding and decoding (encoding and decoding, CODEC). In the case of lossless data encoding, the original data can be reconstructed, that is, the reconstructed original data has the same quality as the original data (assuming no transmission loss or other data loss during storage or transmission). In the case of lossy data encoding, further compression is performed through quantization, etc., to reduce the amount of data required to represent the original data, and the decoder side cannot completely reconstruct the original data, that is, the quality of the reconstructed original data is lower or worse than the quality of the original data. The embodiments of the present application can be applied to video data and other data with compression / decompression requirements, etc. The following takes the encoding of video data (abbreviated as video encoding) as an example to illustrate the embodiments of the present application. Other types of data (such as image data, audio data, integer data, and other data with compression / decompression requirements) can refer to the following description, and the embodiments of the present application will not be elaborated herein. It should be noted It is noted that, in contrast to video coding, during the coding process of data such as audio data and integer data, there is no need to divide the data into blocks, but the data can be directly coded. Video coding generally refers to processing an image sequence that forms a video or video sequence. In the field of video coding, the terms "picture", "frame", or "image" can be used as synonyms. Several video coding standards belong to "lossy hybrid video codec" (i.e., combining spatial and temporal prediction in the pixel domain with 2D transform coding for applying quantization in the transform domain). Each image in a video sequence is usually divided into a set of non-overlapping blocks, and the coding is usually performed at the block level. In other words, the encoder usually processes and encodes the video at the block (video block) level. For example, prediction blocks are generated through spatial (intra-frame) prediction and temporal (inter-frame) prediction; the prediction blocks are subtracted from the current block (the currently processed / block to be processed) to obtain a residual block; the residual block is transformed and quantized in the transform domain to reduce the amount of data to be transmitted (compressed), and the decoder side applies the inverse processing part relative to the encoder to the encoded or compressed block to reconstruct the current block for representation. In addition, the encoder needs to repeat the processing steps of the decoder so that the encoder and the decoder generate the same prediction (e.g., intra-frame prediction and inter-frame prediction) and / or reconstruct pixels for processing, i.e., encoding subsequent blocks. In the following embodiments of the decoding system 10, the encoder 20 and the decoder 30 are described with reference to FIGS. 1a to 3. FIG. 1a is an exemplary block diagram of a decoding system 10 provided by an embodiment of the present application. For example, a video decoding system 10 (or simply referred to as the decoding system 10) that can utilize the technology of the embodiments of the present application. The video encoder 20 (or simply referred to as the encoder 20) and the video decoder 30 (or simply referred to as the decoder 30) in the video decoding system 10 represent devices that can be used to execute various techniques according to the various examples described in the embodiments of the present application. As shown in FIG. 1a, the decoding system 10 includes a source device 12, and the source device 12 is configured to provide encoded image data 21 such as encoded images to a destination device 14 for decoding the encoded image data 21. The source device 12 includes an encoder 20, and additionally, optionally, may include an image source 16, a pre-processor (or pre-processing unit) 18 such as an image pre-processor, and a communication interface (or communication unit) 22. The image source 16 may include or may be any type of image capture device for capturing real-world images, etc., and / or any type of image generation device, such as a computer graphics processor for generating computer animated images or any type of device for acquiring and / or providing real-world images, computer-generated images (e.g., screen content, virtual reality (VR) images, and / or any combination thereof (e.g., augmented reality (AR) images). The above image source may be any type of memory or storage for storing any of the above images. To distinguish the processing performed by the preprocessor (or preprocessing unit) 18, the image (or image data) 17 may also be referred to as the raw image (or raw image data) 17. The preprocessor 18 is configured to receive the raw image data 17 and perform preprocessing on the raw image data 17 to obtain preprocessed image (or preprocessed image data) 19. For example, the preprocessing performed by the preprocessor 18 may include trimming, color format conversion (e.g., from RGB to YCbCr), color correction, or denoising. It can be understood that the preprocessing unit 18 may be an optional component. The video encoder (or encoder) 20 is configured to receive the preprocessed image data 19 and provide encoded image data 21 (which will be further described below with reference to Figure 2, etc.). The communication interface 22 in the source device 12 can be used to: receive the encoded image data 21 and send the encoded image data 21 (or any other processed version) to another device such as the destination device 14 or any other device via the communication channel 13 for storage or direct reconstruction. The destination device 14 includes a decoder 30, and additionally, optionally, may include a communication interface (or communication unit) 28, a postprocessor (or postprocessing unit) 32, and a display device 34. The communication interface 28 in the destination device 14 is configured to directly receive the encoded image data 21 (or any other processed version) from the source device 12 or from any other source device such as a storage device. For example, the storage device is an encoded image data storage device, and provide the encoded image data 21 to the decoder 30. The communication interface 22 and the communication interface 28 can be used to send or receive the encoded image data (or encoded data) 21 via a direct communication link between the source device 12 and the destination device 14, such as a direct wired or wireless connection, etc., or via any type of network, such as a wired network, a wireless network, or any combination thereof, any type of private network and public network or any combination thereof. For example, the communication interface 22 can be used to encapsulate the encoded image data 21 into a suitable format such as a packet, and / or process the encoded image data using any type of transmission encoding or processing for transmission over a communication link or communication network. The communication interface 28 corresponds to the communication interface 22. For example, it can be used to receive the transmission data and process the transmission data using any type of corresponding transmission decoding or processing and / or de-encapsulation to obtain the encoded image data 21. Both the communication interface 22 and the communication interface 28 can be configured as a unidirectional communication interface as indicated by the arrow of the corresponding communication channel 13 pointing from the source device 12 to the destination device 14 in FIG. 1a, or a bidirectional communication interface, and can be used to send and receive messages, etc., to establish a connection, confirm, and exchange any other information related to data transmission such as the communication link and / or, for example, the transmission of encoded image data, etc. Exchange any other information related to data transmission such as the communication link and / or, for example, the transmission of encoded image data, etc. The video decoder (or decoder) 30 is used to receive the encoded image data 21 and provide the decoded image data (or decoded image data) 31 (which will be further described below with reference to FIG. 3, etc.). The post-processor 32 is used to post-process the decoded image, etc., the decoded image data 31 (also referred to as the reconstructed image data), to obtain the post-processed image, etc., the post-processed image data 33. The post-processing performed by the post-processing unit 32 can include, for example, color format conversion (e.g., from YCbCr to RGB), color grading, cropping, or resampling, or any other processing for generating the decoded image data 31, etc., for display on the display device 34, etc. The display device 34 is used to receive the post-processed image data 33 to display an image to a user, viewer, etc. The display device 34 can be or include any type of display for representing the reconstructed image. For example, an integrated or external display screen or monitor. For example, the display screen can include a liquid crystal display (LCD), an organic light emitting diode (OLED) display, a plasma display, a projector, a micro-LED display, a liquid crystal on silicon (LCoS) display, a digital light processor (DLP) display, or any other type of display screen. The decoding system 10 further includes a training engine 25. The training engine 25 is used to train the encoder 20 (especially the entropy encoding unit 270 in the encoder 20) or the decoder 30 (especially the entropy decoding unit 304 in the decoder 30) to perform entropy encoding on the image blocks to be encoded according to the estimated probability distribution. For a detailed description of the training engine 25, please refer to the following method test examples. Although FIG. 1a shows the source device 12 and the destination device 14 as separate devices, device embodiments may also include both the source device 12 and the destination device 14 or the functions of both the source device 12 and the destination device 14 simultaneously, that is, include both the source device 12 or corresponding function and the destination device 14 or corresponding function simultaneously. In these embodiments, the source device 12 or corresponding function and the destination device 14 or corresponding function may be implemented using the same hardware and / or software or by separate hardware and / or software or any combination thereof. According to the description, the presence and (exact) partitioning of different units or functions in the source device 12 and / or the destination device 14 shown in FIG. 1a may vary according to the actual device and application, which will be apparent to those skilled in the art. Please refer to FIG. 1b. FIG. 1b is an exemplary block diagram of a video coding system 40 provided by an embodiment of the present application. The encoder 20 (such as a video encoder 20) or the decoder 30 (such as a video decoder 30) or both can be implemented by a processing circuit in the video coding system 40 shown in FIG. 1b, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, video coding dedicated processors, or any combination thereof. Please refer to FIGS. 2 and 3. FIG. 2 is an exemplary block diagram of a video encoder provided by an embodiment of the present application, and FIG. 3 is an exemplary block diagram of a video decoder provided by an embodiment of the present application. The encoder 20 can be implemented by a processing circuit 46 to include various modules discussed with reference to the encoder 20 in FIG. 2 and / or any other encoder system or subsystem described herein. The decoder 30 can be implemented by a processing circuit 46 to include various modules discussed with reference to the decoder 30 in FIG. 3 and / or any other decoder system or subsystem described herein. The above-mentioned processing circuit 46 can be used to perform various operations discussed below. As shown in FIG. 5, if part of the technology is implemented in software, the device can store the instructions of the software in a suitable non-transitory computer-readable storage medium and execute the instructions in hardware using one or more processors, thereby implementing the technology of the embodiments of the present application. One of the video encoder 20 and the video decoder 30 can be integrated as part of a combined codec (encoder / decoder, CODEC) in a single device, as shown in FIG. 1b. The source device 12 and the destination device 14 may include any of various devices, including any type of handheld device or fixed device, such as a notebook computer or laptop, mobile phone, smartphone, tablet or tablet computer, camera, desktop computer, set-top box, television, display device, digital media player, video game console, video streaming device (e.g., content service server or content distribution server), broadcast receiving device, broadcast transmitting device, and monitoring device, etc., and may or may not use any type of operating system. The source device 12 and the destination device 14 may also be devices in a cloud computing scenario, such as virtual machines in a cloud computing scenario. In some cases, the source device 12 and the destination device 14 may be equipped with components for wireless communication. Therefore, the source device 12 and the destination device 14 may be wireless communication devices. The source device 12 and the destination device 14 may install virtual scene application programs (applications, APPs) such as virtual reality (VR) applications, augmented reality (AR) applications, or mixed reality (MR) applications, and may run VR applications, AR applications, or MR applications based on user operations (such as clicking, touching, swiping, shaking, voice control, etc.). The source device 12 and the destination device 14 may collect images / videos of any object in the environment through a camera and / or sensor, and then display virtual objects on the display device according to the collected images / videos. The virtual objects may be virtual objects in a VR scene, AR scene, or MR scene (i.e., objects in a virtual environment). It should be noted that in the embodiments of the present application, the virtual scene application programs in the source device 12 and the destination device 14 may be application programs built into the source device 12 and the destination device 14 themselves, or may be application programs provided by third-party service providers installed by the user, and no specific limitations are imposed. In addition, the source device 12 and the destination device 14 may install real-time video transmission applications, such as live broadcast applications. The source device 12 and the destination device 14 may collect images / videos through a camera and then display the collected images / videos on the display device. In some cases, the video decoding system 10 shown in FIG. 1a is merely exemplary, and the techniques provided by the embodiments of the present application are applicable to video coding settings (e.g., video encoding or video decoding), which may not necessarily include any data communication between the encoding device and the decoding device. In other examples, data is retrieved from local memory, sent over a network, and so on. The video encoding device may encode the data and store the data in memory, and / or the video decoding device may retrieve the data from memory and decode the data. In some examples, encoding and decoding are performed by devices that do not communicate with each other but only encode data into memory and / or retrieve and decode data from memory. Please refer to FIG. 1b. FIG. 1b is an exemplary block diagram of a video decoding system 40 provided by an embodiment of the present application. As shown in FIG. 1b, the video decoding system 40 may include an imaging device 41, a video encoder 20, a video decoder 30 (and / or a video codec implemented by processing circuitry 46), an antenna 42, one or more processors 43, one or more memory memories 44, and / or a display device 45. As shown in FIG. 1b, the imaging device 41, the antenna 42, the processing circuitry 46, the video encoder 20, the video decoder 30, the processor 43, the memory memory 44, and / or the display device 45 can communicate with each other. In different instances, the video decoding system 40 may include only the video encoder 20 or only the video decoder 30. In some instances, the antenna 42 may be used to transmit or receive an encoded bitstream of video data. Additionally, in some instances, the display device 45 may be used to present video data. The processing circuitry 46 may include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, and so on. The video decoding system 40 may also include an optional processor 43, which similarly may include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, and so on. Additionally, the memory memory 44 may be any type of memory, such as volatile memory (e.g., static random access memory (SRAM), dynamic random access memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.). In a non-limiting instance, the memory memory 44 may be implemented by cache memory. In other instances, the processing circuitry 46 may include a memory (e.g., a cache, etc.) for implementing an image buffer, etc. In some examples, a video encoder 20 implemented by logic circuitry may include an image buffer (e.g., implemented by processing circuitry 46 or memory 44) and a graphics processing unit (e.g., implemented by processing circuitry 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include the video encoder 20 implemented by processing circuitry 46 to implement various modules discussed with reference to FIG. 2 and / or any other encoder system or subsystem described herein. The logic circuitry may be used to perform the various operations discussed herein. In some examples, a video decoder 30 may be implemented by processing circuitry 46 in a similar manner to implement the various modules discussed with reference to the video decoder 30 of FIG. 3 and / or any other decoder system or subsystem described herein. In some examples, a video decoder 30 implemented by logic circuitry may include an image buffer (implemented by processing circuitry 46 or memory 44) and a graphics processing unit (e.g., implemented by processing circuitry 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include the video decoder 30 implemented by processing circuitry 46 to implement the various modules discussed with reference to FIG. 3 and / or any other decoder system or subsystem described herein. In some examples, an antenna 42 may be used to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data, indicators, index values, mode selection data, etc. discussed herein related to the coded video frames, e.g., data related to coded partitions (e.g., transform coefficients or quantized transform coefficients, optional indicators as discussed, and / or data defining the coded partitions). The video decoding system 40 may further include a video decoder 30 coupled to the antenna 42 and configured to decode the encoded bitstream. A display device 45 is used to present video frames. It should be understood that for the examples described with reference to the video encoder 20 in the embodiments of the present application, the video decoder 30 may be used to perform the reverse process. With respect to signaling syntax elements, the video decoder 30 may be used to receive and parse such syntax elements and accordingly decode the relevant video data. In some examples, the video encoder 20 may entropy encode the syntax elements into an encoded video bitstream. In such instances, the video decoder 30 may parse such syntax elements and accordingly decode the relevant video data. For ease of description, embodiments of the present application are described with reference to the Versatile Video Coding (VVC) reference software or the High-Efficiency Video Coding (HEVC) developed by the Joint Collaborative Team on Video Coding (JCT-VC) of the ITU-T Video Coding Experts Group (VCEG) and the ISO / IEC Moving Picture Experts Group (MPEG). Those of ordinary skill in the art understand that the embodiments of the present application are not limited to HEVC or VVC. Encoder and encoding method As shown in FIG. 2, the video encoder 20 includes an input end (or input interface) 201, a residual calculation unit 204, a transformation processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transformation processing unit 212, a reconstruction unit 214, a loop filter 220, a decoded picture buffer (DPB) 230, a mode selection unit 260, an entropy coding unit 270, and an output end (or output interface) 272. The mode selection unit 260 may include an inter prediction unit 244, an intra prediction unit 254, and a segmentation unit 262. The inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). The video encoder 20 shown in FIG. 2 may also be referred to as a hybrid video encoder or a video encoder based on a hybrid video codec. Referring to FIG. 2, the inter prediction unit is a trained target model (also referred to as a neural network), and the neural network is used to process an input image or an image region or an image block to generate a predicted value of the input image block. For example, the neural network for inter prediction is used to receive an input image or an image region or an image block and generate a predicted value of the input image or an image region or an image block. The residual calculation unit 204, the transform processing unit 206, the quantization unit 208, and the mode selection unit 260 form the forward signal path of the encoder 20, while the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, the inter prediction unit 244, and the intra prediction unit 254 form the backward signal path of the encoder, where the backward signal path of the encoder 20 corresponds to the signal path of the decoder (see the decoder 30 in FIG. 3). The inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the loop filter 220, the decoded picture buffer 230, the inter prediction unit 244, and the intra prediction unit 254 also form the "built-in decoder" of the video encoder 20. Images and image segmentation (images and blocks) The encoder 20 can be used to receive an image (or image data) 17 through the input terminal 201, etc., for example, an image in an image sequence forming a video or a video sequence. The received image or image data can also be a preprocessed image (or preprocessed image data) 19. For simplicity, the following description uses the image 17. The image 17 can also be referred to as the current image or the image to be encoded (especially when distinguishing the current image from other images in video coding, other images such as previously encoded and / or decoded images in the same video sequence, i.e., the video sequence including the current image). (Digital) images are or can be regarded as two-dimensional arrays or matrices composed of pixel points with intensity values. The pixel points in the array can also be referred to as pixels (pixel or pel, short for picture element). The number of pixel points in the horizontal and vertical directions (or axes) of the array or image determines the size and / or resolution of the image. To represent colors, usually three color components are used, that is, the image can be represented as or include three pixel point arrays. In the RGB format or color space, the image includes corresponding red, green, and blue pixel point arrays. However, in video coding, each pixel is usually represented in a luminance / chrominance format or color space, such as YCbCr, including a luminance component indicated by Y (sometimes also denoted by L) and two chrominance components denoted by Cb and Cr. The luminance (luma) component Y represents the luminance or gray-level intensity (for example, they are the same in a grayscale image), while the two chrominance components Cb and Cr represent the chrominance or color information components. Accordingly, an image in the YCbCr format includes a luminance pixel point array of luminance pixel point values (Y) and two chrominance pixel point arrays of chrominance values (Cb and Cr). An image in the RGB format can be converted or transformed into the YCbCr format, and vice versa, and this process is also called color transformation or conversion. If the image is black and white, then the image can only include a luminance pixel point array. Accordingly, the image can be, for example, a luminance pixel point array in a monochrome format or a luminance pixel point array and two corresponding chrominance pixel point arrays in 4:2:0, 4:2:2, and 4:4:4 color formats. In one embodiment, an embodiment of the video encoder 20 may include an image segmentation unit (not shown in FIG. 2) for segmenting the image 17 into a plurality of (usually non-overlapping) image blocks 203. These blocks may also be referred to as root blocks, macroblocks (H.264 / AVC), or coding tree blocks (CTB), or coding tree units (CTU) in the H.265 / HEVC and VVC standards. The segmentation unit can be used to use the same block size for all images in the video sequence and use a corresponding grid defining the block size, or change the block size between images or subsets or groups of images, and segment each image into corresponding blocks. In other embodiments, the video encoder can be used to directly receive the blocks 203 of the image 17, for example, one, several, or all of the blocks constituting the above-mentioned image 17. The image block 203 can also be referred to as the current image block or the image block to be encoded. Similar to image 17, image block 203 is also or can be considered as a two-dimensional array or matrix composed of pixel points with intensity values (pixel values), but image block 203 is smaller than image 17. In other words, block 203 can include an array of pixel points (e.g., the luminance array in the case of a monochrome image 17 or the luminance array or chrominance array in the case of a color image) or three arrays of pixel points (e.g., one luminance array and two chrominance arrays in the case of a color image 17) or any other number and / or type of arrays according to the color format adopted. The number of pixel points in the horizontal and vertical directions (or axes) of block 203 defines the size of block 203. Accordingly, the block can be an array of M×N (M columns × N rows) pixel points, or an array of M×N transform coefficients, etc. In one embodiment, the video encoder 20 shown in FIG. 2 is used to encode image 17 block by block. For example, encoding and prediction are performed on each block 203. In one embodiment, the video encoder 20 shown in FIG. 2 can also be used to segment and / or encode an image using slices (also referred to as video slices). where the image can be segmented or encoded using one or more slices (usually non-overlapping). Each slice can include one or more blocks (e.g., coding tree units CTU) or one or more block groups (e.g., coding blocks (tiles) in the H.265 / HEVC / VVC standards and bricks in the VVC standard). In one embodiment, the video encoder 20 shown in FIG. 2 can also be used to segment and / or encode an image using slice / coding block groups (also referred to as video coding block groups) and / or coding blocks (also referred to as video coding blocks), where the image can be segmented or encoded using one or more slice / coding block groups (usually non-overlapping), each slice / coding block group can include one or more blocks (e.g., CTU) or one or more coding blocks, etc., and each coding block can be in a shape such as a rectangle and can include one or more complete or partial blocks (e.g., CTU). Residual calculation The residual calculation unit 204 is used to calculate the residual block 205 based on the image block (or original block) 203 and the prediction block 265 (the prediction block 265 is introduced in detail later) in the following manner: for example, subtract the pixel value of the prediction block 265 from the pixel value of the image block 203 pixel by pixel (pixel by pixel) to obtain the residual block 205 in the pixel domain. Transformation The transform processing unit 206 is configured to perform a discrete cosine transform (DCT), a discrete sine transform (DST), etc. on the pixel values of the residual block 205 to obtain transform coefficients 207 in the transform domain. The transform coefficients 207 may also be referred to as transform residual coefficients, representing the residual block 205 in the transform domain. The transform processing unit 206 can be used to apply an integer approximation of DCT / DST, such as the transform specified for H.265 / HEVC. Compared with the orthogonal DCT transform, this integer approximation is typically scaled by a certain factor. To maintain the norm of the residual block after forward and inverse transform processing, other scaling factors are used as part of the transform process. The scaling factors are usually selected according to certain constraints, such as the power of 2 for shift operations, the bit depth of the transform coefficients, the trade-off between accuracy and implementation cost, etc. For example, specific scaling factors are specified for the inverse transform by the inverse transform processing unit 212 on the encoder 20 side (and for the corresponding inverse transform by, for example, the inverse transform processing unit 312 on the decoder 30 side), and correspondingly, the corresponding scaling factors can be specified for the forward transform by the transform processing unit 206 on the encoder 20 side. In one embodiment, the video encoder 20 (correspondingly, the transform processing unit 206) can be used to output transform parameters such as the type of one or more transforms, for example, directly output, or output after being encoded or compressed by the entropy encoding unit 270, such that the video decoder 30 can receive and use the transform parameters for decoding. Quantization The quantization unit 208 is configured to quantize the transform coefficients 207 through, for example, scalar quantization or vector quantization to obtain quantized transform coefficients 209. The quantized transform coefficients 209 may also be referred to as quantized residual coefficients 209. The quantization process can reduce the bit depth associated with some or all of the transform coefficients 207. For example, during quantization, an n-bit transform coefficient can be rounded down to an m-bit transform coefficient, where n is greater than m. The degree of quantization can be modified by adjusting the quantization parameter (QP). For example, for scalar quantization, different degrees of scaling can be applied to achieve finer or coarser quantization. A smaller quantization step corresponds to finer quantization, while a larger quantization step corresponds to coarser quantization. The appropriate quantization step can be indicated by the quantization parameter (QP). For example, the quantization parameter can be an index of a predefined set of appropriate quantization steps. For example, a smaller quantization parameter can correspond to fine quantization (smaller quantization step), and a larger quantization parameter can correspond to coarse quantization (larger quantization step), and vice versa. Quantization can include division by the quantization step, and the corresponding or inverse dequantization performed by a dequantization unit 210, etc., can include multiplication by the quantization step. Embodiments according to some standards such as HEVC can be used to determine the quantization step using the quantization parameter. Generally, the quantization step can be calculated using a fixed-point approximation of an equation involving division based on the quantization parameter. Other scaling factors can be introduced for quantization and dequantization to recover the norm of the residual block that may be modified due to the scaling used in the fixed-point approximation of the equations for the quantization step and the quantization parameter. In one exemplary implementation, the scaling of the inverse transform and dequantization can be combined. Alternatively, a custom quantization table can be used and indicated from the encoder to the decoder in the bitstream, etc. Quantization is a lossy operation, where the larger the quantization step, the greater the loss. In one embodiment, the video encoder 20 (correspondingly, the quantization unit 208) can be used to output the quantization parameter (QP), for example, directly output or output after being encoded or compressed by the entropy encoding unit 270, such that the video decoder 30 can receive and use the quantization parameter for decoding. Dequantization The dequantization unit 210 is used to perform the inverse quantization of the quantization unit 208 on the quantization coefficients to obtain dequantized coefficients 211. For example, the inverse quantization scheme of the quantization scheme performed by the quantization unit 208 is performed according to or using the same quantization step as the quantization unit 208. The dequantized coefficients 211 can also be referred to as dequantized residual coefficients 211, corresponding to the transform coefficients 207. However, due to the loss caused by quantization, the dequantized coefficients 211 are usually not exactly the same as the transform coefficients. Inverse transform The inverse transform processing unit 212 is configured to perform an inverse transform of the transform performed by the transform processing unit 206, such as an inverse discrete cosine transform (DCT) or an inverse discrete sine transform (DST), to obtain a reconstructed residual block 213 (or corresponding dequantized coefficients 213) in the pixel domain. The reconstructed residual block 213 may also be referred to as a transform block 213. Reconstruction The reconstruction unit 214 (e.g., adder 214) is configured to add the transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265 to obtain a reconstructed block 215 in the pixel domain, e.g., by adding the pixel point values of the reconstructed residual block 213 and the pixel point values of the prediction block 265. Filtering The loop filter unit 220 (or simply referred to as "loop filter" 220) is configured to filter the reconstructed block 215 to obtain a filtered block 221, or is generally configured to filter the reconstructed pixel points to obtain filtered pixel point values. For example, the loop filter unit is configured to facilitate pixel transition or improve video quality. The loop filter unit 220 may include one or more loop filters, such as a deblocking filter, a sample - adaptive offset (SAO) filter, or one or more other filters, such as an adaptive loop filter (ALF), a noise suppression filter (NSF), or any combination. For example, the loop filter unit 220 may include a deblocking filter, an SAO filter, and an ALF filter. The order of the filtering process may be a deblocking filter, an SAO filter, and an ALF filter. For another example, a process called luma mapping with chroma scaling (LMCS) (i.e., an adaptive in - loop shaper) is added. This process is performed before deblocking. For another example, the deblocking filtering process may also be applied to internal sub - block edges, such as affine sub - block edges, ATMVP sub - block edges, sub - block transform (SBT) edges, and intra sub - partition (ISP) edges. Although the loop filter unit 220 is shown as a loop filter in FIG. 2, in other configurations, the loop filter unit 220 may be implemented as a post - loop filter. The filtered block 221 may also be referred to as a filtered reconstructed block 221. In one embodiment, the video encoder 20 (correspondingly, the loop filter unit 220) may be used to output loop filter parameters (such as SAO filter parameters, ALF filter parameters, or LMCS parameters), for example, directly output or output after entropy coding by the entropy coding unit 270, such that the decoder 30 can receive and use the same or different loop filter parameters for decoding. Decoded picture buffer The decoded picture buffer (DPB) 230 may be a reference image memory that stores reference image data for use by the video encoder 20 when encoding video data. The DPB 230 may be formed of any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of storage devices. The decoded picture buffer 230 may be used to store one or more filtered blocks 221. The decoded picture buffer 230 may also be used to store other previously filtered blocks, such as previously reconstructed and filtered blocks 221, of the same current image or different images such as previous reconstructed images, and may provide the full previously reconstructed i.e., decoded image (and corresponding reference blocks and pixels) and / or a partially reconstructed current image (and corresponding reference blocks and pixels), for example, for inter prediction. The decoded picture buffer 230 may also be used to store one or more unfiltered reconstructed blocks 215, or generally unfiltered reconstructed pixels, for example, reconstructed blocks 215 that have not been filtered by the loop filter unit 220, or reconstructed blocks or reconstructed pixels that have not undergone any other processing. Mode selection (segmentation and prediction) The mode selection unit 260 includes a segmentation unit 262, an inter prediction unit 244, and an intra prediction unit 254, and is configured to receive or obtain raw image data such as raw blocks 203 (current blocks 203 of the current image 17) and reconstructed image data from the decoded picture buffer 230 or other buffers (such as a column buffer, not shown in FIG. 2), for example, filtered and / or unfiltered reconstructed pixels or reconstructed blocks of the same (current) image and / or one or more previously decoded images. The reconstructed image data is used as reference image data required for prediction such as inter prediction or intra prediction to obtain a predicted block 265 or a predicted value 265. The mode selection unit 260 can be used to determine or select a segmentation for the current block (including no segmentation) and a prediction mode (e.g., intra-frame or inter-frame prediction mode), and generate a corresponding prediction block 265 to calculate the residual block 205 and reconstruct the reconstructed block 215. In one embodiment, the mode selection unit 260 can be used to select a segmentation and a prediction mode (e.g., from the prediction modes supported or available to the mode selection unit 260), where the above prediction mode provides the best match or the smallest residual (the smallest residual means better compression in transmission or storage), or provides the smallest signaling overhead (the smallest signaling overhead means better compression in transmission or storage), or considers or balances both of the above at the same time. The mode selection unit 260 can be used to determine the segmentation and the prediction mode according to rate distortion Optimization (RDO), that is, select the prediction mode that provides the smallest rate distortion optimization. The terms "best", "lowest", "optimal", etc. in this article do not necessarily refer to "the best", "the lowest", "the most optimal" overall, but can also refer to the situation that meets the termination or selection criteria. For example, values exceeding or below a threshold or other constraints may lead to a "sub-optimal choice", but will reduce complexity and processing time. In other words, the segmentation unit 262 can be used to segment the images in the video sequence into a sequence of coding tree units (CTUs). The CTU 203 can be further segmented into smaller block parts or sub-blocks (again forming blocks), for example, by iteratively using quad-tree partitioning (QT), binary-tree partitioning (BT), or triple-tree partitioning (TT) or any combination thereof, and used to perform predictions on, for example, each of the block parts or sub-blocks, where the mode selection includes selecting the tree structure for segmenting the block 203 and selecting the prediction mode applied to each of the block parts or sub-blocks. The segmentation (e.g., performed by the segmentation unit 262) and the prediction processing (e.g., performed by the inter-frame prediction unit 244 and the intra-frame prediction unit 254) performed by the video encoder 20 will be described in detail below. Segmentation The splitting unit 262 may split (or divide) an image block (or CTU) 203 into smaller parts, such as small blocks in the shape of a square or rectangle. For an image with an array of three pixel points, a CTU consists of an N×N block of luminance pixel points and two corresponding chrominance pixel point blocks. The maximum allowable size of the luminance block in the versatile video coding (VVC) standard under development is specified as 128×128, but may be specified as a value different from 128×128 in the future, such as 256×256. The CTUs of an image may be grouped / collected into slices / coding tree units, coding tree blocks, or tiles. A coding tree block covers a rectangular area of an image, and a coding tree block may be divided into one or more tiles. A tile consists of multiple CTU rows within a coding tree block. A coding tree block that is not divided into multiple tiles may be called a tile. However, a tile is a true subset of a coding tree block and thus is not called a coding tree block. VVC supports two coding tree unit modes, namely the raster scan slice / coding tree unit mode and the rectangular slice mode. In the raster scan coding tree unit mode, a slice / coding tree unit contains a sequence of coding tree blocks in the raster scan of the coding tree blocks of an image. In the rectangular slice mode, a slice contains multiple tiles of an image, and these tiles together form a rectangular area of the image. The tiles within a rectangular slice are arranged in the tile raster scan order of the slice. These smaller blocks (which may also be called sub-blocks) may be further split into even smaller parts. This is also called tree splitting or hierarchical tree splitting, where a root block at the root tree level 0 (hierarchical level 0, depth 0), etc., can be recursively split into two or more blocks at the next lower tree level, such as nodes at tree level 1 (hierarchical level 1, depth 1). These blocks can in turn be split into two or more blocks at the next lower level, such as tree level 2 (hierarchical level 2, depth 2), etc., until the splitting ends (because an end criterion is met, such as reaching the maximum tree depth or the minimum block size). Blocks that are not further split are also called leaf blocks or leaf nodes of the tree. A tree split into two parts is called a binary-tree (BT), a tree split into three parts is called a ternary-tree (TT), and a tree split into four parts is called a quad-tree (QT). For example, a coding tree unit (CTU) can be or include a CTB of luminance pixel points, two corresponding CTBs of chrominance pixel points of an image having three pixel point arrays, or a CTB of pixel points of a monochrome image or a CTB of pixel points of an image encoded using three independent color planes and a syntax structure (for encoding pixel points). Accordingly, a coding tree block (CTB) can be a block of N×N pixel points, where N can be set to a certain value such that a component is divided into CTBs, which is segmentation. A coding unit (CU) can be or include a coding block of luminance pixel points, two corresponding coding blocks of chrominance pixel points of an image having three pixel point arrays, or a coding block of pixel points of a monochrome image or a coding block of pixel points of an image encoded using three independent color planes and a syntax structure (for encoding pixel points). Accordingly, a coding block (CB) can be a block of M×N pixel points, where M and N can be set to a certain value such that a CTB is divided into coding blocks, which is segmentation. For example, in an embodiment, according to HEVC, a coding tree unit (CTU) can be divided into multiple CUs by using a quadtree structure represented as a coding tree. A decision on whether to use inter (temporal) prediction or intra (spatial) prediction to encode an image region is made at the leaf CU level. Each leaf CU can be further divided into one, two, or four PUs according to the PU partition type. The same prediction process is used within one PU, and relevant information is transmitted to the decoder in units of PUs. After obtaining a residual block by applying the prediction process according to the PU partition type, the leaf CU can be segmented into transform units (TUs) according to another quadtree structure similar to the coding tree used for CUs. For example, in an embodiment, according to the latest video coding standard currently under development (referred to as Versatile Video Coding (VVC)), a combined quadtree using nested multi-type trees (such as binary trees and ternary trees) is used to divide the segmentation structure for splitting coding tree units. In the coding tree structure within a coding tree unit, a CU can be square or rectangular. For example, a coding tree unit (CTU) is first divided by a quadtree structure. The quadtree leaf nodes are further divided by a multi-type tree structure. The multi-type tree structure has four division types: vertical binary tree division (SPLIT_BT_VER), horizontal binary tree division (SPLIT_BT_HOR), vertical ternary tree division (SPLIT_TT_VER), and horizontal ternary tree division (SPLIT_TT_HOR). The multi-type tree leaf nodes are called coding units (CUs), unless the CU is too large for the maximum transform length. Such segments are used for prediction and transform processing without any further splitting. In most cases, this means that the CU, PU, and TU have the same block size in the coding block structure of the quadtree nested multi-type tree. This exception occurs when the maximum supported transform length is less than the width or height of the color component of the CU. VVC has developed a unique signaling mechanism for the segmentation division information in the coding structure with a quadtree nested multi-type tree. In the signaling mechanism, a coding tree unit (CTU), as the root of the quadtree, is first divided by the quadtree structure. Then each quadtree leaf node (when large enough to be) is further divided into a multi-type tree structure. In the multi-type tree structure, through the first identifier (mtt_split_cu_flag) indicates whether the node is further split. When further splitting the node, first use the second flag (mtt_split_cu_vertical_flag) to indicate the splitting direction, and then use the third flag (mtt_split_cu_binary_flag) to indicate whether the splitting is a binary tree splitting or a ternary tree splitting. According to the values of mtt_split_cu_vertical_flag and mtt_split_cu_binary_flag, the decoder can derive the multi-type tree splitting mode (MttSplitMode) of the CU based on predefined rules or tables. It should be noted that for a certain design, such as the 64×64 luma block and 32×32 chroma pipeline design in the VVC hardware decoder, when the width or height of the luma coding block is greater than 64, TT splitting is not allowed. When the width or height of the chroma coding block is greater than 32, TT splitting is also not allowed. The pipeline design divides the image into multiple virtual pipeline data units (VPDUs), and each VPDU is defined as a non-overlapping unit in the image. In the hardware decoder, consecutive VPDUs are processed simultaneously in multiple pipeline stages. In most pipeline stages, the VPDU size is roughly proportional to the buffer size, so it is necessary to keep the VPDU small. In most hardware decoders, the VPDU size can be set to the maximum transform block (TB) size. However, in VVC, the splitting of the ternary tree (TT) and the binary tree (BT) may increase the VPDU size. In addition, it should be noted that when a part of the tree node block extends beyond the bottom or the right boundary of the image, the tree node block is forced to be split until all pixel points of each coded CU are within the image boundary. For example, the above-mentioned intra sub-partitions (ISP) tool can vertically or horizontally divide the luma intra prediction block into two or four sub-parts according to the block size. In one example, the mode selection unit 260 of the video encoder 20 can be used to perform any combination of the splitting techniques described above. As described above, the video encoder 20 is used to determine or select the best or optimal prediction mode from a (predetermined) set of prediction modes. The set of prediction modes may include, for example, intra prediction modes and / or inter prediction modes. Intra prediction The set of intra prediction modes may include 35 different intra prediction modes. For example, non-directional modes such as the DC (or mean) mode and the planar mode, or directional modes defined in HEVC. Or it may include 67 different intra prediction modes. For example, non-directional modes such as the DC (or mean) mode and the planar mode, or directional modes defined in VVC. For example, several traditional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes for non-square blocks defined in VVC. Also, for example, to avoid the division operation in DC prediction, only the longer side is used to calculate the average value of non-square blocks. And the intra prediction result of the planar mode can also be modified using the position dependent intra prediction combination (PDPC) method. The intra prediction unit 254 is used to generate an intra prediction block 265 by reconstructing pixel points using adjacent blocks of the same current image according to the intra prediction mode in the set of intra prediction modes. The intra prediction unit 254 (or generally the mode selection unit 260) is also used to output intra prediction parameters (or generally information indicating the selected intra prediction mode of the block) and send them to the entropy coding unit 270 in the form of a syntax element 266 to be included in the encoded image data 21, so that the video decoder 30 can perform operations such as receiving and using the prediction parameters for decoding. The intra prediction modes in HEVC include a direct current prediction mode, a planar prediction mode, and 33 angular prediction modes, for a total of 35 candidate prediction modes. The current block can use the pixels of the reconstructed image blocks on the left and above as references for intra prediction. The image blocks in the peripheral area of the current block used for intra predicting the current block are called reference blocks, and the pixels in the reference blocks are called reference pixels. Among the 35 candidate prediction modes, the direct current prediction mode is applicable to areas with flat texture in the current block, and all pixels in this area use the average value of the reference pixels in the reference block as the prediction; the planar prediction mode is applicable to image blocks with smooth texture changes. For the current block meeting this condition, bilinear interpolation of the reference pixels in the reference block is used as the prediction for all pixels in the current block; the angular prediction mode utilizes the characteristic that the texture of the current block is highly correlated with the texture of adjacent reconstructed image blocks, and copies the values of the reference pixels in the corresponding reference block along a certain angle as the prediction for all pixels in the current block. The HEVC encoder selects an optimal intra-frame prediction mode for the current block from 35 candidate prediction modes and writes the optimal intra-frame prediction mode into the video bitstream. To improve the coding efficiency of intra-frame prediction, the encoder / decoder derives three most likely modes from the optimal intra-frame prediction modes of the reconstructed image blocks in the surrounding area using intra-frame prediction. If the optimal intra-frame prediction mode selected for the current block is one of the three most likely modes, a first index is encoded to indicate that the selected optimal intra-frame prediction mode is one of the three most likely modes; if the selected optimal intra-frame prediction mode is not one of the three most likely modes, a second index is encoded to indicate that the selected optimal intra-frame prediction mode is one of the other 32 modes (other modes among the 35 candidate prediction modes except the aforementioned three most likely modes). The HEVC standard uses a 5-bit fixed-length code as the aforementioned second index. The method by which the HEVC encoder derives the three most likely modes includes: selecting the optimal intra-frame prediction modes of the left adjacent image block and the upper adjacent image block of the current block and putting them into a set. If the two optimal intra-frame prediction modes are the same, only one is retained in the set. If the two optimal intra-frame prediction modes are the same and both are angular prediction modes, two angular prediction modes adjacent to the angular direction are selected and added to the set; Otherwise, the planar prediction mode, the DC mode, and the vertical prediction mode are selected in sequence to be added to the set until the number of modes in the set reaches 3. After the HEVC decoder performs entropy decoding on the bitstream, it obtains the mode information of the current block, which includes an indication flag indicating whether the optimal intra-frame prediction mode of the current block is among the three most likely modes, and the index of the optimal intra-frame prediction mode of the current block among the three most likely modes or the index of the optimal intra-frame prediction mode of the current block among the other 32 modes. Inter prediction In a possible implementation, the set of inter-prediction modes depends on the available reference picture (i.e., at least part of the previously decoded picture stored in the DBP 230 as mentioned above) and other inter-prediction parameters, for example, on whether to use the entire reference picture or only a part of the reference picture, such as a search window area around the area of the current block, to search for the best matching reference block, and / or on whether to perform pixel interpolation such as half-pixel, quarter-pixel and / or 1 / 16 interpolation, for example. In addition to the above prediction modes, skip mode and / or direct mode may also be employed. For example, for extended merge prediction, the merge candidate list for this mode consists of the following five candidate types in order: spatial MVP from spatially adjacent CUs, temporal MVP from collocated CUs, history-based MVP from the FIFO table, pairwise average MVP, and zero MV. Decoder side motion vector refinement (DMVR) based on bipartite matching can be used to increase the accuracy of the MV of the merge mode. The merge mode with MVD (MMVD) comes from the merge mode with motion vector difference. The MMVD flag is sent immediately after the skip flag and the merge flag to specify whether the CU uses the MMVD mode. An adaptive motion vector resolution (AMVR) scheme for the CU level can be used. AMVR supports encoding the MVD of the CU with different precisions. The MVD of the current CU is adaptively selected according to the prediction mode of the current CU. When the CU is encoded in the merge mode, the combined inter / intra prediction (CIIP) mode can be applied to the current CU. The inter and intra prediction signals are weighted and averaged to obtain the CIIP prediction. For affine motion compensation prediction, the affine motion field of the block is described by the motion information of the motion vector with 2 control points (4 parameters) or 3 control points (6 parameters). Subblock-based temporal motion vector prediction (SbTMVP) is similar to the temporal motion vector prediction (TMVP) in HEVC, but predicts the motion vector of the sub-CUs within the current CU. Bi-directional optical flow (BDOF), formerly known as BIO, is a simplified version that reduces computations, especially in terms of the number of multiplications and the size of the multipliers. In the triangular split mode, the CU is evenly divided into two triangular parts in two ways: diagonal division and anti-diagonal division. In addition, the bi-directional prediction mode is extended based on simple averaging to support weighted averaging of two prediction signals. The inter-frame prediction unit 244 may include a motion estimation (ME) unit and a motion compensation (MC) unit (both not shown in FIG. 2). The motion estimation unit may be used to receive or obtain the image block 203 (the current image block 203 of the current image 17) and the decoded image 231, or at least one or more previously reconstructed blocks, for example, the reconstructed blocks of one or more other / different previously decoded images 231, to perform motion estimation. For example, the video sequence may include the current image and the previously decoded image 231, or in other words, the current image and the previously decoded image 231 may be part of the image sequence forming the video sequence or form the image sequence. For example, the encoder 20 may be used to select a reference block from a plurality of reference blocks of the same or different images among a plurality of other images, and provide the offset (spatial offset) between the reference image (or reference image index) and / or the position (x, y coordinates) of the reference block and the position of the current block as an inter-frame prediction parameter to the motion estimation unit. This offset is also referred to as a motion vector (MV). The motion compensation unit is used to obtain, for example, receive, the inter-frame prediction parameter, and perform inter-frame prediction according to or using the inter-frame prediction parameter to obtain the inter-frame prediction block 246. The motion compensation performed by the motion compensation unit may include extracting or generating a prediction block according to the motion / block vector determined by motion estimation, and may also include performing interpolation at sub-pixel precision. The interpolation filter may generate pixel points of other pixels from the pixel points of known pixels, thereby potentially increasing the number of candidate prediction blocks available for encoding the image block. Once the motion vector corresponding to the PU of the current image block is received, the motion compensation unit may locate the prediction block pointed to by the motion vector in one of the reference image lists. The motion compensation unit may also generate syntax elements related to the block and the video slice for use by the video decoder 30 when decoding the image blocks of the video slice. Additionally, or as an alternative to the slice and the corresponding syntax elements, coded block groups and / or coded blocks and the corresponding syntax elements may be generated or used. In the process of obtaining the candidate motion vector list in the advanced motion vector prediction (AMVP) mode, the motion vectors (MVs) that can be added to the candidate motion vector list as alternatives include the MVs of the spatially adjacent and temporally adjacent image blocks of the current block. Among them, the MVs of the spatially adjacent image blocks can further include the MVs of the left candidate image block located to the left of the current block and the upper candidate image block located above the current block. Exemplarily, please refer to FIG. 4. FIG. 4 is an exemplary schematic diagram of the candidate image blocks provided by an embodiment of the present application. As shown in FIG. 4, the set of left candidate image blocks includes {A0, A1}, the set of upper candidate image blocks includes {B0, B1, B2}, and the set of temporally adjacent candidate image blocks includes {C, T}. All three sets can be used as alternatives. These are added to the candidate motion vector list. However, according to the existing coding standard, the maximum length of the AMVP candidate motion vector list is 2. Therefore, it is necessary to determine at most two MVs of image blocks to be added to the candidate motion vector list from the three sets according to the specified order. This order can be to first consider the set of left candidate image blocks {A0, A1} of the current block (first consider A0, if A0 is not available, then consider A1), secondly consider the set of upper candidate image blocks {B0, B1, B2} of the current block (first consider B0, if B0 is not available, then consider B1, if B1 is not available, then consider B2), and finally consider the set of temporally adjacent candidate image blocks {C, T} of the current block (first consider T, if T is not available, then consider C). After obtaining the above candidate motion vector list, the optimal MV is determined from the candidate motion vector list through the rate distortion cost (RD cost), and the candidate motion vector with the minimum RD cost is used as the motion vector predictor (MVP) of the current block. The rate distortion cost is calculated by the following formula: J = SAD + λR where J represents the RD cost, SAD is the sum of absolute differences (SAD) between the pixel values of the predicted block obtained after motion estimation using the candidate motion vector and the pixel values of the current block, R represents the bit rate, and λ represents the Lagrange multiplier. The encoding end transmits the index of the determined MVP in the candidate motion vector list to the decoding end. Further, motion search can be performed within the neighborhood centered on the MVP to obtain the actual motion vector of the current block. The encoding end calculates the motion vector difference (MVD) between the MVP and the actual motion vector, and also transmits the MVD to the decoding end. The decoding end parses the index, finds the corresponding MVP in the candidate motion vector list according to the index, parses the MVD, and adds the MVD to the MVP to obtain the actual motion vector of the current block. In the process of obtaining the candidate motion information list in the Merge mode, the motion information that can be added to the candidate motion information list as an alternative includes the motion information of the spatially or temporally adjacent image blocks of the current block. The spatially adjacent image blocks and temporally adjacent image blocks can be referred to in FIG. 4. The candidate motion information corresponding to the space in the candidate motion information list comes from 5 spatially adjacent blocks (A0, A1, B0, B1, and B2). If the spatially adjacent blocks are not available or are intra-frame predicted, their motion information is not added to the candidate motion information list. The candidate motion information in the time domain of the current block is obtained by scaling the MV of the corresponding position block in the reference frame according to the picture order count (POC) of the reference frame and the current frame. First, it is judged whether the block at position T in the reference frame is available. If it is not available, the block at position C is selected. After obtaining the above candidate motion information list, the optimal motion information is determined from the candidate motion information list through the RD cost as the motion information of the current block. The encoding end transmits the index value of the position of the optimal motion information in the candidate motion information list (denoted as merge index) to the decoding end. Entropy coding The entropy coding unit 270 is used to apply an entropy coding algorithm or scheme (e.g., variable length coding (VLC) scheme, context adaptive VLC (CALVC), arithmetic coding scheme, binarization algorithm, context adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding, or other entropy coding methods or techniques) to the quantized residual coefficients 209, inter-frame prediction parameters, intra-frame prediction parameters, loop filter parameters, and / or other syntax elements, to obtain coded image data 21 that can be output in the form of a coded bitstream 21 etc. through the output terminal 272, such that a video decoder 30 etc. can receive and use the parameters for decoding. The coded bitstream 21 can be transmitted to the video decoder 30 or stored in a memory for later transmission or retrieval by the video decoder 30. Other structural variants of the video encoder 20 can be used to encode a video stream. For example, a non-transform-based encoder 20 can directly quantize the residual signal in the case where some blocks or frames do not have a transform processing unit 206. In another implementation, the encoder 20 can have a quantization unit 208 and an inverse quantization unit 210 combined into a single unit. Decoder and decoding method As shown in FIG. 3, the video decoder 30 is used to receive, for example, the coded image data 21 (e.g., the coded bitstream 21) encoded by the encoder 20, to obtain a decoded image 331. The coded image data or bitstream includes information for decoding the above-mentioned coded image data, such as data representing image blocks of a coded video slice (and / or a coded group of blocks or a coded block) and related syntax elements. In the example of FIG. 3, the decoder 30 includes an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314 (e.g., an adder 314), a loop filter 320, a decoded picture buffer (DBP) 330, a mode application unit 360, an inter-frame prediction unit 344, and an intra-frame prediction unit 354. The inter-frame prediction unit 344 can be or include a motion compensation unit. In some examples, the video decoder 30 can perform a decoding process that is generally opposite to the encoding process described with reference to the video encoder 100 in FIG. 2. As described above for the encoder 20, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the loop filter 220, the decoded picture buffer DPB 230, the inter prediction unit 344, and the intra prediction unit 354 also form the "built-in decoder" of the video encoder 20. Correspondingly, the inverse quantization unit 310 can be functionally the same as the inverse quantization unit 110, the inverse transform processing unit 312 can be functionally the same as the inverse transform processing unit 122, the reconstruction unit 314 can be functionally the same as the reconstruction unit 214, the loop filter 320 can be functionally the same as the loop filter 220, and the decoded picture buffer 330 can be functionally the same as the decoded picture buffer 230. Therefore, the corresponding units and the explanations of the functions correspondingly apply to the corresponding units and functions of the video decoder 30. Entropy decoding The entropy decoding unit 304 is used to parse the bitstream 21 (or generally the encoded picture data 21) and perform entropy decoding on the encoded picture data 21 to obtain quantization coefficients 309 and / or decoded coding parameters (not shown in FIG. 3), etc., such as any one or all of inter prediction parameters (e.g., reference picture index and motion vector), intra prediction parameters (e.g., intra prediction mode or index), transform parameters, quantization parameters, loop filter parameters, and / or other syntax elements. The entropy decoding unit 304 can be used to apply the decoding algorithm or scheme corresponding to the encoding scheme of the entropy encoding unit 270 of the encoder 20. The entropy decoding unit 304 can also be used to provide inter prediction parameters, intra prediction parameters, and / or other syntax elements to the mode application unit 360, and provide other parameters to other units of the decoder 30. The video decoder 30 can receive video slice and / or video block-level syntax elements. Additionally, or as an alternative to the slice and corresponding syntax elements, coded block groups and / or coded blocks and corresponding syntax elements can be received or used. Inverse quantization The inverse quantization unit 310 can be used to receive a quantization parameter (quantization parameter, QP) (or generally information related to inverse quantization) and quantization coefficients from the encoded picture data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304), and inverse-quantize the decoded quantization coefficients 309 based on the above quantization parameter to obtain inverse quantization coefficients 311, and the inverse quantization coefficients 311 can also be referred to as transform coefficients 311. The inverse quantization process can include using the quantization parameter calculated by the video encoder 20 for each video block in the video slice to determine the quantization degree, and also determine the degree of inverse quantization that needs to be performed. Inverse transform The inverse transform processing unit 312 can be used to receive the dequantized coefficients 311, also known as transform coefficients 311, and apply a transform to the dequantized coefficients 311 to obtain a reconstructed residual block 213 in the pixel domain. The reconstructed residual block 213 can also be referred to as a transform block 313. The transform can be an inverse transform, such as an inverse DCT, an inverse DST, an inverse integer transform, or a conceptually similar inverse transform process. The inverse transform processing unit 312 can also be used to receive transform parameters or corresponding information from the encoded image data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304) to determine the transform to be applied to the dequantized coefficients 311. Reconstruction The reconstruction unit 314 (e.g., the adder 314) is used to add the reconstructed residual block 313 to the prediction block 365 to obtain a reconstructed block 315 in the pixel domain. For example, the pixel point values of the reconstructed residual block 313 and the pixel point values of the prediction block 365 are added. Filtering The loop filter unit 320 (in or after the encoding loop) is used to filter the reconstructed block 315 to obtain a filtered block 321, so as to smoothly perform pixel conversion or improve video quality, etc. The loop filter unit 320 can include one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or one or more other filters, such as an adaptive loop filter (ALF), a noise suppression filter (NSF), or any combination. For example, the loop filter unit 220 can include a deblocking filter, an SAO filter, and an ALF filter. The order of the filtering process can be a deblocking filter, an SAO filter, and an ALF filter. For another example, a process called luma mapping with chroma scaling (LMCS) (i.e., an adaptive in-loop shaper) is added. This process is performed before deblocking. For another example, the deblocking filtering process can also be applied to internal sub-block edges, such as affine sub-block edges, ATMVP sub-block edges, sub-block transform (SBT) edges, and intra sub-partition (ISP) edges. Although the loop filter unit 320 is shown as a loop filter in FIG. 3, in other configurations, the loop filter unit 320 can be implemented as a post-loop filter. Decoded image buffer Subsequently, the decoded video blocks 321 in an image are stored in the decoded image buffer 330. The decoded image buffer 330 stores the decoded image 331 as a reference image, and the reference image is used for subsequent motion compensation of other images and / or output for display respectively. The decoder 30 is used to output the decoded image 311 through the output terminal 312, etc., to display it to the user or for the user to view it. predict The inter-frame prediction unit 344 may be functionally the same as the inter-frame prediction unit 244 (particularly the motion compensation unit), and the intra-frame prediction unit 354 may be functionally the same as the inter-frame prediction unit 254, and may determine the division or segmentation and perform prediction based on the segmentation and / or prediction parameters or corresponding information received from the coded image data 21 (e.g., parsed and / or decoded by the entropy decoding unit 304). The mode application unit 360 may be used to perform prediction (intra-frame or inter-frame prediction) of each block according to the reconstructed image, block or corresponding pixel point (filtered or unfiltered), and obtain a prediction block 365. When the video slice is encoded as an intra-coded (I) slice, the intra-prediction unit 354 in the mode application unit 360 is used to generate a prediction block 365 for the image block of the current video slice based on the indicated intra-prediction mode and data from a previously decoded block of the current image. When the video image is encoded as an inter-coded (i.e., B or P) slice, the inter-prediction unit 344 (e.g., motion compensation) in the mode application unit 360 is used to generate a prediction block 365 for the image block of the current video slice based on the indicated intra-prediction mode and data from a previously decoded block of the current image. The video decoder 300 may be used to generate a prediction block 365 for a video block of the current video slice based on the motion vectors and other syntax elements received from the entropy decoding unit 304. For inter-frame prediction, these prediction blocks may be generated from one of the reference images in one of the reference image lists. The video decoder 30 may construct reference frame list 0 and list 1 using a default construction technique based on the reference images stored in the DPB 330. In addition to slices (e.g., video slices) or as an alternative to slices, the same or similar process may be applied to embodiments of coding block groups (e.g., video coding block groups) and / or coding blocks (e.g., video coding blocks), for example, a video may be encoded using I, P, or B coding block groups and / or coding blocks. The mode application unit 360 is used to determine the prediction information for the video blocks of the current video slice by parsing the motion vectors and other syntax elements, and generate a prediction block for the current video block being decoded using the prediction information. For example, the mode application unit 360 uses some received syntax elements to determine the prediction mode (e.g., intra prediction or inter prediction) for the video blocks of the encoded video slice, the inter prediction slice type (e.g., B slice, P slice, or GPB slice), the construction information for one or more reference picture lists for the slice, the motion vectors for each inter-coded video block of the slice, the inter prediction state for each inter-coded video block of the slice, and other information to decode the video blocks within the current video slice. In addition to slices (e.g., video slices) or as an alternative to slices, the same or similar processes can be applied to embodiments of coding tree units (e.g., video coding tree units) and / or coding tree blocks (e.g., video coding tree blocks), for example, a video can be encoded using I, P, or B coding tree units and / or coding tree blocks. In one embodiment, the video encoder 30 of FIG. 3 can also be used to segment and / or decode an image using slices (also referred to as video slices), where the image can be segmented or decoded using one or more slices (usually non-overlapping). Each slice can include one or more blocks (e.g., CTUs) or one or more block groups (e.g., coding tree blocks in the H.265 / HEVC / VVC standards and tiles in the VVC standard). In one embodiment, the video decoder 30 shown in FIG. 3 can also be used to segment and / or decode an image using slices / coding tree units (also referred to as video coding tree units) and / or coding tree blocks (also referred to as video coding tree blocks), where the image can be segmented or decoded using one or more slices / coding tree units (usually non-overlapping), and each slice / coding tree unit can include one or more blocks (e.g., CTUs) or one or more coding tree blocks, etc., where each coding tree block can be in a shape such as a rectangle and can include one or more whole or partial blocks (e.g., CTUs). Other variants of the video decoder 30 can be used to decode the encoded image data 21. For example, the decoder 30 can generate an output video stream without the loop filter unit 320. For example, a non-transform-based decoder 30 can directly dequantize the residual signal without the inverse transform processing unit 312 for some blocks or frames. In another implementation, the video decoder 30 can have the dequantization unit 310 and the inverse transform processing unit 312 combined into a single unit. It should be understood that in the encoder 20 and the decoder 30, the processing result of the current step can be further processed and then output to the next step. For example, after interpolation filtering, motion vector derivation, or loop filtering, further operations such as clip or shift operations can be performed on the processing results of interpolation filtering, motion vector derivation, or loop filtering. It should be noted that further operations can be performed on the derived motion vectors of the current block (including but not limited to the control point motion vectors in the affine mode, the sub-block motion vectors in the affine, planar, and ATMVP modes, the temporal motion vectors, etc.). For example, the value of the motion vector is restricted to a predefined range according to the representation bits of the motion vector. If the representation bits of the motion vector are bitDepth, the range is from -2^(bitDepth - 1) to 2^(bitDepth - 1) - 1, where "^" represents exponentiation. For example, if bitDepth is set to 16, the range is -32768 to 32767; if bitDepth is set to 18, the range is -131072 to 131071. For example, the value of the derived motion vector (such as the MV of 4 4×4 sub-blocks in an 8×8 block) is restricted such that the maximum difference between the integer parts of the above 4 4×4 sub-block MVs does not exceed N pixels, for example, does not exceed 1 pixel. Two methods for restricting the motion vector according to bitDepth are provided here. Although the above embodiments mainly describe video coding and decoding, it should be noted that the embodiments of the decoding system 10, the encoder 20, and the decoder 30, as well as other embodiments described herein, can also be used for still image processing or coding and decoding, that is, the processing or coding and decoding of a single image independent of any previous or consecutive images in video coding and decoding. Generally, if the image processing is limited to a single image 17, the inter-frame prediction units 244 (encoder) and 344 (decoder) may not be available. All other functions (also referred to as tools or techniques) of the video encoder 20 and the video decoder 30 can equally be used for static image processing, such as residual calculation 204 / 304, transformation 206, quantization 208, dequantization 210 / 310, (inverse) transformation 212 / 312, segmentation 262 / 362, intra-frame prediction 254 / 354, and / or loop filtering 220 / 320, entropy coding 270, and entropy decoding 304. Please refer to FIG. 5. FIG. 5 is an exemplary block diagram of a video decoding device 500 provided by an embodiment of the present application. The video decoding device 500 is suitable for implementing the disclosed embodiments described herein. In one embodiment, the video decoding device 500 can be a decoder, such as the video decoder 30 in FIG. 1a, or an encoder, such as the video encoder 20 in FIG. 1a. The video decoding device 500 includes: an input port 510 (or input port 510) for receiving data and a receiver unit (Rx) 520; a processor, logic unit, or central processing unit (CPU) 530 for processing data; for example, the processor 530 here may be a neural network processor 530; a transmitter unit (Tx) 540 for transmitting data and an output port 550 (or output port 550); a memory 560 for storing data. The video decoding device 500 may further include optical-to-electrical (OE) components and electrical-to-optical (EO) components coupled to the input port 510, the receiver unit 520, the transmitter unit 540, and the output port 550 for the exit or entry of optical or electrical signals. The processor 530 is implemented by hardware and software. The processor 530 may be implemented as one or more processor chips, cores (e.g., multi-core processors), FPGAs, ASICs, and DSPs. The processor 530 communicates with the input port 510, the receiver unit 520, the transmitter unit 540, the output port 550, and the memory 560. The processor 530 includes a decoding module 570 (e.g., a neural network-based decoding module 570). The decoding module 570 implements the embodiments disclosed above. For example, the decoding module 570 performs, processes, prepares, or provides various encoding operations. Therefore, the decoding module 570 provides a substantial improvement to the functions of the video decoding device 500 and affects the switching of the video decoding device 500 to different states. Alternatively, the decoding module 570 is implemented by instructions stored in the memory 560 and executed by the processor 530. The memory 560 includes one or more disks, tape drives, and solid-state drives, and can be used as an overflow data storage device for storing such programs when a selected program is executed, and storing instructions and data read during program execution. The memory 560 may be volatile and / or non-volatile, and may be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and / or static random-access memory (SRAM). Please refer to FIG. 6. FIG. 6 is an exemplary block diagram of a device 600 provided by an embodiment of the present application. The device 600 may be used as either or both of the source device 12 and the destination device 14 in FIG. 1a. The processor 602 in the device 600 may be a central processing unit. Alternatively, the processor 602 may be any other type of device or devices, existing or to be developed in the future, capable of manipulating or processing information. Although a single processor such as the processor 602 shown in the figure may be used to implement the disclosed implementations, using more than one processor is faster and more efficient. In one implementation, the memory 604 in the device 600 may be a read-only memory (ROM) device or a random access memory (RAM) device. Any other suitable type of storage device may be used as the memory 604. The memory 604 may include code and data 606 that the processor 602 accesses via the bus 612. The memory 604 may also include an operating system 608 and application programs 610, and the application programs 610 include at least one program that allows the processor 602 to execute the methods described above herein. For example, the application programs 610 may include applications 1 to N, and also include a video decoding application that executes the methods described above herein. The device 600 may also include one or more output devices, such as a display 618. In one example, the display 618 may be a touch-sensitive display that combines a display with a touch-sensitive element that can be used to sense touch inputs. The display 618 may be coupled to the processor 602 via the bus 612. Although the bus 612 in the device 600 is described herein as a single bus, the bus 612 may include multiple buses. In addition, the auxiliary storage may be directly coupled to other components of the device 600 or accessed via a network, and may include a single integrated unit such as a memory card or multiple units such as multiple memory cards. Therefore, the device 600 may have a variety of configurations. Combined with the above content, during the encoding and decoding process, adaptive correction filtering is involved in the image, where the unit of the adaptive correction filtering is an adaptive correction filtering unit derived from the largest coding unit (LCU). In one implementation, first determine the current largest coding unit, and derive the adaptive correction filtering unit from the current largest coding unit according to the following steps: S1. Delete the part of the sample area where the current largest coding unit is located that exceeds the image boundary to obtain the sample area D. S2. If the sample where the lower boundary of the area D is located does not belong to the lower boundary of the image, contract the lower boundary of the luminance component and chrominance component sample area D upward by four rows to obtain the area E1; otherwise, let E1 be equal to D. It can be understood that the last row of samples of the image is the lower boundary of the image, and the last row of samples of the area D is the lower boundary of the area D. S3. If the sample on the upper boundary of region E1 belongs to the upper boundary of the image or belongs to the slice boundary and the value of CplfEnableFlag (cross-slice loop filter enable flag) is 0 (i.e., cross-slice filtering is not allowed), let E2 be equal to E1; otherwise, extend the upper boundary of the luminance component and chrominance component sample region E1 upward by four rows to obtain region E2. It can be understood that the first row of samples of the image is the upper boundary of the image, and the first row of samples of region E1 is the upper boundary of region E1. S4. Use region E2 as the current adaptive correction filtering unit. Exemplarily, the adaptive correction filtering unit can be a region where the upper boundary of the LCU is translated upward by a preset number of pixel counts, and the lower boundary of the LCU is translated upward by a preset number of pixel counts. From the determination process of the above adaptive correction filtering unit, it can be seen that the size of the adaptive correction filtering unit may be larger than the maximum coding unit size, may be smaller than the maximum coding unit size, or may be equal to the maximum coding unit size. For an LCU, after the coding end completes the adaptive correction filtering, it can carry syntax elements related to the adaptive correction filtering in the bitstream. After the decoding end parses the bitstream, it obtains the syntax elements related to the adaptive correction filtering and performs filtering processing on the reconstructed image. Among them, the syntax elements related to the adaptive correction filtering include: 1. Maximum coding unit adaptive correction filtering enable flag alf_lcu_enable_flag[compIndex][LcuIndex] Binary variable. A value of '1' indicates that the samples of the compIndex component of the LcuIndex-th maximum coding unit should use adaptive correction filtering; a value of '0' indicates that the samples of the compIndex component of the LcuIndex-th maximum coding unit should not use adaptive correction filtering. The value of AlfLcuEnableFlag[compIndex][LcuIndex] is equal to the value of alf_lcu_enable_flag[compIndex][LcuIndex] (the flag bit carried in the bitstream). 2. Cross-slice loop filter enable flag cross_patch_loop_filter_enable_flag Binary variable. When the value is '1', it indicates that deblocking filtering, sample offset compensation, and adaptive correction filtering can be performed across slice boundaries; when the value is '0', it indicates that deblocking filtering, sample offset compensation, and adaptive correction filtering should not be performed across slice boundaries. The value of CplfEnableFlag is equal to the value of cross_patch_loop_filter_enable_flag (this flag bit carried in the bitstream). 3. Enhanced Adaptive Correction Filter Enable Flag ealf_enable_flag Binary variable. When the value is '1', it indicates that enhanced adaptive correction filtering should be used; when the value is '0', it indicates that enhanced adaptive correction filtering should not be used. The value of EalfEnableFlag is equal to the value of ealf_enable_flag. If ealf_enable_flag does not exist in the bitstream, the value of EalfEnableFlag is 0. It should be understood that in the case where adaptive correction filtering needs to be performed on the current coding unit (which can be an LCU), for each sample (which can be understood as a pixel or a pixel point) in the current coding unit (an LCU), according to the preset adaptive correction filtering coefficient (which can be understood as the template used for filtering), the pixels (or samples) required for filtering the pixel to be filtered (or the sample to be filtered) are determined, and then the sample to be filtered is filtered according to the required samples, that is, the filtered sample corresponding to the sample to be filtered is determined. Optionally, the adaptive correction filtering coefficient can include the 7×7 cross plus 3×3 square shown in FIG. 7, and the filtering coefficient of 7×7 cross plus 5×5 square shown in FIG. 8. For FIG. 7, the sample to be filtered is C8, and the other samples are the samples used for filtering C8, that is, the filtered sample of C8 is determined according to the other samples. For FIG. 8, the sample to be filtered is C14, and the other samples are the samples used for filtering C8. In the embodiments of the present application, referring to the description of the structure and encoding process of the encoder shown in FIG. 2, when encoding the reconstructed samples (the reconstructed samples can form a reconstructed block or a reconstructed coding unit), it is necessary to consider whether to perform adaptive correction filtering. Referring to the description of the structure and decoding process of the decoder shown in FIG. 3, after decoding the reconstructed samples (the reconstructed samples can form a reconstructed block or a reconstructed coding unit), it is necessary to determine whether adaptive correction filtering is required according to the syntax elements related to adaptive correction filtering parsed from the bitstream (such as alf_lcu_enable_flag[compIndex][LcuIndex], etc.). In some implementation manners, when the value of ealf_enable_flag (enhanced adaptive correction filtering enable flag) is 0 (i.e., enhanced adaptive correction filtering is not used), the adaptive correction filtering coefficients are the filtering coefficients of the 7×7 cross plus 3×3 square shown in FIG. 7. When the value of ealf_enable_flag is 1 (i.e., enhanced high adaptive correction filtering is used), the adaptive correction filtering coefficients are the filtering coefficients of the 7×7 cross plus 5×5 square shown in FIG. 8. In the following embodiments, the processes of encoding a coding unit to obtain a reconstructed coding unit and decoding a coding unit to obtain a reconstructed coding unit are not described. Only the process of adaptive correction filtering after the coding end and the decoding end obtain the reconstructed coding unit (hereinafter all referred to as the current coding unit) is described. The image processing method provided in the embodiments of the present application can be applied to a scenario of privacy protection (or called permission protection). Privacy protection means that some content in the image is private content. It can be understood that each sample has a permission value, and the permission value is used to indicate whether the sample belongs to private content or non-private content. For example, a permission value of 1 indicates that the sample belongs to private content, and a permission value of 0 indicates that the sample belongs to non-privacy protected content. It can be understood that a coding unit corresponds to a permission value, that is, the permission values of all samples in a coding unit are the same and are the permission value of the coding unit. In consideration of privacy protection, it is necessary to determine whether to skip filtering for the pixel to be filtered (i.e., determine whether to perform filtering on the pixel to be filtered) according to the permission values of some pixels related to the pixel to be filtered (such as other pixels in the preset window where the pixel to be filtered is located). According to the above content, the unit of adaptive correction filtering is the adaptive correction filtering unit derived from the maximum coding unit. However, when the permission value of the actual sample is used to judge whether to skip filtering in the prior art, the permission value of a sample outside the adaptive correction filtering unit may be used. And if the sample is outside the image boundary, or outside the slice boundary and cross-slice filtering is not allowed, the permission value of the sample cannot be obtained. The present application proposes to use the permission value of the Padding sample of the adaptive correction filtering unit to replace the permission value of the sample outside the adaptive correction filtering unit. That is to say, the value of a certain sample in the adaptive correction filtering unit is used as the permission value of the sample outside the adaptive correction filtering unit (these samples located outside the adaptive filtering unit are the samples used to determine whether to skip filtering for the sample to be filtered). As shown in FIG. 9, the embodiments of the present application provide an image processing method, which can be used in the encoding process and also in the decoding process. The image processing method mainly relates to image adaptive filtering. This method is a method that combines single-layer privacy protection coding and adaptive correction filtering. This method includes S901-S902. S901. Determine the permission values of other pixels within a preset window where the pixel to be filtered in the current coding unit is located; if the first pixel is within the adaptive correction filtering unit corresponding to the current coding unit, obtain the permission value of the first pixel from the permission storage unit corresponding to the first pixel; if the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit, use the permission value of the pixel closest to the first pixel within the adaptive correction filtering unit as the permission value of the first pixel, or obtain the permission value of the first pixel from the permission storage unit corresponding to the first pixel. Wherein, the first pixel (or referred to as the first sample) is any one of the other pixels within the preset window where the pixel to be filtered is located. In the embodiments of the present application, the preset window where the pixel to be filtered (i.e., the sample to be filtered) is located may be a window centered on the pixel to be filtered. Exemplarily, as shown in FIG. 10, the preset window may be a 7×7 window. FIG. 11 shows a schematic diagram of the privacy area, non-privacy area, and preset window in the image. The above-mentioned first pixel being outside the adaptive correction filtering unit corresponding to the current coding unit includes: the first pixel being outside the image boundary where the current coding unit is located; or, the first pixel being outside the boundary of the slice (referring to a slice of the image) to which the pixel to be filtered belongs, and the current coding unit does not support adaptive correction filtering across the slice boundary; or, the first pixel being outside the upper boundary or lower boundary of the adaptive correction filtering unit corresponding to the current coding unit. Combined with the preset window shown in FIG. 10, if the sample to be filtered is the sample (x, y), then obtain the permission values of the samples (x+i, y+j) (where i, j = -3, -2, -1, 0, 1, 2, 3), that is, obtain the permission values of the other samples (samples other than the sample to be filtered) within the preset window. That is to say, the preset window includes the samples (x+i, y+j), where i, j = -3, -2, -1, 0, 1, 2, 3. When the sample (x+i, y+j) (where i, j = -3, -2, -1, 0, 1, 2, 3) is a sample within the adaptive correction filtering unit, directly use the permission value of the permission storage unit corresponding to the sample (x+i, y+j) as the permission value of the sample (x+i, y+j). When the sample (x+i, y+j) is not a sample within the adaptive correction filtering unit (i.e., the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit), obtain the permission value of the sample (x+i, y+j) in the following manner: a) If the sample is outside the image boundary, or outside the slice boundary and CplfEnableFlag is 0 (cross-slice filtering is not allowed), then use the permission value of the permission storage unit corresponding to the sample closest to the sample within the adaptive correction filtering unit as the permission value of the sample. b) Otherwise, if the sample is outside the upper or lower boundary of the adaptive correction filtering unit, use the authority value of the authority storage unit corresponding to the sample closest to the sample within the adaptive correction filtering unit as the authority value of the sample. c) Otherwise, directly use the authority value of the authority storage unit corresponding to the sample as the authority value of the sample. In summary, it can be known that the first pixel is within the adaptive correction filtering unit corresponding to the current coding unit, and the authority value of the first pixel can be obtained. Specifically, the authority value of the first pixel is obtained from the authority storage unit corresponding to the first pixel. The first pixel is outside the image boundary where the current coding unit is located; or, the first pixel is outside the boundary of the slice to which the pixel to be filtered belongs, and the current coding unit does not support adaptive correction filtering across the slice boundary; or, the first pixel is outside the upper or lower boundary of the adaptive correction filtering unit corresponding to the current coding unit. In these cases, the true authority value of the first pixel cannot be obtained or used. Therefore, the authority value of the pixel closest to the first pixel within the adaptive correction filtering unit is used as the authority value of the first pixel. The above cases where the first pixel is outside the adaptive correction filtering unit corresponding to the current coding unit also include other cases. For example, the first pixel is outside the adaptive filtering unit but within the image boundary, or outside the slice but supports adaptive filtering across the slice boundary, etc. In these cases, the authority value of the first pixel can be obtained, that is, the authority value of the first pixel is obtained from the authority storage unit corresponding to the first pixel. Referring to FIG. 12, taking the first row pixels of the adaptive correction filtering unit as an example, the authority values of the samples in the upper three rows of the adaptive correction filtering unit need to be obtained. However, when actually performing filtering, padding needs to be performed on the adaptive correction filtering unit (that is, using the authority value of the authority storage unit corresponding to the sample closest to the sample within the adaptive correction filtering unit as the authority value of the sample), and then filtering is performed using the padded samples. Therefore, when calculating whether the current sample (i.e., the sample to be filtered) skips filtering, the authority value of the padded sample should be used. Similarly, when at the left boundary of the slice and CplfEnableFlag is 0, the samples in the left three columns need to be obtained. At this time, padding is performed on the adaptive correction filtering unit, and then filtering is performed using the padded samples. For example, referring to FIG. 12, the sample to be filtered is P1, and the sample P0 within the preset window where it is located is a sample outside the adaptive correction filtering unit. At this time, find a sample closest to the sample P0 within the adaptive correction filtering unit. For example, the closest sample is the sample P1. Then, use the authority value of the sample P1 as the authority value of the sample P0, that is, use the sample P1 as the padding sample of the sample P0. Currently, in the prior art, the permission value of the actual sample at this position is used for judgment, without considering the slice boundary or the upper and lower boundaries of the adaptive correction filtering unit. Moreover, it is necessary to cache the permission values of the samples outside the adaptive correction filtering unit, occupying the cache. In the embodiments of the present application the permission value of the permission storage unit corresponding to the sample (the first sample) closest to this sample within the adaptive correction filtering unit is used as the permission value of this sample, and there is no need to cache the true permission value of the first sample. Moreover, in the case where it is at the left slice boundary and CplfEnableFlag is 0 or at the right slice boundary and CplfEnableFlag is 0, it is also possible to use the permission value of the permission storage unit corresponding to the sample (the first sample) closest to this sample within the adaptive correction filtering unit as the permission value of this sample, so as to determine whether the sample to be filtered needs to skip filtering based on the permission value. S902. Determine whether the pixel to be filtered needs to skip filtering based on the permission values of other pixels and the permission value of the pixel to be filtered. The above determination of whether to filter the sample to be filtered based on the permission values of other samples and the permission value of the sample to be filtered includes: if there is a pixel among other pixels whose permission value is greater than the permission value of the pixel to be filtered, it is determined that the pixel to be filtered skips filtering (that is, it is determined not to filter the pixel to be filtered); otherwise, it is determined that the pixel to be filtered needs to be filtered. If AlfLcuEnableFlag[compIndex][LcuIndex] is equal to 1, perform adaptive correction filtering on the compIndex (indicating the component index, used to indicate a component of the image) component (that is); otherwise, do not perform adaptive correction filtering. When the sample used in the adaptive correction filtering process (that is, the sample corresponding to the filtering coefficient shown in FIG. 7 or FIG. 8) is a sample within the adaptive correction filtering unit, directly use this sample for filtering; when the sample used in the adaptive correction filtering process is not a sample within the adaptive correction filtering unit, filter it in the following manner: a1) If this sample is outside the image boundary, or outside the slice boundary and CplfEnableFlag is 0 (deblocking filtering, sample offset compensation, and adaptive correction filtering should not cross the slice boundary), then use the sample closest to this sample within the adaptive correction filtering unit to replace this sample for filtering. b1) Otherwise, if this sample is outside the upper or lower boundary of the adaptive correction filtering unit, then use the sample closest to this sample within the adaptive correction filtering unit to replace this sample for filtering. c1) Otherwise, directly use this sample for filtering. If EalfEnableFlag is equal to 0 (enhanced adaptive correction filtering should not be used), if there exists a permission value of the sample (x + i, y + j) (where i, j = -3, -2, -1, 0, 1, 2, 3) that is greater than the permission value of (x, y) (where (x, y) is the coordinate of the sample to be filtered), then p'(x, y) is equal to p(x, y), where p'(x, y) is the value of the filtered sample (i.e., the pixel value), and p(x, y) represents the value of the sample before filtering. That is to say, the adaptive correction filtering for this sample is skipped (not filtered); otherwise, the sample is filtered. In the embodiment of the present application, when EalfEnableFlag is equal to 0, the filtering coefficients shown in FIG. 7 above and the corresponding samples are selected for filtering. Taking the filtering of the luminance component as an example, the adaptive correction filtering operation of the luminance component of the adaptive correction filtering unit is as follows: ptmp = AlfCoeffLuma[filterIndex][8] * p(x, y) for (j = 0; j < 8; j++) { ptmp += AlfCoeffLuma[filterIndex][j] * (p(x - Hor[j], y - Ver[j]) + p(x + Hor[j], y + Ver[j]) } ptmp = (ptmp + 32) >> 6 p'(x, y) = Clip3(0, (1 << BitDepth) – 1, ptmp) Among them, p(x, y) is the offset sample, p'(x, y) is the reconstructed sample, and Hor[j] and Ver[j] (j = 0 to 7) are shown in Table 1. The adaptive correction filtering operation of the chrominance component of the adaptive correction filtering unit is as follows: ptmp = AlfCoeffChroma[i][8] * p(x, y) for (j = 0; j < 8; j++) { ptmp += AlfCoeffChroma[i][j] * (p(x - Hor[j], y - Ver[j]) + p(x + Hor[j], y + Ver[j]) } ptmp = (ptmp + 32) >> 6 p'(x, y) = Clip3(0, (1 << BitDepth) – 1, ptmp) Among them, p(x, y) is the offset sample (i.e., the sample before filtering), p'(x, y) is the reconstructed sample (i.e., the sample after filtering), and Hor[j] and Ver[j] (j = 0 to 7) are shown in Table 1. Table 1. Coordinate offset values for sample compensation filtering If EalfEnableFlag is equal to 1 (enhanced adaptive correction filtering should be used), if there exists a permission value of the sample (x + i, y + j) (where i, j = -3, -2, -1, 0, 1, 2, 3) greater than the permission value of (x, y), then p'(x, y) is equal to p(x, y); otherwise, filter the sample. In the embodiment of the present application, when EalfEnableFlag is equal to 1, select the filtering coefficients shown in FIG. 8 above and the corresponding samples for filtering. Taking the filtering of the luminance component as an example, the adaptive correction filtering operation of the luminance component of the adaptive correction filtering unit is as follows: ptmp = AlfCoeffLuma[filterIndex]

[0014] *p(x, y) offset = 1 << (AlfLumaShift[filterIndex] - 1) for (j = 0; j < 14; j++) { ptmp += AlfCoeffLuma[filterIndex][j] * (p(x - Hor[j], y - Ver[j]) + p(x + Hor[j], y + Ver[j]) } ptmp = (ptmp + offset) >> AlfLumaShift[filterIndex] p'(x, y) = Clip3(0, (1 << BitDepth) – 1, ptmp) Among them, p(x, y) is the offset sample, p'(x, y) is the reconstructed sample, and Hor[j] and Ver[j] (j = 0 to 13) are shown in Table 2. The adaptive correction filtering operation of the chrominance component of the adaptive correction filtering unit is as follows: ptmp = AlfCoeffChroma[i]

[0014] * p(x, y) offset = 1 << (AlfChromaShift[i] - 1) for (j = 0; j < 14; j++) { ptmp += AlfCoeffChroma[i][j] * (p(x - Hor[j], y - Ver[j]) + p(x + Hor[j], y + Ver[j]) } ptmp = (ptmp + offset) >> AlfChromaShift[i] p'(x, y) = Clip3(0, (1 << BitDepth) – 1, ptmp) Among them, p(x, y) is the offset sample, p'(x, y) is the reconstructed sample, and Hor[j] and Ver[j] (j = 0 to 13) are shown in Table 2. Table 2. Coordinate offset values of sample compensation filtering Regarding the process of adaptive filtering for chrominance components, reference can be made to existing technical materials, and this application will not elaborate further. In summary, in the image processing method provided by the embodiments of this application, in a privacy protection scenario, for the pixels to be filtered in the current coding unit, it can be determined whether to skip filtering according to the permission values of other pixels within the preset window where the pixels to be filtered are located. Among them, for other samples within the adaptive correction filtering unit and other samples outside the adaptive correction filtering unit corresponding to the current coding unit, this application provides solutions for determining their permission values, which can perform adaptive filtering in combination with the user's permissions during the image encoding and decoding process. And it can save cache without caching the true permission values of other samples outside the adaptive correction filtering unit. Also, when other samples are outside the slice and cross-slice filtering is not supported, the permission values of other samples can also be estimated through this method for determining whether to skip filtering for the samples to be filtered. It can be understood that in order for the image processing device to implement the above functions, it includes the corresponding hardware and / or software modules for executing each function. Combining the algorithm steps of each example described in the embodiments disclosed in this article, the embodiments of this application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving the hardware depends on the specific application and design constraint conditions of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in combination with the embodiments, but such implementation should not be considered to exceed the scope of the embodiments of this application. In the embodiments of the present application, the image processing device may be an encoding device or a decoding device. The image processing device may divide functional modules according to the above method examples. For example, each functional module may be corresponding to each function, or two or more functions may be integrated into one processing module. The above integrated module may be implemented in the form of hardware. It should be noted that the division of modules in this embodiment is illustrative, only a logical function division, and there may be other division methods in actual implementation. In the case of dividing each functional module corresponding to each function, FIG. 13 shows a possible schematic composition diagram of the image processing device involved in the above embodiment. As shown in FIG. 13, the image processing device 1300 may include: a determination unit 1301 and a processing unit 1302. The determination unit 1301 and the processing unit 1302 cooperate to execute S901-S902 and more steps in the above method embodiment. The embodiments of the present application also provide a chip. FIG. 14 shows a schematic structural diagram of a chip 1400. The chip 1400 includes one or more processors 1401 and an interface circuit 1402. Optionally, the above chip 1400 may further include a bus 1403. The processor 1401 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above image processing method may be completed by the hardware integrated logic circuit or software-form instructions in the processor 1401. Optionally, the above processor 1401 may be a general-purpose processor, a digital signal processing (DSP) processor, an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. It can implement or execute the various methods and steps disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The interface circuit 1402 may be used for sending or receiving data, instructions, or information. The processor 1401 may utilize the data, instructions, or other information received by the interface circuit 1402 for processing, and may send the processed information through the interface circuit 1402. Optionally, the chip further includes a memory, which may include a read-only memory and a random access memory, and provides operation instructions and data to the processor. A part of the memory may further include a non-volatile random access memory (NVRAM). Optionally, the memory stores executable software modules or data structures, and the processor may execute corresponding operations by calling the operation instructions stored in the memory (the operation instructions may be stored in the operating system). Optionally, the chip may be used in the image processing apparatus involved in the embodiments of the present application. Optionally, the interface circuit 1402 may be used to output the execution result of the processor 1401. For the image processing method provided by one or more embodiments of the present application, reference may be made to the foregoing respective embodiments, which will not be elaborated herein. It should be noted that the respective functions corresponding to the processor 1401 and the interface circuit 1402 may be implemented through hardware design, may also be implemented through software design, or may be implemented in a combination of software and hardware, which is not limited herein. FIG. 15 is a schematic structural diagram of an electronic device provided by an embodiment of the present application. The electronic device 1500 may be a processor, a chip or a functional module in the processor. As shown in FIG. 15, the electronic device 1500 includes a processor 1501, a transceiver 1502, and a communication line 1503. Among them, the processor 1501 is used to execute any step in the image processing method provided by the embodiment of the present application, and during the execution of any step in the image processing method provided by the embodiment of the present application, the transceiver 1502 and the communication line 1503 may be selectively called to complete the corresponding operations. Further, the electronic device 1500 may further include a memory 1504. Among them, the processor 1501, the memory 1504, and the transceiver 1502 may be connected through the communication line 1503. Among them, the processor 1501 is a processor, a general-purpose processor, a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 1501 may also be other devices with processing functions, such as circuits, devices, or software modules, which are not limited. A transceiver 1502 for communicating with other devices or other communication networks, which may be an Ethernet, a radio access network (RAN), a wireless local area network (WLAN), etc. The transceiver 1502 may be a module, a circuit, a transceiver, or any device capable of implementing communication. The transceiver 1502 is mainly used for transmitting and receiving commands, information, etc., and may include a transmitter and a receiver for respectively transmitting and receiving commands, information, etc.; operations other than transmitting and receiving commands, information, etc. are implemented by the processor. A communication line 1503 for transmitting information between components included in the electronic device 1500. In one design, the processor can be regarded as a logic circuit and the transceiver as an interface circuit. A memory 1504 for storing instructions. Among them, the instructions may be computer programs. Among them, the memory 1504 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchlink dynamic random access memory (SLDRAM), and direct rambus random access memory (DR RAM). The memory 1504 can also be a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage media, or other magnetic storage devices, etc. It should be noted that the memory of the systems and methods described herein is intended to include but not be limited to these and any other suitable types of memory. It should be noted that the memory 1504 can exist independently of the processor 1501 or can be integrated with the processor 1501. The memory 1504 can be used to store instructions, program codes, or some data, etc. The memory 1504 can be located inside the electronic device 1500 or outside the electronic device 1500, without limitation. The processor 1501 is used to execute the instructions stored in the memory 1504 to implement the method provided in the above embodiments of the present application. In one example, the processor 1501 can include one or more processors, such as the processor 0 (CPU0) and the processor 1 (CPU1) in FIG. 15. As an alternative implementation, the electronic device 1500 includes multiple processors. For example, in addition to the processor 1501 in FIG. 15, it can also include a processor 1507. As an alternative implementation, the electronic device 1500 further includes an output device 1505 and an input device 1506. Exemplarily, the input device 1506 is a device such as a keyboard, a mouse, a microphone, or a joystick, and the output device 1505 is a device such as a display screen or a speaker. It should be noted that the electronic device 1500 may be a chip system or a device with a similar structure in FIG. 15. Among them, the chip system may be composed of chips or may include chips and other discrete devices. Actions, terms, etc. involved among the embodiments of the present application can be referred to each other without limitation. The message names or parameter names in the messages exchanged between the devices in the embodiments of the present application are only examples, and other names may also be used in specific implementations without limitation. In addition, the component structure shown in FIG. 15 does not constitute a limitation on the electronic device 1500. In addition to the components shown in FIG. 15, the electronic device 1500 may include more or fewer components than those shown in FIG. 15, or combine certain components, or have different component arrangements. The processor and transceiver described in the present application can be implemented on an integrated circuit (IC), an analog IC, a radio frequency integrated circuit, a mixed signal IC, an application specific integrated circuit (ASIC), a printed circuit board (PCB), an electronic device, etc. The processor and transceiver can also be manufactured using various IC process technologies, such as complementary metal oxide semiconductor (CMOS), N-type metal oxide semiconductor (nMOS), P-type metal oxide semiconductor (PMOS), bipolar junction transistor (BJT), BiCMOS, silicon germanium (SiGe), gallium arsenide FIG. 16 is a schematic structural diagram of an image processing apparatus provided by an embodiment of the present application. The image processing apparatus can be applied to the scenarios shown in the above method embodiments. For ease of illustration, FIG. 16 only shows the main components of the image processing apparatus, including a processor 1601, a memory 1602, a control circuit 1603, and an input / output device 1604. The processor 1601 is mainly used for processing communication protocols and communication data, executing software programs, and processing data of software programs. The memory 1602 is mainly used for storing software programs and data. The control circuit 1603 is mainly used for power supply and transmission of various electrical signals. The input / output device 1604 is mainly used for receiving data input by users and outputting data to users. When the image processing apparatus is the processor 1601, the control circuit 1603 can be a main board, the memory 1602 includes media with storage functions such as a hard disk, RAM, and ROM, the processor 1601 can include a baseband processor 1601 and a central processor. The baseband processor is mainly used for processing communication protocols and communication data, and the central processor is mainly used for controlling the entire image processing apparatus, executing software programs, and processing data of software programs. The input / output device 1604 includes a display screen, a keyboard, a mouse, etc.; the control circuit 1603 can further include or be connected to a transceiver circuit or a transceiver, for example: a network cable interface, etc., for sending or receiving data or signals, for example, for data transmission and communication with other devices. Further, an antenna can also be included for wireless signal transceiver for data / signal transmission with other devices. An embodiment of the present application also provides an image processing apparatus, the apparatus includes: at least one processor, when the at least one processor executes program codes or instructions, the related method steps are implemented to implement the image processing method in the above embodiment. Optionally, the apparatus can further include at least one memory, and the at least one memory is used for storing the program codes or instructions. An embodiment of the present application also provides a computer storage medium, in which computer instructions are stored. When the computer instructions run on the image processing apparatus, the image processing apparatus is enabled to execute the related method steps to implement the image processing method in the above embodiment. An embodiment of the present application also provides a computer program product. When the computer program product runs on a computer, the computer is enabled to execute the related steps to implement the image processing method in the above embodiment. An embodiment of the present application further provides an image processing device, which may specifically be a chip, integrated circuit, component, or module. Specifically, the device may include a processor connected to a memory for storing instructions, or the device includes at least one processor for obtaining instructions from an external memory. When the device runs, the processor may execute the instructions to cause the chip to execute the image processing methods in the above method embodiments. In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using a software program, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the processes or functions in the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wirelessly (such as infrared, wireless, microwave, etc.). The computer-readable storage medium may be any available medium that the computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium (such as a floppy disk, magnetic disk, magnetic tape), an optical medium (such as a digital video disc (DVD)), or a semiconductor medium (such as a solid state drive (SSD)), etc. Through the description of the above embodiments, those skilled in the art can clearly understand that for the convenience and brevity of description, only the above division of each functional module is used as an example. In actual applications, the above functions may be allocated to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working processes of the above-described system, device, and unit may refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein. In several embodiments provided by this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections between each other can be through some interfaces, and the indirect couplings or communication connections of the devices or units can be in electrical, mechanical, or other forms. The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment. In addition, in each embodiment of this application, the functional units can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units. If the above-mentioned integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the methods described in each embodiment of this application. And the aforementioned storage medium includes: flash memory, mobile hard disk, read-only memory, random access memory, magnetic disk, or optical disk and other various media that can store program codes. As described above, it is only the specific implementation manner of this application, but the protection scope of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be covered by the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

1. An image processing method, characterized in that, Including: Determine the weight values of other samples within a preset window where the sample to be filtered in the current coding unit is located; wherein, if the first sample is within the adaptive correction filtering unit corresponding to the current coding unit, obtain the weight value of the first sample from the weight storage unit corresponding to the first sample; if the first sample is outside the adaptive correction filtering unit corresponding to the current coding unit, use the weight value of the sample closest to the first sample within the adaptive correction filtering unit as the weight value of the first sample, or obtain the weight value of the first sample from the weight storage unit corresponding to the first sample; the first sample is any one of the other samples; Based on the weight values of the other samples and the weight value of the sample to be filtered, determine whether to skip filtering for the sample to be filtered.

2. The method according to claim 1, wherein The determining whether to skip filtering for the sample to be filtered based on the weight values of the other samples and the weight value of the sample to be filtered includes: If there is a sample among the other samples whose weight value is greater than the weight value of the sample to be filtered, determine to skip filtering for the sample to be filtered; otherwise, determine that filtering is required for the sample to be filtered.

3. The method according to claim 1 or 2, characterized in that, The first sample being outside the adaptive correction filtering unit corresponding to the current coding unit includes: The first sample is outside the image boundary where the current coding unit is located; or, The first sample is outside the boundary of the slice to which the sample to be filtered belongs, and the current coding unit does not support adaptive correction filtering across slice boundaries; or, The first sample is outside the upper boundary or the lower boundary of the adaptive correction filtering unit corresponding to the current coding unit.

4. The method according to any one of claims 1 to 3, wherein The preset window includes samples (x + i, y + j); wherein, (x, y) represents the sample to be filtered; i, j = -3, -2, -1, 0, 1, 2, 3.

5. An image processing apparatus, comprising at least one processor and a memory, characterized in that, The at least one processor executes the program or instructions stored in the memory, so that the image processing device implements the method according to any one of claims 1 to 4.

6. A computer-readable storage medium for storing a computer program, characterized in that, When the computer program runs on a computer or a processor, the computer or the processor implements the method according to any one of claims 1 to 4.

7. A computer program product, the computer program product comprising instructions, characterized in that, When the instruction runs on a computer or a processor, the computer or the processor implements the method according to any one of claims 1 to 4.

8. A chip, comprising at least one processor and a memory, characterized in that, The at least one processor executes the program or instructions stored in the memory, so that the chip implements the method according to any one of claims 1 to 4.

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