Radar sensor assembly, method, computer program product

Abstract

The invention relates to a radar sensor assembly (10) for capturing an environment, comprising: - an input interface (110), which is designed for receiving an input signal (1), - a digital-analogue sequencer (120), which is designed to sequence the input signal (1) to form a digital transmission signal (2), - an analogue-digital sequencer (140), which is designed to sequence the digital radar echo signal (6) to form a digital output signal (7), and - an output interface (150), which is designed to emit the digital output signal (7), wherein at least the input interface (110), the digital-analogue sequencer (120), the analogue-digital sequencer (140) and the output interface (150) are provided by a single field-programmable gate array (100). The invention further relates to a method, to a computer program product and to a computer-readable storage medium.

Description

[0001] Radar sensor assembly, method, computer program product

[0002] The invention relates to a radar sensor assembly, a method for operating a sensor assembly, a computer program product and a computer-readable storage medium.

[0003] Radar technology plays an indispensable role in the precise detection and interpretation of environmental data. Especially in combination with assistance systems, radar sensors enable reliable 360-degree detection of the vehicle's surroundings, thus significantly improving road safety. The same applies to the use of radar sensors in traffic safety technology, where they are used in stationary and mobile traffic safety systems.

[0004] This places diverse demands on the development, production, and field deployment of radar sensors. These requirements necessitate the design of complex signal path architectures.

[0005] It is therefore an object of the present invention to cover as many of these requirements as possible. In particular, the object of the invention is to provide a radar sensor assembly, a method for operating a radar sensor assembly, a computer-implemented method, and a computer-readable storage medium that enables, in particular, the efficient manufacture and reliable operation of a radar sensor assembly.

[0006] The above object is achieved by a radar sensor assembly, by a method, by a computer program product, and by a computer-readable storage medium. Further features and details of the invention emerge from the subclaims, the description, and the drawings. Features and details described in connection with the radar sensor assembly according to the invention naturally also apply in connection with the method according to the invention and / or in connection with the computer program product according to the invention and / or in connection with the computer-readable storage medium according to the invention, and vice versa, so that with regard to the disclosure of the individual aspects of the invention, reference is always made to each other. According to the invention, a radar sensor assembly for detecting an environment is provided, comprising:

[0007] - an input interface designed to receive an input signal,

[0008] - a digital-analog sequencer designed to sequence the input signal into a digital transmission signal,

[0009] - a digital-analog converter designed to convert the digital transmission signal into an analog transmission signal,

[0010] - a radar front end designed to transmit a radar signal corresponding to the analogue transmission signal into the environment and to receive an analogue radar echo signal,

[0011] - an analog-digital converter designed to convert the analog radar echo signal into a digital radar echo signal,

[0012] - an analog-digital sequencer designed to sequence the digital radar echo signal into a digital output signal, and

[0013] - an output interface configured to emit the digital output signal, wherein at least the input interface, the digital-analog sequencer, the analog-digital sequencer and the output interface are provided by a single field programmable gate array.

[0014] In other words, a device is provided for sensing information from an environment, in particular a vehicle, which device has at least one input for accepting input information, a DA sequencer for transmitting the input information into transmission information, a DA converter for converting the transmission information into analog information, a radar transceiver for transmitting radar radiation corresponding to the analog information and receiving the echo caused by the radar radiation in the environment, an AD converter for converting the echo into digital radar echo information, an AD sequencer for transmitting the digital radar echo information into digital output information, and an output for transmitting the digital output information, wherein at least the input, the DA sequencer, the AD sequencer, and the output are provided by a single field programmable gate array.

[0015] A radar sensor assembly can be understood as a group of elements that are intended to be joined together to form a functional unit. It can be provided that the components of the radar sensor assembly are arranged in a housing. Alternatively or additionally, it can also be provided that at least one component, in particular those components that are not arranged on the field programmable gate array (also called FPGA), is / are arranged at a distance from it in the assembly. In particular, the radar front end can thus be arranged flexibly for detecting the environment, in particular on a vehicle and / or in a mobile or stationary traffic safety system. The radar sensor assembly can be understood as part of a radar sensor. The radar sensor can comprise further devices, in particular at least one processor, a main memory or a network interface.The processor can be designed to evaluate the radar echo signal, in particular to process it into an output signal. Alternatively or additionally, the output signal can be at least partially evaluated in the field-programmable gate array. The processor can also be designed to provide an input signal. The evaluation can include converting the radio echo signal into environmental information. The main memory of a radar sensor can be understood as a central memory area designed for the intermediate storage of data and can be connected to the processor, in particular, via a fast data bus and / or a specific interface.

[0016] Detection of the environment can include object detection. Objects can be, in particular, vehicles, pedestrians, bicycles, and other obstacles in the environment, in particular the environment of a vehicle and / or a mobile or stationary traffic safety system. Furthermore, detection of the environment can also include distance measurement and / or angle measurement. In other words, the measurement of a distance and / or an angle to an object can be provided. Detection of the environment can also include a measurement of at least one speed. Furthermore, it can be provided that the detection is implemented as an all-round detection (in particular 360°) of the environment. The detection of the environment can serve as input data for an assistance system of a vehicle and / or a mobile or stationary traffic safety system.

[0017] An input interface can be understood as a point that enables the reception of external data, signals, or information. The input interface can be implemented at least partially as software, in particular as a configuration, particularly running on the field-programmable gate array. The input interface can be configured to receive data from a processor. The processor can be part of a radar sensor that includes the radar sensor assembly.

[0018] The digital-analog sequencer is designed to sequence the input signal into a digital transmission signal. In other words, the input signal is converted into a transmission signal, which is specific to the radar frontend. The transmission signal can be adapted to the radar frontend. The digital-analog sequencer can be implemented at least partially as software, in particular as a configuration, in particular running on the field-programmable gate array. Multiple digital-analog sequencers can operate in parallel.

[0019] A digital-to-analog converter (DAC) can be understood as an electronic device or circuit that converts digital signals into analog signals. The conversion can involve converting a digital value into a corresponding analog voltage or current. The digital-to-analog converter can be implemented as a circuit, particularly as an integrated circuit (IC). Multiple digital-to-analog converters, particularly connected in parallel, can be provided to convert even complex digital transmission signals into corresponding analog transmission signals.

[0020] The radar front end is designed to transmit a radar signal into the environment corresponding to the analog transmission signal and to receive an analog radar echo signal. For this purpose, at least one antenna can be provided on the radar front end to emit and / or absorb electromagnetic radiation. Furthermore, a separate receiving and transmitting antenna can be provided.

[0021] An analog-to-digital converter (ADC) can be understood as an electronic device or circuit that converts analog signals into digital signals. The conversion can involve converting an analog voltage into a corresponding digital value. The analog-to-digital converter can be embodied as a circuit, in particular as an IC. Provision can be made for multiple analog-to-digital converters, in particular connected in parallel, to be provided in order to convert even complex analog radar echo signals into corresponding digital radar echo signals. The analog-to-digital sequencer is designed to sequence the digital radar echo signal into a digital output signal. In other words, the digital radar echo signal is converted into an output signal in which environmental information contained in the echo signal is processed, in particular temporally.It may be provided that the digital-analog sequencer is implemented at least partially as software, in particular as a configuration, in particular continuously on the field-programmable gate array. It may be provided that several analog-digital sequencers operate in parallel.

[0022] The output interface can be understood as a point that enables the transmission of data, signals, or information, in particular the output signal. The output interface can be implemented at least partially as software, in particular as a configuration, in particular running on the field-programmable gate array. The output interface can be designed to transmit data to the radar sensor's processor.

[0023] A field programmable gate array can be understood as an integrated circuit (IC) designed to load a logic circuit as data and behave according to the logic of the circuit data. The field programmable gate array can be implemented as a single chip. Providing the input interface, the digital-analog sequencer, the analog-digital sequencer, the output interface, and any other components can be understood as a configuration file for the field programmable gate array containing specifications for interconnecting the logic of the field programmable gate array such that the switching logic of these components is mapped by the field programmable gate array.

[0024] Overall, the radar sensor assembly according to the invention offers the advantage of versatile use in development, production, and in the field, in particular because it supports the development process, can be manufactured with quality assurance, and can be operated reliably. The described design results in a three-stage signal path architecture. The FGPA provides at least the input interface, the digital-analog sequencer, the analog-digital sequencer, and the output interface, and processes exclusively digital signals. The digital-analog converters and analog-digital converters form the interface to the analog radar frontend. This results in three circuit complexes: The first corresponds to the digital logic and is implemented in the field-programmable gate array. The second complex represents the analog and mixed-signal chain of the radar sensor assembly. The third complex is the radar frontend.The routing of the analog and digital signals through the complexes is digitally configurable, particularly in the field-programmable gate array. This three-stage design allows the radar sensor assembly to operate in a variety of operating and test modes, some of which are described below. This supports the development process, ensures quality control during manufacturing, and consistently ensures reliable operation in the field.

[0025] Within the scope of the invention, it can be provided that a delay device is provided which is designed to receive the digital transmission signal and transmit it to the analog-digital sequencer and / or to start the conversion of the analog radar echo signal into the digital radar echo signal at the analog-digital converter by sending a start command. Furthermore, it can be provided that the delay device waits for a predetermined delay period (also called a delay) before forwarding and / or during starting. The delay period can be designed to establish temporal synchronization, in particular between the analog-digital converter and the analog-digital sequencer. This has the advantage that each sample of the analog or synthetic radar echo signal is assigned exactly the correct received sample of the digital radar echo signal. This simplifies its further processing.

[0026] Furthermore, it can be provided that the delay device is provided by the single field programmable gate array. This offers the advantage that, in particular, the connection to the analog-digital sequencer can be made directly and virtually without delay, so that undesirable delays can be reliably avoided. It can be provided that the delay element receives signals from the digital-analog sequencer and forwards them to the analog-digital sequencer and / or the start signal to the analog-digital converter, in particular after a delay period. The delay device can also be designed so that indices of a sequence of samples of the digital transmission signal exactly coincide with corresponding indices of the sequence of the analog and / or digital radar echo signal. In the main memory of the processor, modulation values ​​and associated receive samples are then located on the same indices for further processing.

[0027] Within the scope of the invention, it is conceivable to provide a multiplexer designed to forward the analog radar echo signal and its phase information or the analog transmission signal of the digital-to-analog converter. It can further be provided that these signals are forwarded to the analog-to-digital converter and / or to a preamplifier connected upstream of the analog-to-digital converter. The multiplexer can be designed to select either the analog radar echo signal or the analog transmission signal and connect it to the output of the multiplexer. Several multiplexers can also be operated in parallel. The provision of a multiplexer offers the advantage that the entire signal processing can be tested and potential errors can thus be detected. The multiplexer can be designed as a separate electrical circuit, in particular as an IC, and / or separate from the field-programmable gate array.

[0028] Within the scope of the invention, it can be provided that at least the digital-analog converter or the analog-digital converter are implemented as independent electrical components or as part of a digital-analog module. In other words, it can be provided that the aforementioned components are not provided by the field-programmable gate array.

[0029] It is also conceivable to provide a preamplifier designed to amplify the analog radar echo signal and forward it to the analog-to-digital converter. The preamplifier can be designed to amplify the analog radar echo signal such that, after amplification, it lies within the operating range of the analog-to-digital converter. This provides the advantage that the signal quality of the digital radar echo signal provided by the analog-to-digital converter is particularly high, and the signal is not clipped or noisy.

[0030] It is also conceivable that the digital-to-analog converter is further designed to send synthetic analog radar echo signals to the analog-to-digital converter, particularly in analog simulation mode. In other words, the radar front-end can be decoupled from the signal path and its operation simulated. This creates the possibility of testing the functionality of the first two complexes separately from the radar front-end. Analog simulation mode can be used, for example, during production before connection to the radar front-end. This allows faulty components to be identified and either repaired or replaced. However, analog simulation mode can also be used in the field and / or during error analysis to narrow down the cause of a malfunction.For this purpose, it can be provided that an environment, in particular a street scene, is digitally calculated in the field programmable gate array and / or an external processor and fed to the input interface as an input signal. Furthermore, it can be provided that the digital-to-analog converter outputs pre-calculated analog radar echo signals (i.e., synthetic received samples). The pre-calculated analog radar echo signals can then be fed to the analog-to-digital converter via the multiplexer and / or the preamplifier. It can be provided that the delay element specifies the correct time for the analog-to-digital converter to digitize. The output signal output by the output interface can then be read in by a processor. The pre-calculated analog radar echo signals are thereby fed to the measurement algorithm.

[0031] Within the scope of the invention, it is optionally possible for the field programmable gate array to be designed, particularly in digital simulation mode, to process the input signal exclusively within the field programmable gate array to produce a digital output signal. In other words, the field programmable gate array can enable bypass mode in which the signals are forwarded and processed only within the field programmable gate array, and the behavior of components separate from the field programmable gate array is simulated. In this case, it can be provided that an environment, particularly a street scene, is digitally calculated, particularly by a processor and / or the field programmable gate array, and is output, particularly exclusively via the components provided by the field programmable gate array.Consequently, all calculated samples are output purely digitally and with bit precision to the output section, bypassing the digital-to-analog converter and analog-to-digital converter, and are read back into the processor. This way, the synthetic receive samples are fed back into the measurement algorithm. This mode can be used particularly advantageously during algorithm development, in production, and at a later stage to identify faulty field-programmable gate arrays and either replace or repair them.

[0032] Furthermore, it can be provided within the scope of the invention that a network interface is designed, in particular in a playback mode, to feed in a synthetic and / or recorded radar echo signal, which can be transmitted in analog form via the digital-to-analog converter to the analog-to-digital converter or processed digitally, in particular exclusively, within the field programmable gate array to form a digital output signal. In other words, the network interface can feed a recorded or synthetic environment, in particular a street scene, into the input interface of the FPGA via the main memory of the radar sensor and reproduce it in analog or digital form in a time-correct manner via the signal paths of the measurement algorithm. It can be provided that the output signal can be read out via the network interface in addition to the output interface.In this way, the functionality of other devices, especially those downstream of the radar front end, can be checked.

[0033] With regard to the present invention, it is conceivable that the field programmable gate array is further designed, in particular in a signal test operation, to impress an input signal implemented as a test function onto the digital-analog converter via the input interface, to forward it to the analog-digital converter and to extract an output signal implemented as a result function via the output interface.

[0034] Fast Fourier transforms (FFTs) and / or linear regressions can be applied to the measured value sequence at the output of the analog-to-digital converter. The FFTs are used to determine noise levels in the analog chains and their signals. Noise ratios, electrostatic discharge (ESD) damage in semiconductors, and nonlinearities in operational amplifiers, as well as defective resistors, capacitors, and signal path interruptions, can be determined or detected in this way. Linear regression makes it possible to compare digital-to-digital converters with analog-to-digital converters. The residual values ​​of the linear regression make it possible to quantify the comparison result. Defective and / or cracked capacitors in the signal paths can also be largely identified in this way, as they typically exhibit glitches in their measured voltage values ​​due to capacitance jumps in the event of a fault.In this case, the residuals of the linear regressions show values ​​that deviate from the normal case.

[0035] The above object is further achieved by a method according to the invention for operating a radar sensor assembly for detecting an environment, in particular a radar sensor assembly according to the invention, wherein in a measuring operation

[0036] - an input interface receives an input signal,

[0037] - a digital analog sequencer sequences the input signal into a digital transmission signal,

[0038] - a digital-analog converter converts the digital transmission signal into an analog transmission signal,

[0039] - a radar front end transmits a radar signal into the environment according to the analogue transmission signal and receives an analogue radar echo signal, - an analogue-digital converter converts the analogue radar echo signal into a digital radar echo signal,

[0040] - an analog-digital sequencer sequences the digital radar echo signal into a digital output signal, and

[0041] - an output interface emits the digital output signal, wherein at least the input interface, the digital-analog sequencer, the analog-digital sequencer and the output interface are provided by a single field programmable gate array, and at least one further operating mode, in particular at least one analog simulation mode, a digital simulation mode, a playback mode or a signal test mode, is provided for testing at least one component of the radar sensor assembly.

[0042] The method can be implemented as a computer-implemented method.

[0043] The method steps can be performed at least partially simultaneously and / or sequentially, whereby the sequence of the method steps is not limited by the specified order, so that individual steps can be performed in different orders. Furthermore, individual or all steps can be performed repeatedly.

[0044] This results in the same advantages with regard to a method according to the invention as have already been described with regard to a radar sensor assembly according to the invention.

[0045] Furthermore, it is conceivable that in analog simulation mode, the digital-to-analog converter sends synthetic analog radar echo signals to the analog-to-digital converter. Analog simulation mode can be used, for example, during production before connection to the radar frontend. This allows faulty components to be identified and either repaired or replaced. However, analog simulation mode can also be used in the field and / or during error analysis to narrow down the cause of a malfunction. For this purpose, it can be provided that an environment, in particular a street scene, is digitally calculated in the field programmable gate array and / or an external processor and fed into the input interface as an input signal. Furthermore, it can be provided that the digital-to-analog converter outputs pre-calculated analog radar echo signals (i.e., synthetic receive samples).The precalculated analog radar echo signals can then be fed to the analog-to-digital converter via the multiplexer and / or the preamplifier. The delay element can be configured to specify the correct time for the analog-to-digital converter to digitize. The output signal from the output interface can then be read by a processor. This feeds the precalculated analog radar echo signals into the measurement algorithm.

[0046] Within the scope of the invention, it can be advantageous that, in digital simulation mode, the input signal is processed exclusively within the field programmable gate array to produce a digital output signal. In other words, the field programmable gate array can enable bypass mode in which the signals are forwarded and processed only within the field programmable gate array, and the behavior of components separate from the field programmable gate array is simulated. In this case, it can be provided that, in particular, an environment, in particular a street scene, is digitally calculated by a processor and / or the field programmable gate array and output, in particular exclusively, via the components provided by the field programmable gate array.Consequently, all calculated samples are output purely digitally and with bit precision to the output section, bypassing the digital-to-analog converter and analog-to-digital converter, and are read back into the processor. This allows the synthetic receive samples to be fed back into the measurement algorithm. This operating mode allows the field programmable gate array, in particular, to be tested for correct functionality. This mode can be used particularly advantageously during the development of the measurement algorithm, in production, but also at a later date to identify faulty field programmable gate arrays and either replace or repair them.

[0047] Within the scope of the invention, it is conceivable that, in a playback mode, a synthetic and / or recorded analog radar echo signal is fed via a network interface, impressed on the digital-to-analog converter, and forwarded to the analog-to-digital converter, or digitally processed, in particular exclusively, within the field programmable gate array to produce a digital output signal. In other words, the network interface can fill the radar sensor's main memory with a recorded or synthetic environment, in particular a street scene. From there, it can be fed into the input interface of the FPGA and reproduced in analog and / or digital form in a time-accurate manner through the signal paths, output to the output interface, and finally fed to the measurement algorithm.In addition to the output interface, the output signal can also be read via the network interface via the radar sensor's main memory. This allows the functionality of other devices, particularly those downstream of the radar front end, to be checked.

[0048] Within the scope of the invention, it can be provided that, during signal test operation, the field programmable gate array applies an input signal implemented as a test function to the digital-to-analog converter via the input interface, forwards it to the analog-to-digital converter, and retrieves it again via the output interface as an output signal implemented as a result function. Fast Fourier transforms (FFTs) and / or linear regressions can be applied to the measured value sequence at the output of the analog-to-digital converter. The FFTs are used to determine noise levels in the analog chains and their signals. Noise ratios, electrostatic discharge damage (ESD damage) in semiconductors, and nonlinearities in operational amplifiers, defective resistors, capacitors, and signal path interruptions can thus be detected. Linear regression makes it possible to compare digital-to-analog converters with analog-to-digital converters.The residual values ​​of the linear regression allow the comparison result to be quantified. Defective or cracked capacitors in the signal paths can also be largely identified this way, because in the event of a fault, glitches in the measured voltage values ​​typically occur due to capacitance jumps. In this case, the residuals of the linear regressions show values ​​that deviate from the normal case.

[0049] The above object is further achieved by a computer program product according to the invention, comprising instructions which, when the program is executed by a computer, in particular by a radar sensor assembly according to the invention, cause the computer to carry out a method according to the invention.

[0050] This results in the same advantages with regard to a computer program product according to the invention as have already been described with regard to a radar sensor assembly according to the invention and / or a method according to the invention.

[0051] The above object is further achieved by a computer-readable storage medium comprising instructions which, when executed by a computer, in particular by a radar sensor assembly according to the invention, cause the computer to execute a method according to the invention. Thus, with respect to a computer-readable storage medium according to the invention, the same advantages arise as have already been described with respect to a radar sensor assembly according to the invention and / or a method according to the invention and / or a computer program product according to the invention.

[0052] Further advantages, features, and details of the invention will become apparent from the following description, in which several embodiments of the invention are described in detail with reference to the drawings. The features mentioned in the claims and in the description may be essential to the invention individually or in any combination.

[0053] Fig. 1 a radar sensor assembly in a measuring mode,

[0054] Fig. 2 a radar sensor assembly in an analog simulation mode, and

[0055] Fig. 3 a radar sensor assembly in a digital simulation mode.

[0056] Figure 1 shows a radar sensor assembly 10 for detecting an environment.According to the invention, the radar sensor assembly 10 has an input interface 110, which is designed to receive an input signal 1, a digital-analog sequencer 120, which is designed to sequence the input signal 1 into a digital transmission signal 2, a digital-analog converter 210, which is designed to convert the digital transmission signal 2 into an analog transmission signal 3, a radar front end 300, which is designed to transmit a radar signal 4 corresponding to the analog transmission signal 3 into the environment and to receive an analog radar echo signal 5, an analog-digital converter 240, which is designed to convert the analog radar echo signal 5 into a digital radar echo signal 6, an analog-digital sequencer 140, which is designed to sequence the digital radar echo signal 6 into a digital output signal 7, and an output interface 150, which is designed to To send out output signal 7.At least the input interface 110, the digital-analog sequencer 120, the analog-digital sequencer 140, and the output interface 150 are provided by a single field programmable gate array 100. Overall, the radar sensor assembly 10 according to the invention offers the advantage that these development processes can be supported, manufactured with quality assurance, and operated reliably. The described structure results in a three-stage signal path architecture. The FGPA provides at least the input interface 110, the digital-analog sequencer 120, the analog-digital sequencer 140, and the output interface 150 and processes exclusively digital signals. The digital-analog converters 210 and analog-digital converters 240 form the interface to the analog-operating radar front end 300. This results in three circuit complexes: The first corresponds to the digital logic and is implemented in the field programmable gate array 100.The second complex represents the analog and mixed-signal chain of radar sensor assembly 10. The third complex is the radar front end 300. The routing of the analog and digital signals through the complexes is digitally configurable, particularly in the field-programmable gate array 100. This three-stage structure allows radar sensor assembly 10 to operate in a variety of operating or test modes, some of which are described below. This supports the development process, improves manufacturing quality, and always ensures safe operation.

[0057] The various additional operating modes II, III, IV, and V are explained in conjunction with Figures 2 to 3. Further embodiments of the device are explained with reference to Figure 1. These may also relate to the exemplary embodiments shown in Figures 2 to 3.

[0058] Within the scope of the invention, it can be provided that a delay device 130 is provided, which is designed to receive the digital transmission signal 2 and to transmit it to the analog-digital sequencer 140 and / or to start the conversion of the analog radar echo signal 5 into the digital radar echo signal 6 at the analog-digital converter 240 by sending a start command. Furthermore, it can be provided that the delay device 130 waits for a predetermined delay period before forwarding and / or during starting. The delay period can be designed to establish temporal synchronization, in particular between the analog-digital converter 240 and the analog-digital sequencer 140. This achieves the advantage that each sample of the synthetic radar echo signal 8 or analog radar echo signal 5 is assigned precisely the correct received sample of the digital radar echo signal 6 of the analog-digital sequencer 140.This simplifies further processing. Figure 1 shows that the delay device 130 is arranged between the digital-analog sequencer 120 and the analog-digital sequencer 140 and is connected to both. This arrangement can be a logical arrangement within the FPGA programming that specifies the signal flow. Furthermore, as also shown, the delay device 130 can be connected to the analog-digital converter 240. The two connections shown can be either a software-configured connection or a hardware connection, in particular in the form of at least one conductor track and / or a cable.

[0059] Furthermore, it is conceivable that, as shown in Figure 1, a multiplexer 220 is provided, which is designed to forward the analog radar echo signal 5 and its phase information or the analog transmission signal 3 of the digital-to-digital converter 210. It can further be provided that these signals are forwarded to the analog-to-digital converter 240 and / or to a preamplifier 230 connected upstream of the analog-to-digital converter 240. The multiplexer 220 can be designed to select one of a number of signals, in particular parts of the analog radar echo signal 5 or analog transmission signal 3, and to connect it to the output of the multiplexer 220. The provision of a multiplexer 220 offers the advantage that the signal processing as a whole can be tested and possible errors in the radar sensor module 10 can thus be detected.The multiplexer 220 can be implemented as a separate electrical circuit, in particular as an IC, and / or separately from the field-programmable gate array 100. Furthermore, it can be provided that at least the connection of the multiplexer 220 to the digital-to-analog converter 210, preamplifier 230, or analog-to-digital converter 240 is implemented as a hardware connection, in particular as a conductor track or cable.

[0060] In Figure 1, the representation in a separate line is intended to clarify that at least the digital-to-analog converter 210 or the analog-to-digital converter 240 can be implemented as independent electrical components or as part of a digital-to-analog module 200. As shown in Figure 1, at least the multiplexer 220 or the preamplifier 230 can also be part of the digital-to-analog module 200. In other words, the aforementioned components can be provided not by the field-programmable gate array 100.

[0061] It is also conceivable within the scope of the invention to provide a preamplifier 230 designed to amplify the analog radar echo signal 5 and forward it to the analog-digital converter 240. In Figure 1, the preamplifier 230 is arranged between the multiplexer 220 and the analog-digital converter 240 and is shown connected to them. It can be provided that the preamplifier 230 is designed to amplify the analog radar echo signal 5 such that, after amplification, it lies within an operating range of the analog-digital converter 240. This achieves the advantage that the signal quality of the digital radar echo signal provided by the analog-digital converter 240 is particularly high and the signal is not clipped or noisy.

[0062] The radar sensor assembly 10 can have further components not explicitly shown. For example, it can be provided that the components of the radar sensor assembly 10 are arranged in a housing. Alternatively or additionally, it can also be provided that at least one component, in particular those components which are not arranged on the field programmable gate array 100, is / are arranged at a distance from it in the assembly. The radar sensor assembly 10 can be understood as part of a radar sensor. The radar sensor can comprise further devices, in particular a processor. The processor can be designed to evaluate the radar echo signal, in particular processed to form the output signal 7. Alternatively or additionally, the output signal 7 can be at least partially evaluated in the field programmable gate array 100. The processor can further be designed to provide an input signal 1.The evaluation may include converting the radio echo signal into environmental information.

[0063] The signal path in a measuring mode I is shown by arrows in Figure 1. The measuring mode I represents a part of the method for operating the radar sensor assembly 10. Overall, the method in measuring mode I comprises

[0064] - an input interface 110 which receives an input signal 1,

[0065] - a digital-analog sequencer 120 which sequences the input signal 1 into a digital transmission signal 2,

[0066] - a digital-analog converter 210, which converts the digital transmission signal 2 into an analog transmission signal 3,

[0067] - a radar front end 300, which transmits a radar signal 4 corresponding to the analog transmission signal 3 into the environment and receives an analog radar echo signal 5,

[0068] - an analog-digital converter 240 which converts the analog radar echo signal 5 into a digital radar echo signal 6, - an analog-digital sequencer 140 which sequences the digital radar echo signal 6 into a digital output signal 7, and

[0069] - an output interface 150 that emits the digital output signal 7, wherein at least the input interface 110, the digital-analog sequencer 120, the analog-digital sequencer 140, and the output interface 150 are provided by a single field programmable gate array 100. According to the invention, the method comprises providing at least one further operating mode II, III, IV, V, in particular at least one analog simulation mode II, one digital simulation mode III, one playback mode IV, or one signal test mode V, for testing at least one component of the radar sensor assembly 10.

[0070] The further operating modes II, III IV; V are described below in Figures 2 to 3.

[0071] Figure 2 uses arrows to illustrate the situation in analog simulation mode II, in which the digital-to-analog converter 210 sends synthetic analog radar echo signals 8 to the analog-to-digital converter 240. The digital-to-analog converter 210 can therefore be designed to send synthetic analog radar echo signals 8 to the analog-to-digital converter 240 in analog simulation mode II. This creates the possibility of testing the functionality of the first two complexes separately from the radar front end 300. Analog simulation mode II can be used, for example, during production before connection to the radar front end 300. This allows faulty components to be identified and either repaired or replaced. However, analog simulation mode II can also be used in the field and / or during error analysis to narrow down the cause of a malfunction.For this purpose, it can be provided that an environment, in particular a street scene, is digitally calculated in the field programmable gate array 100 and / or an external processor and fed to the input interface 110 as input signal 1. Furthermore, it can be provided that the digital-to-analog converter 210 outputs pre-calculated analog radar echo signals 5, i.e., synthetic received samples. The pre-calculated analog radar echo signals 5 can then be fed to the analog-to-digital converter 240 via the multiplexer 220 and / or the preamplifier 230. It can be provided that the delay element specifies the correct time for the analog-to-digital converter 240 to digitize. The output signal 7 output by the output interface 150 can then be read in by a processor. The pre-calculated analog radar echo signals 5 are thereby fed to the measurement algorithm.Figure 3 also uses arrows to illustrate how, in digital simulation mode III, the input signal 1 is processed exclusively within the field programmable gate array 100 to produce a digital output signal 7. For this purpose, the field programmable gate array 100 can be designed to process, in digital simulation mode III, the input signal 1 exclusively within the field programmable gate array 100 to produce a digital output signal 7. It can be provided that, in particular by a processor and / or the field programmable gate array 100, an environment, in particular a street scene, is digitally calculated and output, in particular exclusively, via the components provided by the field programmable gate array 100.Consequently, all calculated samples are output purely digitally and with bit accuracy, bypassing the digital-to-analog converter 210 and analog-to-digital converter 240, and are read back into the processor. This means that the synthetic received samples are fed back into the measurement algorithm. This operating mode allows the field programmable gate array 100, in particular, to be tested for correct functionality. This mode can be used particularly advantageously during development, in production, but also at a later date to identify faulty field programmable gate arrays 100 and either replace or repair them.

[0072] Playback mode IV also uses the configurations of Figures 2 or 3. The network interface (not shown separately) fills the radar sensor's main memory with a synthetic radar echo signal 8 or a recorded radar echo signal 9. From there, it is further distributed to the input interface 110 of the FPGA. This imprints the synthetic radar echo signal 8 or the recorded radar echo signal 9 on the digital-to-analog converter 210, which is forwarded by the digital-to-analog converter 210 to the analog-to-digital converter 240 (in particular via the multiplexer 220 and / or the preamplifier 230) or is digitally processed, in particular exclusively, within the field programmable gate array 100 into a digital output signal 7.The radar sensor can therefore be designed to receive a synthetic and / or recorded radar echo signal 9, which, as shown in Figure 2, can be transmitted analogously via the digital-to-digital converter 210 to the analog-to-digital converter 240 or, as shown in Figure 3, can be processed digitally, in particular exclusively, within the field programmable gate array 100 to form a digital output signal 7. It can be provided that the output signal 7 can be read out via the network interface in addition to or as an alternative to the output interface. In this way, the functionality of further devices, in particular those downstream of the radar front end 300, can be checked.

[0073] The signal test mode V also uses the configurations of Figures 2 or 3, in that the field programmable gate array 100 impresses an input signal 1 implemented as a test function onto the digital-analog converter 210 via the input interface 110 and the digital-analog sequencer 120, forwards it to the analog-digital converter 240, or digitally processes it, in particular exclusively, within the field programmable gate array 100 into a digital output signal 7 and retrieves it again via the output interface 150. The field programmable gate array 100 can therefore be designed to impress an input signal 1 implemented as a test function onto the digital-analog converter 210 via the input interface 110 and the digital-analog sequencer 120, forward it to the analog-digital converter 240, and retrieve an output signal 7 implemented as a result function via the output interface 150.The FFTs are used to determine noise levels in the analog chains shown in Figure 2, as well as their signals. Noise ratios, electrostatic discharge damage (ESD damage in semiconductors), and nonlinearities in operational amplifiers, defective resistors, capacitors, and signal path interruptions can be determined or detected in this way. Linear regression allows the comparison of digital-to-analog converters 210 with analog-to-digital converters 240. The residual values ​​of the linear regression allow the comparison result to be quantified. Defective and / or cracked capacitors in the signal paths can also be largely detected in this way, because in the event of a fault, glitches in their measured voltage values ​​typically occur due to capacitance jumps. In this case, the residuals of the linear regressions show values ​​that deviate from the normal case.

[0074] The above explanation of the embodiments describes the present invention exclusively by way of examples. Of course, individual features of the embodiments can be freely combined with one another, provided they are technically feasible, without departing from the scope of the present invention.

[0075] In the following figures, identical reference numerals are used for the same technical features, even in different embodiments. Reference numerals

[0076] 1 input signal

[0077] 2 digital transmission signal

[0078] 3 analog transmission signal

[0079] 4 radar signal

[0080] 5 analog radar echo signal

[0081] 6 digital radar echo signal

[0082] 7 Output signal

[0083] 8 synthetic radar echo signals

[0084] 9 recorded radar echo signal

[0085] 10 Radar sensor assembly

[0086] 100 Field Programmable Gate Array

[0087] 110 Input interface

[0088] 120 digital analog sequencers

[0089] 130 Delay device

[0090] 140 analog-digital sequencers

[0091] 150 output interface

[0092] 200 digital analog module

[0093] 210 digital-analog converter

[0094] 220 multiplexers

[0095] 230 preamplifiers

[0096] 240 analog-digital converters

[0097] 300 radar front end

[0098] I Measuring operation

[0099] II Analog simulation operation

[0100] III Digital simulation operation

[0101] IV Playback mode

[0102] V Signal test operation

Claims

Patent claims 1. Radar sensor assembly (10) for detecting an environment, comprising: - an input interface (110) designed to receive an input signal (1), - a digital-analog sequencer (120) designed to sequence the input signal (1) into a digital transmission signal (2), - a digital-analog converter (210) designed to convert the digital transmission signal (2) into an analog transmission signal (3), - a radar front end (300) which is designed to transmit a radar signal (4) corresponding to the analog transmission signal (3) into the environment and to receive an analog radar echo signal (5), - an analog-digital converter (240) designed to convert the analog radar echo signal (5) into a digital radar echo signal (6), - an analog-digital sequencer (140) designed to sequence the digital radar echo signal (6) into a digital output signal (7), and - an output interface (150) configured to emit the digital output signal (7), wherein at least the input interface (110), the digital-analog sequencer (120), the analog-digital sequencer (140) and the output interface (150) are provided by a single field programmable gate array (100).

2. Radar sensor assembly (10) according to claim 1, characterized in that a delay device (130) is provided which is designed to receive the digital transmission signal (2) and to pass it to the analog-digital sequencer (140) and / or to start the conversion of the analog radar echo signal (5) into the digital radar echo signal (6) at the analog-digital converter (240) by sending a start command.

3. Radar sensor assembly (10) according to claim 1 or 2, characterized in that a multiplexer (220) is provided which is designed to forward the analog radar echo signal (5) and its phase information or the analog transmission signal (3) of the digital-analog converter (210).

4. Radar sensor assembly (10) according to one of the preceding claims, characterized in that at least the digital-analog converter (210) or the analog-digital converter (240) are designed as independent electrical components or as part of a digital-analog module (200).

5. Radar sensor assembly (10) according to one of the preceding claims, characterized in that a preamplifier (230) is provided which is designed to amplify the analog radar echo signal (5) and to forward it to the analog-digital converter (240).

6. Radar sensor assembly (10) according to one of the preceding claims, characterized in that the digital-analog converter (210) is further designed to send synthetic radar echo signals (8) to the analog-digital converter (240), in particular in an analog simulation mode (II).

7. Radar sensor assembly (10) according to one of the preceding claims, characterized in that the field programmable gate array (100) is designed, in particular in a digital simulation mode (III), to process the input signal (1) exclusively within the field programmable gate array (100) to form a digital output signal (7).

8. Radar sensor assembly (10) according to one of the preceding claims, characterized in that a network interface is further provided which is designed, in particular in a playback mode (IV), to feed in a synthetic radar echo signal (8) and / or recorded radar echo signal (9), which can be transmitted analogously via the digital-analog converter (210) to the analog-digital converter (240) or is processed digitally, in particular exclusively, within the field programmable gate array (100) to form a digital output signal (7).

9. Radar sensor assembly (10) according to one of the preceding claims, characterized in that the field programmable gate array (100) is further configured, in particular in a signal test mode (V), to impress an input signal (1) embodied as a test function onto the digital-analog converter (210) via the input interface (110), to forward it to the analog-digital converter (240), and to retrieve an output signal (7) embodied as a result function via the output interface (150). Method for operating a radar sensor assembly (10) for detecting an environment, in particular according to one of claims 1 to 9, wherein in a measuring mode (I) - an input interface (110) receives an input signal (1), - a digital analog sequencer (120) sequences the input signal (1) into a digital transmission signal (2), - a digital-analog converter (210) converts the digital transmission signal (2) into an analog transmission signal (3), - a radar front end (300) transmits a radar signal (4) corresponding to the analog transmission signal (3) into the environment and receives an analog radar echo signal (5), - an analog-digital converter (240) converts the analog radar echo signal (5) into a digital radar echo signal (6), - an analog-digital sequencer (140) sequences the digital radar echo signal (6) into a digital output signal (7), and - an output interface (150) transmits the digital output signal (7), wherein at least the input interface (110), the digital-analog sequencer (120), the analog-digital sequencer (140), and the output interface (150) are provided by a single field-programmable gate array (100), and at least one further operating mode (II, III, IV, V), in particular at least one analog simulation mode (II), a digital simulation mode (III), a playback mode (IV), or a signal test mode (V), is provided for testing at least one component of the radar sensor assembly (10). A method for operating a radar sensor assembly (10), characterized in that, in an analog simulation mode (II), the digital-analog converter (210) transmits synthetic analog radar echo signals (8) to the analog-digital converter (240).

12. A method for operating a radar sensor assembly (10), characterized in that in a digital simulation mode (III) the input signal (1) is processed exclusively within the field programmable gate array (100) to form a digital output signal (7).

13. Method for operating a radar sensor assembly (10), characterized in that in a playback mode (IV) a network interface feeds a synthetic and / or recorded analog radar echo signal (9) and impresses it on the digital-to-analog converter (210) and is forwarded to the analog-to-digital converter (240) or is digitally processed, in particular exclusively, within the field programmable gate array (100) to form a digital output signal (7).

14. A method for operating a radar sensor assembly (10), characterized in that in a signal test mode (V) the field programmable gate array (100) impresses an input signal (1) implemented as a test function onto the digital-analog converter (210) via the input interface (110), forwards it to the analog-digital converter (240) and retrieves it again via the output interface (150) as an output signal (7) implemented as a result function.

15. A computer program product comprising instructions which, when the program is executed by a computer, in particular by a radar sensor assembly (10) according to one of claims 1 to 9, cause the computer to carry out a method according to one of claims 10 to 14.

16. A computer-readable storage medium comprising instructions which, when executed by a computer, in particular by a radar sensor assembly (10) according to one of claims 1 to 9, cause the computer to carry out a method according to one of claims 10 to 14.

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