System and method for serial communication between a computer system and a serial device
A hardware-based system using FPGAs or ASICs addresses USB CDC-ACM class challenges by ensuring secure and efficient data transfer between computer systems and serial devices, overcoming driver issues and security vulnerabilities.
Patent Information
- Application Number
- PCT/IN2024/051452
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-01-19
- Filing Date
- 2024-08-05
- Publication Date
- 2025-07-24
AI Technical Summary
Existing systems for USB CDC-ACM class serial communication face challenges such as driver compatibility, plug-and-play issues, communication speed and latency, limited functionality for advanced features, error handling, and security vulnerabilities, particularly when transferring data from serial devices to computer systems.
A hardware-based system utilizing Field Programmable Gate Arrays (FPGAs) or Application Specific Integrated Circuits (ASICs) to manage serial communication, enabling secure data transfer by generating and processing descriptors without software or firmware, and handling unexpected responses to ensure secure initialization and configuration of serial devices.
The system provides secure, reliable, and efficient data transfer between computer systems and serial devices, avoiding software attacks and ensuring proper device initialization and configuration, while supporting high baud rates and advanced features.
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Figure IN2024051452_24072025_PF_FP_ABST
Abstract
Description
[0001] SYSTEM AND METHOD FOR SERIAL COMMUNICATION BETWEEN A COMPUTER SYSTEM AND A SERIAL DEVICE
[0002] TECHNICAL FIELD
[0003] The present disclosure relates generally to data communication. More particularly, the present disclosure relates to a system and method for serial communication between a computer system and a serial device.
[0004] BACKGROUND
[0005] Serial communication has been a fundamental aspect of computer communication for many years. It involves the transmission of data one bit at a time over a single communication channel. As technology advanced, serial communication speeds increased. The introduction of higher baud rates allowed for faster data transfer between devices. Baud rate is the number of signal changes per second and is often used interchangeably with bits per second (bps) in the context of serial communication. The USB CDC-ACM class is part of a broader set of USB communication device classes that were developed to provide a standardized way for various types of communication devices to interact with USB hosts. While the USB CDC-ACM (Communication Device Class - Abstract Control Model) provides a standardized way for devices to emulate serial communication over USB, there are certain challenges associated with its implementation and usage. Some common challenges associated with USB CDC-ACM class are driver compatibility, plug-and-play issues, communication speed and latency, limited functionality for advanced features, error handling and recovery, and the like. The challenges further increase when a computer system is required to receive data from a serial device. The state of art systems that enable such communication are designed and deployed using hardware-software combination, and thus lack security being prone to digital cyber-attacks. Thus, there is a need for a system and a method capable of providing secure data transfer between the computer system and serial devices, which demands a need for improvised technical solution that overcomes the aforementioned problems.
[0006] SUMMARY
[0007] In an aspect of the present disclosure, a system for serial communication between a computer system and one or more serial devices is disclosed. The system includes a serial port configured to accept the one or more serial devices. The system further includes a host controller coupled to the serial port. Furthermore, the system includes a communication device that is coupled to the host controller, and configured to generate and transmit a request for one or more descriptors to the host controller while initializing a serial device of the one or more serial devices. The communication device is further configured to receive a response from the host controller based on the request. The communication device is further configured to generate an acknowledgement signal based on a state of the response received from the host controller. The state of the response is one of, an expected response and an unexpected response. The communication device is implemented using one of, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated circuits (ASICs), or a combination thereof.
[0008] In some aspects of the present disclosure, when the communication device determines, from the acknowledgement signal, that the state of the response is the expected response, the communication device generates and transmits a request for a next descriptor of the one or more descriptors.
[0009] In some aspects of the present disclosure, when the communication device determines, from the acknowledgement signal, that the state of the response is the expected response, the communication device returns the serial device of the one or more serial devices to an idle stage of initialization. In some aspects of the present disclosure, the communication device is configured to identify and configure one or more configurable parameters from parameter information of the serial device of the one or more serial devices based on one or more descriptors received from the host controller via the response.
[0010] In some aspects of the present disclosure, the communication device is configured to define one or more descriptors.
[0011] In some aspects of the present disclosure, the descriptors include one of, device descriptors, configuration descriptors, end point descriptors, and data and communication interface descriptors, or a combination thereof.
[0012] In another aspect of the present disclosure, a method for serial communication between a computer system and one or more serial devices. The method includes generating and transmitting, by way of a communication device that is implemented using one of, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated circuits (ASICs), or a combination thereof., a request for one or more descriptors to a host controller while initializing a serial device of the one or more serial devices. The method further includes receiving, by way of the communication device, a response from the host controller based on the request. Furthermore, the method includes generating, by way of the communication device, an acknowledgement signal based on a state of the response received from the host controller The state of the response is one of, an expected response and an unexpected response.
[0013] In some aspects of the present disclosure, further comprising generating and transmitting a request for a next descriptor of the one or more descriptors when the communication device determines that the state of the response is the expected response from the acknowledgement signal.
[0014] In some aspects of the present disclosure, further comprising returning, by way of the communication device, the serial device of the one or more serial devices to an idle stage of initialization when the communication device determines that the state of the response is the expected response from the acknowledgement signal. In some aspects of the present disclosure, further comprising, by way of the communication device, identifying and configuring one or more configurable parameters from parameter information of the serial device of the one or more serial devices based on one or more descriptors received from the host controller via the response.
[0015] In some aspects of the present disclosure, further comprising defining, by way of the communication device, one or more descriptors, wherein the descriptors include one of, device descriptors, configuration descriptors, end point descriptors, and data and communication interface descriptors, or a combination thereof.
[0016] BRIEF DESCRIPTION OF DRAWINGS
[0017] The above and still further features and advantages of aspects of the present disclosure becomes apparent upon consideration of the following detailed description of aspects thereof, especially when taken in conjunction with the accompanying drawings, and wherein:
[0018] FIG. 1 illustrates a block diagram of a system for hardware-based serial communication between a serial device and a computer system, in accordance with an aspect of the present disclosure; and
[0019] FIG. 2 illustrates a flow chart of a method for hardware-based serial communication between the serial device and the computer system, in accordance with an exemplary aspect of the present disclosure.
[0020] To facilitate understanding, like reference numerals have been used, where possible, to designate like elements common to the figures.
[0021] DETAILED DESCRIPTION
[0022] Various aspect of the present disclosure provides a system, a device, and a method for hardware -based serial communication. The following description provides specific details of certain aspects of the disclosure illustrated in the drawings to provide a thorough understanding of those aspects. It should be recognized, however, that the present disclosure can be reflected in additional aspects and the disclosure may be practiced without some of the details in the following description.
[0023] The various aspects including the example aspects are now described more fully with reference to the accompanying drawings, in which the various aspects of the disclosure are shown. The disclosure may, however, be embodied in different forms and should not be construed as limited to the aspects set forth herein. Rather, these aspects are provided so that this disclosure is thorough and complete, and fully conveys the scope of the disclosure to those skilled in the art. In the drawings, the sizes of components may be exaggerated for clarity.
[0024] It is understood that when an element is referred to as being “on,” “connected to,” or “coupled to” another element, it can be directly on, connected to, or coupled to the other element or intervening elements that may be present. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.
[0025] The subject matter of example aspects, as disclosed herein, is described with specificity to meet statutory requirements. However, the description itself is not intended to limit the scope of this patent. Rather, the inventor / inventors have contemplated that the claimed subject matter might also be embodied in other ways, to include different features or combinations of features similar to the ones described in this document, in conjunction with other technologies. Generally, the various aspects including the example aspects relate to the system and the method for hardware -based host management for transfer of data between slave device and an external data flow manager.
[0026] As mentioned, there is a need for a system, a device, and a method for hardware -based serial communication between a serial device (e.g., a USB device) and a computer system. The present aspects, therefore: provides the system, the device, and the method for hardware-based serial communication between a serial device e.g., a USB device) and a computer system that provides secure data transfer between the serial device (e.g., a USB device) and the computer system to overcome the aforementioned problems.
[0027] The aspects herein and the various features and advantageous details thereof are explained more fully with reference to the non-limiting aspects that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the aspects herein. The examples used herein are intended merely to facilitate an understanding of ways in which the aspects herein may be practiced and to further enable those of skill in the art to practice the aspects herein. Accordingly, the examples should not be construed as limiting the scope of the aspects herein.
[0028] FIG. 1 illustrates a block diagram of a system 100 for hardware-based serial communication between a serial device and a computer system, in accordance with an aspect of the present disclosure. The system 100 may be configured to provide a simple interface for receiving and transmitting data to and from a host system (hereinafter interchangeably referred to and designated as “the computer system”). The system 100 may be configured to provide a hardware based serial interface for connecting one or more serial devices to the computer system that supports ideal baud rates. The system 100 may include a computer system 102 and one or more serial devices 104 (hereinafter individually referred to and designated as “the serial device 104”). The computer system 102 may include a serial port 106, a host controller 108, a host base system 110, and a communication device 112. The serial device 104 may be a peripheral device that may be compatible to the USB 2.0 Communications Device Class - Abstract Control Model (CDC-ACM) specifications. In other words, the serial device 104 may be compatible with the CDC-ACM protocol. In some aspects of the present disclosure, the serial device 104 may be a USB device having a plurality of endpoints that supports a pipe for transporting data and control signal information from the communication device 112 to the USB device and vice versa. In some aspects of the present disclosure, the communication device 112 may have one or more descriptors such that the one or more descriptors may include information required for identifying and configuring the serial device 104, implementing the interfaces, and setting a plurality of endpoints.
[0029] The computer system 102 may be a programmable electronic device that can accept input, store data, and retrieve, process and output information. In some aspects of the present disclosure, the computer system 102 may be, but is not limited to, a desktop, a notebook, a laptop, a handheld computer, a touch sensitive device, a computing device, a smart phone, a smart watch, and the like. It will be apparent to a person of ordinary skill in the art that the computer system 102 may include any device / apparatus that is capable of interacting with a serial device (e.g., the serial device 104), without deviating from the scope of the present disclosure.
[0030] The serial port 106 may be a serial communication interface that may enable transfer of information in and / or out of the computer system sequentially one bit at a time. Specifically, the serial port 106 may be configured to accept the serial device 104 for transfer of data between the computer system 102 and the serial device 104. In some aspects of the present disclosure, the serial port 106 may be, but not limited to, a DB25 serial port, a DB9 serial port, and the like. Aspects of the present disclosure are intended to include and / or otherwise cover any type of the serial port, without deviating from the scope of the present disclosure.
[0031] The host controller 108 may be coupled to the serial port 106. The host controller 108 may include suitable circuitry to perform one or more operations. For example, the host controller 108 may be configured to control the flow of data between the computer system 102 and the serial device 104. Examples of the host controller 108 may include, but are not limited to, an Application-Specific Integrated Circuit (ASIC) processor, a Reduced Instruction Set Computing (RISC) processor, a Complex Instruction Set Computing (CISC) processor, a Field-Programmable Gate Array (FPGA), a Programmable Eogic Control unit (PEC), and the like. Aspects of the present disclosure are intended to include or otherwise cover any type of the host controller 108 including known, related art, and / or later developed technologies. In some aspects of the present disclosure, when the serial device 104 is plugged into the serial port 106 of the computer system 102, the host controller 108 may be configured to communicate with the serial device 104 by way of a host-device interface 114. In some aspects of the present disclosure, the host-device interface 114 may include a plurality of pipes i.e., connections from the host controller 108 to a logical entity (e.g., an endpoint) on the serial device 104.
[0032] The host base system 110 may be coupled with the host controller 108 and may communicate with the host controller 108 by way of a logical interface 116. The host base system 110 may include suitable circuitry to perform one or more operations. The host base system 110 may be further coupled to the communication device 112 such that the host base system 110 communicates with the communication device 112 by way of a host control interface 118. In other words, the host base system 110 and the communication device 112 may be configured to communicate with each other by way of the host control interface 118. Specifically, the host control interface 118 may be a communication interface that enables serial communication between the host base system 110 and the communication device 112. In some aspects of the present disclosure, the host control interface 118 may include a plurality of channels for communication. Specifically, the host control interface 118 may include two channels for default endpoints (i.e., a data IN endpoint and a data OUT endpoint) and a set of channels for other endpoints.
[0033] The communication device 112 may include suitable circuitry that can be configured to perform one or more operations. For example, when the communication device 112 detects a serial device e.g., the serial device 104) is plugged into the serial port 106 of the computer system 102, the communication device 112 may initiate an enumeration process. Specifically, the enumeration process may enable the communication device 112 to request the host controller 108, parameter information, of the serial device 104 that is plugged into the serial port 106 of the computer system 102. Further, the enumeration process may enable the communication device 112 to identify one or more configurable parameters from the parameter information and configure the one or more configurable parameters of the serial device 104.
[0034] The communication device 112 may be implemented by way of one or more hardwarebased circuits without any software and / or firmware such that the communication device 112 implements overall functionalities of a Universal Serial Bus - Communications Device Class - Abstract Control Model (USB CDC-ACM) protocol. Specifically, the communication device 112 may be configured to be used for emulating the serial ports (e.g., the serial port 106) over the USB of the computer system 102. The communication device 112 by virtue of the hardware -based circuit implementation of the USB CDC-ACM protocol that is free from any software and / or firmware may facilitate in avoiding any software trojans and / or viruses to attack a data path between a serial device e.g., the serial device 104) and the computer system 102. In other words, the communication device 112 may provide serial link over a USB connection to the computer system 102 to access data from the serial device 104, and vice versa. The communication device 112 may be implemented by way of a hardwarebased digital design circuitry such as Field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), a combination of FPGAs and ASICs, and the like that does not include any software-derived microcontroller and or framework for operations.
[0035] The communication device 112 operating on the CDC-ACM protocol may utilize two interfaces i.e., a Communication Interface (CI) and a Data Interface (DI). Specifically, the communication interface (CI) may be responsible for managing control and status operations. The Communication Interface (CI) may be configured to handle control and status operations using a set of standard and class-specific requests. Such requests may be defined by the USB CDC ACM class specification and allow the computer system 102 to query and control various aspects of the serial device 104. On the other hand, the Data Interface (DI) may be utilized for data communication. The Data Interface (DI) may be used for the actual data transfer between the computer system 102 and the serial device 104. The Data Interface (DI) may emulate the serial port 106, allowing the serial device 104 to send and receive serial data over the USB.
[0036] In operation, the communication device 112 may be configured to generate and raise a request for multiple descriptors at a time from the host controller 108 while initializing the serial device 104 (e.g., the USB device). Further, the communication device 12 may be configured to wait for a response from the host controller 108. In some aspects of the present disclosure, upon reception of the response from the host controller 108, the communication device 112 may be configured to determine a status of the response received from the host controller 108. In an aspect of the present disclosure, when the communication device 112 determines that the status of the response received via the host controller 108 from the serial device 104 is “an expected response”, the communication device 112 may request a next descriptor. On the other hand, when the communication device 112 determines that the status of the response received via the host controller 108 from the serial device 104 is “unexpected response” (i.e., a mismatch and / or a loss), the communication device 112 may return the serial device 104 to an idle stage of initialization.
[0037] In some aspects of the present disclosure, the request may include, but is not limited to, a Set_Line_Coding class request, a Get_Line_Coding class request, a Set_Control_Line_State class request, and the like. Specifically, the Set_Line_Coding class request may allow the host controller 108 to specify asynchronous line-character formatting properties. Specifically, the Set_Line_Coding class request applies to asynchronous byte stream data class interfaces and endpoints. Further, the Set_Line_Coding class request applies to data transfers from the host system to the serial device 104 and vice versa. Similarly, the Get_Line_Coding class request may allow the host controller 104 to find out the currently configured line coding. Similarly, the Set_Control_Line_State class request may allow setting up a signal for flow controls of Universal Asynchronous Receiver / Transmitter (UART). In some aspects of the present disclosure, the communication device 112 may be further configured to define one or more descriptors such that the subsequent descriptors implement functioning that the serial device 104 is meant for. In other words, the communication device 112 may be further configured to define the one or more descriptors that describe one or more capabilities and characteristics of the serial device 104. Specifically, the one or more descriptors may include information about one or more communication interfaces supported by the serial device 104. In some aspects of the present disclosure, the one or more descriptors may include, but are not limited to, device descriptors, configuration descriptors, end point descriptors, and data and communication interface descriptors. Specifically, the device descriptors may include information about the communication device 112. The information may include, but is not limited to, USB version, power consumption, manufacturer, and serial number. The device descriptor may further provide information that applies to the overall communication device 112 which includes the device class, vendor, product ID numbers, and endpoint zero information. The configuration descriptor may describe the number of interfaces provided by the configuration which is vital for configuration of the serial device 104. The end point descriptors defined by the communication device 112 may include information required by the host controller 108 to determine bandwidth requirements of each endpoint. The endpoint descriptor may further provide the endpoint’s number, direction, and packet size. The data and communication interface descriptors may describe the implementation of communication functions to the host. Here CDC-ACM device supports two interfaces. Communication interface descriptor and data interface descriptors. The CDC Communication interface descriptor may be defined for device management. The CDC Data interface descriptor may be defined for data transmission and reception between the computer system 102 and the serial device 104. FIG. 2 illustrates a flow chart of a method 200 for hardware-based serial communication between the serial device 104 and the computer system 102, in accordance with an exemplary aspect of the present disclosure.
[0038] At step 202, the communication device 112 may generate and raise a request for multiple descriptors at a time from the host controller 108 while initializing the serial device 104 (e.g., the USB device).
[0039] At step 204, the communication device 112 may wait for a response from the host controller 108.
[0040] At step 206, the communication device 112 may determine a status of the response received from the host controller 108. Specifically, when the communication device 112 determines that the status of the response received via the host controller 108 from the serial device 104 is “an expected response”, the method 200 may proceed to a step 208. On the other hand, when the communication device 112 determines that the status of the response received via the host controller 108 from the serial device 104 is “an unexpected response”, the method 200 may proceed to a step 212.
[0041] At step 208, the communication device 112 may request a next descriptor.
[0042] At step 210, the communication device 112 may define one or more descriptors that describe one or more capabilities and characteristics of the serial device 104. Specifically, the one or more descriptors may include information about one or more communication interfaces supported by the serial device 104. In some aspects of the present disclosure, the one or more descriptors may include, but are not limited to, device descriptors, configuration descriptors, end point descriptors, and data and communication interface descriptors.
[0043] At step 212, the communication device 112 may return the serial device 104 to an idle stage of initialization.
[0044] Thus, the system 100 and the method 200 may provide a USB CDC-ACM class serial interface for connecting the serial device 104 to the computer system 102. The communication device 112 implemented on one of, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated circuits (ASICs), or a combination thereof, may provide a simple interface for receiving and transmitting data to and from the computer system 102. The communication device 112 is implementing that driver and the overall functionality of CDC-ACM in fully Hardware based circuits without any software that may facilitate in avoiding any software trojans / viruses to attack the data path.
[0045] The foregoing discussion of the present disclosure has been presented for purposes of illustration and description. It is not intended to limit the present disclosure to the form or forms disclosed herein. In the foregoing Detailed Description, for example, various features of the present disclosure are grouped together in one or more aspects, configurations, or aspects for the purpose of streamlining the disclosure. The features of the aspects, configurations, or aspects may be combined in alternate aspects, configurations, or aspects other than those discussed above. This method of disclosure is not to be interpreted as reflecting an intention the present disclosure requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed aspect, configuration, or aspect. Thus, the following claims are hereby incorporated into this Detailed Description, with each claim standing on its own as a separate aspect of the present disclosure.
[0046] Moreover, though the description of the present disclosure has included description of one or more aspects, configurations, or aspects and certain variations and modifications, other variations, combinations, and modifications are within the scope of the present disclosure, e.g., as may be within the skill and knowledge of those in the art, after understanding the present disclosure. It is intended to obtain rights which include alternative aspects, configurations, or aspects to the extent permitted, including alternate, interchangeable and / or equivalent structures, functions, ranges or steps to those claimed, whether or not such alternate, interchangeable and / or equivalent structures, functions, ranges or steps are disclosed herein, and without intending to publicly dedicate any patentable subject matter.
[0047] As one skilled in the art will appreciate, the system 100 includes a number of functional blocks in the form of a number of units and / or engines. The functionality of each unit and / or engine goes beyond merely finding one or more computer algorithms to carry out one or more procedures and / or methods in the form of a predefined sequential manner, rather each engine explores adding up and / or obtaining one or more objectives contributing to an overall functionality of the system 100. Each unit and / or engine may not be limited to an algorithmic and / or coded form, rather may be implemented by way of one or more hardware elements operating together to achieve one or more objectives contributing to the overall functionality of the system 100. Further, as it will be readily apparent to those skilled in the art, all the steps, methods and / or procedures of the system 100 are generic and procedural in nature and are not specific and sequential.
[0048] Certain terms are used throughout the following description and claims to refer to particular features or components. As one skilled in the art will appreciate, different person may refer to the same feature or component by different names. This document does not intend to distinguish between components or features that differ in name but not structure or function. While various aspects of the present disclosure have been illustrated and described, it will be clear that the present disclosure is not limited to these aspects only. Numerous modifications, changes, variations, substitutions, and equivalents will be apparent to those skilled in the art, without departing from the spirit and scope of the present disclosure, as described in the claims.
Claims
We Claim:
1. A system (100) for serial communication between a computer system (102) and one or more serial devices (104), the system (100) comprising: a serial port (106) configured to accept the one or more serial devices (104); a host controller (108) coupled to the serial port (106); and a communication device (112) that is coupled to the host controller (108), and configured to: generate and transmit a request for one or more descriptors to the host controller (108) while initializing a serial device of the one or more serial devices (104); receive a response from the host controller (108) based on the request; and generate an acknowledgement signal based on a state of the response received from the host controller (108), wherein the state of the response is one of, an expected response and an unexpected response. wherein, the communication device (112) is implemented using one of, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated circuits (ASICs), or a combination thereof.
2. The system (100) as claimed in claim 1, wherein, when the communication device (112) determines, from the acknowledgement signal, that the state of the response is the expected response, the communication device (112) generates and transmits a request for a next descriptor of the one or more descriptors.
3. The system (100) as claimed in claim 1, wherein, when the communication device (112) determines, from the acknowledgement signal, that the state of the response is the expected response, the communication device (112) returns the serial device of the one or more serial devices (104) to an idle stage of initialization.
4. The system (100) as claimed in claim 1, wherein, the communication device (112) is configured to identify and configure one or more configurable parameters from parameter information of the serial device of the one or more serial devices (104) based on one or more descriptors received from the host controller (108) via the response.
5. The system (100) as claimed in claim 1, wherein the communication device (112) is configured to define one or more descriptors, wherein the descriptors include one of, device descriptors, configuration descriptors, end point descriptors, and data and communication interface descriptors, or a combination thereof.
6. A method (200) for serial communication between a computer system (102) and one or more serial devices (104), the method (200) comprising: generating and transmitting, by way of a communication device (112) that is implemented using one of, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated circuits (ASICs), or a combination thereof., a request for one or more descriptors to a host controller (108) while initializing a serial device of the one or more serial devices (104); receiving, by way of the communication device (112), a response from the host controller (108) based on the request; and generating, by way of the communication device (112), an acknowledgement signal based on a state of the response received from the host controller (108), wherein the state of the response is one of, an expected response and an unexpected response.
7. The method (200) as claimed in claim 6, further comprising generating and transmitting a request for a next descriptor of the one or more descriptors when the communication device (112) determines that the state of the response is the expected response from the acknowledgement signal.
8. The method (200) as claimed in claim 6, further comprising returning, by way of the communication device (112), the serial device of the one or more serial devices (104) to an idle stage of initialization when the communication device (112) determines that the state of the response is the expected response from the acknowledgement signal.
9. The method (200) as claimed in claim 6, further comprising, by way of the communication device (112), identifying and configuring one or more configurable parameters from parameter information of the serial device of the one or more serial devices (104) based on one or more descriptors received from the host controller (108) via the response.
10. The method (200) as claimed in claim 7, further comprising defining, by way of the communication device (112), one or more descriptors, wherein the descriptors include one of, device descriptors, configuration descriptors, end point descriptors, and data and communication interface descriptors, or a combination thereof.Y1
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