Method for manufacturing multilayer ceramic capacitor

Abstract

This method for manufacturing a multilayer ceramic capacitor includes: a step for producing a base laminate in which internal electrodes and dielectric layers are alternately laminated; a step for cutting the base laminate to make a laminate having a plurality of side faces and a plurality of ridge parts; a step for forming a protective layer on the plurality of side faces; a step for baking the laminate on which the protective layer is formed; and a step for forming external electrodes on the plurality of ridge parts. In the step for producing the laminate, a laminate precursor is prepared by cutting the base laminate, and a plurality of ridge parts are formed on the laminate precursor. Alternatively, a precursor having a plurality of ridge parts is formed on the base laminate, and the base laminate on which the precursor having the plurality of ridge parts is formed is cut, thereby producing the laminate.

Description

Manufacturing method for multilayer ceramic capacitors

[0001] The present disclosure relates to a method for manufacturing a multilayer ceramic capacitor.

[0002] 2. Description of the Related Art Conventionally, a multilayer ceramic capacitor is known, for example, as described in Patent Document 1.

[0003] Japanese Patent Application Laid-Open No. 2019-24077

[0004] The method for manufacturing a multilayer ceramic capacitor according to the present disclosure includes the steps of: preparing a base laminate including a capacitance-forming portion formed by alternately stacking a plurality of internal electrodes and a plurality of dielectric layers, and a pair of cover layers located at both ends of the capacitance-forming portion in the stacking direction; cutting the base laminate in the stacking direction along a lattice-shaped planned cutting line to prepare a laminate having a plurality of side surfaces around an axis along the stacking direction and a plurality of ridge portions located between adjacent side surfaces and at which the plurality of internal electrodes are exposed with different polarities; forming protective layers on the plurality of side surfaces; firing the laminate with the protective layers formed thereon; and forming external electrodes on the plurality of ridge portions, wherein the step of preparing the laminate involves cutting the base laminate to prepare precursors of the laminate and forming the plurality of ridge portions in the precursor of the laminate, or forming precursors of the plurality of ridge portions in the base laminate and cutting the base laminate with the precursors of the plurality of ridge portions formed thereon to prepare the laminate.

[0005] 9 is a cross-sectional view of the laminate of FIG. 3 cut along a plane perpendicular to the lamination direction and passing through the first internal electrodes. 10 is a cross-sectional view of the laminate of FIG. 3 cut along a plane perpendicular to the lamination direction and passing through the second internal electrodes. 11 is a cross-sectional view of the laminate of FIG. 3 cut along a plane perpendicular to the lamination direction and passing through the dummy electrodes. 12 is a cross-sectional view taken along the cutting line V-V of FIG. 1. 13 is a plan view of a ceramic green sheet on which an internal electrode pattern is printed. 14 is a plan view of a ceramic green sheet on which an internal electrode pattern is printed. 15 is a plan view of a ceramic green sheet on which a dummy electrode pattern is printed. 16 is a perspective view illustrating a process for producing a base laminate. 17 is a perspective view of a base laminate. 18 is a perspective view of a plurality of laminate precursors obtained by cutting the base laminate of FIG. 1. 19 is a perspective view of a laminate obtained by polishing the laminate precursor of FIG. 20. 16 is a side view illustrating a step of attaching a ceramic green sheet for a protective layer to a side surface of the laminate of FIG. 10. FIG. 17 is a side view illustrating a step of attaching a ceramic green sheet for a protective layer to a side surface of the laminate of FIG. 10. FIG. 18 is a side view illustrating a step of attaching a ceramic green sheet for a protective layer to a side surface of the laminate of FIG. 10. FIG. 19 is a perspective view illustrating a laminate on which a protective layer has been formed. FIG. 19 is a perspective view illustrating a laminate precursor obtained by cutting the base laminate of FIG. 8. FIG. 19 is a side view illustrating a step of dip-coating a ceramic slurry for a protective layer to a side surface of the laminate precursor of FIG. 13. FIG. 19 is a side view illustrating a step of dip-coating a ceramic slurry for a protective layer to a side surface of the laminate precursor of FIG. 13. FIG. 19 is a perspective view illustrating a laminate precursor on which a protective layer has been formed. FIG. 20 is a perspective view illustrating a base laminate in which a plurality of through holes have been formed. FIG. 21 is a perspective view illustrating a laminate obtained by cutting the base laminate of FIG. 20. FIG. 22 is a perspective view illustrating a laminate on which a protective layer has been formed. FIG. 23 is a perspective view illustrating a laminate on which a protective layer has been formed.20 is a perspective view showing a base laminate having a conductive layer formed on the inner peripheral surface of a through hole. 21 is a cross-sectional view taken along the cutting line XXI-XXI in Fig. 20. 22 is a perspective view showing a laminate having a conductive layer formed thereon. 23 is a perspective view showing a laminate having a protective layer and a conductive layer formed thereon. 24 is a perspective view showing a laminate having a protective layer and a conductive layer formed thereon.

[0006] In recent years, multilayer ceramic capacitors as capacitor elements have been dramatically reduced in size and increased in capacitance. However, as electronic devices become more sophisticated, there is a demand for even greater capacitance in multilayer ceramic capacitors. Multilayer ceramic capacitors include a laminate formed by alternately stacking multiple internal electrodes and multiple ceramic dielectric layers. The capacitance of a multilayer ceramic capacitor can be increased, for example, by increasing the overlap area (hereinafter also referred to as effective area) between adjacent internal electrodes in the stacking direction.

[0007] Patent Document 1 discloses a thin multilayer ceramic capacitor in which internal electrodes are drawn out at four locations on the side surfaces of a laminate according to polarity, and four external electrodes are formed at the four locations, respectively.

[0008] In the manufacturing process of conventional multilayer ceramic capacitors, if the thickness of the side margins is reduced to increase the effective area, the internal electrodes are exposed to the side surfaces of the laminate, which can lead to the risk of short-circuiting between internal electrodes of opposite polarity. Furthermore, if a protective layer is formed on the side surfaces of the laminate to reduce short-circuiting between internal electrodes of opposite polarity, the protective layer can cover the ends of the internal electrodes that should be connected to the external electrodes, which can lead to the risk of poor connection between the external electrodes and the internal electrodes. A manufacturing method that can achieve both miniaturization and increased capacitance of multilayer ceramic capacitors is needed.

[0009] Hereinafter, an embodiment of a manufacturing method for a multilayer ceramic capacitor according to the present disclosure will be described with reference to the drawings. The drawings used in the following description are schematic, and the dimensional ratios and the like in the drawings do not necessarily correspond to the actual ones. In this specification, for convenience, a Cartesian coordinate system XYZ is defined in some of the drawings. In the following description, the positive side of the Z-axis direction is defined as the upper side, and terms such as "top surface" and "bottom surface" may be used. The X-axis direction is also referred to as the first direction or length direction. The Y-axis direction is also referred to as the second direction or width direction. The Z-axis direction is also referred to as the third direction, height direction, or stacking direction. In this specification, "planar view" refers to a view along the Z-axis direction. Furthermore, "planar view area" refers to the area of ​​a component or member of interest as viewed along the Z-axis direction, and "planar view shape" refers to the shape of a component or member of interest as viewed along the Z-axis direction.

[0010] Fig. 1 is a perspective view showing an example of a multilayer ceramic capacitor manufactured by the manufacturing method of a multilayer ceramic capacitor according to the present disclosure. Fig. 2 is a perspective view showing an element component of the multilayer ceramic capacitor of Fig. 1, and Fig. 3 is a perspective view showing a laminate of the multilayer ceramic capacitor of Fig. 1. Fig. 4A is a cross-sectional view of the laminate of Fig. 3 taken along a plane perpendicular to the stacking direction and passing through the first internal electrodes. Fig. 4B is a cross-sectional view of the laminate of Fig. 3 taken along a plane perpendicular to the stacking direction and passing through the second internal electrodes. Fig. 4C is a cross-sectional view of the laminate of Fig. 3 taken along a plane perpendicular to the stacking direction and passing through the dummy electrodes. Fig. 5 is a cross-sectional view taken along the line V-V in Fig. 1. Note that in Figs. 2 and 3, the internal electrodes and dummy electrodes are hatched for ease of illustration.

[0011] First, a multilayer ceramic capacitor manufactured by the method for manufacturing a multilayer ceramic electronic component according to the present disclosure will be described. The multilayer ceramic capacitor described below has four external electrodes, but the method for manufacturing a multilayer ceramic electronic component according to the present disclosure is not limited to a method for manufacturing a multilayer ceramic capacitor having four external electrodes, and can also be applied to a method for manufacturing a multilayer ceramic capacitor having two external electrodes.

[0012] 1, the multilayer ceramic capacitor 1 includes an element component 2 and external electrodes 3. The element component 2 includes a laminate 4 and a protective layer 5, as shown in FIG.

[0013] As shown in Fig. 3, the laminate 4 includes a capacitance-forming portion 40 and a pair of cover layers 41. The capacitance-forming portion 40 is formed by alternately stacking a plurality of internal electrodes 6 and a plurality of dielectric layers 7, and forms a capacitance. The plurality of internal electrodes 6 and the plurality of dielectric layers 7 are stacked in the stacking direction (Z-axis direction). The pair of cover layers 41 are located at both ends of the capacitance-forming portion 40 in the stacking direction.

[0014] As shown in FIG. 3 , the laminate 4 has a substantially rectangular parallelepiped shape. The laminate 4 may have a shape in which the dimensions in the first direction (X-axis direction) and the second direction (Y-axis direction) are greater than the dimension in the third direction (Z-axis direction). The laminate 4 may have a substantially square shape in a plan view. The laminate 4 has a first surface 8a and a second surface 8b that face each other in the stacking direction. The first surface 8a and the second surface 8b may be perpendicular to the stacking direction. Hereinafter, the first surface 8a and the second surface 8b may be collectively referred to as the main surfaces 8a and 8b.

[0015] The laminate 4 has a first side surface 9a, a second side surface 9b, a third side surface 9c, and a fourth side surface 9d around an axis along the stacking direction (Z-axis direction). The first side surface 9a, the second side surface 9b, the third side surface 9c, and the fourth side surface 9d may be parallel to the stacking direction. Hereinafter, the first side surface 9a, the second side surface 9b, the third side surface 9c, and the fourth side surface 9d may be collectively referred to as the side surfaces 9a to 9d.

[0016] The side surfaces 9a to 9d of the laminate 4 have a first ridge 10a, a second ridge 10b, a third ridge 10c, and a fourth ridge 10d. As shown in FIG. 3 , the first ridge 10a is located between the first side surface 9a and the second side surface 9b. The second ridge 10b is located between the second side surface 9b and the third side surface 9c. The third ridge 10c is located between the third side surface 9c and the fourth side surface 9d. The fourth ridge 10d is located between the fourth side surface 9d and the first side surface 9a. In this specification, the first ridge 10a refers to a region extending from a region of the first side surface 9a closer to the first ridge 11a to a region of the second side surface 9b closer to the first ridge 11a, when the ridge formed by the intersection of the first side surface 9a and the second side surface 9b is defined as the first ridge 11a. The laminate 4 may have a chamfered corner extending from the first side surface 9a to the second side surface 9b. In this case, the chamfered corner (chamfered portion) may be referred to as the first ridge portion 10a, and a line included in the surface of the chamfered portion and extending in the third direction may be referred to as the first ridge 11a. The chamfered portion may have a shape that bulges outward in an arc from the laminate 4 in a plan view, or may have a shape that bulges inward in an arc from the laminate 4. The same applies to the second ridge portion 10b, the third ridge portion 10c, and the fourth ridge portion 10d. Hereinafter, the first ridge portion 10a, the second ridge portion 10b, the third ridge portion 10c, and the fourth ridge portion 10d may be collectively referred to as ridge portions 10a to 10d.

[0017] The internal electrodes 6 are made of a conductive material. The internal electrodes 6 may be made of a metal material whose main component is, for example, a metal such as Ni (nickel), Cu (copper), Sn (tin), Pt (platinum), Pd (palladium), Ag (silver), or Au (gold), or an alloy thereof. In this specification, the term "main component" refers to the component with the highest content in the material or member of interest. The internal electrodes 6 may have a thickness of, for example, 1.5 μm or less. In this case, internal defects caused by internal stress when firing the laminate 4 or when applying a voltage to the internal electrodes 6 can be reduced, thereby improving the reliability of the multilayer ceramic capacitor 1.

[0018] The dielectric layer 7 is made of a dielectric material, for example, BaTiO ３ (barium titanate), CaTiO ３(Calcium titanate), SrTiO ３ (strontium titanate), BaZrO ３ The dielectric layer 7 may be made of a ceramic material having barium zirconate as a main component. The ceramic material constituting the dielectric layer 7 may contain a minor component, such as an Mn (manganese) compound, an Mg (magnesium) compound, an Si (silicon) compound, a Co (cobalt) compound, an Ni compound, or a rare earth compound, in a content lower than that of the major component. The dielectric layer 7 may have a thickness of, for example, 0.1 μm or more and 10 μm or less.

[0019] The multiple internal electrodes 6 include at least one first internal electrode 6 a and at least one second internal electrode 6 b. The first internal electrode 6 a and the second internal electrode 6 b have mutually different polarities. In other words, when the first internal electrode 6 a has a first polarity, the second internal electrode 6 b has a second polarity different from the first polarity. The first internal electrodes 6 a and the second internal electrodes 6 b are alternately arranged in the stacking direction with the dielectric layer 7 interposed therebetween.

[0020] The first internal electrode 6a is exposed in the region of the side surfaces 9a to 9d excluding the second ridge portion 10b and the fourth ridge portion 10d. The second internal electrode 6b is exposed in the region of the side surfaces 9a to 9d excluding the first ridge portion 10a and the third ridge portion 10c. The ridge portions where the first internal electrode 6a is not exposed (i.e., the second ridge portion 10b and the fourth ridge portion 10d) are different from the ridge portions where the second internal electrode 6b is not exposed (i.e., the first ridge portion 10a and the third ridge portion 10c). In other words, the laminate 4 is configured so that internal electrodes 6 of different polarities are not exposed on the same ridge portion. The number of ridge portions where the first internal electrode 6a is not exposed may be the same as the number of ridge portions where the second internal electrode 6b is not exposed. In this case, the characteristics of the multilayer ceramic capacitor 1 are easily ensured.

[0021] As shown in Fig. 4A , the first internal electrode 6a has a substantially right-angled triangular cutout 12b whose apex (right-angled apex) is located on the second edge 11b, and a substantially right-angled triangular cutout 12d whose apex (right-angled apex) is located on the fourth edge 11d. The first internal electrode 6a has the same shape in plan view as the laminate 4, except for the cutouts 12b and 12d. Furthermore, the second internal electrode 6b has a substantially right-angled triangular cutout 12a whose apex (right-angled apex) is located on the first edge 11a, and a substantially right-angled triangular cutout 12c whose apex (right-angled apex) is located on the third edge 11c, as shown in Fig. 4B . The second internal electrode 6b has the same shape in plan view as the laminate 4, except for the cutouts 12a and 12c. In the multilayer ceramic capacitor 1, the effective area contributing to the capacitance is reduced by the area of ​​the notches 12a, 12b, 12c, and 12d compared to the planar area of ​​the laminate 4. Therefore, from the viewpoint of increasing the capacitance of the multilayer ceramic capacitor 1, the smaller the area of ​​the notches 12a, 12b, 12c, and 12d, the better, as long as the first internal electrode 6a and the second internal electrode 6b are not exposed at the same edge portion.

[0022] The shape of the cutout 12 a in plan view may be, but is not limited to, a substantially right-angled isosceles triangle with its vertex (right-angled vertex) located on the first edge 11 a. The shape of the cutout 12 a in plan view may be, for example, a rectangle with one vertex located on the first edge 11 a, or a sector (quadrants) with its center located on the first edge 11 a. Note that if the shape of the cutout 12 a in plan view is a substantially right-angled isosceles triangle, printing of an internal electrode pattern having a hole that becomes the cutout 12 a (the square-shaped hole in the internal electrode pattern shown in FIGS. 6A and 6B ) is facilitated in the manufacturing process of the multilayer ceramic capacitor 1. The same applies to the cutouts 12 b, 12 c, and 12 d.

[0023] The protective layer 5 is made of a dielectric material. The protective layer 5 is located on the side surfaces 9a to 9d of the laminate 4. The protective layer 5 is also called a side margin portion. The protective layer 5 is configured to prevent internal electrodes 6 of different polarities from being connected to the same external electrode 3. The protective layer 5 covers the areas of the side surfaces 9a to 9d excluding the edge portions 10a to 10d, i.e., the areas where the first internal electrode 6a and the second internal electrode 6b are exposed and overlapped in the stacking direction. The protective layer 5 also electrically insulates the ends of the internal electrodes 6 of different polarities exposed on the side surfaces 9a to 9d from each other and physically protects the ends of the internal electrodes 6 exposed on the side surfaces 9a to 9d.

[0024] The protective layer 5 is made of, for example, BaTiO ３ , CaTiO ３ , SrTiO ３ , BaZrO ３ The ceramic material constituting the protective layer 5 may contain, as a secondary component, a Mn compound, a Mg compound, a Si compound, a Co compound, a Ni compound, a rare earth compound, etc. The protective layer 5 may be made of a ceramic material having the same main component as the ceramic material constituting the dielectric layer 7.

[0025] The external electrodes 3 are made of a conductive material. As shown in Figures 1 and 5, the external electrodes 3 include a first external electrode 3a, a second external electrode 3b, a third external electrode 3c, and a fourth external electrode 3d. The first external electrode 3a and the third external electrode 3c are electrically connected via a first internal electrode 6a. The second external electrode 3b and the fourth external electrode 3d are electrically insulated via a second internal electrode 6b. The first external electrode 3a and the third external electrode 3c are electrically insulated from the second external electrode 3b and the fourth external electrode 3d.

[0026] The first external electrode 3a is located across the first side surface 9a, the second side surface 9b, and at least one of the first surface 8a and the second surface 8b. The first external electrode 3a covers the first edge portion 10a and is connected to the first internal electrode 6a exposed at the first edge portion 10a.

[0027] The second external electrode 3b is located across the second side surface 9b, the third side surface 9c, and at least one of the first surface 8a and the second surface 8b. The second external electrode 3b covers the second edge portion 10b and is connected to the second internal electrode 6b exposed at the second edge portion 10b.

[0028] The third external electrode 3c is located across the third side surface 9c, the fourth side surface 9d, and at least one of the first surface 8a and the second surface 8b. The third external electrode 3c covers the third edge portion 10c and is connected to the first internal electrode 6a exposed at the third edge portion 10c.

[0029] The fourth external electrode 3d is located across the fourth side surface 9d, the first side surface 9a, and at least one of the first surface 8a and the second surface 8b. The fourth external electrode 3d covers the fourth edge portion 10d and is connected to the second internal electrode 6b exposed at the fourth edge portion 10d.

[0030] 5 , the external electrode 3 may be configured to include a first layer 31 in contact with the element component 2 and a second layer 32 covering the first layer 31. In this case, it is possible to improve the adhesion between the external electrode 3 and the element component 2, while also improving the wettability of a conductive bonding material such as solder to the external electrode 3. As a result, it is possible to improve the reliability of the multilayer ceramic capacitor 1 and a mounting structure including the multilayer ceramic capacitor 1.

[0031] The first layer 31 may be a sintered metal layer formed by baking a conductive paste containing a metal material such as Cu, Ni, Ag, Pd, Au, or an Ag-Pd alloy onto the surface of the element component 2. The first layer 31 may be a sputtered film formed by sputtering a metal material such as Cu, Ni, Ag, Pd, Au, or an Ag-Pd alloy onto the surface of the element component 2. The first layer 31 may be a vapor-deposited film formed by vapor-depositing a metal material such as Cu, Ni, Ag, Pd, Au, or an Ag-Pd alloy onto the surface of the element component 2. The first layer 31 may be composed of a conductive resin. The conductive resin may be, for example, an epoxy resin or a phenolic resin containing a metal powder such as Ag.

[0032] The second layer 32 may be a plating layer. The second layer 32 may be formed by a plating method such as electroless plating or electrolytic plating. The second layer 32 may be configured to include, for example, a Ni plating layer and a Sn plating layer covering the Ni plating layer. The second layer 32 may include, for example, a Sn plating layer, a Cu plating layer, an Au plating layer, or the like.

[0033] The external electrodes 3 may be composed of only a plating layer. The first layer 31 may be formed by a plating method such as electroless plating or electrolytic plating. The first layer 31 may be composed of, for example, a Cu plating layer. The second layer 32 may be composed of, for example, a Ni plating layer and a Sn plating layer covering the Ni plating layer. When composed of only a plating layer, the thickness of the external electrodes 3 can be made thin, allowing the multilayer ceramic capacitor 1 to be miniaturized.

[0034] When the external electrodes 3 are configured to contain a conductive resin, it is possible to alleviate stress that occurs when the multilayer ceramic capacitor 1 is mounted on a substrate, thereby reducing the risk of cracks occurring in the element component 2. As a result, it is possible to improve the reliability of a mounting structure obtained by mounting the multilayer ceramic capacitor 1 on a substrate. Furthermore, when the multilayer ceramic capacitor 1 is mounted on a substrate and used, it is possible to reduce noise from the substrate due to electrostriction when a voltage is applied.

[0035] The protective layer 5 may cover at least a portion of the edge portions 10a-10d. In other words, as shown in FIG. 5 , the protective layer 5 may have a configuration in which the end-to-end distance d5 is longer than the end-to-end distance d6 between the ends of the internal electrodes 6 exposed on the side surfaces 9a-9d. This reduces the risk of the internal electrodes 6 being exposed from the protective layer 5 and short-circuiting between internal electrodes 6 of different polarities. Even if the end-to-end distance d6 between the internal electrodes 6 is increased to increase the effective area of ​​the multilayer ceramic capacitor 1, increasing the end-to-end distance d5 between the protective layers 5 reduces the exposure of the internal electrodes 6 from the protective layer 5, thereby reducing the risk of internal electrodes 6 of different polarities being connected to the same external electrode 3. The thinner the protective layer 5, the better, as long as it can perform the above-described functions. A thinner protective layer 5 increases the ratio of the effective area to the planar area of ​​the element component 2, thereby enabling the multilayer ceramic capacitor 1 to be miniaturized and have a high capacitance. The protective layer 5 may have a thickness of, for example, 30 μm or less.

[0036] As described above, the laminate 4 includes a pair of cover layers 41. The cover layers 41 are made of a dielectric material, for example, BaTiO ３ , CaTiO ３ , SrTiO ３ , BaZrO ３ The cover layer 41 may be composed of a ceramic material mainly composed of, for example, a dielectric layer 7 and a dummy electrode 42. The cover layer 41 may be composed of a plurality of dielectric layers 7 stacked in the stacking direction. The cover layer 41 may include a dummy electrode 42 that does not contribute to the formation of capacitance. The dummy electrode 42 may be a plurality of dummy electrodes 42 stacked with the dielectric layers 7 sandwiched between them, as shown in FIG. 3. The dummy electrodes 42 may be located at the four corners of the laminate 4 in a plan view and exposed at the edge portions 10a to 10b. The dummy electrodes 42 may be located on at least one of the first surface 8a and the second surface 8b of the laminate 4. By including the dummy electrodes 42 in the cover layer 41, the adhesion between the external electrodes 3 and the laminate 4 can be increased, thereby improving the reliability of the multilayer ceramic capacitor 1.

[0037] According to the multilayer ceramic capacitor 1, the ratio of the effective area to the area in plan view of the element component 2 can be increased, so that a small-sized multilayer ceramic capacitor with a large capacitance can be provided.

[0038] 1, the external electrodes 3 may be U-shaped when viewed in a direction perpendicular to the side surfaces 9a to 9d. In this case, when the multilayer ceramic capacitor 1 is mounted on a substrate, it is possible to reduce the occurrence of short circuits between the first external electrodes 3a and the third external electrodes 3c and the second external electrodes 3b and the fourth external electrodes 3d due to migration. As a result, it is possible to improve the reliability of a mounting structure in which the multilayer ceramic capacitor 1 is mounted on a substrate.

[0039] The shape of the external electrodes 3 is not limited to the shape shown in Fig. 1. The external electrodes 3 may, for example, extend from the ridges 10a to 10d onto the surface of the protective layer 5 and have a substantially rectangular shape when viewed in a direction perpendicular to the side surfaces 9a to 9d. In this case, the contact area between the element component 2 and each of the first external electrode 3a, the second external electrode 3b, the third external electrode 3c, and the fourth external electrode 3d can be increased. As a result, the adhesion between the external electrodes 3 and the element component 2 can be improved, and the reliability of the multilayer ceramic capacitor 1 can be improved.

[0040] The multilayer ceramic capacitor 1 may be configured so that all of the first external electrodes 3a, the second external electrodes 3b, the third external electrodes 3c, and the fourth external electrodes 3d are located on the first surface 8a or the second surface 8b. In this case, when mounting the multilayer ceramic capacitor 1 on a substrate, the first surface 8a or the second surface 8b on which all of the first external electrodes 3a, the second external electrodes 3b, the third external electrodes 3c, and the fourth external electrodes 3d are located is mounted so as to face the mounting surface of the substrate, thereby making it possible to easily mount the multilayer ceramic capacitor 1 on the substrate.

[0041] The multilayer ceramic capacitor 1 may be configured such that the first external electrode 3a, the second external electrode 3b, the third external electrode 3c, and the fourth external electrode 3d are all located on both the first surface 8a and the second surface 8b. In this case, when the multilayer ceramic capacitor 1 is mounted on a substrate, either the first surface 8a or the second surface 8b may face the mounting surface, which simplifies the mounting process.

[0042] When mounting the multilayer ceramic capacitor 1 on a substrate, the electrical characteristics do not change even if the multilayer ceramic capacitor 1 is rotated by 90°, 180°, or 270° from its original mounting state around an axis along the stacking direction, eliminating the need to check the orientation of the multilayer ceramic capacitor 1 and simplifying the mounting process.

[0043] Next, a method for manufacturing a multilayer ceramic capacitor according to the present disclosure will be described. Note that, since the structure of each component of the multilayer ceramic capacitor is substantially the same before and after firing, the same terms and reference symbols may be used hereinafter for convenience of explanation.

[0044] 6A and 6B are plan views showing ceramic green sheets on which internal electrode patterns are printed, and FIG. 6C is a plan view showing a ceramic green sheet on which a dummy electrode pattern is printed. FIG. 7 is a perspective view illustrating a process for producing a base laminate, and FIG. 8 is a perspective view showing the base laminate. FIG. 9 is a perspective view showing a plurality of laminate precursors obtained by cutting the base laminate of FIG. 8, and FIG. 10 is a perspective view showing a laminate obtained by polishing the laminate precursor of FIG. 9. FIGS. 11A, 11B, and 11C are side views illustrating a process for forming protective layers on the side surfaces of the laminate, and FIG. 12 is a perspective view showing a laminate on which a protective layer is formed. FIG. 13 is a perspective view showing a laminate precursor obtained by cutting the base laminate of FIG. 8, and FIGS. 14A, 14B, and 14C are side views illustrating a process for dip-coating a ceramic slurry for a protective layer on the side surfaces of the laminate precursor of FIG. 13, and FIG. 15 is a perspective view showing a laminate precursor on which a protective layer is formed. Fig. 16 is a perspective view showing a base laminate having a plurality of through holes formed therein, Fig. 17 is a perspective view showing a laminate obtained by cutting the base laminate of Fig. 16, and Figs. 18 and 19 are perspective views showing a laminate having a protective layer formed therein. Fig. 20 is a perspective view showing a base laminate having a conductive layer formed on the inner peripheral surface of the through hole, Fig. 21 is a cross-sectional view taken along the cutting line XXI-XXI in Fig. 20, Fig. 22 is a perspective view showing a laminate having a conductive layer formed therein, and Figs. 23 and 24 are perspective views showing a laminate having a protective layer and a conductive layer formed therein. In Figs. 6A, 6B, 6C, 7 to 10, 11A, 11B, 11C, 12, 13, 14A, 14B, 14C, 15 to 20, and 22 to 24, the internal electrode patterns, dummy electrode patterns, internal electrodes, and dummy electrodes are hatched for ease of illustration. 6A, 6B, and 6C, imaginary lattice-shaped planned cutting lines are shown to indicate the regions that constitute each laminate in the internal electrode patterns and dummy electrode patterns.

[0045] First, one embodiment of a method for manufacturing a multilayer ceramic capacitor according to the present disclosure (hereinafter also referred to as the first manufacturing method) will be described. The first manufacturing method includes the steps of preparing a base laminate, preparing a laminate, forming a protective layer, firing the laminate, and forming external electrodes. Hereinafter, the steps of preparing the base laminate, preparing the laminate, forming a protective layer, firing the laminate, and forming external electrodes will also be referred to as the first step, the second step, the third step, the fourth step, and the fifth step, respectively.

[0046] (First Step) The first step is a step of preparing a base laminate for constructing the laminate 4 shown in FIG. ３ A raw material powder containing the above as a main component is prepared. Next, an organic vehicle is mixed with the prepared raw material powder to prepare a ceramic slurry. The organic vehicle used to prepare the ceramic slurry may be, for example, a resin such as a butyral resin dissolved in a solvent mixture of ethyl alcohol and toluene. Next, using the prepared ceramic slurry, a ceramic green sheet 13 that will become the dielectric layer 7 is formed on a carrier film by a sheet forming method such as a die coater method, a doctor blade method, or a gravure coater method. The thickness of the ceramic green sheet 13 may be, for example, approximately 0.5 to 5 μm. The thinner the ceramic green sheet 13, the greater the capacitance of the multilayer ceramic capacitor.

[0047] Next, an organic vehicle is mixed with a powder containing a metal such as Ni, Cu, Sn, Pt, Pd, Ag, or Au, or an alloy thereof, as a main component, to prepare a conductive paste. The organic vehicle used to prepare the conductive paste may be, for example, a resin such as ethyl cellulose dissolved in a solvent mixture of a dihydroterpineol-based solvent and butyl cellosolve. A dispersant such as oleic acid or polyethylene glycol may be added to the conductive paste.

[0048] Next, the prepared conductive paste is used by a printing method such as screen printing or gravure printing to produce ceramic green sheets 13 having, on their main surfaces, internal electrode patterns that become the internal electrodes 6. Furthermore, the prepared conductive paste is used by a printing method such as screen printing or gravure printing to produce ceramic green sheets 13 having, on their main surfaces, dummy electrode patterns (also referred to as dummy electrode layers) that become the dummy electrodes 42 printed.

[0049] FIG. 6A shows a ceramic green sheet 13 on which multiple internal electrode patterns that will become the first internal electrodes 6a are printed. FIG. 6B shows a ceramic green sheet 13 on which multiple internal electrode patterns that will become the second internal electrodes 6b are printed. While FIGS. 6A and 6B illustrate an example in which multiple internal electrode patterns are printed in a continuous manner, this is not limiting. The multiple internal electrode patterns may be printed spaced apart from one another. Hereinafter, the ceramic green sheet 13 (see FIG. 6A ) on which multiple internal electrode patterns that will become the first internal electrodes 6a are printed may be referred to as a first pattern sheet 14. Furthermore, the ceramic green sheet 13 (see FIG. 6B ) on which multiple internal electrode patterns that will become the second internal electrodes 6b are printed may be referred to as a second pattern sheet 15. Furthermore, the first pattern sheet 14 and the second pattern sheet 15 may be collectively referred to as pattern sheets 14 and 15. The pattern sheets 14 and 15 may have a margin (i.e., a blank area where no internal electrode patterns are printed) at their outer peripheries.

[0050] 6A and 6B show an example in which the first pattern sheet 14 and the second pattern sheet 15 are produced separately, but the present invention is not limited to this. For example, a plurality of first pattern sheets 14 may be produced, and when producing a temporary laminate (see FIG. 7), the plurality of first pattern sheets 14 may be stacked while being offset by a predetermined distance.

[0051] 6C shows a ceramic green sheet 13 on which a plurality of dummy electrode patterns that become dummy electrodes 42 are printed. Hereinafter, the ceramic green sheet 13 on which dummy electrode patterns are printed may be referred to as a dummy sheet 18. The dummy sheet 18 may have a margin portion on the periphery (i.e., a blank portion where no dummy electrode patterns are printed).

[0052] After drying the internal electrode pattern and the dummy electrode pattern, as shown in FIG. 7 , a predetermined number of pattern sheets 14 and 15 are laminated on top of a predetermined number of laminated dummy sheets 18, and a predetermined number of dummy sheets 18 are laminated on top of the pattern sheets 14 and 15 to produce a temporary laminate. The pattern sheets 14 and 15 may be laminated alternately with the first pattern sheet 14 and the second pattern sheet 15, or the first pattern sheet 14 may be laminated while being offset by a predetermined distance. Although not shown in FIG. 7 , the temporary laminate is produced on a support sheet. The support sheet may be a weak adhesive sheet or a release adhesive sheet that can be adhered and released, such as a foam release sheet. The support sheet may be fixed to a base.

[0053] In fabricating the temporary laminate, as shown in FIG. 7 , at least one ceramic green sheet 13 may be placed between the dummy sheet 18 and the pattern sheets 14 and 15. The bottommost dummy sheet 18 of the temporary laminate may have a dummy electrode pattern printed on its underside. This improves adhesion between the external electrode 3 and the element component 2. The top and bottom layers of the temporary laminate may also be ceramic green sheets 13. This reduces the risk of a portion of the dummy electrode pattern remaining on the support sheet (electrode erosion) when peeling the precursor of the laminate 4 (the laminate precursor 21 described below) obtained by cutting the base laminate 19 from the support sheet. This reduces the likelihood of dummy electrodes 42 being formed poorly due to electrode erosion, thereby improving the reliability of the multilayer ceramic capacitor 1. In the process of fabricating the base laminate 19, the temporary laminate is formed so that the dummy electrode pattern overlaps the lattice points of the planned cutting lines 20 in the stacking direction. This makes it possible to fabricate the laminate 4 (see FIG. 3) in which the dummy electrodes 42 are exposed from the edge portions 10a to 10d.

[0054] Next, the temporary laminate of Fig. 7 is pressed in the lamination direction to produce a mother laminate 19 (see Fig. 8). The temporary laminate can be pressed using, for example, a hydrostatic press.

[0055] (Second Step) The second step is a step of producing a laminate 4 before firing. As shown in FIG. 9 , the base laminate 19 is cut in the stacking direction along lattice-shaped planned cutting lines 20 to produce a plurality of precursors of the laminate 4 (hereinafter also referred to as laminate precursors) 21. The laminate precursors 21 do not have edge portions 10a to 10d where the internal electrodes 6 are exposed. The cutting of the base laminate 19 may be performed in a state where the base laminate 19 is placed on a support sheet. The cutting of the base laminate 19 can be performed using, for example, a press cutter, a dicing saw device having a dicing blade, or the like.

[0056] Next, the laminate precursor 21 is polished to form edge portions 10a-10d where the internal electrodes 6 are exposed according to polarity, thereby producing the laminate 4 (see FIG. 10 ). The polishing may be barrel polishing. Barrel polishing involves, for example, placing the laminate precursor 21 and an abrasive in a pot containing a polishing liquid (e.g., water) and rotating the pot to remove corners, burrs, and the like from the laminate precursor 21. In barrel polishing, the first internal electrode 6a is exposed at the first edge portion 10a and the third edge portion 10c, and the second internal electrode 6b is exposed at the second edge portion 10b and the fourth edge portion 10d, while the amount of polishing is adjusted so that the first internal electrode 6a and the second internal electrode 6b are not exposed at the same edge portion. The amount of polishing can be adjusted by changing the type of abrasive, the rotation speed of the pot, the polishing time, and the like. By polishing the laminate precursor 21 before firing, the laminate precursor 21 can be polished efficiently, and the laminate 4 in which the internal electrodes 6 are sufficiently exposed by polarity from the edge portions 10a to 10d can be efficiently formed. Note that the barrel polishing is not limited to the above-mentioned wet barrel polishing, and may be dry barrel polishing.

[0057] (Third Step) The third step is a step of forming ceramic green sheets 23 for protective layers (ie, protective layers 5) on the side surfaces 9a to 9d of the laminate 4 before firing.

[0058] First, as shown in FIG. 11A , a ceramic green sheet 23 for a protective layer is prepared and placed on the upper surface of a base (also referred to as a second base) 24. The ceramic green sheet 23 for a protective layer can be prepared in the same manner as the ceramic green sheet 13. The ceramic green sheet 23 for a protective layer may have a thickness of, for example, 30 μm or less. Next, the pre-fired laminate 4 is placed so that one of the side surfaces 9 a to 9 d (the first side surface 9 a in FIG. 11A ) is open and faces the upper surface of the second base 24. The laminate 4 may be held by a support sheet 16 fixed to a first base 17. The support sheet 16 may be, for example, an adhesive release sheet such as a weak adhesive sheet or a foam release sheet.

[0059] 11B , the first pedestal 17 is moved toward the second pedestal 24, and the open surface of the laminate 4 is pressed against the protective layer ceramic green sheet 23, thereby pressure-bonding the protective layer ceramic green sheet 23 to the open surface of the laminate 4. The pressure may be set appropriately. The protective layer ceramic green sheet 23 may be pressure-bonded to the open surface of the laminate 4 while heating at least one of the laminate 4 and the protective layer ceramic green sheet 23. In this case, the protective layer ceramic green sheet 23 can be suitably pressure-bonded to the open surface of the laminate 4. Because the laminate 4 has edge portions 10a to 10d, the protective layer ceramic green sheet 23 is substantially pressure-bonded to the area of ​​the open surface excluding the edge portions 10a to 10d.

[0060] 11C , the first pedestal 17 is moved away from the second pedestal 24, and the protective layer ceramic green sheet 23 is broken into a portion that is pressure-bonded to the open surface and a portion that is not pressure-bonded to the open surface, thereby producing a laminate precursor 21 having the protective layer ceramic green sheet 23 pressure-bonded to the open surface. The steps shown in FIGS. 11A, 11B, and 11C can be repeated while rotating the laminate 4 on the support sheet 16 (i.e., while changing the open surface of the laminate 4), thereby producing a laminate 4 (i.e., a base component 2) having protective layers 5 formed on the side surfaces 9a to 9d. After forming the protective layer 5 on the first side surface 9a, the protective layers 5 may be formed on the third side surface 9c, the second side surface 9b, and the fourth side surface 9d in this order, or the protective layers 5 may be formed on the second side surface 9b, the third side surface 9c, and the fourth side surface 9d in this order.

[0061] (Fourth Step) The fourth step is a step of firing the laminate 4 (i.e., the element component 2) on which the protective layer 5 is formed. The firing temperature can be appropriately set depending on the metal material contained in the conductive paste that will become the internal electrodes 6, and the ceramic material contained in the ceramic green sheets 13 that will become the dielectric layers 7, etc. The firing temperature may be, for example, about 1100 to 1250°C. The firing may be carried out in a reducing atmosphere. The atmospheric gas may be, for example, hydrogen (H ２ ) and nitrogen (N ２ ) may be a mixed gas. The base component 2 may be subjected to a degreasing treatment before firing. The degreasing treatment may be performed in an air atmosphere, an inert gas atmosphere, or a reducing atmosphere. The degreasing treatment may be performed under atmospheric pressure or under reduced pressure. Furthermore, the base component 2 may be subjected to a re-oxidation treatment in an oxidizing atmosphere after firing.

[0062] Next, the fired element component 2 is barrel polished to remove burrs from the surface of the element component 2 and to fully expose the internal electrodes 6 and dummy electrodes 42 at the edge portions 10a to 10d, thereby producing the element component 2 (see FIG. 2 ). By fully exposing the internal electrodes 6 at the edge portions 10a to 10d, it is possible to bond the internal electrodes 6 and the external electrodes 3 well, thereby improving the characteristics of the multilayer ceramic capacitor 1. Furthermore, if the internal electrodes 6 are primarily composed of Ni, if Ni oxide produced during firing adheres to the exposed surfaces of the internal electrodes 6, the internal electrodes 6 and the external electrodes 3 may not be electrically connected well when the external electrodes 3 are formed, which could result in a deterioration in the characteristics of the multilayer ceramic capacitor 1. By barrel polishing the fired element component 2, the Ni oxide adhering to the exposed surfaces of the internal electrodes 6 can be removed, thereby ensuring a good electrical connection between the internal electrodes 6 and the external electrodes 3 and reducing the risk of a deterioration in the characteristics of the multilayer ceramic capacitor 1. Furthermore, by fully exposing the dummy electrodes 42 at the edge portions 10a to 10d, it is possible to increase the bonding strength between the element component 2 and the external electrodes 3, thereby improving the reliability of the multilayer ceramic capacitor 1. Note that if the internal electrodes 6 and dummy electrodes 42 are fully exposed from the edge portions 10a to 10d by barrel polishing during the process of fabricating the laminate 4, barrel polishing of the element component 2 after firing may be omitted.

[0063] (Fifth Step) The fifth step is a step of forming the external electrodes 3 (i.e., the first external electrode 3a, the second external electrode 3b, the third external electrode 3c, and the fourth external electrode 3d) on the edge portions 10a to 10d. The external electrodes 3 can be formed, for example, by forming a first layer 31 in contact with the element part 2, and then forming a second layer 32 that covers the first layer 31.

[0064] In the manner described above, it is possible to manufacture the multilayer ceramic capacitor 1 shown in Fig. 1. According to the first manufacturing method, it is possible to efficiently manufacture the small-sized, large-capacity multilayer ceramic capacitor 1.

[0065] Another example of the first manufacturing method will now be described. The manufacturing method of this example includes the steps of preparing a base laminate, preparing a laminate precursor, forming a protective layer, firing the laminate precursor, and forming external electrodes. Hereinafter, the steps of preparing the base laminate, preparing the laminate precursor, forming a protective layer, firing the laminate precursor, and forming external electrodes will also be referred to as step 1, step 2, step 3, step 4, and step 5, respectively.

[0066] The manufacturing method of this example differs from the first manufacturing method in steps 2, 3, and 4. Steps 1 and 5 are the same as steps 1 and 5 of the first manufacturing method, and therefore detailed description of steps 1 and 5 will be omitted.

[0067] (First Step) In the first step, a temporary laminate as shown in FIG. 7 is prepared, and the temporary laminate is pressed in the stacking direction to prepare a base laminate 19 as shown in FIG.

[0068] (Second Step) The second step is a step of cutting the base laminate 19 in the stacking direction along the lattice-shaped planned cutting lines 20 to produce a plurality of laminate precursors 21. The cutting of the base laminate 19 may be performed while the base laminate 19 is placed on a support sheet. The cutting of the base laminate 19 can be performed using, for example, a press cutter or a dicing saw device having a dicing blade. Note that, unlike the second step of the first manufacturing method, the second step of the manufacturing method of this example does not involve polishing the laminate precursor 21.

[0069] (Step 3) Step 3 is a step of dip-coating the ceramic slurry for the protective layer onto the unpolished side surfaces 9a to 9d of the laminate precursor 21 (i.e., the corners are not chamfered) to form the protective layer 5.

[0070] First, as shown in Fig. 14A, ceramic slurry for protective layer (hereinafter also simply referred to as ceramic slurry) 27 is prepared in a container 28. Next, a laminate precursor 21 is placed so that one of the side surfaces 9a to 9d (first side surface 9a in Fig. 14A) is the open surface and faces the bottom surface of the container 28. The laminate precursor 21 may be held by a support sheet 16 fixed to a first pedestal 17. The ceramic slurry 27 may be the same as the ceramic slurry used to produce the ceramic green sheet 13.

[0071] Next, as shown in FIG. 14B, the first pedestal 17 is moved toward the container 28, and the first side surface 9a of the laminate precursor 21 is immersed in the ceramic slurry 27. Then, as shown in FIG. 14C, the first pedestal 17 is raised, and the ceramic slurry 27 is dip-coated onto the first side surface 9a. The ceramic slurry 27 dip-coated onto the first side surface 9a is dried, thereby forming a protective layer 5 on the first side surface 9a. By repeating the steps of FIGS. 14A to 14C while rotating the laminate precursor 21 on the support sheet 16 (i.e., while changing the open side of the laminate precursor 21), a laminate precursor 21 (see FIG. 15) having the protective layer 5 formed on the side surfaces 9a to 9d can be produced.

[0072] 14C , the first side surface 9 a may be substantially parallel to the horizontal direction. In this case, due to the effects of surface tension and gravity, the ceramic slurry 27 applied to the first side surface 9 a by dip coating becomes thicker at the center in the width direction (the left-right direction in FIG. 14C ) and thinner at both ends (corners of the laminate precursor 21), as shown in FIG. 14C . Thus, by firing the laminate precursor 21 on which the protective layer 5 is formed and barrel polishing it, the laminate 4 can be produced, which has the edge portions 10 a to 10 d on which the internal electrodes 6 are exposed and the protective layer 5.

[0073] Note that foreign matter such as cutting chips generated when cutting the base laminate 19 may adhere to the side surfaces 9a to 9d of the laminate precursor 21. Therefore, the side surfaces 9a to 9d may be cleaned before the ceramic slurry is dip-coated onto the side surfaces 9a to 9d of the laminate precursor 21. This makes it possible to remove foreign matter adhering to the side surfaces 9a to 9d, and to satisfactorily coat the ceramic slurry onto the side surfaces 9a to 9d. To clean the side surfaces 9a to 9d, dry ice particles may be collided with the side surfaces 9a to 9d, or laser light may be irradiated onto the side surfaces 9a to 9d.

[0074] (Fourth Step) The fourth step is a step of firing the laminate precursor 21 on which the protective layer 5 is formed. The firing conditions in the fourth step of the manufacturing method of this example may be the same as the firing conditions in the fourth step of the first manufacturing method. Furthermore, as in the fourth step of the first manufacturing method, a degreasing treatment may be performed before firing, and a reoxidation treatment may be performed after firing.

[0075] In the fourth step, the laminate precursor 21 is fired and then barrel polished. This produces a laminate 4 (i.e., a base component 2) having edge portions 10a-10d where the internal electrodes 6 and dummy electrodes 42 are fully exposed, and a protective layer 5 located on the side surfaces 9a-9d (see FIG. 2 ). By fully exposing the internal electrodes 6 at the edge portions 10a-10d, the internal electrodes 6 and the external electrodes 3 can be bonded well, thereby improving the characteristics of the multilayer ceramic capacitor 1. Furthermore, if the internal electrodes 6 are primarily composed of Ni, if Ni oxide formed during firing adheres to the exposed surfaces of the internal electrodes 6, the internal electrodes 6 and the external electrodes 3 may not be electrically connected well when the external electrodes 3 are formed, potentially degrading the characteristics of the multilayer ceramic capacitor 1. By barrel polishing the fired laminate precursor 21, the Ni oxide adhering to the exposed surfaces of the internal electrodes 6 can be removed, thereby ensuring good electrical connection between the internal electrodes 6 and the external electrodes 3 and reducing the risk of a deterioration in the characteristics of the multilayer ceramic capacitor 1. Furthermore, by fully exposing the dummy electrodes 42 at the edge portions 10a to 10d, it is possible to increase the bonding strength between the element component 2 and the external electrodes 3, thereby improving the reliability of the multilayer ceramic capacitor 1.

[0076] (Fifth Step) The fifth step is a step of forming external electrodes 3 on edge portions 10a to 10d. The external electrodes 3 can be formed, for example, by forming a first layer 31 in contact with the element component 2 and then forming a second layer 32 that covers the first layer 31.

[0077] In the manner described above, the multilayer ceramic capacitor 1 shown in Fig. 1 can be manufactured. According to the manufacturing method of this example, the number of polishing processes can be reduced compared to the first manufacturing method, and therefore the manufacturing burden of the multilayer ceramic capacitor can be reduced.

[0078] <Second Manufacturing Method> Next, another embodiment of the manufacturing method for a multilayer ceramic capacitor according to the present disclosure (hereinafter also referred to as the second manufacturing method) will be described. The second manufacturing method includes the steps of preparing a base laminate, preparing a laminate, forming a protective layer, firing the laminate, and forming external electrodes. Hereinafter, the steps of preparing the base laminate, preparing the laminate, forming a protective layer, firing the laminate, and forming external electrodes will also be referred to as the first step, the second step, the third step, the fourth step, and the fifth step, respectively.

[0079] (First Step) The first step is a step of producing a base laminate 19 (see FIG. 8) for forming the laminate 4 of FIG. 3. The first step of the second manufacturing method is the same as the first step of the first manufacturing method, and therefore a detailed description thereof will be omitted.

[0080] (Second Step) The second step is a step of preparing the laminate 4 before firing. In the second manufacturing method, as shown in FIG. 16 , a plurality of through holes 25 are formed in the base laminate 19 before cutting the base laminate 19. The through holes 25 are formed so as to pass through the lattice points of the lattice-shaped planned cutting lines 20 and penetrate the base laminate 19 in the stacking direction. The through holes 25 may be formed, for example, by drilling or laser processing. The hole diameter (diameter) of the through holes 25 may be less than the diameter of an inscribed circle inscribed in the blank areas 14 a, 15 b of the pattern sheets 14, 15 (see FIGS. 6A and 6B ). After the base laminate 19 is cut in the stacking direction along the planned cutting lines 20, the inner peripheral surfaces 25 a of the through holes 25 form the edge portions 10 a to 10 d. It can be said that the base laminate 19 in which the plurality of through holes 25 is formed contains a plurality of precursors of the laminate 4 (that is, the laminate 4 having the edge portions 10a to 10d before firing).

[0081] Next, the base laminate 19 is cut in the stacking direction along the planned cutting lines 20 to produce a plurality of laminates 4 (see FIG. 17 ). In the second manufacturing method, the base laminate 19 having the plurality of through holes 25 formed therein is cut, thereby producing the laminate 4 having the edge portions 10a to 10d. In the second manufacturing method, polishing of the laminate precursor 21 can be omitted, and therefore the laminate 4 can be produced efficiently.

[0082] (Third Step) The third step is a step of forming protective layer ceramic green sheets 23 (i.e., protective layers 5) on the side surfaces 9a to 9d of the laminate 4 before firing. The third step of the second manufacturing method is similar to the third step of the first manufacturing method except for the shape of the edge portions 10a to 10d, and therefore a detailed description will be omitted. By forming protective layers 5 on the side surfaces 9a to 9d of the laminate 4, the base component 2 before firing (see FIG. 18) can be produced. The protective layers 5 may also be formed by dip-coating the side surfaces 9a to 9d of the laminate 4 with ceramic slurry 27.

[0083] (Fourth Step) The fourth step is a step of firing the laminate 4 (i.e., the base component 2) on which the protective layer 5 has been formed. The firing conditions, such as the firing temperature and firing atmosphere, are the same as those in the first manufacturing method, and therefore a detailed description thereof will be omitted. As in the first manufacturing method, the base component 2 may be subjected to a degreasing treatment before firing, and the base component 2 may be subjected to a reoxidation treatment after firing.

[0084] Next, the fired element component 2 is subjected to barrel polishing to remove burrs from the surface of the element component 2 and to fully expose the internal electrodes 6 and dummy electrodes 42 at the edge portions 10a-10d, thereby producing the element component 2 shown in FIG. 19 . By fully exposing the internal electrodes 6, each with its own polarity, at the edge portions 10a-10d, it is possible to bond the internal electrodes 6 and the external electrodes 3 well, thereby improving the characteristics of the multilayer ceramic capacitor 1. Furthermore, if the internal electrodes 6 are primarily composed of Ni, if Ni oxide adheres to the exposed surfaces of the internal electrodes 6, the internal electrodes 6 and the external electrodes 3 may not be electrically connected well when the external electrodes 3 are formed, which could result in a deterioration in the characteristics of the multilayer ceramic capacitor 1. By barrel polishing the fired element component 2, Ni oxide adhered to the exposed surfaces of the internal electrodes 6 can be removed, thereby ensuring a good electrical connection between the internal electrodes 6 and the external electrodes 3 and reducing the risk of a deterioration in the characteristics of the multilayer ceramic capacitor 1. Furthermore, by fully exposing the dummy electrodes 42 at the edge portions 10a to 10d, it is possible to increase the bonding strength between the element component 2 and the external electrodes 3, thereby improving the reliability of the multilayer ceramic capacitor 1.

[0085] (Fifth Step) The fifth step is a step of forming external electrodes 3 (i.e., first external electrode 3a, second external electrode 3b, third external electrode 3c, and fourth external electrode 3d) on the edge portions 10a to 10d. Since the fifth step of the second manufacturing method is the same as the fifth step of the first manufacturing method, a detailed description will be omitted. By forming the external electrodes 3 on the edge portions 10a to 10d of the element component 2 of FIG. 19, the multilayer ceramic capacitor 1 of FIG. 1 can be manufactured.

[0086] According to the second manufacturing method, the laminate 4 can be produced efficiently, and therefore the multilayer ceramic capacitor 1 can be produced efficiently.

[0087] <Another Example of the Second Manufacturing Method> Next, another example of the second manufacturing method will be described. The manufacturing method of this example includes the steps of preparing a base laminate, preparing a laminate, forming a protective layer, firing the laminate, and forming external electrodes. Hereinafter, the steps of preparing the base laminate, preparing the laminate, forming a protective layer, firing the laminate, and forming external electrodes will also be referred to as step 1, step 2, step 3, step 4, and step 5, respectively.

[0088] (First Step) The first step is a step of producing a base laminate 19 (see FIG. 8) for forming the laminate 4 of FIG. 3. The first step of the manufacturing method of this example is the same as the first step of the first manufacturing method, and therefore a detailed description thereof will be omitted.

[0089] (Second Step) The second step is a step of producing the laminate 4 before firing. In the manufacturing method of this example, similar to the second manufacturing method, a plurality of through holes 25 are formed in the mother laminate 19 before cutting the mother laminate 19, as shown in Fig. 16. The method of forming the through holes 25, the diameter of the through holes 25, etc. are the same as in the second manufacturing method, and therefore detailed description thereof will be omitted.

[0090] In the manufacturing method of this example, before cutting the base laminate 19, a conductive layer 26 is formed on the inner circumferential surface 25a of the through hole 25, as shown in Figures 20 and 21. The conductive layer 26 may constitute the first layer 31 of the external electrode 3. The conductive layer 26 may be formed by applying a conductive paste containing a metal material such as Cu, Ni, Ag, Pd, Au, or an Ag-Pd alloy to the inner circumferential surface 25a of the through hole 25. The conductive layer 26 may be formed from the inner circumferential surface 25a of the through hole 25 to at least one of the upper and lower surfaces of the base laminate 19.

[0091] Next, the base laminate 19 is cut in the lamination direction along the planned cutting lines 20 to produce a plurality of laminates 4 (see FIG. 22 ) with conductive layers 26. In the second manufacturing method, by cutting the base laminate 19, it is possible to produce laminates 4 having edge portions 10a to 10d, with conductive layers 26 that will become first layers 31 of the external electrodes 3 formed on the edge portions 10a to 10d. In the manufacturing method of this example, polishing of the laminate precursor 21 can be omitted and the first layers 31 of the external electrodes 3 can be efficiently formed, making it possible to efficiently manufacture the multilayer ceramic capacitor 1.

[0092] (Third Step) The third step is a step of forming a protective layer 5 on the side surfaces 9a to 9d of the laminate 4 before firing. The third step of the second manufacturing method is similar to the third step of the first manufacturing method, except that the shape of the ridges 10a to 10d is different and that the first layers 31 are formed on the ridges 10a to 10d, and therefore a detailed description thereof will be omitted. By forming the protective layer 5 on the side surfaces 9a to 9d of the laminate 4, a pre-fired element component 2 (see FIG. 23) on which the first layers 31 of the external electrodes 3 are formed can be produced. The protective layer 5 may also be formed by dip-coating the side surfaces 9a to 9d of the laminate 4 with a ceramic slurry 27.

[0093] (Fourth Step) The fourth step is a step of firing the laminate 4 (hereinafter also referred to as the element component 2 with the first layer 31) on which the protective layer 5 and the first layer 31 have been formed. The firing conditions, such as the firing temperature and firing atmosphere, are the same as those in the first manufacturing method, and therefore detailed explanations will be omitted. As in the first manufacturing method, the element component 2 with the first layer 31 may be subjected to a degreasing treatment before firing, and the element component 2 with the first layer 31 after firing may be subjected to a reoxidation treatment.

[0094] Subsequently, the fired element component 2 with the first layer 31 is barrel polished to remove burrs from the surface of the element component 2 with the first layer 31, thereby producing an element component 2 with the first layer 31 (see FIG. 24 ). Removing the burrs can improve adhesion between the element component 2 with the first layer 31 and the second layer 32 of the external electrode, thereby improving the reliability of the multilayer ceramic capacitor 1. Furthermore, if the conductive layer 26 is primarily composed of Ni, if Ni oxide produced during firing adheres to the surface of the conductive layer 26, good electrical connection between the conductive layer 26 and the second layer 32 is not achieved when the second layer 32 of the external electrode 3 is formed, which could result in a deterioration in the characteristics of the multilayer ceramic capacitor 1. Barrel polishing the fired element component 2 removes Ni oxide adhered to the surface of the conductive layer 26, thereby ensuring good electrical connection between the conductive layer 26 and the second layer 32 and reducing the risk of a deterioration in the characteristics of the multilayer ceramic capacitor 1.

[0095] (Fifth Step) The fifth step is a step of forming the second layer 32 of the external electrode 3 on the element component 2 with the first layer 31 of FIG. 24 . The second layer 32 can be formed by a plating method such as electroless plating or electrolytic plating. The second layer 32 may be configured to include, for example, a Ni plating layer and a Sn plating layer covering the Ni plating layer. The second layer 32 may include, for example, a Sn plating layer, a Cu plating layer, an Au plating layer, or the like. By forming the second layer 32 on the element component 2 with the first layer 31, the multilayer ceramic capacitor 1 of FIG. 1 can be manufactured.

[0096] According to the manufacturing method of this example, the laminate 4 and the first layer 31 of the external electrode 3 can be manufactured efficiently, and therefore the multilayer ceramic capacitor 1 can be manufactured efficiently.

[0097] According to the present disclosure, a small-sized, high-capacity multilayer ceramic capacitor can be efficiently manufactured.

[0098] Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the above-described embodiments, and various modifications, improvements, etc. are possible within the scope that does not deviate from the gist of the present disclosure.

[0099] The present disclosure can be implemented in the following configurations (1) to (6).

[0100] (1) A method for manufacturing a multilayer ceramic capacitor, comprising: a step of preparing a base laminate including a capacitance-forming portion formed by alternately stacking a plurality of internal electrodes and a plurality of dielectric layers, and a pair of cover layers located at both ends of the capacitance-forming portion in the stacking direction; a step of cutting the base laminate in the stacking direction along a lattice-shaped planned cutting line to prepare a laminate having a plurality of side surfaces around an axis along the stacking direction and a plurality of ridge portions located between adjacent side surfaces and at which the plurality of internal electrodes are exposed with different polarities; a step of forming protective layers on the plurality of side surfaces; a step of firing the laminate with the protective layers formed thereon; and a step of forming external electrodes on the plurality of ridge portions, wherein in the step of preparing the laminate, the base laminate is cut to prepare a precursor of the laminate, and the plurality of ridge portions are formed on the precursor of the laminate, or a precursor having the plurality of ridge portions is formed on the base laminate, and the base laminate with the precursor having the plurality of ridge portions formed thereon is cut to prepare the laminate.

[0101] (2) The method for manufacturing a multilayer ceramic capacitor according to (1) above, wherein, in the step of fabricating the laminate, the plurality of edge portions are formed so that internal electrodes of different polarities are not exposed on the same edge portion.

[0102] (3) A method for manufacturing a multilayer ceramic capacitor according to (1) or (2) above, wherein after the step of producing the laminate or the step of firing the laminate, the edge portions of the laminate are barrel polished to expose the plurality of internal electrodes according to polarity from the edge portions.

[0103] (4) The method for manufacturing a multilayer ceramic capacitor according to (1) or (2) above, wherein, in the step of preparing the base laminate, a plurality of through holes are formed in the base laminate, passing through each of a plurality of lattice points of the planned cutting line and penetrating the base laminate in the stacking direction, and the base laminate in which the plurality of through holes are formed is cut, thereby exposing the plurality of internal electrodes by polarity from the edge portion.

[0104] (5) The method for manufacturing a multilayer ceramic capacitor according to (4) above, further comprising forming a conductive layer that constitutes part of the external electrode on the inner peripheral surface of the plurality of through holes before cutting the base laminate in which the plurality of through holes are formed.

[0105] (6) A method for manufacturing a multilayer ceramic capacitor according to any one of (1) to (5) above, wherein, during the step of constructing the base laminate, dummy electrode layers are formed in a plurality of regions of the pair of cover layers that overlap with a plurality of lattice points of the planned cutting lines in the stacking direction.

[0106] REFERENCE SIGNS LIST 1 Multilayer ceramic capacitor 2 Element component 3 External electrode 3a First external electrode 3b Second external electrode 3c Third external electrode 3d Fourth external electrode 31 First layer 32 Second layer 4 Laminate 40 Capacitance forming portion 41 Cover layer 42 Dummy electrode 5 Protective layer 6 Internal electrode 6a First internal electrode 6b Second internal electrode 7 Dielectric layer 8a First surface 8b Second surface 9a First side surface 9b Second side surface 9c Third side surface 9d Fourth side surface 10a First ridge portion 10b Second ridge portion 10c Third ridge portion 10d Fourth ridge portion 11a First ridge portion 11b Second ridge portion 11c Third ridge portion 11d Fourth ridge portion 12a, 12b, 12c, 12d Notch portion 13 Ceramic green sheet 14 First pattern sheet 14a Blank area 15 Second pattern sheet 15a Blank area 16 Support sheet 17 First base 18 Dummy sheet 19 Base laminate 20 Planned cutting line 21 Laminate precursor 23 Ceramic green sheet for protective layer 24 Second base 25 Through hole 25a Inner peripheral surface 26 Conductive layer

Claims

1. A step of manufacturing a mother laminate including a capacitance forming portion in which a plurality of internal electrodes and a plurality of dielectric layers are alternately laminated, and a pair of cover layers positioned at both ends of the capacitance forming portion in the lamination direction; a step of cutting the mother laminate in the lamination direction along a grid-like planned cutting line to manufacture a laminate having a plurality of side surfaces around an axis along the lamination direction and a plurality of ridge portions positioned between adjacent side surfaces and having the plurality of internal electrodes exposed according to polarity; a step of forming a protective layer on the plurality of side surfaces; a step of firing the laminate on which the protective layer is formed; and a step of forming external electrodes on the plurality of ridge portions. In the step of manufacturing the laminate, the mother laminate is cut to manufacture a precursor of the laminate, and the plurality of ridge portions are formed on the precursor of the laminate, or a precursor having the plurality of ridge portions is formed on the mother laminate, and the mother laminate having the precursor having the plurality of ridge portions formed thereon is cut to manufacture the laminate. A method of manufacturing a multilayer ceramic capacitor.

2. The method of manufacturing a multilayer ceramic capacitor according to claim 1, wherein in the step of manufacturing the laminate, the plurality of ridge portions are formed so that internal electrodes of different polarities are not exposed on the same ridge portion.

3. After the step of manufacturing the laminate or the step of firing the laminate, the plurality of internal electrodes are exposed from the ridge portions according to polarity by barrel-polishing the ridge portions of the laminate. The method of manufacturing a multilayer ceramic capacitor according to claim 1 or 2.

4. In the step of manufacturing the mother laminate, a plurality of through holes passing through each of a plurality of grid points of the planned cutting line and penetrating the mother laminate in the lamination direction are formed in the mother laminate, and the mother laminate having the plurality of through holes formed therein is cut to expose the plurality of internal electrodes from the ridge portions according to polarity. The method of manufacturing a multilayer ceramic capacitor according to claim 1 or 2.

5. Before cutting the mother laminate having the plurality of through holes formed therein, a conductive layer constituting a part of the external electrode is formed on an inner peripheral surface of the plurality of through holes. The method of manufacturing a multilayer ceramic capacitor according to claim 4.

6. In the step of manufacturing the mother laminate, a dummy electrode layer is formed in a plurality of regions of the pair of cover layers that respectively overlap a plurality of lattice points of the planned cutting line in the stacking direction. The method for manufacturing a multilayer ceramic capacitor according to any one of claims 1 to 5.

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