Method for forming semiconductor structure, plasma generation apparatus, and semiconductor process device

Abstract

The present application belongs to the technical field of semiconductors, and discloses a method for forming a semiconductor structure, a plasma generation apparatus, and a semiconductor process device. The disclosed method comprises: executing a first etching process on a semiconductor laminated structure, so as to form multiple fin-shaped structures spaced apart from each other, the semiconductor laminated structure comprising at least one first semiconductor layer and at least one second semiconductor layer which are alternately stacked, and when the first etching process is executed, a plasma generation cavity and a reaction cavity being spaced by a first distance; and executing a second etching process on the fin-shaped structures, so as to selectively etch at least a portion of one of the first semiconductor layer and the second semiconductor layer, wherein when the second etching process is executed, the plasma generation cavity and the reaction cavity are spaced apart by a second distance, the second distance being greater than the first distance. The described solution can solve the problem of low etching productivity caused by the need to change chambers in semiconductor process devices for different types of etching processes.

Description

Method for forming semiconductor structure, plasma generating device and semiconductor process equipment Technical Field

[0001] The present application belongs to the field of semiconductor technology, and specifically relates to a method for forming a semiconductor structure, a plasma generating device, and semiconductor process equipment. Background Art

[0002] Plasma plays an important role in the etching process. Active substances in the plasma, such as uncharged free radicals and charged ions, react with the semiconductor film layer to obtain the desired pattern.

[0003] When processing wafers, different types of etching processes are required. For example, isotropic etching is required in some process steps, while anisotropic etching is required in other process steps. In the related art, the reaction chambers for performing isotropic etching and anisotropic etching are different. When a wafer has completed isotropic etching in a reaction chamber and needs to be anisotropically etched again, the reaction chamber needs to be purged and vacuumed, and then the wafer is taken out of the reaction chamber by a robot and transferred to another reaction chamber for anisotropic etching. In this process, since the wafer needs to change chambers, the etching capacity is low. Summary of the Invention

[0004] The present application discloses a method for forming a semiconductor structure, a plasma generating device and a semiconductor process equipment, so as to solve the problem of low etching capacity caused by the need to change chambers when performing different types of etching processes in semiconductor process equipment involved in related technologies.

[0005] In order to solve the above technical problems, this application provides the following technical solutions:

[0006] In a first aspect, embodiments of the present application disclose a method for forming a semiconductor structure, the method being applied to a semiconductor process device, the semiconductor process device comprising a plasma generating chamber and a reaction chamber connected to each other, the method comprising:

[0007] Performing a first etching process on the semiconductor stacked structure to form a plurality of mutually spaced fin-shaped structures; wherein the semiconductor stacked structure includes at least one first semiconductor layer and at least one second semiconductor layer alternately stacked; when performing the first etching process, a first distance is spaced between the plasma generating chamber and the reaction chamber;

[0008] A second etching process is performed on the fin structure to selectively etch at least a portion of one of the first semiconductor layer and the second semiconductor layer. When performing the second etching process, a second distance is spaced apart from the plasma generating chamber and the reaction chamber, and the second distance is greater than the first distance.

[0009] In a second aspect, an embodiment of the present application discloses a plasma generating device for use with a reaction chamber, the plasma generating device comprising:

[0010] A plasma generating chamber, used for generating plasma;

[0011] A plasma delivery tube, one end of which is connected to the plasma generating chamber, and the other end of which is used to communicate with the reaction chamber. The length of the plasma delivery tube is adjustable to allow the plasma generating chamber to be close to or away from the reaction chamber.

[0012] In a third aspect, an embodiment of the present application provides a semiconductor process device, the disclosed semiconductor process device comprising:

[0013] reaction chamber;

[0014] In the plasma generating device described in the second aspect, the plasma generating chamber is connected to the reaction chamber through the plasma delivery tube.

[0015] The technical solution provided by this application can achieve the following beneficial effects:

[0016] The method for forming a semiconductor structure disclosed in the embodiment of the present application adjusts the distance between the plasma generating chamber and the reaction chamber to adjust the transmission distance of the plasma, and ultimately achieves the purpose of regulating the concentration of free radicals in the plasma. Different concentrations of free radicals can adapt to different etching processes to achieve different etching effects. In this case, when a plasma etching process requiring different concentrations of free radicals is implemented on a semiconductor stacked structure, it is only necessary to adjust the distance between the plasma generating chamber and the reaction chamber. There is no need to replace different process chambers in order to perform different types of etching processes, and the problem of low etching capacity caused by this will not occur. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIG1 is a schematic flow chart of a method for forming a semiconductor structure disclosed in an embodiment of the present application;

[0018] FIG2 is a schematic diagram of a substrate and a semiconductor stacked structure thereon after a first etching process is completed in the method for forming a semiconductor structure disclosed in an embodiment of the present application;

[0019] 3 is a schematic diagram of a substrate and a semiconductor stacked structure thereon after the second etching process is completed in the method for forming a semiconductor structure disclosed in an embodiment of the present application;

[0020] FIG4 is an electron microscope image obtained after etching a semiconductor stacked structure using a process gas that does not contain nitrogen;

[0021] FIG5 is an electron microscope image obtained after etching the semiconductor stacked structure using a process gas added with nitrogen;

[0022] FIG6 is a schematic structural diagram of a semiconductor process equipment disclosed in an embodiment of the present application.

[0023] FIG7 is another schematic structural diagram of a semiconductor process equipment disclosed in an embodiment of the present application;

[0024] FIG8 is a schematic diagram of a first structure of a plasma delivery tube disclosed in an embodiment of the present application;

[0025] FIG9 is a schematic diagram of a second structure of a plasma delivery tube disclosed in an embodiment of the present application;

[0026] FIG10 is a schematic diagram of a third structure of a plasma delivery tube disclosed in an embodiment of the present application;

[0027] FIG11 is a schematic diagram of a fourth structure of a plasma delivery tube disclosed in an embodiment of the present application;

[0028] FIG12 is a schematic diagram of a fifth structure of a plasma delivery tube disclosed in an embodiment of the present application;

[0029] FIG13 is a schematic structural diagram of another semiconductor process equipment disclosed in an embodiment of the present application, in which a filter partition is located in a reaction chamber;

[0030] FIG14 is a schematic structural diagram of another semiconductor process equipment disclosed in an embodiment of the present application, in which a filter partition is located in a partition storage cavity;

[0031] FIG15 is a schematic structural diagram of another filter partition disclosed in an embodiment of the present application.

[0032] Explanation of the accompanying drawings: 10-reaction chamber, 11-inner cavity, 101-first subspace, 102-second subspace, 20-plasma generating device, 21-plasma generating chamber, 22-plasma delivery pipe, 23-first driving mechanism, 24-magnetic isolation cover, 25-sealing cover, 30-supporting seat, 40-filter partition, 41-through hole, 50-second driving mechanism, 60-partition storage chamber, 01-delivery pipe section, 02-annular gap, 03-sealing ring, 031-first magnetic ring, 032-second magnetic ring, 033-magnetic fluid, 034-inner sealing lip, 035-outer sealing lip, 036-base, 001-substrate, 002-semiconductor stacked structure, 021-first semiconductor layer, 022-second semiconductor layer, 023-fin structure. DETAILED DESCRIPTION

[0033] To make the objectives, technical solutions, and advantages of this application more clear, the technical solutions of this application will be clearly and completely described below in conjunction with the specific embodiments of this application and the corresponding drawings. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0034] The technical solutions disclosed in various embodiments of the present application are described in detail below with reference to FIG. 1 to FIG. 15 .

[0035] The present application discloses a method for forming a semiconductor structure, which can be used to form a GAA-FET or 3D NAND memory cell, for example. The method is applied to semiconductor process equipment. The semiconductor process equipment involved in the present application includes a reaction chamber 10 and a plasma generating chamber 21. The reaction chamber 10 and the plasma generating chamber 21 are interconnected. The plasma generating chamber 21 is used to generate plasma, which can be transported to the reaction chamber 10 after generation to participate in the etching process.

[0036] Referring to FIG. 1 , the method for forming a semiconductor structure disclosed in an embodiment of the present application includes:

[0037] S101 , performing a first etching process on the semiconductor stacked structure 002 to form a plurality of fin structures 023 spaced apart from each other.

[0038] The semiconductor stacked structure 002 can be formed on the substrate 001 through a deposition process in a chemical vapor deposition chamber, for example. The semiconductor stacked structure 002 includes at least one first semiconductor layer 021 and at least one second semiconductor layer 022 alternately stacked. The structure formed after step S101 is shown in FIG2 . Each fin-shaped structure 023 is formed by alternating portions of each first semiconductor layer 021 and each second semiconductor layer 022. In other words, the fin-shaped structure 023 includes portions of the first semiconductor layer 021 and portions of the second semiconductor layer 022. During the first etching process, a first spacing is maintained between the plasma generating chamber 21 and the reaction chamber 10. In some embodiments, the plurality of fin-shaped structures 023 can be spaced apart along the extension direction of the substrate 001. The first etching process can be, for example, an anisotropic etching process. By applying a radio frequency bias to the lower electrode of the reaction chamber 10, charged ions in the plasma are attracted to etch the semiconductor stacked structure 002 vertically, thereby forming fin-shaped structures 023 with high verticality and straight sidewalls.

[0039] S102 , performing a second etching process on the fin structure 023 to selectively etch at least a portion of one of the first semiconductor layer 021 and the second semiconductor layer 022 .

[0040] The structure formed after step S102 is completed is shown in Figure 3. Step S102 is to further etch on the basis of step S101. When performing the second etching process, the plasma generating chamber 21 and the reaction chamber 10 are separated by a second spacing. In the embodiment of the present application, the second spacing is greater than the first spacing. The second etching process can be, for example, an isotropic etching process, and no radio frequency bias is applied to the lower electrode. In the example of Figure 3, the second semiconductor layer 022 has a high etching selectivity relative to the first semiconductor layer 021, thereby achieving lateral etching of the second semiconductor layer 022. In the example of Figure 3, only a portion of the second semiconductor layer 022 is selectively etched. Those skilled in the art should understand that the entire second semiconductor layer 022 can also be etched.

[0041] As described above, there is a certain distance between the plasma generating chamber 21 and the reaction chamber 10. After the plasma is generated in the plasma generating chamber 21, the plasma needs to be transported over a certain distance before entering the reaction chamber 10. Plasma includes active substances such as high-energy electrons, charged ions, and free radicals (free radicals are neutral and uncharged). Since the lifetime of charged ions (on the order of microseconds) is shorter than the lifetime of free radicals (on the order of milliseconds), as the plasma moves toward the reaction chamber 10, the longer the distance the plasma moves, the more charged ions disappear due to recombination, which in turn leads to a higher concentration of free radicals. Correspondingly, the shorter the distance the plasma moves, the fewer charged ions disappear due to recombination, which leads to a lower concentration of free radicals.

[0042] It can be seen from this that the method for forming a semiconductor structure disclosed in the embodiment of the present application adjusts the distance between the plasma generating chamber 21 and the reaction chamber 10, thereby adjusting the transmission distance of the plasma, and ultimately achieving the purpose of regulating the concentration of free radicals in the plasma. Different concentrations of free radicals can adapt to different etching processes to achieve different etching effects. In this case, when a plasma etching process requiring different concentrations of free radicals is performed on the semiconductor stacked structure 002, it is only necessary to adjust the distance between the plasma generating chamber 21 and the reaction chamber 10. There is no need to replace different process chambers for different etching processes, and the problem of low etching capacity caused by this will not occur.

[0043] In the embodiment of the present application, the first etching process and the second etching process have different etching purposes and therefore have different requirements for the concentration of free radicals. The first etching process and the second etching process are different etching processes. For example, the first etching process can be an anisotropic etching process, and the second etching process can be an isotropic etching process.

[0044] The semiconductor stacked structure 002 includes a first semiconductor layer 021 and a second semiconductor layer 022 alternately stacked. The first semiconductor layer 021 and the second semiconductor layer 022 can be of various types and made of different materials. For example, the first semiconductor layer 021 can be silicon oxide, and the second semiconductor layer 022 can be silicon nitride; or the first semiconductor layer 021 can be Si, and the second semiconductor layer 022 can be SiGe. The second etching process can selectively etch at least a portion of one of the first semiconductor layer 021 and the second semiconductor layer 022, for example, selectively removing SiGe from a stacked structure of Si and SiGe to form a GAA-FET, or selectively removing silicon nitride from a stacked structure of silicon nitride and silicon oxide to form a 3D NAND memory cell.

[0045] In some embodiments, the first semiconductor layer 021 is a silicon oxide layer, and the second semiconductor layer 022 is a silicon nitride layer. The process gas used in the second etching process may include a fluorine-containing gas and an oxygen-containing gas. In some embodiments, the ratio of the fluorine element in the process gas to the oxygen element in the process gas may be in the range of 0.1 to 2. The oxygen-containing gas may be, for example, nitrogen oxides, carbon oxides, oxygen, etc. The fluorine-containing gas may be at least one of CF4, C3F6, C4F8, NF3, and SF6. In this process gas, the fluorine-containing gas serves as the primary etching gas, and the fluorine element reacts with the silicon element to generate the volatile product SiF4 to achieve etching. The oxygen-containing gas serves as the auxiliary etching gas, and the oxygen element can inhibit the reaction of the fluorine element with the silicon oxide layer, thereby improving the etching selectivity of silicon nitride over silicon oxide. In some embodiments, the process gas used in the second etching process may not contain hydrogen. This is because the inventors of the present application found that during the etching process, the presence of hydrogen in the process gas will cause non-volatile polymers to be deposited on the surfaces of the silicon oxide and silicon nitride layers, thereby hindering further etching, reducing the etching rate, and to a certain extent reducing the etching selectivity of silicon nitride relative to silicon oxide.

[0046] The embodiments of the present application do not limit the specific types of process gases required for the first etching process and the second etching process. More specifically, when performing the second etching process, the pressure of the reaction chamber 10 can be 0 to 2 Torr, the upper electrode RF power of the reaction chamber 10 can range from 50W to 3000W, and no lower electrode RF power is applied. In a specific embodiment, the process gases used in the second etching process include CF4 and O2, and the ratio of CF4 to O2 ranges from 0.1 to 1. The electron microscope image obtained after the second etching process is completed is shown in Figure 4, which achieves selective etching of the silicon nitride layer relative to the silicon oxide layer.

[0047] As can be seen from FIG4 , while etching silicon nitride, there is also a certain loss of silicon oxide on the outside, which is in the shape of an arc. In order to further improve the etching selectivity of the silicon nitride layer relative to the silicon oxide layer, in some embodiments, the process gas used in the second etching process may also include a nitrogen-containing gas, wherein the ratio of the content of the fluorine element in the process gas to the nitrogen element in the process gas may be greater than 1. The inventors of the present application have discovered that when the auxiliary etching gas includes both nitrogen and oxygen, the oxygen and nitrogen elements will combine to form N x O y The substance can further promote the etching of the silicon nitride layer. Furthermore, the content ratio of the fluorine element to the nitrogen element can be greater than 2 and less than 10.

[0048] In a specific embodiment, the process gases used in the second etching process may include CF4, O2, and N2. The flow ratio of CF4 to O2 may be in the range of 0.1 to 1, and the flow ratio of CF4 to N2 may be in the range of greater than 0.5. More preferably, the flow ratio of CF4 to N2 may be in the range of 0.1 to 1. The electron microscope image obtained after the second etching process is completed is shown in Figure 5. It can be clearly seen that the sidewalls of the etched recessed silicon nitride layer are smooth, the etching uniformity is good, and the profile of the outer silicon oxide layer is straight. When nitrogen-containing gas is added to the process gas used in the second etching process, the etching selectivity of the silicon nitride layer relative to the silicon oxide layer is significantly improved, and the loss of the silicon oxide layer is ensured to be extremely low while etching the silicon nitride layer. It should be noted that the ratio between the gases in this article refers to the volume ratio or flow ratio.

[0049] Furthermore, in some embodiments, as shown in FIG7 , the semiconductor process equipment disclosed in the embodiment of the present application may further include a filter partition 40 , and the method disclosed in the embodiment of the present application may further include:

[0050] When performing the first etching process, the filter partition 40 is moved out of the reaction chamber 10;

[0051] In this case, various ions of the plasma input into the reaction chamber 10 may participate in the etching.

[0052] When the second etching process is performed, the filter plate 40 is moved into the reaction chamber 10 . The filter plate 40 is used to block the charged ions in the generated plasma from passing through, that is, to block the charged ions from reaching the surface of the semiconductor stack structure 002 .

[0053] In this case, since the filter 40 filters out the charged ions in the plasma, the uncharged free radicals in the plasma pass through the filter 40 and participate in the second etching process, thereby achieving a better isotropic etching effect. Specifically, the filter 40 is provided with through-holes 41. Since the lifespan of the charged ions is shorter than that of the free radicals, the charged ions extend their path when passing through the through-holes 41, causing the charged ions to annihilate. Since the free radicals have a longer lifespan, the free radicals that collide with the non-through-hole areas of the filter 40 can also pass through the through-holes 41 through their continued movement and participate in the second etching process.

[0054] In an embodiment of the present application, the filter partition 40 can also be grounded or applied with a certain voltage, so that when the plasma passes through the filter partition 40, the charged ions in the plasma will be adsorbed on the filter partition 40 and compounded and cannot pass through the filter partition 40, thereby better achieving the purpose of filtering the charged ions.

[0055] Referring again to FIG. 6 , an embodiment of the present application discloses a plasma generating device 20, which is configured to cooperate with the reaction chamber 10. The plasma generating device 20 includes a plasma generating chamber 21 and a plasma delivery tube 22. The plasma generating chamber 21 is configured to generate plasma. One end of the plasma delivery tube 22 is connected to the plasma generating chamber 21, and the other end of the plasma delivery tube 22 is configured to communicate with the reaction chamber 10. During operation, the plasma generating chamber 21 generates plasma, which is then delivered to the reaction chamber 10 via the plasma delivery tube 22 for performing the corresponding etching process.

[0056] In the embodiment of the present application, the length of the plasma delivery tube 22 is adjustable so that the plasma generating chamber 21 is closer to or farther away from the reaction chamber 10. In this case, the length of the plasma delivery tube 22 can be adjusted, thereby changing the distance between the plasma generating chamber 21 and the reaction chamber 10 (e.g., the first distance, the second distance), and ultimately adjusting the concentration of free radicals delivered to the reaction chamber 10 to adapt to different types of etching processes. It can be seen that the plasma generating device 20 disclosed in the embodiment of the present application can achieve free radical concentration adjustment, thereby allowing the reaction chamber 10 to perform different types of etching processes without having to replace different reaction chambers 10 during the process, which is undoubtedly conducive to improving etching capacity.

[0057] There are various structures for achieving adjustable length of the plasma delivery tube 22, and the embodiments of the present application do not limit the specific structure of the plasma delivery tube 22. In some embodiments, the plasma delivery tube 22 may include a bellows and a protective layer, such as a quartz coating or an aluminum oxide layer, coated on the inner wall of the bellows. The bellows can be extended and retracted to adjust the length of the plasma delivery tube 22. A first end of the bellows can be sealed and docked with the plasma generation chamber 21, and a second end of the bellows is configured to communicate with the reaction chamber 10. The protective layer protects the bellows from plasma etching.

[0058] In other embodiments, as shown in FIG8 , the plasma delivery tube 22 may include at least two delivery tube segments 01, with one adjacent delivery tube segment 01 being positioned outside the other and relatively movable. The delivery tube segment 01 at one end of the plasma delivery tube 22 may communicate with the plasma generating chamber 21, while the delivery tube segment 01 at the other end of the plasma delivery tube 22 is configured to communicate with the reaction chamber 10. The plasma delivery tube 22 may be adaptively retracted and extended by relative sliding between the two adjacent delivery tube segments 01. During actual use, the relative sliding between the two adjacent delivery tube segments 01 changes the length of the entire plasma delivery tube 22. This change in the length of the plasma delivery tube 22 changes the distance over which the plasma is transported, thereby adjusting the concentration of free radicals in the plasma.

[0059] In an embodiment where the plasma delivery tube 22 includes at least two delivery tube segments 01, an annular gap 02 may be formed between the nested portions of two adjacent delivery tube segments 01, as shown in FIG8 . During the process, plasma may escape through the annular gap 02. Therefore, the length (i.e., along the length direction of the plasma delivery tube 22) and the width of the annular gap 02 may be designed such that once the plasma enters the annular gap 02, it is annihilated during its escape along the annular gap 02, thereby preventing the plasma from escaping out of the plasma delivery tube 22 through the annular gap 02. Of course, those skilled in the art may design the dimensions (i.e., length and width) of the annular gap 02 such that, while the annular gap 02 connects the interior of the plasma delivery tube 22 with the external environment, it serves as an annihilation gap where the plasma can be annihilated, thereby mitigating the occurrence of plasma escape.

[0060] When the annular gap 02 connects the interior of the plasma delivery tube 22 with the external environment, the process gas may also leak out through the annular gap 02. To avoid adverse effects on the external environment, in some embodiments, as shown in FIG9 , the plasma generating device 20 disclosed in the embodiment of the present application may further include a sealing cover 25. The sealing cover 25 is provided outside the plasma delivery tube 22. The plasma delivery tube 22 passes through the sealing cover 25 and is slidably sealed with the sealing cover 25. Of course, the sealing cover 25 and the plasma delivery tube 22 can be slidably engaged to avoid affecting the expansion and contraction of the plasma delivery tube 22.

[0061] No seal may be provided in the annular gap 02. Of course, in order to better prevent the escape of plasma and process gases, in a further technical solution, as shown in Figures 10 to 12, the plasma generating device 20 disclosed in the embodiment of the present application may further include a sealing ring 03, which is provided between two adjacent conveying pipe sections 01. Specifically, the sealing ring 03 is provided in the annular gap 02 formed by the two adjacent conveying pipe sections 01. Specifically, among the multiple conveying pipe sections 01 that constitute the plasma conveying tube 22, a sealing ring 03 may be provided in the annular gap 02 formed by the nesting of all two adjacent conveying pipe sections 01. The sealing ring 03 can block the annular gap 02, thereby better preventing the passage of plasma and process gases. The sealing ring 03 can slide relative to the other of the two adjacent conveying pipe sections 01, thereby achieving the sealing of the annular gap 02 while also being able to adapt to the relative movement between the two adjacent conveying pipe sections 01 during the expansion and contraction process of the plasma conveying tube 22.

[0062] There can be many types of sealing rings 03, and the embodiments of the present application do not limit the specific types of sealing rings 03. In some embodiments, the sealing ring 03 can be a magnetic fluid sealing ring. As shown in Figure 10, the magnetic fluid sealing ring can include a first magnetic ring 031, a second magnetic ring 032 and a magnetic fluid 033. The first magnetic ring 031 and the second magnetic ring 032 are both sleeved on the inner conveying pipe section 01 and are spaced apart. The magnetic poles of the opposite ends of the first magnetic ring 031 and the second magnetic ring 032 are opposite, and the magnetic fluid 033 is confined in the space enclosed by the first magnetic ring 031, the second magnetic ring 032, the outer wall of the inner conveying pipe section 01 and the inner wall of the outer conveying pipe section 01, and is respectively sealed with the outer wall of the inner conveying pipe section 01 and the inner wall of the outer conveying pipe section 01, thereby achieving sealing of the annular gap 02. In this embodiment, the magnetic fluid sealing ring can not only perform a sealing function, but also avoid friction with the delivery pipe section 01, thereby preventing particles generated by friction from falling into the plasma delivery pipe 22, and further preventing particles from falling into the plasma delivery pipe 22 and entering the reaction chamber 10 to contaminate the reaction chamber 10, thereby better ensuring the process effect.

[0063] To prevent the magnetic fluid seal ring from being interfered with by the magnetic field of the external environment, or to prevent the magnetic field of the magnetic fluid seal ring from affecting the external environment, in some embodiments, as shown in FIG11 , the plasma generating device 20 disclosed in the embodiment of the present application may further include a magnetic isolation cover 24, through which the plasma delivery tube 22 passes, and the magnetic isolation cover 24 is located outside the area corresponding to the magnetic fluid seal ring. In this case, the magnetic isolation cover 24 can play a role in isolating the magnetic field, thereby preventing magnetic field interference. In this case, the magnetic isolation cover 24 can slide with the plasma delivery tube 22, thereby not affecting the expansion and contraction of the plasma delivery tube 22.

[0064] As described above, there are many types of sealing rings 03. Specifically, sealing ring 03 can also be a common sealing ring, for example, an O-ring, a V-ring, etc. Referring to FIG12 , in some embodiments, the sealing ring can be a Y-ring. The Y-ring is an integrated structure and includes an inner sealing lip 034, an outer sealing lip 035, and a base 036. The first ends of the inner sealing lip 034 and the outer sealing lip 035 are both fixed to the base 036, and the second ends of the inner sealing lip 034 and the outer sealing lip 035 can extend away from the base 036 and away from each other. The outer sealing lip 035 seals against the inner wall of the outer conveying pipe section 01, and the inner sealing lip 034 seals against the outer wall of the inner conveying pipe section 01. In this case, the inner sealing lip 034 and the outer sealing lip 035 respectively seal against the two adjacent conveying pipe sections 01 to achieve a seal. At the same time, a groove is formed between the inner sealing lip 034 and the outer sealing lip 035 , thereby collecting particles generated by friction during the relative sliding between the sealing ring 03 and the delivery pipe section 01 , thereby alleviating the phenomenon that particles may fall into the plasma delivery pipe 22 .

[0065] In the embodiment of the present application, of two adjacent delivery pipe sections 01, the higher delivery pipe section 01 can be nested outside the lower delivery pipe section 01. In this case, the annular gap 02 formed by the two adjacent delivery pipe sections 01 is located outside the lower delivery pipe section 01. In this case, even if particles are generated by friction, they are more likely to fall into the annular gap 02 due to gravity, rather than into the lower delivery pipe section 01, and thus be transported to the reaction chamber 10.

[0066] The plasma delivery tube 22 is a conduit for transporting plasma and can therefore be made of a material suitable for transporting plasma. In some embodiments, the plasma delivery tube 22 can be made of quartz. If the plasma delivery tube 22 includes multiple delivery tube segments 01, each delivery tube segment 01 can be a quartz tube. Alternatively, the delivery tube segment 01 can be a metal tube, and the inner wall of the metal tube can be coated with a protective layer such as an aluminum oxide layer or a quartz material layer. The protective layer is used to protect the delivery tube segment 01 from being etched by the plasma. The embodiments of the present application do not limit the specific material of the delivery tube segment 01.

[0067] In order to make the equipment more automated, the plasma generating device 20 disclosed in the embodiment of the present application may further include a first driving mechanism 23, the driving end of the first driving mechanism 23 may be connected to the plasma generating chamber 21, the body of the first driving mechanism 23 is used to be installed in the reaction chamber 10 or other installation base components, and the first driving mechanism 23 is used to drive the plasma generating chamber 21 close to or away from the reaction chamber 10. In this case, the first driving mechanism 23 can drive the plasma generating chamber 21 to move relative to the reaction chamber 10, thereby approaching or moving away from the reaction chamber 10. In this process, the plasma delivery tube 22 can follow and expand and contract, thereby achieving its adjustable length. The first driving mechanism 23 can be a hydraulic telescopic member, a pneumatic telescopic member, a linear motor, etc. The embodiment of the present application does not limit the specific type of the first driving mechanism 23.

[0068] Based on the plasma generating device disclosed in the embodiment of the present application, as shown in Figure 6, the embodiment of the present application further discloses a semiconductor process equipment, which includes a reaction chamber 10 and a plasma generating device 20 disclosed in any of the above embodiments, wherein the plasma generating chamber 21 is connected to the reaction chamber 10 through a plasma delivery tube 22.

[0069] In order to ensure the etching quality and further isolate the charged ions in the plasma to enhance the isotropic etching effect, based on this, please refer to FIG7 , the semiconductor process equipment disclosed in the embodiment of the present application may also include a filter partition 40, the reaction chamber 10 has an inner cavity 11, the filter partition 40 is arranged in the inner cavity 11, and the filter partition 40 may also be grounded or have a voltage applied to it. The filter partition 40 is arranged in the inner cavity 11, thereby dividing the inner cavity 11 into a first subspace 101 and a second subspace 102, and the first subspace 101 is located above the second subspace 102. A support seat 30 is provided in the second subspace 102. The substrate 001 formed with the semiconductor stacked structure 002 shown in FIG2 and FIG3 is placed on the support seat 30, thereby being located within the second subspace 102.

[0070] First subspace 101 is connected to plasma delivery tube 22. Plasma delivered by plasma delivery tube 22 enters first subspace 101 and passes through filter plate 40. Charged ions in the plasma are filtered out by filter plate 40 and prevented from entering second subspace 102. Free radicals, being uncharged, are able to pass through filter plate 40 and enter second subspace 102, participating in etching. This ensures a high free radical concentration, enhancing the isotropic etching effect.

[0071] In some embodiments, the filter partition 40 is provided with a plurality of through holes 41 distributed at intervals for the passage of free radicals. The plurality of through holes 41 may be evenly distributed or unevenly distributed, and the embodiment of the present application does not limit this. Of course, the plurality of through holes 41 may be distributed in rows and columns, or in multiple circles, and the embodiment of the present application does not limit the specific distribution of the through holes. Of course, the through holes 41 may be straight holes or curved holes, and the embodiment of the present application does not limit this. Of course, in the case where the through holes 41 are curved holes, charged ions need a longer path to pass through the curved holes, which can better filter the charged ions, as shown in Figure 15.

[0072] In an embodiment of the present application, the filter partition 40 can be fixed in the inner cavity 11, or can be movably arranged in the inner cavity 11. Of course, in other etching scenarios, such as anisotropic etching scenarios, charged ions are required to etch the semiconductor stacked structure 002 shown in Figures 2 and 3. Based on this, as shown in Figure 13, the semiconductor process equipment disclosed in the embodiment of the present application can also include a partition storage chamber 60 and a second drive mechanism 50. Among them, the partition storage chamber 60 is located on the side of the reaction chamber 10 and is connected to the reaction chamber 10. Specifically, the partition storage chamber 60 and the reaction chamber 10 are distributed in sequence in the horizontal plane. The filter partition 40 is arranged on the supporting arm of the second drive mechanism 50, and the second drive mechanism 50 is used to transfer the filter partition 40 between the partition storage chamber 60 and the reaction chamber 10. When the charged ion etching scenario is required, the second driving mechanism 50 places the filter partition 40 in the partition storage chamber 60 . When the charged ion etching scenario is not required, the second driving mechanism 50 places the filter partition 40 in the reaction chamber 10 .

[0073] When the filter partition 40 is within the reaction chamber 10, as shown in FIG13 , the filter partition 40 divides the inner cavity 11 into a first subspace 101 and a second subspace 102, thereby preventing charged ions in the generated plasma from passing through. When the filter partition 40 is within the partition storage cavity 60, as shown in FIG14 , the filter partition 40 does not divide the inner cavity 11. In this case, charged ions in the plasma entering the inner cavity 11 from the plasma delivery tube 22 are no longer filtered by the filter partition 40.

[0074] The second drive mechanism 50 is located on the reaction chamber 10 or the partition storage chamber 60. The second drive mechanism 50 can drive the filter partition 40 to switch between the reaction chamber 10 and the partition storage chamber 60. This structural design can enhance the automation of semiconductor processing equipment. Alternatively, the filter partition 40 can be movably located within the reaction chamber 10 or the partition storage chamber 60, allowing manual switching of its position by an operator.

[0075] In the embodiment of the present application, the through hole 41 can be a straight hole or a curved hole, and the embodiment of the present application does not limit the specific shape of the through hole 41.

[0076] To improve the filtering effect, the embodiment of the present application can include at least two filter baffles 40. Accordingly, there can also be at least two second drive mechanisms 50. Each filter baffle 40 is connected to a corresponding second drive mechanism 50 and can be switched between the baffle storage chamber 60 and the reaction chamber 10 under the drive of the corresponding second drive mechanism 50. In this case, at least two filter baffles 40 are stacked or spaced apart, so that the plasma input from the first subspace 101 undergoes multiple filtration passes, thereby better filtering out charged ions in the plasma. Thus, when there are multiple filter baffles 40, by adjusting the number of filter baffles 40 in the reaction chamber 10, it is possible to further filter the charged ions.

[0077] In the embodiment of the present application, each filter plate 40 is provided with a plurality of through-holes 41. At least two second drive mechanisms 50 respectively drive the position of the corresponding filter plate 40 within the reaction chamber 10 to adjust the overlapping area of ​​the through-holes 41 of at least two filter plates 40. For example, during the specific adjustment process, each filter plate 40 can be driven by a corresponding second drive mechanism 50. In this case, the second drive mechanism 50 can cause the through-holes 41 of the filter plates 40 to completely overlap, partially overlap, or not overlap. Of course, in the case of non-overlap, plasma can enter the through-holes 41 of one filter plate 40 into the gap between it and the adjacent filter plate 40, and then enter the through-holes 41 of the other filter plate 40. In this embodiment, the second drive mechanism 50 can adjust the position of each corresponding filter plate 40, thereby achieving the purpose of adjusting the overlapping area of ​​the through-holes 41 on the filter plates 40. For example, each second driving mechanism 50 can be rotated by a corresponding angle to adjust the degree of overlap of the through holes; or each second driving mechanism 50 can be rotated by the same angle, for example, each tray carrying the filter baffle 40 is arranged on the same rotating axis, wherein one or more trays are extended or retracted a certain distance in the radial direction to adjust the degree of overlap of the through holes.

[0078] In this case, when the plasma passes through the filter septum 40 and the charged ions are adsorbed and filtered out by the filter septum 40, the free radicals will collide with the filter septum 40 to varying degrees due to the different overlapping areas between the filter septum 40, resulting in different free radical activity. The more collisions the free radicals experience while passing through the filter septum 40, the lower their activity gradually decreases. Excessive collisions can cause some free radicals to reach their lifespan and be annihilated, thus affecting the number of free radicals passing through the filter septum 40. The activity and number of free radicals lead to different etching rates. Specifically, the lower the activity of the free radicals, the smaller their number, and the lower the etching rate. Conversely, the higher the activity of the free radicals, the larger their number, and the higher the etching rate. The smaller the overlapping area of ​​the through-holes 41, the more collisions the free radicals experience while passing through the filter septum 40, resulting in lower free radical activity and fewer free radicals. Conversely, the fewer collisions the free radicals experience while passing through the filter septum 40, the higher the activity of the free radicals and the larger their number.

[0079] It can be seen from this that in the embodiment of the present application, by adjusting the relative position of the filter partition 40, the overlapping area of ​​the through holes 41 of the filter partition 40 can be adjusted, and then the activity and number of free radicals can be adjusted to achieve the purpose of adjusting the etching rate.

[0080] Furthermore, the semiconductor process equipment disclosed in the embodiments of the present application may further include a controller. The controller includes at least one memory and at least one processor. The memory stores a computer program, which, when executed by the processor, implements the methods described in the embodiments above.

[0081] In other embodiments, the semiconductor processing equipment may further include a controller configured to adjust the length of the plasma delivery tube 22 according to the process steps to be performed by the semiconductor processing equipment. Specifically, the controller may control the first drive mechanism 23, thereby causing the first drive mechanism 23 to drive the plasma generation chamber 21 to move, thereby moving the plasma generation chamber 21 closer to or further away from the reaction chamber 10. During this process, the plasma delivery tube 22 may adaptively expand and contract, thereby indirectly adjusting the length of the plasma delivery tube 22.

[0082] In an embodiment of the present application, the semiconductor processing equipment may further include a controller configured to maintain a first spacing between the plasma generating chamber 21 and the reaction chamber 10 when the semiconductor processing equipment performs an anisotropic etching process. The controller may also be configured to maintain a second spacing between the plasma generating chamber 21 and the reaction chamber 10 when the semiconductor processing equipment performs an isotropic etching process, the second spacing being greater than the first spacing. Changing the distance between the plasma generating chamber 21 and the reaction chamber 10 essentially changes the length of the plasma delivery tube 22, ultimately changing the plasma delivery distance.

[0083] In other embodiments, the semiconductor process equipment may further include a controller, which is used to control the second driving mechanism 50 so that the filter partition 40 is placed in the partition storage cavity 60 when the semiconductor process equipment performs an anisotropic etching process; the controller is also used to control the second driving mechanism 50 so that the filter partition 40 is placed in the reaction chamber 10 when the semiconductor process equipment performs an isotropic etching process.

[0084] The above embodiments of this application focus on the differences between the various embodiments. As long as the different optimization features of the various embodiments are not contradictory, they can be combined to form a better embodiment. Considering the simplicity of the text, they will not be repeated here.

[0085] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. A method for forming a semiconductor structure, the method being applied to a semiconductor processing apparatus, the semiconductor processing apparatus including a plasma generation chamber and a reaction chamber that communicate with each other, characterized in that, The method includes: Performing a first etching process on a semiconductor stack structure to form a plurality of spaced-apart fin structures; wherein, the semiconductor stack structure includes at least one first semiconductor layer and at least one second semiconductor layer stacked alternately; when performing the first etching process, a first spacing is provided between the plasma generation chamber and the reaction chamber; Performing a second etching process on the fin structures to selectively etch at least a part of one of the first semiconductor layer and the second semiconductor layer; when performing the second etching process, a second spacing is provided between the plasma generation chamber and the reaction chamber, and the second spacing is greater than the first spacing.

2. The method according to claim 1, characterized in that, The semiconductor process equipment further includes a filtering partition, and the method further includes: When performing the first etching process, moving the filtering partition outside the reaction chamber; When performing the second etching process, moving the filtering partition into the reaction chamber, and the filtering partition is used to block the passage of charged ions in the generated plasma.

3. The method according to claim 1, characterized in that, The first etching process is an anisotropic etching process, and the second etching process is an isotropic etching process.

4. The method according to claim 1, wherein The first semiconductor layer is a silicon oxide layer, the second semiconductor layer is a silicon nitride layer, and the second etching process selectively etches at least a part of the silicon nitride layer.

5. The method according to claim 4, characterized in that The process gas used in the second etching process includes a fluorine-containing gas and an oxygen-containing gas, and the content ratio range of fluorine element to oxygen element in the process gas is from 0.1 to 2.

6. The method according to claim 5, characterized in that, The process gas used in the second etching process further includes a nitrogen-containing gas, and the content ratio of fluorine element to nitrogen element in the process gas is greater than 1.

7. The method according to claim 6, wherein The content ratio of the fluorine element to the nitrogen element is greater than 2 and less than 10.

8. The method according to any one of claims 5 to 7, characterized in that The process gas used in the second etching process does not contain hydrogen element; or, When performing the second etching process, the pressure in the reaction chamber is from 0 to 2 Torr; Or, When performing the second etching process, the radio frequency power of the upper electrode in the reaction chamber ranges from 50 W to 3000 W; or, The fluorine-containing gas includes at least one of CF4, C3F6, C4F8, NF3, and SF6, the oxygen-containing gas includes O₂, the process gas further includes a nitrogen-containing gas, and the nitrogen-containing gas includes N₂.

9. A plasma generating device for cooperating with a reaction chamber, characterized in that, The plasma generating device includes: A plasma generation chamber for generating plasma; A plasma delivery pipe, one end of the plasma delivery pipe is communicated with the plasma generation chamber, and the other end of the plasma delivery pipe is used to be communicated with the reaction chamber, and the length of the plasma delivery pipe is adjustable to move the plasma generation chamber closer to or farther from the reaction chamber.

10. The plasma generating device according to claim 9, characterized in that, The plasma delivery tube includes at least two delivery tube segments, one of the adjacent two delivery tube segments is sleeved outside the other and can move relative to each other. The delivery tube segment at one end of the plasma delivery tube is in communication with the plasma generation chamber, and the delivery tube segment at the other end of the plasma delivery tube is used to communicate with the reaction chamber. The plasma delivery tube can be adaptively extended and retracted by the relative sliding between the adjacent two delivery tube segments.

11. The plasma generating device according to claim 10, characterized in that, Among the adjacent two delivery tube segments, the delivery tube segment at a higher position is sleeved outside the delivery tube segment at a lower position.

12. The plasma generating device according to claim 10, wherein, The plasma generation device further includes: a sealing ring, the sealing ring is arranged between the adjacent two delivery tube segments, and the sealing ring can follow one of the adjacent two delivery tube segments to slide relative to the other; and / or, a sealing cover body, the sealing cover body is hermetically sleeved outside the plasma delivery tube, the plasma delivery tube passes through the sealing cover body and is slidably sealed with the sealing cover body.

13. The plasma generating device according to any one of claims 9 to 12, characterized in that, The plasma generation device further includes a first driving mechanism, the driving end of the first driving mechanism is connected to the plasma generation chamber, and the first driving mechanism is used to drive the plasma generation chamber to approach or move away from the reaction chamber.

14. A semiconductor process equipment, characterized in that, including: a reaction chamber; the plasma generation device according to any one of claims 9 to 13, the plasma generation chamber is in communication with the reaction chamber through the plasma delivery tube.

15. The semiconductor processing equipment according to claim 14, wherein, The semiconductor processing equipment further includes: a filtering partition for blocking the passage of charged ions in the generated plasma, and the filtering partition is provided with through holes for the radicals in the plasma to pass through; a partition storage chamber located on the side of the reaction chamber and in communication with the reaction chamber; a second driving mechanism, the filtering partition is connected to the second driving mechanism, and the second driving mechanism is used to transfer the filtering partition between the partition storage chamber and the reaction chamber.

16. The semiconductor processing equipment according to claim 15, characterized in that, There are at least two of the filtering partitions and at least two of the second driving mechanisms. Each filtering partition is connected to the corresponding second driving mechanism and can be switched between the partition storage chamber and the reaction chamber under the drive of the corresponding second driving mechanism.

17. The semiconductor processing equipment according to claim 16, wherein, Each of the filtering partitions is provided with a plurality of the through holes; at least two of the second driving mechanisms respectively adjust the positions of the corresponding filtering partitions in the reaction chamber to adjust the overlapping area of the through holes of at least two of the filtering partitions.

18. The semiconductor processing equipment according to claim 15, characterized in that, The through holes are curved holes or straight holes.

19. The semiconductor process equipment according to any one of claims 14 to 18, characterized in that, The semiconductor processing equipment further includes a controller, the controller includes at least one memory and at least one processor, and a computer program is stored in the memory. When the computer program is executed by the processor, the method according to any one of claims 1 to 8 is implemented.

20. The semiconductor processing equipment according to any one of claims 14 to 18, characterized in that, The semiconductor processing equipment further includes a controller, and the controller is used to adjust the length of the plasma delivery tube according to the process steps to be executed by the semiconductor processing equipment.

21. The semiconductor processing equipment according to claim 20, wherein, The controller is configured to maintain a first spacing between the plasma generation chamber and the reaction chamber when the semiconductor processing equipment performs an anisotropic etching process; The controller is further configured to maintain a second spacing between the plasma generation chamber and the reaction chamber when the semiconductor processing equipment performs an isotropic etching process, and the second spacing is greater than the first spacing.

22. The semiconductor processing equipment according to any one of claims 15 to 18, characterized in that, The semiconductor processing equipment further includes a controller, which is configured to control the second driving mechanism to place the filter partition in the partition storage chamber when the semiconductor processing equipment performs an anisotropic etching process; the controller is further configured to control the second driving mechanism to place the filter partition in the reaction chamber when the semiconductor processing equipment performs an isotropic etching process.

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