Doherty power amplifier

Abstract

The present disclosure provides a Doherty power amplifier. The Doherty power amplifier comprises an input power distribution module, a phase shift module, an amplification module, and an output power combination module. The input power distribution module comprises a first power division circuit and a second power division circuit. A first end of a first power division capacitor in the first power division circuit is electrically connected to a signal input node, and a second end of the first power division capacitor is electrically connected to a first power division output node; a first end of a second power division capacitor in the second power division circuit is electrically connected to the signal input node, and a second end of the second power division capacitor is electrically connected to a second power division output node. The first power division capacitor and the second power division capacitor may be integrated lumped capacitors. In addition, the output power combination module comprises a compensation inductor, and the compensation inductor may be a surface mount inductor.

Description

A Doherty power amplifier Technical Field

[0001] The present disclosure relates to the technical field of power amplifiers, and in particular to a Doherty power amplifier with integrated input and non-integrated output. Background Art

[0002] As a common power amplifier architecture, the Doherty power amplifier (PA) can provide high-efficiency amplification for modulated signals with a high peak-to-average ratio. Generally speaking, a two-way Doherty PA comprises a two-way PA architecture consisting of a main amplifier and a peaking amplifier. A multi-way Doherty PA, on the other hand, further enhances efficiency by introducing an additional peaking amplifier within the two-way Doherty PA architecture. For example, a three-way Doherty PA comprises a three-way PA architecture consisting of a main amplifier, a first peaking amplifier, and a second peaking amplifier.

[0003] The development of 5G technology has placed higher demands on power amplifiers, among which high integration and high performance are two important aspects. To improve integration, microwave monolithic integrated circuits (i.e., MMICs) can be used. However, highly integrated MMIC power amplifiers are usually based on silicon processes, and the low resistivity of the silicon substrate makes the quality factor (i.e., Q value) of the integrated lumped inductor very low, resulting in increased losses, which adversely affects the gain and efficiency of the circuit. In addition, the commonly used topology of integrated lumped inductors is a planar spiral inductor, which usually occupies a large area. This not only increases the chip size and is not conducive to cost reduction, but also increases losses and reduces the gain of the power amplifier. In addition, with regard to improving performance, integrated lumped inductors based on silicon processes are not suitable for the output power combination module of the Doherty power amplifier. This is because they will cause large losses at the output end, which seriously drags down efficiency. Currently, for application scenarios with low inductance values, bonding wires (i.e., bondwires) are usually used at the output end to implement the inductor. However, the quality factor of the bonding wire wrapped in epoxy resin is only about 30, and in order to solve the backflow loss through the silicon substrate, it is necessary to lay a baffle under the bonding wire to improve the loss, which will also increase the chip size and is not conducive to reducing costs.

[0004] Summary of the Invention

[0005] According to the first aspect of the present disclosure, a Doherty power amplifier is provided, which includes: an input power distribution module, a phase shift module, an amplification module and an output power synthesis module. The input power distribution module includes a first power division circuit and a second power division circuit. The first end of the first power division capacitor in the first power division circuit is electrically connected to the signal input node, and the second end of the first power division capacitor is electrically connected to the first power division output node. The first end of the second power division capacitor in the second power division circuit is electrically connected to the signal input node, and the second end of the second power division capacitor is electrically connected to the second power division output node. The phase shift module is configured to: receive a first power division output signal from the first power division output node and output a first phase-shifted output signal at a first phase-shifted output node, receive a second power division output signal from the second power division output node and output a second phase-shifted output signal at a second phase-shifted output node, wherein the phase of the second phase-shifted output signal lags behind the phase of the first phase-shifted output signal by a preset phase value. The amplification module includes a main amplifier and a first peak amplifier. The main amplifier is configured to receive the first phase-shifted output signal and output the main amplified signal at a main amplified signal output node. Furthermore, the first peak amplifier is configured to receive the second phase-shifted output signal and output the first peak amplified signal at a first peak amplified signal output node. The output power combining module is configured to receive the main amplified signal and the first peak amplified signal, align the phases of the main amplified signal and the first peak amplified signal, and combine the two signals for output.

[0006] According to some exemplary embodiments, the first power dividing capacitor and the second power dividing capacitor are integrated lumped capacitors.

[0007] According to some exemplary embodiments, the phase-shifting module includes a phase-shifting capacitor, a first end of the phase-shifting capacitor is electrically connected to the first power division output node, a second end of the phase-shifting capacitor is electrically connected to the first phase-shifting output node, and the phase-shifting module electrically connects the second power division output node to the second phase-shifting output node.

[0008] According to some exemplary embodiments, the phase-shifting capacitor is an integrated lumped capacitor.

[0009] According to some exemplary embodiments, the phase-shifting module electrically connects the first power division output node with the first phase-shifted output node, and the phase-shifting module includes a phase-shifting inductor, a first end of the phase-shifting inductor electrically connected to the second power division output node, and a second end of the phase-shifting inductor electrically connected to the second phase-shifted output node.

[0010] According to some exemplary embodiments, the phase-shifting inductor is an integrated lumped inductor.

[0011] According to some exemplary embodiments, the main amplifier includes a first transistor, the gate of the first transistor is electrically connected to the first phase-shifted output node, the source of the first transistor is grounded, and the drain of the first transistor is electrically connected to the main amplified signal output node; the first peak amplifier includes a second transistor, the gate of the second transistor is electrically connected to the second phase-shifted output node, the source of the second transistor is grounded, and the drain of the second transistor is electrically connected to the first peak amplified signal output node.

[0012] According to some exemplary embodiments, the output power synthesis module includes a compensation inductor, a first end of the compensation inductor is electrically connected to the main amplified signal output node, and a second end of the compensation inductor is electrically connected to the first peak amplified signal output node.

[0013] According to some exemplary embodiments, the compensating inductor is a surface mount inductor.

[0014] According to some exemplary embodiments, in the Doherty power amplifier as described in the first aspect of the present disclosure, the input power distribution module also includes a third power division circuit, the first end of the third power division capacitor in the third power division circuit is electrically connected to the signal input node, and the second end of the third power division capacitor is electrically connected to the third power division output node; the phase shift module is also configured to: receive a third power division output signal from the third power division output node and output a third phase-shifted output signal at the third phase-shifted output node, wherein the phase of the third phase-shifted output signal lags behind the phase of the second phase-shifted output signal by the preset phase value; the amplification module also includes a second peak amplifier, which is configured to: receive the third phase-shifted output signal and output a second peak amplified signal at the second peak amplified signal output node; the output power synthesis module is also configured to: receive the second peak amplified signal, make the phases of the main amplified signal, the first peak amplified signal and the second peak amplified signal the same and synthesize the three for output.

[0015] According to some exemplary embodiments, the first power dividing capacitor, the second power dividing capacitor, and the third power dividing capacitor are integrated lumped capacitors.

[0016] According to some exemplary embodiments, the phase-shifting module includes a phase-shifting capacitor and a phase-shifting inductor, wherein the first end of the phase-shifting capacitor is electrically connected to the first power division output node, the second end of the phase-shifting capacitor is electrically connected to the first phase-shifting output node, the first end of the phase-shifting inductor is electrically connected to the third power division output node, the second end of the phase-shifting inductor is electrically connected to the third phase-shifting output node, and the phase-shifting module causes the second power division output node and the second phase-shifting output node to be conductive.

[0017] According to some exemplary embodiments, the phase-shifting capacitor is an integrated lumped capacitor, and the phase-shifting inductor is an integrated lumped inductor.

[0018] According to some exemplary embodiments, the phase-shifting module includes a first phase-shifting inductor and a second phase-shifting inductor, wherein the first end of the first phase-shifting inductor is electrically connected to the second power division output node, the second end of the first phase-shifting inductor is electrically connected to the second phase-shifting output node, the first end of the second phase-shifting inductor is electrically connected to the third power division output node, the second end of the second phase-shifting inductor is electrically connected to the third phase-shifting output node, and the phase-shifting module causes the first power division output node and the first phase-shifting output node to be conductive.

[0019] According to some exemplary embodiments, the first phase-shifting inductor and the second phase-shifting inductor are integrated lumped inductors.

[0020] According to some exemplary embodiments, the second phase-shifting inductor is formed by connecting two integrated lumped inductors in series.

[0021] According to some exemplary embodiments, the main amplifier includes a first transistor, the gate of the first transistor is electrically connected to the first phase-shifted output node, the source of the first transistor is grounded, and the drain of the first transistor is electrically connected to the main amplified signal output node; the first peak amplifier includes a second transistor, the gate of the second transistor is electrically connected to the second phase-shifted output node, the source of the second transistor is grounded, and the drain of the second transistor is electrically connected to the first peak amplified signal output node; the second peak amplifier includes a third transistor, the gate of the third transistor is electrically connected to the third phase-shifted output node, the source of the third transistor is grounded, and the drain of the third transistor is electrically connected to the second peak amplified signal output node.

[0022] According to some exemplary embodiments, the output power synthesis module includes a first compensation inductor and a second compensation inductor, wherein the first end of the first compensation inductor is electrically connected to the main amplified signal output node, the second end of the first compensation inductor is electrically connected to the first peak amplified signal output node, the first end of the second compensation inductor is electrically connected to the first peak amplified signal output node, the second end of the second compensation inductor is electrically connected to the second peak amplified signal output node, and the inductance value of the first compensation inductor is greater than the inductance value of the second compensation inductor.

[0023] According to some exemplary embodiments, at least one of the first compensation inductor and the second compensation inductor is a surface mount inductor.

[0024] According to some exemplary embodiments, the preset phase value is between 60 degrees and 100 degrees. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Hereinafter, various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings; in the accompanying drawings:

[0026] FIG1 schematically shows a power division and phase shifting circuit in a known Doherty power amplifier;

[0027] FIG2 schematically shows a Doherty power amplifier according to some exemplary embodiments of the present disclosure;

[0028] FIG3 schematically shows a Doherty power amplifier according to some exemplary embodiments of the present disclosure;

[0029] FIG4 schematically shows a Doherty power amplifier according to some exemplary embodiments of the present disclosure;

[0030] FIG5 schematically shows a Doherty power amplifier according to some exemplary embodiments of the present disclosure;

[0031] FIG6 schematically shows a Doherty power amplifier according to some exemplary embodiments of the present disclosure;

[0032] FIG7 shows the relationship between the inductance value of the compensation inductor and the operating frequency;

[0033] 8 and 9 show comparison results of a Doherty power amplifier according to the present disclosure and an existing Doherty power amplifier in terms of power allocation and phase shift;

[0034] 10 and 11 show comparison results of another Doherty power amplifier according to the present disclosure and a conventional Doherty power amplifier in terms of power allocation and phase shift;

[0035] FIG12 schematically shows a Doherty power amplifier according to some other exemplary embodiments of the present disclosure;

[0036] FIG13 schematically shows a Doherty power amplifier according to some other exemplary embodiments of the present disclosure;

[0037] FIG14 schematically shows a Doherty power amplifier according to some other exemplary embodiments of the present disclosure;

[0038] FIG15 schematically shows a Doherty power amplifier according to some other exemplary embodiments of the present disclosure;

[0039] FIG16 schematically shows a Doherty power amplifier according to some other exemplary embodiments of the present disclosure;

[0040] It should be understood that the accompanying drawings are merely schematic illustrations of exemplary embodiments of the present disclosure and are not intended to limit the present disclosure and are not necessarily drawn to scale. In addition, in the accompanying drawings, identical or similar features are indicated by identical or similar reference numerals. DETAILED DESCRIPTION

[0041] Various exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings so that those skilled in the art can fully understand and implement the technical solutions according to the present disclosure.

[0042] Referring to FIG1 , which schematically illustrates a power division phase shift circuit in a known Doherty power amplifier. The power division phase shift circuit shown in FIG1 can be used in a three-way Doherty power amplifier, which divides the signal to be amplified input from the signal input node RFIN into three signals with preset power and phase, and transmits the three signals to the main amplifier Main, the first peak amplifier Peak1, and the second peak amplifier Peak2 for subsequent amplification and synthesis output of the amplified signals. The power division phase shift circuit is composed of five inductors LL1, LL2, LL3, LL4, LL5 and two resistors R1 and R2. Specifically, the inductors LL1, LL2, and the resistor R1 constitute a first-stage two-way power divider, the inductors LL3, LL4, and the resistor R2 constitute a second-stage two-way power divider, and the inductor LL1 constitutes a first phase shift circuit, the inductors LL2 and LL3 constitute a second phase shift circuit, and the inductors LL2, LL4, and LL5 constitute a third phase shift circuit. The power division and phase shifting circuit requires a total of five planar spiral inductors, which not only increases the chip size and is not conducive to reducing costs, but also increases losses and reduces the gain of the power amplifier.

[0043] FIG2 schematically illustrates a Doherty power amplifier according to some exemplary embodiments of the present disclosure. As shown in FIG2 , Doherty power amplifier 100 is a three-way integrated Doherty power amplifier, comprising an input power distribution module 110, a phase shift module 120, an amplification module 130, and an output power combination module 140. The amplifier amplifies a signal input from a signal input node RFIN and outputs the amplified signal at a signal output node OUT.

[0044] The input power distribution module 110 is configured to divide the signal to be amplified input from the signal input node RFIN according to a preset power distribution ratio, and output the divided signals through the corresponding power division circuits so that they can be processed by subsequent modules. In the Doherty power amplifier 100 shown in Figure 1, the input power distribution module 110 includes a first power division circuit 111, a second power division circuit 112, and a third power division circuit 113. The first end of the first power division capacitor C1 in the first power division circuit 111 is electrically connected to the signal input node RFIN, and the second end thereof is electrically connected to the first power division output node N1. The first end of the second power division capacitor C2 in the second power division circuit 112 is electrically connected to the signal input node RFIN, and the second end thereof is electrically connected to the second power division output node N2. The first end of the third power division capacitor C3 in the third power division circuit 113 is also electrically connected to the signal input node RFIN, and the second end thereof is electrically connected to the third power division output node N3. In this way, the signal to be amplified input from the signal input node RFIN is divided into three signals with required power and respectively transmitted to subsequent circuits for processing via three power division circuits.

[0045] According to some exemplary embodiments, the first power-sharing capacitor C1, the second power-sharing capacitor C2, and the third power-sharing capacitor C3 may be integrated lumped capacitors. However, it should be understood that any other suitable capacitors are also possible, and the present disclosure does not impose any limitation on the specific type of capacitors that can be used as power-sharing capacitors.

[0046] As a non-limiting example, the capacitance values ​​of the first power dividing capacitor C1, the second power dividing capacitor C2, and the third power dividing capacitor C3 can be determined as follows. Taking the Doherty power amplifier 100 shown in FIG1 as an example, the output signal of the first power dividing circuit 111 will be transmitted to the main amplifier Main, the output signal of the second power dividing circuit 112 will be transmitted to the first peak amplifier Peak1, and the output signal of the third power dividing circuit 113 will be transmitted to the second peak amplifier Peak2. Assuming that the power of the signal to be amplified input at the signal input node RFIN is 1, the power proportion of the output signal of the first power dividing circuit 111 is R_M, the power proportion of the output signal of the second power dividing circuit 112 is R_P1, and the power proportion of the output signal of the third power dividing circuit 113 is R_P2, then R_M+R_P1+R_P2=1. Assuming the center frequency of the input power distribution module 110 is f0 and the characteristic impedance at the signal input node RFIN is Z0, the capacitance values ​​of the first power-dividing capacitor C1, the second power-dividing capacitor C2, and the third power-dividing capacitor C3 are calculated using the following formulas:

[0047] 2 , the phase shift module 120 is configured to receive the power division output signals outputted from the first power division output node N1, the second power division output node N2, and the third power division output node N3, perform phase shift processing, and output corresponding phase-shifted output signals at the first phase-shifted output node N4, the second phase-shifted output node N5, and the third phase-shifted output node N6, respectively. Specifically, the phase shift module 120 is configured to receive the first power division output signal from the first power division output node N1 and output the first phase-shifted output signal at the first phase-shifted output node N4, receive the second power division output signal from the second power division output node N2 and output the second phase-shifted output signal at the second phase-shifted output node N5, and receive the third power division output signal from the third power division output node N3 and output the third phase-shifted output signal at the third phase-shifted output node N6, wherein the phase of the second phase-shifted output signal lags behind the phase of the first phase-shifted output signal by a preset phase value, and further, the phase of the third phase-shifted output signal lags behind the phase of the second phase-shifted output signal by the preset phase value. According to some exemplary embodiments, the preset phase value can be between 60 degrees and 100 degrees. It should be understood that the phase shift module 120 can have any suitable circuit structure, as long as it can achieve the above-mentioned phase shift processing of each power divider output signal. The specific circuit structure of the phase shift module 120 will be described in detail below.

[0048] The amplification module 130 is configured to receive the phase-shifted output signals output from the first phase-shifted output node N4, the second phase-shifted output node N5, and the third phase-shifted output node N6, respectively, amplify them, and output the corresponding amplified signals at the main amplified signal output node N7, the first peak amplified signal output node N8, and the second peak amplified signal output node N9. Specifically, the amplification module 130 includes a main amplifier Main, a first peak amplifier Peak1, and a second peak amplifier Peak2. The main amplifier Main is configured to receive the first phase-shifted output signal from the first phase-shifted output node N4 and output the main amplified signal at the main amplified signal output node N7. The first peak amplifier Peak1 is configured to receive the second phase-shifted output signal from the second phase-shifted output node N5 and output the first peak amplified signal at the first peak amplified signal output node N8. The second peak amplifier Peak2 is configured to receive the third phase-shifted output signal from the third phase-shifted output node N6 and output the second peak amplified signal at the second peak amplified signal output node N9.

[0049] Output power combining module 140 is configured to receive the main amplified signal from main amplified signal output node N7, the first peak amplified signal from first peak amplified signal output node N8, and the second peak amplified signal from second peak amplified signal output node N9, align the phases of the main amplified signal, the first peak amplified signal, and the second peak amplified signal, and combine them for output from signal output node OUT. It should be understood that output power combining module 140 can have any suitable circuit structure, as long as it can achieve the aforementioned phase shifting and combined output of the amplified signals. The specific circuit structure of output power combining module 140 is described in detail below.

[0050] In some exemplary embodiments, the input power distribution module 110 and the phase shift module 120 can be integrated on one die, and the main amplifier Main, the first peak amplifier Peak1, and the second peak amplifier Peak2 can be integrated on another die, and the latter die can be electrically connected to the former die via bonding wires. In other exemplary embodiments, the input power distribution module 110 and the phase shift module 120 can also be integrated on different dies, and the different dies can be electrically connected via bonding wires. In addition, the same die or different dies mentioned above can be packaged in a single package, while the output power synthesis module 140 is implemented in a non-integrated manner, for example, it can be connected to the package via bonding wires or through-holes.

[0051] From the above analysis, it can be seen that the Doherty power amplifier 100 shown in Figure 2 uses capacitors to implement the input power distribution module 110, avoiding the use of inductors. This can reduce the chip size and help reduce costs. In addition, it can also reduce losses and increase the gain of the Doherty power amplifier.

[0052] Referring to FIG. 3 , a Doherty power amplifier is schematically illustrated according to some exemplary embodiments of the present disclosure. As shown in FIG. 3 , Doherty power amplifier 100a differs from Doherty power amplifier 100 shown in FIG. 2 only in that a specific circuit structure of a phase shift module is illustrated. Therefore, the following description will focus solely on the differences between Doherty power amplifier 100a and Doherty power amplifier 100 shown in FIG. 2 , and will omit any further details regarding the similarities between the two.

[0053] The phase-shifting module 120a of the Doherty power amplifier 100a includes a phase-shifting capacitor C4 and a phase-shifting inductor L, wherein the first end of the phase-shifting capacitor C4 is electrically connected to the first power division output node N1, the second end of the phase-shifting capacitor C4 is electrically connected to the first phase-shifting output node N4, the first end of the phase-shifting inductor L is electrically connected to the third power division output node N3, the second end of the phase-shifting inductor L is electrically connected to the third phase-shifting output node N6, and the phase-shifting module 120a directly connects the second power division output node N2 to the second phase-shifting output node N5 (for example, by connecting the two through a conductive line). Phase-shifting capacitor C4 causes the phase of the first phase-shifted output signal at the first phase-shifted output node N4 to lead the phase of the first power split output signal at the first power split output node N1 by a preset phase value (for example, the preset phase value can be between 60 degrees and 100 degrees). Phase-shifting inductor L causes the phase of the third phase-shifted output signal at the third phase-shifted output node N6 to lag the phase of the third power split output signal at the third power split output node N3 by the preset phase value. Thus, phase-shifting module 120a causes the phase of the second phase-shifted output signal to lag the phase of the first phase-shifted output signal by the preset phase value, and also causes the phase of the third phase-shifted output signal to lag the phase of the second phase-shifted output signal by the preset phase value. In some exemplary embodiments, phase-shifting capacitor C4 can be an integrated lumped capacitor, and phase-shifting inductor L can be an integrated lumped inductor.

[0054] Therefore, the Doherty power amplifier 100a shown in FIG3 further utilizes a phase-shifting capacitor C4 in the phase-shifting module 120a to achieve this, thereby further reducing the use of inductors, thereby further reducing chip size and reducing costs.

[0055] Referring to FIG. 4 , a Doherty power amplifier is schematically illustrated according to some exemplary embodiments of the present disclosure. As shown in FIG. 4 , Doherty power amplifier 100b differs from Doherty power amplifier 100 shown in FIG. 2 only in that it illustrates an alternative specific circuit structure for the phase shift module. Therefore, the following description will focus solely on the differences between Doherty power amplifier 100b and Doherty power amplifier 100 shown in FIG. 2 , and will omit any further details regarding the similarities between the two.

[0056] The phase-shifting module 120b of the Doherty power amplifier 100b includes a first phase-shifting inductor L1 and a second phase-shifting inductor L2, wherein the first end of the first phase-shifting inductor L1 is electrically connected to the second power division output node N2, the second end of the first phase-shifting inductor L1 is electrically connected to the second phase-shifting output node N5, the first end of the second phase-shifting inductor L2 is electrically connected to the third power division output node N3, the second end of the second phase-shifting inductor L2 is electrically connected to the third phase-shifting output node N6, and the phase-shifting module 120b makes the first power division output node N1 and the first phase-shifting output node N4 conductive (for example, by connecting the two through a conductive line). The first phase-shifting inductor L1 causes the phase of the second phase-shifted output signal at the second phase-shifted output node N5 to lag the phase of the second power split output signal at the second power split output node N2 by a preset phase value (for example, the preset phase value can be between 60 degrees and 100 degrees). The second phase-shifting inductor L2 causes the phase of the third phase-shifted output signal at the third phase-shifted output node N6 to lag the phase of the third power split output signal at the third power split output node N3 by twice the preset phase value (i.e., a lag of 120 degrees to 200 degrees; in other words, the second phase-shifting inductor L2 causes the phase of the third phase-shifted output signal at the third phase-shifted output node N6 to lag the phase of the second power split output signal at the second power split output node N2 by the preset phase value). Thus, the phase-shifting module 120b causes the phase of the second phase-shifted output signal to lag the phase of the first phase-shifted output signal by the preset phase value, and also causes the phase of the third phase-shifted output signal to lag the phase of the second phase-shifted output signal by the preset phase value. In some exemplary embodiments, the first phase-shifting inductor L1 and the second phase-shifting inductor L2 may both be integrated lumped inductors. In addition, in some exemplary embodiments, the second phase-shifting inductor L2 may be formed by connecting two first phase-shifting inductors L1 in series.

[0057] Referring to FIG. 5 , a Doherty power amplifier is schematically illustrated according to some exemplary embodiments of the present disclosure. As shown in FIG. 5 , Doherty power amplifier 100c differs from Doherty power amplifier 100 shown in FIG. 2 only in that a specific circuit structure of an amplification module is illustrated. Therefore, the following description will focus solely on the differences between Doherty power amplifier 100c and Doherty power amplifier 100 shown in FIG. 2 , and will omit any further details regarding the similarities between the two.

[0058] The amplification module 130a of the Doherty power amplifier 100c includes a main amplifier Main, a first peak amplifier Peak1, and a second peak amplifier Peak2. Each of the main amplifier Main, the first peak amplifier Peak1, and the second peak amplifier Peak2 includes a transistor (e.g., a field effect transistor). Specifically, the main amplifier Main includes a first transistor T1, the gate of the first transistor T1 is electrically connected to the first phase-shifted output node N4, the source of the first transistor T1 is grounded, and the drain of the first transistor T1 is electrically connected to the main amplified signal output node N7; the first peak amplifier Peak1 includes a second transistor T2, the gate of the second transistor T2 is electrically connected to the second phase-shifted output node N5, the source of the second transistor T2 is grounded, and the drain of the second transistor T2 is electrically connected to the first peak amplified signal output node N8; the second peak amplifier Peak2 includes a third transistor T3, the gate of the third transistor T3 is electrically connected to the third phase-shifted output node N6, the source of the third transistor T3 is grounded, and the drain of the third transistor T3 is electrically connected to the second peak amplified signal output node N9. In some exemplary embodiments, each of the main amplifier Main, the first peak amplifier Peak1, and the second peak amplifier Peak2 may include multiple field-effect transistors operating in parallel. These multiple field-effect transistors function similarly to a single field-effect transistor. Implementing the amplification module in the form of transistors, particularly field-effect transistors, facilitates high integration of the Doherty power amplifier.

[0059] Referring to FIG. 6 , a Doherty power amplifier is schematically illustrated according to some exemplary embodiments of the present disclosure. As shown in FIG. 6 , Doherty power amplifier 100d differs from Doherty power amplifier 100 shown in FIG. 2 only in that a specific circuit structure of an output power combining module is illustrated. Therefore, the following description will focus solely on the differences between Doherty power amplifier 100d and Doherty power amplifier 100 shown in FIG. 2 , and will omit any further details regarding the similarities between the two.

[0060] The output power combining module 140a of the Doherty power amplifier 100d includes a first compensation inductor OL1 and a second compensation inductor OL2. The first end of the first compensation inductor OL1 is electrically connected to the main amplified signal output node N7, the second end of the first compensation inductor OL1 is electrically connected to the first peak amplified signal output node N8, the first end of the second compensation inductor OL2 is electrically connected to the first peak amplified signal output node N8, and the second end of the second compensation inductor OL2 is electrically connected to the combining node N10. Furthermore, the inductance of the first compensation inductor OL1 is greater than the inductance of the second compensation inductor OL2. In the output power combining module 140a, each of the first compensation inductor OL1 and the second compensation inductor OL2 forms a CLC Pi-type network in combination with the parasitic capacitances and compensation capacitances of each amplifier, thereby ensuring impedance matching in both the back-off and saturation states of the combining network. The main amplified signal passes through the first compensation inductor OL1 and the second compensation inductor OL2 and is transmitted to the combining node N10. The first peak amplified signal passes through the second compensation inductor OL2 and is transmitted to the combining node N10. The second peak amplified signal is directly transmitted from the second peak amplified signal output node N9 to the combining node N10. Therefore, at the combining node N10, the phases of the main amplified signal, the first peak amplified signal, and the second peak amplified signal are identical. These amplified signals are combined at the combining node N10 and output from the signal output node OUT.

[0061] In some exemplary embodiments, at least one of the first compensation inductor OL1 and the second compensation inductor OL2 may be implemented by a surface-mount inductor with a high quality factor, thereby reducing the loss of the combining network.

[0062] In some exemplary embodiments, the first compensation inductor OL1 and the second compensation inductor OL2 may also be connected in the following manner: a first end of the first compensation inductor OL1 is electrically connected to the main amplified signal output node N7, and a second end of the first compensation inductor OL1 is electrically connected to the combined node N10; a first end of the second compensation inductor OL2 is electrically connected to the first peak amplified signal output node N8, and a second end of the second compensation inductor OL2 is also electrically connected to the combined node N10. The inductance of the first compensation inductor OL1 is greater than the inductance of the second compensation inductor OL2, and the first compensation inductor OL1 and the second compensation inductor OL2 are configured such that, at the combined node N10, the phases of the main amplified signal, the first peak amplified signal, and the second peak amplified signal are identical. These amplified signals are combined at the combined node N10 and output from the signal output node OUT.

[0063] Refer to Figure 7, which shows the relationship between the inductance value of the first compensation inductor OL1 in Figure 6 and the operating frequency. As shown in Figure 7, the inductance value of the first compensation inductor OL1 is roughly inversely proportional to the operating frequency and the saturation power. Therefore, in low-frequency and low-power application scenarios, the inductance value of the first compensation inductor OL1 may be very large. For example, when the operating frequency is 2GHz, when the saturation power is 10W, the inductance value of the first compensation inductor OL1 is close to 15nH. It is impossible to achieve such a large inductance by binding wires, but relying on integrated lumped inductors to implement the first compensation inductor OL1 will introduce unacceptable losses. Therefore, after comprehensively considering performance, feasibility and economy, according to the technical solutions of the exemplary embodiments of the present disclosure, discrete surface-mount inductors are used to implement the first compensation inductor OL1 and the second compensation inductor OL2.

[0064] 8 and 9 show comparisons of power distribution and phase shifting between a Doherty power amplifier according to the present disclosure and a conventional Doherty power amplifier. The Doherty power amplifier according to the present disclosure utilizes the input power distribution module and phase shift module shown in FIG3 , while the conventional Doherty power amplifier utilizes the power divider and phase shift circuit shown in FIG1 .

[0065] FIG8 shows the insertion loss of the Doherty power amplifier according to the present invention and a conventional Doherty power amplifier at the input of the main amplifier Main. Within the illustrated operating frequency range, the insertion losses of the two amplifiers are substantially the same. In particular, within the range of 800 to approximately 830 MHz, the insertion loss of the Doherty power amplifier according to the present invention at the input of the main amplifier Main is lower than that of the conventional Doherty power amplifier.

[0066] As shown in FIG9 , it illustrates the phase difference between the signal at the input of the main amplifier Main and the signal at the input of the first peak amplifier Peak1, as well as the phase difference between the signal at the input of the first peak amplifier Peak1 and the signal at the input of the second peak amplifier Peak2, respectively, for the Doherty power amplifier according to the present disclosure and the conventional Doherty power amplifier. The solid line represents the phase difference between the signal at the input of the main amplifier Main and the signal at the input of the first peak amplifier Peak1, and the dotted line represents the phase difference between the signal at the input of the first peak amplifier Peak1 and the signal at the input of the second peak amplifier Peak2. As shown in FIG9 , the Doherty power amplifier according to the present disclosure is substantially identical to the conventional Doherty power amplifier in terms of both phase differences.

[0067] Therefore, from the contents shown in FIG8 and FIG9 , it can be seen that the Doherty power amplifier according to the present disclosure can meet the requirements for power distribution and phase shifting in a three-way Doherty power amplifier.

[0068] 10 and 11 show comparisons of power distribution and phase shifting between another Doherty power amplifier according to the present disclosure and a conventional Doherty power amplifier. The Doherty power amplifier according to the present disclosure utilizes the input power distribution module and phase shift module shown in FIG4 , while the conventional Doherty power amplifier utilizes the power division and phase shift circuit shown in FIG1 .

[0069] FIG10 shows the insertion loss of the Doherty power amplifier according to the present disclosure and a conventional Doherty power amplifier at the input of the main amplifier Main. Within the illustrated operating frequency range, the insertion losses of the two amplifiers are substantially the same. In particular, at approximately 750 MHz, the insertion loss of the Doherty power amplifier according to the present disclosure at the input of the main amplifier Main is lower than that of the conventional Doherty power amplifier.

[0070] As shown in FIG11 , the phase difference between the signal at the input of the main amplifier Main and the signal at the input of the first peak amplifier Peak1, as well as the phase difference between the signal at the input of the first peak amplifier Peak1 and the signal at the input of the second peak amplifier Peak2, respectively, of the Doherty power amplifier according to the present disclosure and the conventional Doherty power amplifier are shown. The solid line represents the phase difference between the signal at the input of the main amplifier Main and the signal at the input of the first peak amplifier Peak1, and the dotted line represents the phase difference between the signal at the input of the first peak amplifier Peak1 and the signal at the input of the second peak amplifier Peak2. As shown in FIG11 , the Doherty power amplifier according to the present disclosure is substantially identical to the conventional Doherty power amplifier in terms of both phase differences.

[0071] Therefore, from the contents shown in FIG. 10 and FIG. 11 , the Doherty power amplifier according to the present disclosure can meet the requirements for power distribution and phase shifting in a three-way Doherty power amplifier.

[0072] As can be seen from the above analysis, the Doherty power amplifier according to the present disclosure utilizes capacitors to implement the input power distribution module, eliminating the need for inductors. This reduces chip size, thus lowering costs, while also reducing losses and increasing the gain of the Doherty power amplifier. Furthermore, utilizing high-quality surface-mount inductors to implement at least one of the first and second compensation inductors further reduces losses in the combining network.

[0073] It should be understood that the input power distribution module and phase shift module described in the present disclosure are not limited to the exemplary embodiments shown in Figures 2 to 6, but can be implemented more widely. Referring to Figure 12, another Doherty power amplifier is schematically shown according to some exemplary embodiments of the present disclosure. As shown in Figure 12, Doherty power amplifier 200 is a two-way integrated Doherty power amplifier, which includes an input power distribution module 210, a phase shift module 220, an amplification module 230, and an output power synthesis module 240. It amplifies the signal to be amplified input from the signal input node RFIN′ and outputs the amplified signal at the signal output node OUT′.

[0074] The input power distribution module 110 is configured to divide the signal to be amplified input from the signal input node RFIN′ according to a preset power distribution ratio, and output the divided signals through the corresponding power division circuit so that they can be processed by subsequent modules. In the Doherty power amplifier 200 shown in Figure 12, the input power distribution module 210 includes a first power division circuit 211 and a second power division circuit 212. The first end of the first power division capacitor C1′ in the first power division circuit 211 is electrically connected to the signal input node RFIN′, and the second end thereof is electrically connected to the first power division output node N1′. The first end of the second power division capacitor C2′ in the second power division circuit 212 is electrically connected to the signal input node RFIN′, and the second end thereof is electrically connected to the second power division output node N2′. In this way, the signal to be amplified input from the signal input node RFIN′ is divided into two signals with the required power, and are respectively transmitted to the subsequent circuit for processing via the two power division circuits.

[0075] According to some exemplary embodiments, the first power splitting capacitor C1′ and the second power splitting capacitor C2′ may be integrated lumped capacitors. However, it should be understood that any other suitable capacitors are also possible, and the present disclosure does not impose any limitation on the specific type of capacitors that can be used as power splitting capacitors.

[0076] As a non-limiting example, the capacitance values ​​of the first power dividing capacitor C1′ and the second power dividing capacitor C2′ can be calculated according to the aforementioned formulas 1 and 2. That is, in the aforementioned formulas, the power proportion R_P2 of the output signal of the third power dividing circuit can be set to zero.

[0077] The phase-shifting module 220 is configured to receive the power-dividing output signals outputted from the first power-dividing output node N1′ and the second power-dividing output node N2′, respectively, perform phase-shifting processing, and output the corresponding phase-shifted output signals at the first phase-shifted output node N3′ and the second phase-shifted output node N4′, respectively. Specifically, the phase-shifting module 220 is configured to receive the first power-dividing output signal from the first power-dividing output node N1′ and output the first phase-shifted output signal at the first phase-shifted output node N3′, and receive the second power-dividing output signal from the second power-dividing output node N2′ and output the second phase-shifted output signal at the second phase-shifted output node N4′. The phase of the second phase-shifted output signal lags the phase of the first phase-shifted output signal by a preset phase value. According to some exemplary embodiments, the preset phase value may be between 60 degrees and 100 degrees. It should be understood that the phase-shifting module 120 may have any suitable circuit structure, as long as it can achieve the aforementioned phase-shifting processing on the power-dividing output signals. The specific circuit structure of the phase-shifting module 220 is described in detail below.

[0078] Amplification module 230 is configured to receive the phase-shifted output signals output from first phase-shifted output node N3′ and second phase-shifted output node N4′, amplify them, and then output corresponding amplified signals at main amplified signal output node N5′ and peak amplified signal output node N6′. Specifically, amplification module 230 includes a main amplifier Main′ and a peak amplifier Peak. Main amplifier Main′ is configured to receive the first phase-shifted output signal from first phase-shifted output node N3′ and output the main amplified signal at main amplified signal output node N5′. Peak amplifier Peak is configured to receive the second phase-shifted output signal from second phase-shifted output node N4′ and output the peak amplified signal at peak amplified signal output node N6′.

[0079] Output power combining module 240 is configured to receive the main amplified signal from main amplified signal output node N5′ and the peak amplified signal from peak amplified signal output node N6′, align the phases of the main amplified signal and the peak amplified signal, and combine the two signals for output from signal output node OUT′. It should be understood that output power combining module 240 can have any suitable circuit structure, as long as it can achieve the aforementioned phase shifting and combined output of the amplified signals. The specific circuit structure of output power combining module 240 is described in detail below.

[0080] In some exemplary embodiments, the input power distribution module 210 and the phase shift module 220 can be integrated on one die, and the main amplifier Main′ and the peak amplifier Peak can be integrated on another die, and the latter die can be electrically connected to the former die via bonding wires. In other exemplary embodiments, the input power distribution module 210 and the phase shift module 220 can also be integrated on different dies, and the different dies can be electrically connected via bonding wires. In addition, the same die or different dies mentioned above can be packaged in a single package, while the output power synthesis module 240 can be implemented in a non-integrated manner, for example, it can be connected to the package via bonding wires or through-holes.

[0081] From the above analysis, it can be seen that the Doherty power amplifier 200 shown in Figure 12 uses capacitors to implement the input power distribution module 210, avoiding the use of inductors. As a result, the chip size can be reduced, which is conducive to reducing costs. In addition, the loss can be reduced and the gain of the Doherty power amplifier can be increased.

[0082] FIG13 schematically illustrates a Doherty power amplifier according to some exemplary embodiments of the present disclosure. As shown in FIG13 , Doherty power amplifier 200a differs from Doherty power amplifier 200 shown in FIG12 only in that a specific circuit structure of a phase shift module is illustrated. Therefore, the following description will focus solely on the differences between Doherty power amplifier 200a and Doherty power amplifier 200 shown in FIG12 , and will not further elaborate on the similarities between the two.

[0083] The phase-shifting module 220a of the Doherty power amplifier 200a includes a phase-shifting capacitor C3′, wherein a first end of the phase-shifting capacitor C3′ is electrically connected to the first power-dividing output node N1′, a second end of the phase-shifting capacitor C3′ is electrically connected to the first phase-shifting output node N3′, and the phase-shifting module 220a directly connects the second power-dividing output node N2′ to the second phase-shifted output node N4′ (for example, by connecting the two via a conductive line). The phase-shifting capacitor C3′ causes the phase of the first phase-shifted output signal at the first phase-shifted output node N3′ to lead the phase of the first power-dividing output signal at the first power-dividing output node N1′ by a preset phase value (for example, the preset phase value can be between 60 degrees and 100 degrees). Thus, the phase-shifting module 220a causes the phase of the second phase-shifted output signal to lag the phase of the first phase-shifted output signal by a preset phase value relative to the phase of the first phase-shifted output signal. In some exemplary embodiments, the phase-shifting capacitor C3′ can be an integrated lumped capacitor.

[0084] Therefore, the Doherty power amplifier 200a shown in FIG13 further utilizes a phase-shifting capacitor C3′ in the phase-shifting module 220a to achieve this, thereby further reducing the use of inductors, thereby further reducing chip size and reducing costs.

[0085] Referring to FIG. 14 , a Doherty power amplifier is schematically illustrated according to some exemplary embodiments of the present disclosure. As shown in FIG. 14 , Doherty power amplifier 200b differs from Doherty power amplifier 200 shown in FIG. 12 only in that it illustrates an alternative specific circuit structure for the phase shift module. Therefore, the following description will focus solely on the differences between Doherty power amplifier 200b and Doherty power amplifier 200 shown in FIG. 12 , and will omit any further details regarding the similarities between the two.

[0086] The phase-shifting module 220b of the Doherty power amplifier 200b includes a phase-shifting inductor L′, wherein a first end of the phase-shifting inductor L′ is electrically connected to the second power-dividing output node N2′, and a second end of the phase-shifting inductor L′ is electrically connected to the second phase-shifting output node N4′. The phase-shifting module 220b connects the first power-dividing output node N1′ to the first phase-shifted output node N3′ (e.g., by connecting the two via a conductive line). The phase-shifting inductor L′ causes the phase of the second phase-shifted output signal at the second phase-shifted output node N4′ to lag behind the phase of the second power-dividing output signal at the second power-dividing output node N2′ by a preset phase value (e.g., the preset phase value can be between 60 degrees and 100 degrees). Thus, the phase-shifting module 220b causes the phase of the second phase-shifted output signal to lag behind the phase of the first phase-shifted output signal by a preset phase value. In some exemplary embodiments, the phase-shifting inductor L′ can be an integrated lumped inductor.

[0087] Referring to FIG. 15 , a Doherty power amplifier is schematically illustrated according to some exemplary embodiments of the present disclosure. As shown in FIG. 15 , Doherty power amplifier 200c differs from Doherty power amplifier 200 shown in FIG. 12 only in that a specific circuit structure of an amplification module is illustrated. Therefore, the following description will focus solely on the differences between Doherty power amplifier 200c and Doherty power amplifier 200 shown in FIG. 12 , and will omit any further details regarding the similarities between the two.

[0088] The amplification module 230a of the Doherty power amplifier 200c includes a main amplifier Main′ and a peak amplifier Peak. Each of the main amplifier Main′ and the peak amplifier Peak includes a transistor (e.g., a field-effect transistor). Specifically, the main amplifier Main′ includes a first transistor T1′, the gate of the first transistor T1′ is electrically connected to the first phase-shifted output node N3′, the source of the first transistor T1′ is grounded, and the drain of the first transistor T1′ is electrically connected to the main amplified signal output node N5′; the peak amplifier Peak includes a second transistor T2′, the gate of the second transistor T2′ is electrically connected to the second phase-shifted output node N4′, the source of the second transistor T2′ is grounded, and the drain of the second transistor T2′ is electrically connected to the peak amplified signal output node N6′. In some exemplary embodiments, each of the main amplifier Main′ and the peak amplifier Peak may include multiple field-effect transistors operating in parallel, and these multiple field-effect transistors in parallel are functionally similar to a single field-effect transistor. Implementing the amplification module in the form of transistors, especially field-effect transistors, is conducive to achieving high integration of the Doherty power amplifier.

[0089] Referring to FIG. 16 , a Doherty power amplifier is schematically illustrated according to some exemplary embodiments of the present disclosure. As shown in FIG. 16 , Doherty power amplifier 200d differs from Doherty power amplifier 200 shown in FIG. 12 only in that it illustrates a specific circuit structure of an output power combining module. Therefore, the following description will focus solely on the differences between Doherty power amplifier 200d and Doherty power amplifier 200 shown in FIG. 12 , and will omit any further details regarding the similarities between the two.

[0090] The output power combining module 240a of the Doherty power amplifier 200d includes a compensation inductor OL, wherein a first end of the compensation inductor OL is electrically connected to the main amplified signal output node N5′, and a second end of the compensation inductor OL is electrically connected to the combining node N7′. In the output power combining module 240a, the compensation inductor OL forms a CLC Pi-type network in combination with the parasitic capacitance of each amplifier and the compensation capacitance to meet the impedance matching relationship of the combining network in both the back-off and saturation states. The main amplified signal is transmitted to the combining node N7′ after passing through the compensation inductor OL, and the peak amplified signal is directly transmitted from the peak amplified signal output node N6′ to the combining node N7′. Therefore, at the combining node N7′, the phase of the main amplified signal and the peak amplified signal are the same. These amplified signals are combined at the combining node N7′ and output from the signal output node OUT. In some exemplary embodiments, the compensation inductor OL can be implemented by a surface-mount inductor with a high quality factor.

[0091] As can be seen from the above analysis, the integrated Doherty power amplifier according to the present disclosure utilizes capacitors to implement the input power distribution module, eliminating the need for inductors. This reduces chip size, thus lowering costs, while also reducing losses and increasing the gain of the Doherty power amplifier. Furthermore, the use of high-quality surface-mount inductors to implement the compensating inductor further reduces losses in the combining network.

[0092] The terms used in this disclosure are only used to describe the embodiments in this disclosure and are not intended to limit this disclosure. As used in this disclosure, the singular forms "a", "an" and "the" are intended to also include the plural forms, unless the context clearly indicates otherwise. It is also to be understood that the terms "include" and "comprise" when used in this disclosure refer to the presence of the features mentioned, but do not exclude the presence of one or more other features or the addition of one or more other features. As used in this disclosure, the term "and / or" includes any and all combinations of one or more of the associated listed items. It will be understood that although the terms "first", "second", "third" etc. can be used to describe various features in this disclosure, these features should not be limited by these terms. These terms are only used to distinguish one feature from another.

[0093] Unless otherwise defined, all terms (including technical and scientific terms) used in this disclosure have the same meaning as commonly understood by those skilled in the art to which this disclosure belongs. It is also understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the relevant art and / or the context of this specification, and will not be interpreted in an idealized or overly formal sense unless explicitly defined in this disclosure.

[0094] In the description of this specification, the description of the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction and without violating technical principles, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, or may omit some technical features from the different embodiments or examples described in this specification, and the embodiments or examples obtained based on such combination, combination or omission are also considered to fall within the scope of the present disclosure.

[0095] Although the present disclosure has been described in detail in conjunction with certain exemplary embodiments, it is not to be limited to the specific forms described in this disclosure. Rather, the scope of the present disclosure is limited only by the appended claims.

Claims

1. A Doherty power amplifier, characterized in that include: An input power distribution module comprising: a first power dividing circuit, wherein a first end of a first power dividing capacitor in the first power dividing circuit is electrically connected to a signal input node, and a second end of the first power dividing capacitor is electrically connected to a first power dividing output node; a second power dividing circuit, wherein a first end of a second power dividing capacitor in the second power dividing circuit is electrically connected to the signal input node, and a second end of the second power dividing capacitor is electrically connected to a second power dividing output node; a phase shift module configured to: receive a first power division output signal from the first power division output node and output the first phase-shifted output signal at a first phase-shifted output node; receive a second power division output signal from the second power division output node and output a second phase-shifted output signal at a second phase-shifted output node, wherein a phase of the second phase-shifted output signal lags a phase of the first phase-shifted output signal by a preset phase value; An amplification module comprising: a main amplifier configured to: receive the first phase-shifted output signal, and output a main amplified signal at a main amplified signal output node; a first peak amplifier configured to: receive the second phase-shifted output signal, and output a first peak amplified signal at a first peak amplified signal output node; The output power synthesis module is configured to receive the main amplified signal and the first peak amplified signal, make the phases of the main amplified signal and the first peak amplified signal the same, and synthesize and output the two.

2. The Doherty power amplifier according to claim 1, wherein The first power dividing capacitor and the second power dividing capacitor are integrated lumped capacitors.

3. The Doherty power amplifier according to claim 1, wherein: The phase-shifting module includes a phase-shifting capacitor, a first end of the phase-shifting capacitor is electrically connected to the first power division output node, a second end of the phase-shifting capacitor is electrically connected to the first phase-shifting output node, and the phase-shifting module electrically connects the second power division output node to the second phase-shifting output node.

4. The Doherty power amplifier according to claim 3, wherein: The phase-shifting capacitor is an integrated lumped capacitor.

5. The Doherty power amplifier according to claim 1, wherein: The phase shift module electrically connects the first power division output node with the first phase shift output node, and the phase shift module includes a phase shift inductor, a first end of the phase shift inductor electrically connected to the second power division output node, and a second end of the phase shift inductor electrically connected to the second phase shift output node.

6. The Doherty power amplifier according to claim 5, characterized in that The phase-shifting inductor is an integrated lumped inductor.

7. The Doherty power amplifier according to claim 1, wherein: The main amplifier includes a first transistor, a gate of the first transistor is electrically connected to the first phase-shift output node, a source of the first transistor is grounded, and a drain of the first transistor is electrically connected to the main amplified signal output node; The first peak amplifier includes a second transistor, a gate of the second transistor is electrically connected to the second phase-shift output node, a source of the second transistor is grounded, and a drain of the second transistor is electrically connected to the first peak amplified signal output node.

8. The Doherty power amplifier according to claim 1, wherein: The output power synthesis module includes a compensation inductor, a first end of the compensation inductor is electrically connected to the main amplified signal output node, and a second end of the compensation inductor is electrically connected to the first peak amplified signal output node.

9. The Doherty power amplifier according to claim 8, wherein: The compensation inductor is a surface mount inductor.

10. The Doherty power amplifier according to claim 1, wherein: The input power distribution module further includes a third power division circuit, wherein a first end of a third power division capacitor in the third power division circuit is electrically connected to the signal input node, and a second end of the third power division capacitor is electrically connected to a third power division output node; The phase shift module is further configured to: receive a third power split output signal from the third power split output node and output a third phase-shifted output signal at a third phase-shifted output node, wherein the phase of the third phase-shifted output signal lags the phase of the second phase-shifted output signal by the preset phase value; The amplification module further includes a second peak amplifier configured to: receive the third phase-shifted output signal, and output a second peak amplified signal at a second peak amplified signal output node; The output power synthesis module is further configured to: receive the second peak amplified signal, so that the main amplified signal, the first peak amplified signal and the second peak amplified signal The three have the same phase and are synthesized and output.

11. The Doherty power amplifier according to claim 10, wherein: The first power dividing capacitor, the second power dividing capacitor, and the third power dividing capacitor are integrated lumped capacitors.

12. The Doherty power amplifier according to claim 10, wherein: The phase-shifting module includes a phase-shifting capacitor and a phase-shifting inductor, wherein the first end of the phase-shifting capacitor is electrically connected to the first power division output node, the second end of the phase-shifting capacitor is electrically connected to the first phase-shifting output node, the first end of the phase-shifting inductor is electrically connected to the third power division output node, the second end of the phase-shifting inductor is electrically connected to the third phase-shifting output node, and the phase-shifting module causes the second power division output node and the second phase-shifting output node to be conductive.

13. The Doherty power amplifier according to claim 12, wherein: The phase-shifting capacitor is an integrated lumped capacitor, and the phase-shifting inductor is an integrated lumped inductor.

14. The Doherty power amplifier according to claim 10, wherein: The phase-shifting module includes a first phase-shifting inductor and a second phase-shifting inductor, wherein the first end of the first phase-shifting inductor is electrically connected to the second power division output node, the second end of the first phase-shifting inductor is electrically connected to the second phase-shifting output node, the first end of the second phase-shifting inductor is electrically connected to the third power division output node, the second end of the second phase-shifting inductor is electrically connected to the third phase-shifting output node, and the phase-shifting module causes the first power division output node and the first phase-shifting output node to be conductive.

15. The Doherty power amplifier according to claim 14, wherein: The first phase-shifting inductor and the second phase-shifting inductor are integrated lumped inductors.

16. The Doherty power amplifier according to claim 15, wherein: The second phase-shifting inductor is formed by connecting two integrated lumped inductors in series.

17. The Doherty power amplifier according to claim 10, wherein: The main amplifier includes a first transistor, a gate of the first transistor is electrically connected to the first phase-shift output node, a source of the first transistor is grounded, and a drain of the first transistor is electrically connected to the main amplified signal output node; The first peak amplifier includes a second transistor, a gate of the second transistor is electrically connected to the second phase-shift output node, a source of the second transistor is grounded, and a drain of the second transistor is electrically connected to the first peak amplified signal output node; The second peak amplifier includes a third transistor, the gate of the third transistor is connected to The third phase-shift output node is electrically connected, the source of the third transistor is grounded, and the drain of the third transistor is electrically connected to the second peak amplified signal output node.

18. The Doherty power amplifier according to claim 10, wherein: The output power synthesis module includes a first compensation inductor and a second compensation inductor, wherein the first end of the first compensation inductor is electrically connected to the main amplified signal output node, the second end of the first compensation inductor is electrically connected to the first peak amplified signal output node, the first end of the second compensation inductor is electrically connected to the first peak amplified signal output node, the second end of the second compensation inductor is electrically connected to the second peak amplified signal output node, and the inductance value of the first compensation inductor is greater than the inductance value of the second compensation inductor.

19. The Doherty power amplifier according to claim 18, wherein: At least one of the first compensating inductor and the second compensating inductor is a surface mount inductor.

20. The Doherty power amplifier according to claim 1, wherein: The preset phase value is between 60 degrees and 100 degrees.

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