Method for forming semiconductor structure

Abstract

A method for forming a semiconductor structure, comprising: providing a layer to be etched; providing a reaction cavity, wherein the reaction cavity is used for forming a hard mask structure on the surface of the layer to be etched; and forming the hard mask structure on the surface of the layer to be etched, wherein the hard mask structure comprises at least two thin film layers, and the process of forming the hard mask structure comprises: moving into the reaction cavity the layer to be etched, and forming a first film layer on the surface of the layer to be etched; when the first film layer is formed, moving out the layer to be etched, and cleaning the reaction cavity; and moving into the reaction cavity the layer to be etched, and forming a second film layer on the surface of the first film layer. The hard mask structure formed by the method has good quality, and improved density.

Description

Method for forming semiconductor structure

[0001] This application claims priority to Chinese patent application No. 2024101378853, filed with the Patent Office of China on January 29, 2014, entitled “Method for Forming a Semiconductor Structure,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present invention relates to the field of semiconductor manufacturing, and in particular to a method for forming a semiconductor structure. Background Art

[0003] In three-dimensional (3D) ICs, the introduction of 3D structures further increases the etch aspect ratio. For example, the etch aspect ratio of the new generation of 3D NAND products can reach 70. This not only places enormous demands on etching technology, but also, the preparation of hard mask materials with high selectivity is an indispensable part of 3D devices.

[0004] As aspect ratios continue to increase, the preparation of hard mask materials with higher etch selectivity is a major driving force for continuous product advancement.

[0005] Summary of the Invention

[0006] The technical problem solved by the present invention is to provide a method for forming a semiconductor structure to obtain a hard mask material suitable for high aspect ratio etching.

[0007] In order to solve the above technical problems, the technical solution of the present invention provides a method for forming a semiconductor structure, including: providing a layer to be etched; providing a reaction chamber, the reaction chamber is used to form a hard mask structure on the surface of the layer to be etched; forming a hard mask structure on the surface of the layer to be etched, the hard mask structure includes at least two thin film layers, and the formation process of the hard mask structure includes: moving the layer to be etched into the reaction chamber, forming a first film layer on the surface of the layer to be etched; after the first film layer is formed, moving the layer to be etched out and cleaning the reaction chamber; moving the layer to be etched into the reaction chamber, and forming a second film layer on the surface of the first film layer.

[0008] Optionally, the material of the first film layer includes amorphous carbon; the material of the second film layer includes amorphous carbon.

[0009] Optionally, the process for forming the first film layer includes a reaction enhanced chemical vapor deposition process, and the parameters for forming the first film layer include: the reaction gas is propylene, the temperature range is 300 degrees Celsius to 600 degrees Celsius, and the power range is 800 watts to 1200 watts.

[0010] Optionally, the process for forming the second film layer includes a reaction enhanced chemical vapor deposition process, and the process parameters for forming the second film layer include: the reaction gas is propylene, the temperature range is 300 degrees Celsius to 600 degrees Celsius, and the power range is 800 watts to 1200 watts.

[0011] Optionally, the method for cleaning the reaction chamber includes an ashing process, and the parameters of the ashing process include: the reaction gas includes oxygen, the reaction temperature ranges from 200 degrees Celsius to 500 degrees Celsius, and the chamber pressure ranges from 1 Torr to 5 Torr.

[0012] Optionally, the thickness of the first film layer ranges from 1000 angstroms to 3000 angstroms; the thickness of the second film layer ranges from 1000 angstroms to 3000 angstroms.

[0013] Optionally, the first film layer includes a first region and a second region located on the first region, the density of the first region is greater than the density of the second region, and the thickness of the first region is greater than the thickness of the second region; the second film layer includes a third region and a fourth region located on the third region, the density of the third region is greater than the density of the fourth region, and the thickness of the third region is greater than the thickness of the fourth region.

[0014] Optionally, the formation process of the hard mask structure further includes: after forming the second film layer, removing the layer to be etched and cleaning the reaction chamber; moving the layer to be etched into the reaction chamber and forming a third film layer on the surface of the second film layer.

[0015] Optionally, it also includes: forming a patterned photoresist layer on the surface of the hard mask structure; etching the hard mask structure using the patterned photoresist layer as a mask to form an opening in the hard mask structure; etching the layer to be etched using the hard mask structure and the opening as a mask to form a semiconductor structure having a groove therein.

[0016] Optionally, the aspect ratio of the groove is in the range of 30 to 100.

[0017] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0018] The formation method of the present invention first forms a first film layer, then cleans the reaction chamber, and then forms a second film layer. After cleaning, the deposits on the inner wall of the reaction chamber can be removed, reducing the situation where the deposits on the inner wall of the reaction chamber affect the deposition rate and film quality.

[0019] Furthermore, the material of the first film layer includes amorphous carbon, and the method for cleaning the reaction chamber includes an ashing process. The ashing process can remove carbon deposits on the inner wall of the reaction chamber, thereby destroying the carbon-carbon double bonds on the inner wall of the reaction chamber, thereby preventing the plasma from coupling with the carbon material on the inner wall of the reaction chamber due to the conductivity of the carbon material on the inner wall of the reaction chamber during the deposition of the carbon film, thereby affecting the deposition rate and film quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] 1 and 2 are schematic diagrams of a semiconductor structure forming process according to an embodiment;

[0021] 3 to 5 are schematic diagrams of a semiconductor structure forming process according to an embodiment of the present invention. DETAILED DESCRIPTION

[0022] As described in the background art, the preparation of hard mask materials with higher etch selectivity is a major driving force for continuous product advancement. This will now be analyzed and explained in conjunction with specific embodiments.

[0023] 1 and 2 are schematic diagrams of a semiconductor structure forming process according to an embodiment.

[0024] 1 , a layer to be etched 100 is provided; a hard mask layer is formed on the layer to be etched; and a patterned photoresist layer (not shown) is formed on the hard mask layer.

[0025] 2 , the hard mask layer is etched using the patterned photoresist layer as a mask to form a groove 103 in the hard mask layer; subsequently, the layer to be etched 100 is further etched downward using the hard mask layer and the groove 103 to transfer the pattern to the layer to be etched 100 to form a semiconductor structure.

[0026] The material of the hard mask layer is usually an amorphous carbon film. The amorphous carbon film has the advantages of high selectivity and easy removal, and is a very good hard mask material for high aspect ratio etching in 3D ICs.

[0027] The amorphous carbon film is mostly deposited using a plasma enhanced chemical vapor deposition process (PECVD), with a deposition temperature above 500°C, reacting to form C=C bonds (tending to graphene structure) and having electrical conductivity. During the deposition process, more and more carbon will be deposited on the cavity wall of the equipment and other areas except the wafer base position. Because these carbon materials are conductive, the plasma and the cavity wall carbon material will form a coupling effect, resulting in a decrease in the plasma energy acting on the top of the wafer (the center area of ​​the cavity), which reduces the deposition rate and the film density. The formed film shows a trend of decreasing longitudinal density. As shown in Figure 1, the hard mask layer includes a first portion 101 at the bottom and a second portion 102 on the first portion 101. The deposition rate of the first portion 101 is faster, so that the density of the first portion 101 is higher, and the deposition rate of the second portion 102 is slower, so that the density of the second portion 102 is lower.

[0028] As the deposition time increases, the rate of subsequent thin film deposition slows down, and the density of the thin film decreases, which reduces the overall density of the hard mask layer. When etching the hard mask layer and forming the recess 103 therein, the hard mask layer may also be lost during the etching process. When etching the target layer 100, the hard mask layer may be lost excessively before the etching stops, resulting in the inability to form a semiconductor structure with a high aspect ratio.

[0029] In order to solve the above problems, the technical solution of the present invention provides a method for forming a semiconductor structure, wherein a first film layer is first formed, the reaction chamber is cleaned, and then a second film layer is formed. After cleaning, the deposits on the inner wall of the reaction chamber can be removed, thereby reducing the situation in which the deposition rate and film quality are affected by the deposits on the inner wall of the reaction chamber.

[0030] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0031] 3 to 5 are schematic diagrams of a semiconductor structure forming process according to an embodiment of the present invention.

[0032] 3 , a layer to be etched 200 is provided; and a reaction chamber (not shown) is provided, wherein the reaction chamber is used to form a hard mask structure on the surface of the layer to be etched 200 .

[0033] The layer to be etched 200 includes a wafer to be etched or other semiconductor substrates to be etched.

[0034] The reaction chamber is a closed reaction chamber with a certain vacuum condition, which is used for performing physical vapor deposition (PVD), reaction enhanced chemical vapor deposition (PECVD), etc.

[0035] A hard mask structure is formed on the surface of the layer to be etched 200. The hard mask structure includes at least two thin film layers. Please refer to Figures 3 and 4 for the formation process of the hard mask structure.

[0036] 3 , the layer to be etched 200 is moved into the reaction chamber, and a first film layer is formed on the surface of the layer to be etched. After the first film layer is formed, the layer to be etched 200 is removed, and the reaction chamber is cleaned.

[0037] In this embodiment, the first film layer includes a first region 201 and a second region 202 located on the first region 201. The density of the first region 201 is greater than the density of the second region 202, and the thickness of the first region 201 is greater than the thickness of the second region 202. The deposits on the inner wall of the reaction chamber are relatively small, and the deposits on the inner wall of the reaction chamber have a relatively small impact on the deposition rate. As a result, the first region 201 of the formed first film layer has a relatively high density and is relatively thick.

[0038] In this embodiment, the material of the first film layer includes amorphous carbon. The process for forming the first film layer includes a reaction-enhanced chemical vapor deposition process. The process parameters for forming the first film layer include: a reaction gas of propylene (C3H6), a temperature range of 300 degrees Celsius to 600 degrees Celsius, and a power range of 800 watts to 1200 watts.

[0039] When the temperature range for forming the first film layer is 500 degrees Celsius to 600 degrees Celsius, the temperature for forming the first film layer is relatively high, the stress of the amorphous carbon produced by high-temperature preparation is relatively low, the chemical bond of the amorphous carbon formed by the reaction is C=C (tending to a graphene structure), and the deposition speed is relatively fast.

[0040] In this embodiment, the method for cleaning the reaction chamber includes an ashing process. The ashing process can remove carbon deposits on the inner wall of the reaction chamber, thereby destroying the carbon-carbon double bonds on the inner wall of the reaction chamber. This prevents the plasma from coupling with the carbon material on the inner wall of the reaction chamber due to the conductivity of the carbon material on the inner wall of the reaction chamber during the deposition of the carbon film, thereby affecting the deposition rate and film quality.

[0041] The parameters of the ashing process include: the reaction gas includes oxygen or ozone, the reaction temperature ranges from 200 degrees Celsius to 500 degrees Celsius, and the chamber pressure ranges from 1 Torr to 5 Torr.

[0042] The pressure range of the ashing process is 1 Torr to 5 Torr, and the pressure outside the chamber is lower than the pressure inside the chamber. Therefore, the ashing process can remove carbon deposits on the inner wall of the chamber, and the first film layer removed from the reaction chamber is not easily oxidized outside the chamber, thereby ensuring the quality of the hard mask structure.

[0043] Referring to FIG. 4 , the layer to be etched 200 is moved into the reaction chamber, and a second film layer is formed on the surface of the first film layer.

[0044] In this embodiment, the second film layer includes a third region 203 and a fourth region 204 located on the third region 203. The density of the third region 203 is greater than the density of the fourth region 204, and the thickness of the third region 203 is greater than the thickness of the fourth region 204. Since the deposits on the inner wall of the reaction chamber are removed in a timely manner, the effect of the deposits on the inner wall of the reaction chamber on the deposition rate is minimized, resulting in the third region 203 of the formed second film layer having a higher density and a thicker thickness.

[0045] The density of the first region 201 is greater than the density of the second region 202, and the thickness of the first region 201 is greater than the thickness of the second region 202. The density of the third region 203 is greater than the density of the fourth region 204, and the thickness of the third region 203 is greater than the thickness of the fourth region 204, thereby improving the overall density of the hard mask structure.

[0046] In this embodiment, the material of the first film layer is the same as the material of the second film layer.

[0047] In this embodiment, the material of the second film layer includes amorphous carbon.

[0048] The second film layer is formed using a reaction-enhanced chemical vapor deposition (RECVD) process. The process parameters for forming the second film layer include: propylene (C3H6) as the reaction gas, a temperature range of 300°C to 600°C, and a power range of 800W to 1200W. The first film layer is formed before the reaction chamber is cleaned, and then the second film layer is formed. This cleaning removes deposits from the inner walls of the reaction chamber, minimizing the impact of deposits on the deposition rate and film quality.

[0049] In this embodiment, the hard mask structure includes a first film layer and a second film layer. The hard mask structure has a preset thickness. The thickness of the first film layer is half of the preset thickness, and the thickness of the second film layer is half of the preset thickness.

[0050] In this embodiment, the thickness of the first film layer ranges from 1000 angstroms to 3000 angstroms; the thickness of the second film layer ranges from 1000 angstroms to 3000 angstroms.

[0051] In another embodiment, the process of forming the hard mask structure further includes: after forming the second film layer, removing the layer to be etched and cleaning the reaction chamber; moving the layer to be etched into the reaction chamber and forming a third film layer on the surface of the second film layer. The first film layer, the second film layer and the third film layer are made of the same material.

[0052] At this time, the thickness of the first film layer, the second film layer and the third film layer is one third of the preset thickness.

[0053] Please refer to Figure 5, a patterned photoresist layer (not shown) is formed on the surface of the hard mask structure; the hard mask structure is etched using the patterned photoresist layer as a mask to form an opening 205 in the hard mask structure; the layer to be etched 200 is etched using the hard mask structure and the opening 205 as a mask to form a semiconductor structure having a groove (not shown) in the semiconductor structure.

[0054] In this embodiment, the aspect ratio of the groove is in the range of 30 to 100. The groove has a high aspect ratio, and the hard mask structure is used as a mask to etch the layer 200 to be etched. The hard mask structure has a good supporting effect and is not easily consumed during the etching process.

[0055] The overall density of the hard mask structure formed by multiple deposition and cleaning is improved. On the one hand, when the opening 205 is formed in the hard mask structure, the morphology of the opening 205 is better, and the pattern of the photoresist layer can be better transferred to the hard mask structure; on the other hand, when the layer to be etched 200 is etched using the hard mask structure and the opening 205 as a mask to form a semiconductor structure with a groove, the hard mask structure has a good supporting effect and is not easily consumed during the etching process. It can better transfer the pattern to the layer to be etched 200 to form a semiconductor structure with a high aspect ratio.

[0056] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a layer to be etched; Providing a reaction chamber, wherein the reaction chamber is used to form a hard mask structure on the surface of the layer to be etched; A hard mask structure is formed on the surface of the layer to be etched, wherein the hard mask structure includes at least two thin film layers. The formation process of the hard mask structure includes: moving the layer to be etched into a reaction chamber and forming a first film layer on the surface of the layer to be etched; after the first film layer is formed, moving the layer to be etched out and cleaning the reaction chamber; moving the layer to be etched into the reaction chamber and forming a second film layer on the surface of the first film layer.

2. The method for forming a semiconductor structure according to claim 1, wherein: The material of the first film layer includes amorphous carbon; the material of the second film layer includes amorphous carbon.

3. The method for forming a semiconductor structure according to claim 2, wherein: The process for forming the first film layer includes a reaction enhanced chemical vapor deposition process, and the parameters for forming the first film layer include: the reaction gas is propylene, the temperature range is 300 degrees Celsius to 600 degrees Celsius, and the power range is 800 watts to 1200 watts.

4. The method for forming a semiconductor structure according to claim 2, wherein: The process for forming the second film layer includes a reaction enhanced chemical vapor deposition process, and the process parameters for forming the second film layer include: the reaction gas is propylene, the temperature range is 300 degrees Celsius to 600 degrees Celsius, and the power range is 800 watts to 1200 watts.

5. The method for forming a semiconductor structure according to claim 2, wherein: The method for cleaning the reaction chamber includes an ashing process, and the parameters of the ashing process include: the reaction gas includes oxygen or ozone, the reaction temperature ranges from 200 degrees Celsius to 500 degrees Celsius, and the chamber pressure ranges from 1 Torr to 5 Torr.

6. The method for forming a semiconductor structure according to claim 1, wherein: The thickness of the first film layer ranges from 1000 angstroms to 3000 angstroms; the thickness of the second film layer ranges from 1000 angstroms to 3000 angstroms.

7. The method for forming a semiconductor structure according to claim 1, wherein: The first film layer includes a first region and a second region located on the first region, the density of the first region is greater than the density of the second region, and the thickness of the first region is greater than the thickness of the second region; the second film layer includes a third region and a fourth region located on the third region, the density of the third region is greater than the density of the fourth region, and the thickness of the third region is greater than the thickness of the fourth region.

8. The method for forming a semiconductor structure according to claim 1, wherein: The formation process of the hard mask structure further includes: after forming the second film layer, removing the layer to be etched and cleaning the reaction chamber; moving the layer to be etched into the reaction chamber and forming a third film layer on the surface of the second film layer.

9. The method for forming a semiconductor structure according to claim 1, wherein: Also includes: forming a patterned photoresist layer on the surface of the hard mask structure; etching the hard mask structure using the patterned photoresist layer as a mask to form an opening in the hard mask structure; The layer to be etched is etched using the hard mask structure and the opening as a mask to form a semiconductor structure having a groove therein. The method for forming a semiconductor structure according to claim 9, wherein: The depth-to-width ratio of the groove is in the range of 30-100.

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