Low-noise amplifier and radio frequency chip

By introducing a first transistor into a low noise amplifier to offset gm3, the problems of low linearity and poor IIP3 performance are solved, the linearity and IIP3 performance of the circuit are improved, and the interference of adjacent channel and the generation of intermodulation components in the spectrum are reduced.

WO2025161840A1PCT designated stage Publication Date: 2025-08-07LANSUS TECH INC
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Patent Information

Application Number
PCT/CN2025/070400
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-01-29
Filing Date
2025-01-03
Publication Date
2025-08-07

AI Technical Summary

Technical Problem

The existing low-noise amplifier has low linearity and poor performance improvement effect, which cannot effectively reduce the generation of adjacent channel interference and intermodulation components in the spectrum.

Method used

A first transistor is introduced into a low-noise amplifier, which enhances the linearity of the circuit and improves the performance of IIP3 by canceling the gm3 generated by the amplifier circuit.

Benefits of technology

Through the mutual cancellation of gm3, the linearity of the low-noise amplifier is enhanced, the performance of IIP3 is improved, and the interference of adjacent channels and the generation of intermodulation components in the spectrum is reduced.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present utility model relates to the technical field of wireless communication. Disclosed are a low-noise amplifier and a radio frequency chip. The low-noise amplifier comprises a signal input end, an input matching circuit, an amplification circuit, an output matching circuit and a signal output end which are electrically connected in sequence. The low-noise amplifier further comprises a first transistor; a gate of the first transistor is connected between an output end of the input matching circuit and an input end of the amplification circuit, and the gate of the first transistor is further used for connecting to a first bias voltage; a drain of the first transistor is grounded; a source of the first transistor is connected to an input end of the output matching circuit; and an output end of the amplification circuit is further used for connecting to a power supply voltage. The low-noise amplifier of the present utility model can enhance the linearity of circuits, thereby improving the IIP3 performance of the whole low-noise amplifier.
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Description

Low noise amplifier and RF chip Technical Field

[0001] The utility model relates to the technical field of wireless communications, in particular to a low noise amplifier and a radio frequency chip. Background Art

[0002] Low-noise amplifiers (LNAs) are key components of wireless communication systems. As the first-stage active amplifier in signal receivers, they crucially impact the overall performance of communication systems. LNAs with low noise figures and high linearity play a crucial role in reducing adjacent channel interference and the generation of intermodulation products in the spectrum. With the advancement of wireless communication technology, spectrum resources are becoming increasingly scarce. Receiver front-ends often encounter strong interfering signals, both in-band and out-of-band, while receiving in-band signals. This requires LNAs in receiver front-ends to provide not only a certain level of gain and a low noise figure, but also high linearity.

[0003] Related technologies for improving IIP3 (linearity index) include improving the linearity of the circuit by changing the bias, or improving IIP3 by reducing the gain. However, the former increases the power consumption of the circuit in most cases, while the latter has obvious disadvantages, requiring a significant reduction in gain to increase IIP3.

[0004] Therefore, in the above-mentioned related technologies, the linearity of the low noise amplifier is low and the IIP3 performance improvement effect is poor.

[0005] Utility Model Content

[0006] The purpose of the embodiment of the present utility model is to provide a low noise amplifier, which cancels out the gm3 generated by the amplifier circuit by connecting a first transistor to the amplifier circuit for feedback; so as to solve the problems of low linearity and poor IIP3 performance improvement of existing low noise amplifiers.

[0007] In order to solve the above technical problems, in the first aspect, an embodiment of the present invention provides a low-noise amplifier, which includes a signal input terminal, an input matching circuit, an amplifying circuit, an output matching circuit and a signal output terminal electrically connected in sequence; the low-noise amplifier also includes a first transistor; the gate of the first transistor is connected between the output terminal of the input matching circuit and the input terminal of the amplifying circuit, and the gate of the first transistor is also used to connect to a first bias voltage; the drain of the first transistor is grounded, the source of the first transistor is connected to the input terminal of the output matching circuit, and the output terminal of the amplifying circuit is also used to connect to a power supply voltage.

[0008] Preferably, the low noise amplifier further includes a first inductor, a first end of the first inductor is used to connect to the power supply voltage, and a second end of the first inductor is respectively connected to the input end of the output matching circuit and the output end of the amplifier circuit.

[0009] Preferably, the amplifier circuit includes a second transistor and a third transistor, the gate of the second transistor serves as the input end of the amplifier circuit, the source of the second transistor is connected to the drain of the first transistor and then grounded, the drain of the second transistor is connected to the source of the third transistor, the gate of the third transistor is used to connect to a second bias voltage, and the drain of the third transistor serves as the output end of the amplifier circuit.

[0010] Preferably, the low noise amplifier further includes a second inductor, a first end of the second inductor is respectively connected to the drain of the first transistor and the source of the second transistor, and a second end of the second inductor is grounded.

[0011] Preferably, the second transistor and the third transistor are both NMOS transistors.

[0012] Preferably, the first transistor is a PMOS transistor.

[0013] In a second aspect, the present invention provides a radio frequency chip, which includes the above-mentioned low noise amplifier.

[0014] Compared with the prior art, the low-noise amplifier in the present invention is configured by sequentially electrically connecting a signal input terminal, an input matching circuit, an amplifier circuit, an output matching circuit, and a signal output terminal; connecting the gate of a first transistor between the output terminal of the input matching circuit and the input terminal of the amplifier circuit, and the gate of the first transistor is also used to connect a first bias voltage; the drain of the first transistor is grounded, the source of the first transistor is connected to the input terminal of the output matching circuit, and the output terminal of the amplifier circuit is also used to connect a power supply voltage. Since the amplifier circuit itself is a nonlinear device, the linearity of the signal decreases to a certain extent after passing through the amplifier circuit. The nonlinearity of the low-noise amplifier circuit is mainly caused by the gm3 (transconductance value) of the circuit. The input signal is amplified by the amplifier circuit, and the gm3 generated by the first transistor and the gm3 of the amplifier circuit cancel each other out, thereby enhancing the linearity of the circuit and thus improving the IIP3 performance of the entire low-noise amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work. Among them:

[0016] FIG1 is an overall circuit diagram of a low noise amplifier provided by an embodiment of the present invention.

[0017] In the figure, 100, low noise amplifier, 1, signal input terminal, 2, input matching circuit, 3, amplifier circuit, 4, output matching circuit, 5, signal output terminal. DETAILED DESCRIPTION

[0018] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0019] Example 1

[0020] 1 , an embodiment of the present invention provides a low-noise amplifier 100, which includes a signal input terminal 1, an input matching circuit 2, an amplifying circuit 3, an output matching circuit 4, and a signal output terminal 5 electrically connected in sequence. The low-noise amplifier 100 also includes a first transistor M1 and a first inductor L1. The gate of the first transistor M1 is connected between the output terminal of the input matching circuit 2 and the input terminal of the amplifying circuit 3, and the gate of the first transistor M1 is also used to connect to a first bias voltage VGS. The drain of the first transistor M1 is grounded, the source of the first transistor M1 is connected to the input terminal of the output matching circuit 4, and the output terminal of the amplifying circuit 3 is also used to connect to a power supply voltage VDD.

[0021] In this embodiment, the low noise amplifier 100 further includes a first inductor L1 , a first end of the first inductor L1 being connected to the power supply voltage VDD, and a second end of the first inductor L1 being connected to the input end of the output matching circuit 4 and the output end of the amplifier circuit 3 .

[0022] Specifically, the signal input terminal 1, input matching circuit 2, amplifier circuit 3, output matching circuit 4, and signal output terminal 5 are electrically connected in sequence; the gate of the first transistor M1 is connected between the output terminal of the input matching circuit 2 and the input terminal of the amplifier circuit 3, and the gate of the first transistor M1 is also connected to a first bias voltage VGS; the drain of the first transistor M1 is grounded, the source of the first transistor M1 is connected to the input terminal of the output matching circuit 4, the first end of the first inductor L1 is connected to a power supply voltage VDD, and the second end of the first inductor L1 is connected to the input terminal of the output matching circuit 4 and the output terminal of the amplifier circuit 3. Since the amplifier circuit 3 itself is a nonlinear device, the linearity of the signal decreases to a certain extent after passing through the amplifier circuit 3. The nonlinearity of the low-noise amplifier 100 circuit is mainly caused by the circuit's gm3. The amplifier circuit 3 amplifies the input signal, and the gm3 generated by the first transistor M1 and the gm3 of the amplifier circuit 3 cancel each other out, thereby enhancing the linearity of the circuit and improving the IIP3 performance of the entire low-noise amplifier 100.

[0023] In this embodiment, the amplifier circuit 3 includes a second transistor M2 and a third transistor M3. The gate of the second transistor M2 serves as the input of the amplifier circuit 3. The source of the second transistor M2 is connected to the drain of the first transistor M1 and then to ground. The drain of the second transistor M2 is connected to the source of the third transistor M3. The gate of the third transistor M3 is connected to a second bias voltage Vb. The drain of the third transistor M3 serves as the output of the amplifier circuit 3. The second transistor M2 and the third transistor M3 form a cascode amplifier circuit. After passing through the cascode amplifier circuit, the linearity of the signal decreases to a certain extent. The nonlinearity of the low-noise amplifier 100 circuit is primarily caused by the circuit's gm3. The cascode amplifier circuit amplifies the input signal. The gm3 generated by the first transistor M1 and the gm3 generated by the cascode amplifier circuit cancel each other out, enhancing the linearity of the circuit and thereby improving the IIP3 performance of the entire low-noise amplifier 100.

[0024] In this embodiment, the low-noise amplifier 100 further includes a second inductor L2, the first end of which is connected to the drain of the first transistor M1 and the source of the second transistor M2, respectively, and the second end of the second inductor L2 is grounded. By connecting the source of the second transistor M2 to the first end of the second inductor L2, and the first end of the second inductor L2 is also connected to the drain of the first transistor M1, a negative feedback function is formed. After the RF signal passes through the input matching circuit 2, it enters the cascode amplifier circuit composed of the second transistor M2 and the third transistor M3. The received signal is amplified and then passes through the output matching circuit 4 to enter the next stage circuit of the system. Under a suitable first bias voltage VGS, the second transistor M2 and the first transistor M1 will generate a gm3 with opposite positive and negative. The gm3 of the first transistor M1 can weaken the influence of the gm3 of the second transistor M2, thereby achieving the purpose of improving the IIP3 of the overall circuit.

[0025] In this embodiment, both the second transistor M2 and the third transistor M3 are NMOS transistors.

[0026] In this embodiment, the first transistor M1 is a PMOS transistor.

[0027] In this embodiment, the input matching circuit 2 is a capacitor or an inductor. The output matching circuit 4 is a capacitor or an inductor.

[0028] Example 2

[0029] The present utility model provides a radio frequency chip, which includes the above-mentioned low noise amplifier 100.

[0030] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0031] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A low noise amplifier, comprising a signal input terminal, an input matching circuit, an amplifying circuit, an output matching circuit, and a signal output terminal electrically connected in sequence; characterized in that: The low-noise amplifier also includes a first transistor; the gate of the first transistor is connected between the output end of the input matching circuit and the input end of the amplifier circuit, and the gate of the first transistor is also used to connect to a first bias voltage; the drain of the first transistor is grounded, the source of the first transistor is connected to the input end of the output matching circuit, and the output end of the amplifier circuit is also used to connect to a power supply voltage.

2. The low noise amplifier according to claim 1, wherein The low noise amplifier further includes a first inductor, a first end of the first inductor being used to connect to the power supply voltage, and a second end of the first inductor being respectively connected to the input end of the output matching circuit and the output end of the amplifying circuit.

3. The low noise amplifier according to claim 1, wherein The amplifier circuit includes a second transistor and a third transistor, the gate of the second transistor serves as the input end of the amplifier circuit, the source of the second transistor is connected to the drain of the first transistor and then grounded, the drain of the second transistor is connected to the source of the third transistor, the gate of the third transistor is used to connect to a second bias voltage, and the drain of the third transistor serves as the output end of the amplifier circuit.

4. The low noise amplifier according to claim 3, wherein: The low noise amplifier further includes a second inductor, a first end of the second inductor being connected to the drain of the first transistor and the source of the second transistor respectively, and a second end of the second inductor being grounded.

5. The low noise amplifier according to claim 3, wherein: The second transistor and the third transistor are both NMOS transistors.

6. The low noise amplifier according to claim 1, wherein The first transistor is a PMOS transistor.

7. A radio frequency chip, characterized in that: The radio frequency chip includes the low noise amplifier according to any one of claims 1 to 6.

Citation Information

Patent Citations

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