Semiconductor optical element
The semiconductor optical device design with an insulating region and dielectric layer enables high optical confinement and effective QCSE, improving modulation speed and reducing threshold current by aligning the electric field with the well and barrier layer stacking direction.
Patent Information
- Application Number
- PCT/JP2024/046462
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-08
- Filing Date
- 2024-12-27
- Publication Date
- 2025-08-14
AI Technical Summary
Existing semiconductor optical devices fail to effectively realize the quantum confined Stark effect (QCSE) due to the stacking direction of well and barrier layers being perpendicular to the applied electric field, limiting high optical confinement and device performance.
A semiconductor optical device design with an insulating region sandwiched between an n-type and p-type semiconductor portion, featuring a multiple quantum well structure and a dielectric layer, allowing for optical confinement and enabling QCSE by applying an electric field parallel to the stacking direction of well and barrier layers.
The design achieves high optical confinement and enhances the response speed of the device to modulation signals while reducing the threshold current and enabling operation at lower applied voltages.
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Figure JP2024046462_14082025_PF_FP_ABST
Abstract
Description
semiconductor optical element
[0001] The present invention relates to a semiconductor optical device.
[0002] SiO 2 a silicon substrate on which a layer is formed, and SiO 2 A semiconductor optical device has been disclosed having a waveguide structure including an active region formed on a layer and buried layers on both sides of the active region (Patent Documents 1 and 2). In this semiconductor optical device, one of the buried layers is doped with a first type of impurity, and the other buried layer is doped with a second type of impurity, forming a structure for lateral current injection into the active region between the one buried layer and the other buried layer. In such a semiconductor optical device, light is tightly confined within the active region. This is said to improve the characteristics of the semiconductor optical device, such as reducing the threshold current in the case of a semiconductor laser device and enabling modulation operation at a low applied voltage in the case of an optical modulator.
[0003] JP 2015-15396 A Patent No. 6267584 A
[0004] In semiconductor optical devices, the quantum confined Stark effect (QCSE) can be effectively realized in the active region because it can enhance the device's performance. For example, when the semiconductor optical device is an optical modulator, the QCSE can increase the response speed to a modulated signal. However, the semiconductor optical devices disclosed in Patent Documents 1 and 2 have a drawback in that the stacking direction of the well layer and the barrier layer in the active region is approximately perpendicular to the direction of the electric field applied to the active region, which prevents the QCSE from being realized.
[0005] The present invention has been made in view of the above, and an object of the present invention is to provide a semiconductor optical device that can realize high optical confinement and can effectively exhibit QCSE.
[0006] One aspect of the present invention is a semiconductor optical device comprising: a substrate having an insulating region on a main surface; an n-type semiconductor portion located on the insulating region; an active region located on the insulating region adjacent to the n-type semiconductor portion in a first direction along the main surface, the active region having well layers and barrier layers arranged alternately in the first direction; a p-type semiconductor portion located on the insulating region adjacent to the active region on the opposite side to the n-type semiconductor portion in the first direction; an n-side electrode electrically connected to the n-type semiconductor portion; and a p-side electrode electrically connected to the p-type semiconductor portion.
[0007] The refractive index of the insulating region may be lower than the effective refractive index of the active region.
[0008] The optical fiber may further include a dielectric layer covering at least the active region on the side opposite to the insulating region, the dielectric layer having a refractive index lower than the effective refractive index of the active region.
[0009] The semiconductor optical device may be configured as an electro-absorption modulator.
[0010] The semiconductor optical device may be configured as a laser device.
[0011] According to the present invention, it is possible to realize a semiconductor optical device that can realize high optical confinement and can effectively exhibit QCSE.
[0012] FIG. 1 is a schematic cross-sectional view of a semiconductor optical device according to a first embodiment. FIG. 2 is a schematic top view of the semiconductor optical device according to the first embodiment. FIG. 3A is an explanatory diagram of a method for manufacturing the semiconductor optical device according to the first embodiment. FIG. 3B is an explanatory diagram of a method for manufacturing the semiconductor optical device according to the first embodiment. FIG. 3C is an explanatory diagram of a method for manufacturing the semiconductor optical device according to the first embodiment. FIG. 3D is an explanatory diagram of a method for manufacturing the semiconductor optical device according to the first embodiment. FIG. 4A is an explanatory diagram of a method for manufacturing the semiconductor optical device according to the first embodiment. FIG. 4B is an explanatory diagram of a method for manufacturing the semiconductor optical device according to the first embodiment. FIG. 4C is an explanatory diagram of a method for manufacturing the semiconductor optical device according to the first embodiment. FIG. 4D is an explanatory diagram of a method for manufacturing the semiconductor optical device according to the first embodiment. FIG. 5 is a schematic cross-sectional view of a semiconductor optical device according to a second embodiment. FIG. 6 is a schematic top view of the semiconductor optical device according to the second embodiment.
[0013] Hereinafter, embodiments will be described with reference to the drawings. However, the present invention is not limited to these embodiments. In addition, in the description of the drawings, identical or corresponding elements are appropriately designated by the same reference numerals, and redundant explanations may be omitted. It should be noted that the drawings are schematic, and the dimensional relationships and ratios of each element may differ from the actual. Even between drawings, there may be parts in which the dimensional relationships and ratios differ. In addition, directions may be described using an XYZ Cartesian coordinate system in the drawings.
[0014] (Embodiment 1) <Configuration of Semiconductor Optical Device> Fig. 1 is a schematic cross-sectional view of a semiconductor optical device according to embodiment 1. Fig. 2 is a top view of the semiconductor optical device according to embodiment 1. The semiconductor optical device 100 is configured to function as an electro-absorption (EA) modulator for light in a predetermined wavelength band. The predetermined wavelength band is not particularly limited, but may be, for example, the O band (1.26 μm to 1.36 μm) or C band (1.53 μm to 1.56 μm) used in optical communications.
[0015] The semiconductor optical device 100 comprises a substrate 1, an n-type semiconductor portion 2, an active region 3, a p-type semiconductor portion 4, a dielectric layer 5, an n-side electrode 6, a p-side electrode 7, and AR (Anti-Reflection) films 8 and 9.
[0016] The substrate 1 is made up of a substrate body 1a made of silicon (Si) and an insulating region made of silicon oxide (SiO 2 ) layer 1b are stacked in the Z direction (upward). The silicon oxide layer 1b forms the main surface 1c of the substrate 1. The silicon oxide layer 1b is, for example, a native oxide film, but it may also be an oxide film formed by oxidizing the main surface of the substrate body 1a. Here, the substrate 1 is an example of a substrate having an insulating region on its main surface. Therefore, the constituent material of the substrate body is not limited to silicon. Furthermore, the insulating region is not limited to silicon oxide. For example, the insulating region may be silicon nitride (SiNx).
[0017] The n-type semiconductor portion 2 is located on the silicon oxide layer 1b. The n-type semiconductor portion 2 has a layered shape extending in the X and Y directions. The n-type semiconductor portion 2 is in contact with the silicon oxide layer 1b at a contact surface 2a. The n-type semiconductor portion 2 is made of, for example, n-InP, which has an n-type conductivity. InP is an InP-based semiconductor material. Here, an InP-based semiconductor material is an example of a semiconductor material having a zinc blende structure. Note that the n-type semiconductor in this specification may contain, for example, silicon (Si), sulfur (S), or selenium (Se) as n-type impurities.
[0018] The active region 3 is located on the silicon oxide layer 1b and adjacent to the n-type semiconductor portion 2 in the X direction along the main surface 1c. The active region 3 has a layered shape that is relatively thin in the X direction and extends in the Y direction. The active region 3 has a multiple quantum well structure in which well layers 3a and barrier layers 3b are alternately arranged in the X direction. The active region 3 is in contact with the silicon oxide layer 1b at a contact surface 3c. The active region 3 is made of a semiconductor material with a higher refractive index than the n-type semiconductor portion 2. The refractive index of the insulating silicon oxide layer 1b is lower than the effective refractive index of the active region 3. The active region 3 is made of, for example, GaInAsP or AlGaInAs and has a multiple quantum well structure. The composition of the active region 3 is set so that the semiconductor optical device 100 functions as an EA modulator for light in a predetermined wavelength band. Here, the X direction is an example of a first direction.
[0019] The p-type semiconductor portion 4 is located on the silicon oxide layer 1b, adjacent to the active region 3 on the opposite side of the n-type semiconductor portion 2 in the X direction. The p-type semiconductor portion 4 has a layered shape extending in the X and Y directions. The p-type semiconductor portion 4 includes a first layer 4a adjacent to the active region 3 in the X direction and a second layer 4b adjacent to the first layer 4a in the X direction. The first layer 4a is made of a semiconductor material with a lower refractive index than the active region 3. The second layer 4b is made of a semiconductor material that makes ohmic contact with the p-side electrode 7. The first layer 4a is made of, for example, p-InP having a p-type conductivity. The second layer 4b is made of, for example, p-GaInAs. The second layer 4b is also referred to as a contact layer. The p-type semiconductor in this specification may contain, for example, zinc (Zn) as a p-type impurity. The p-type semiconductor portion 4 is in contact with the silicon oxide layer 1b at a contact surface 4c.
[0020] The dielectric layer 5 covers at least the active region 3 on the side opposite to the silicon oxide layer 1b in the Z direction, and also covers a portion of each of the n-type semiconductor portion 2 and the p-type semiconductor portion 4. The refractive index of the dielectric layer 5 may be lower than the effective refractive index of the active region 3. The dielectric layer 5 is made of, for example, silicon oxide.
[0021] The n-side electrode 6 is electrically connected to the n-type semiconductor portion 2. Specifically, the n-side electrode 6 is in ohmic contact with the n-type semiconductor portion 2, and contains, for example, gold or nickel.
[0022] The p-side electrode 7 is electrically connected to the p-type semiconductor portion 4. Specifically, the p-side electrode 7 is in ohmic contact with the second layer 4b of the p-type semiconductor portion 4, and contains, for example, titanium, platinum, or gold.
[0023] The AR film 8 is formed so as to cover at least the end face of the active region 3 in the positive direction of the Y direction, and in this embodiment, it is formed so as to also cover the end faces of the n-type semiconductor portion 2 and the p-type semiconductor portion 4 in the positive direction of the Y direction.
[0024] The AR film 9 is formed so as to cover at least the end faces of the active region 3 in the negative direction of the Y direction, and in this embodiment, it is formed so as to also cover the end faces of the n-type semiconductor portion 2 and the p-type semiconductor portion 4 in the negative direction of the Y direction.
[0025] In the semiconductor optical device 100 configured as described above, when a reverse bias voltage is applied between the n-side electrode 6 and the p-side electrode 7 and a modulation voltage signal is also applied, the state of the active region 3 switches between a state in which it absorbs light in the 1.55 μm wavelength band and a state in which it transmits light in the wavelength band according to the modulation voltage signal. As a result, the semiconductor optical device 100 functions as an EA modulator. Therefore, when light of a predetermined wavelength is input to one end face in the y direction of the active region 3, the semiconductor optical device 100 outputs modulated light modulated by the modulation voltage signal from the other end face.
[0026] In this case, in the semiconductor optical device 100, by applying a reverse bias voltage between the n-side electrode 6 and the p-side electrode 7, an electric field can be applied in the stacking direction of the well layers 3 a and the barrier layers 3 b in the active region 3, thereby effectively realizing QCSE. As a result, the semiconductor optical device 100 becomes an EA modulator with a high response speed to a modulation signal.
[0027] Furthermore, in the semiconductor optical device 100, the active region 3 is sandwiched between the silicon oxide layer 1b, which has a low refractive index in the z direction, and the dielectric layer 5, thereby providing strong optical confinement. As a result, the semiconductor optical device 100 is capable of modulation operation with a relatively small applied voltage.
[0028] <Method of Manufacturing Semiconductor Optical Device> Next, with reference to FIGS. 3A-3D and 4A-4D, an example of a method of manufacturing the semiconductor optical device 100 according to the first embodiment will be described. First, as shown in FIG. 3A, a sacrificial layer 1002 and an n-type semiconductor layer 1003 are sequentially formed on a main surface 1011 of an n-InP substrate 1001 by a crystal growth method such as MOCVD (Metal Organic Chemical Vapor Deposition), thereby forming an epitaxial substrate 1000. The sacrificial layer 1002 is made of a semiconductor material having a higher etching rate with respect to a predetermined etchant than the n-type semiconductor layer 1003, such as n-GaInAs or n-AlInAs. The thickness of the sacrificial layer 1002 is, for example, several hundred nanometers or more, preferably about 1000 nm. The n-type semiconductor layer 1003 is a layer that becomes the n-type semiconductor portion 2 in the semiconductor optical device 100. The thickness of the n-type semiconductor layer 1003 is, for example, about 200 nm.
[0029] Here, it is preferable that the main surface 1011 of the substrate 1001 is approximately a (011) plane. That is, the main surface 1011 may be a (011) plane or may be inclined at an angle of a few degrees or less from the (011) plane, but it is more preferable that the main surface 1011 is inclined at an angle of 2 degrees from the (011) plane toward the (111)B plane. The reason for this will be explained later.
[0030] 3B, a substrate 2000 having a structure in which a substrate body 2001 made of silicon and a silicon oxide layer 2002 are laminated is prepared, and the silicon oxide layer 2002 of the substrate 2000 and the n-type semiconductor layer 1003 of the epitaxial substrate 1000 are bonded together to form a bonded substrate. This bonding can be achieved by a conventionally known method, for example, O 2 This can be achieved by joining the silicon oxide layer 2002 and the n-type semiconductor layer 1003 together after plasma treatment and then subjecting them to heat and pressure bonding.
[0031] In the above bonding step, the surface flatness of substrate 2000 and epitaxial substrate 1000 is very important. When main surface 1011 of substrate 1001 is approximately a (011) plane, in order to have surface flatness suitable for the bonding step, it is important that the main surface 1011 is inclined toward the (111)B plane with respect to the (011) plane, and the inclination is preferably about 2 degrees.
[0032] 3C, the substrate 1001 and the sacrificial layer 1002 are removed from the bonded substrate by etching or the like, thereby exposing the n-type semiconductor layer 1003 to the surface.
[0033] 3D , a dielectric layer 1004 is formed by a CVD (Chemical Vapor Deposition) method or the like on the n-type semiconductor layer 1003. The dielectric layer 1004 is a layer that will become the dielectric layer 5 in the semiconductor optical device 100.
[0034] Subsequently, as shown in FIG. 4A, the dielectric layer 1004 and the n-type semiconductor layer 1003 are patterned by photolithography and dry etching.
[0035] 4B , a portion of n-type semiconductor layer 1003 is removed by wet etching using, for example, a chlorine-based etching solution. At this time, silicon oxide layer 2002 and dielectric layer 1004 are not etched, and dielectric layer 1004 remains in a shape resembling an overhang over n-type semiconductor layer 1003. If main surface 1011 of substrate 1001 is approximately a (011) plane, growth surface 1013 of n-type semiconductor layer 1003 epitaxially grown on main surface 1011 is also approximately a (011) plane, and therefore, etched surface 1023 of n-type semiconductor layer 1003 is approximately a (100) plane. Growth surface 1013 is the surface that becomes contact surface 2 a in n-type semiconductor portion 2.
[0036] 4C , active region 3 and p-type semiconductor portion 4 are successively formed on etched surface 1023 of n-type semiconductor layer 1003 by a crystal growth method such as MOCVD. Note that even if the crystalline material falls onto silicon oxide layer 2002, it does not grow there, but moves, for example, to etched surface 1023 of n-type semiconductor layer 1003, where it grows. As a result, active region 3 and p-type semiconductor portion 4 grow along silicon oxide layer 2002.
[0037] Subsequently, as shown in FIG. 4D, the dielectric layer 1004 and the n-type semiconductor layer 1003 are formed into the shapes of the dielectric layer 5 and the n-type semiconductor portion 2 by photolithography and etching.
[0038] Thereafter, an n-side electrode 6 and a p-side electrode 7 are formed. Thereafter, known processes such as cleavage, formation of AR films 8 and 9, and cutting into individual device pieces are carried out, thereby completing the manufacture of the semiconductor optical device 100.
[0039] (Embodiment 2) Fig. 5 is a schematic cross-sectional view of a semiconductor optical device according to embodiment 2. Fig. 6 is a top view of the semiconductor optical device according to embodiment 2. The semiconductor optical device 100A is configured to function as a DFB (Distributed Feedback) laser that outputs laser light of a predetermined wavelength.
[0040] The semiconductor optical device 100A has a configuration in which the dielectric layer 5 in the semiconductor optical device 100 according to the first embodiment is replaced with a dielectric layer 5A.
[0041] Diffraction grating layers 11 are embedded in the dielectric layer 5A. The diffraction grating layers 11 are layers arranged at predetermined intervals in the Y direction above the active region 3 along the active region 3. The diffraction grating layers 11 are made of a dielectric material with a refractive index different from that of the dielectric layer 5A. For example, when the dielectric layer 5A is made of SiO 2 When the diffraction grating layer 11 is made of SiNx, the diffraction grating layer 11 is made of SiNx.
[0042] In the semiconductor optical device 100A, the composition of the active region 3 is set so as to emit light of a predetermined wavelength.
[0043] In the semiconductor optical device 100A configured in this manner, when a bias voltage is applied between the n-side electrode 6 and the p-side electrode 7 to inject a current, the semiconductor optical device 100A outputs a laser beam having a wavelength according to the spacing of the diffraction grating layers 11. In this way, the semiconductor optical device 100A functions as a DFB laser device.
[0044] At this time, by applying a bias voltage between the n-side electrode 6 and the p-side electrode 7, an electric field can be applied in the stacking direction of the well layer 3 a and the barrier layer 3 b in the active region 3, thereby effectively realizing QCSE.
[0045] Furthermore, in the semiconductor optical device 100A, the active region 3 is sandwiched between the silicon oxide layer 1b, which has a low refractive index in the Z direction, and the dielectric layer 5, resulting in strong optical confinement. As a result, the threshold current is reduced in the semiconductor optical device 100A. Furthermore, because the active region 3 is sandwiched between the silicon oxide layer 1b, which is an insulator, and the dielectric layer 5, the current injected into the active region 3 is less likely to leak to areas other than the multiple quantum well structure. Therefore, the injected current can be effectively used for laser oscillation.
[0046] In the semiconductor optical device 100 according to the first embodiment, if the composition of the active region 3 is set so as to emit light of a predetermined wavelength and the AR films 8 and 9 are replaced with reflective mirrors that form a laser resonator, the semiconductor optical device can be configured to function as a Fabry-Perot type semiconductor laser device.
[0047] Furthermore, although the dielectric layer 5 is provided in each of the above embodiments, the dielectric layer 5 may not be provided. In this case, the active region 3 is sandwiched between the silicon oxide layer 1b and air in the Z direction, but in this case too, the light confinement is strong.
[0048] Furthermore, the present invention is not limited to the above-described embodiments. The present invention also includes configurations in which the above-described components are appropriately combined. Furthermore, further effects and modifications can be easily derived by those skilled in the art. Therefore, the broader aspects of the present invention are not limited to the above-described embodiments, and various modifications are possible.
[0049] The present invention can be used in semiconductor optical devices.
[0050] 1, 1001, 2000: Substrate 1a, 2001: Substrate body 1b, 2002: Silicon oxide layer 1c, 1011: Main surface 2: N-type semiconductor portion 2a, 3c, 4c: Contact surface 3: Active region 3a: Well layer 3b: Barrier layer 4: P-type semiconductor portion 4a: First layer 4b: Second layer 5, 5A, 1004: Dielectric layer 6: N-side electrode 7: P-side electrode 8, 9: AR film 11: Diffraction grating layer 100, 100A: Semiconductor optical element 1000: Epitaxial substrate 1002: Sacrificial layer 1003: N-type semiconductor layer 1013: Growth surface 1023: Etching surface
Claims
1. A semiconductor optical device comprising: a substrate having an insulating region on a main surface; an n-type semiconductor portion located on said insulating region; an active region located on said insulating region adjacent to said n-type semiconductor portion in a first direction along said main surface, said active region having well layers and barrier layers arranged alternately in said first direction; a p-type semiconductor portion located on said insulating region adjacent to said active region on the opposite side to said n-type semiconductor portion in said first direction; an n-side electrode electrically connected to said n-type semiconductor portion; and a p-side electrode electrically connected to said p-type semiconductor portion.
2. The semiconductor optical device according to claim 1, wherein the refractive index of the insulating region is lower than the effective refractive index of the active region.
3. The semiconductor optical device according to claim 1, further comprising a dielectric layer covering at least the active region on the side opposite to the insulating region, the dielectric layer having a refractive index lower than the effective refractive index of the active region.
4. The semiconductor optical device according to any one of claims 1 to 3, configured as an electroabsorption modulator.
5. The semiconductor optical device according to any one of claims 1 to 3, configured as a laser device.
Citation Information
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