Power optimisation for a busy-polling device

Abstract

In some examples, a method of power optimisation for a busy-polling device in a data centre comprises receiving, by a controller, at least one performance characteristic associated with the busy-polling device, wherein the busy-polling device comprises a processor comprising multiple cores, processing, by the controller, the at least one performance characteristic, whereby to determine, for each core of the multiple cores, whether its load meets one or more optimisation criteria, and, in response to determining that the load of a core of the multiple cores meets the one or more optimisation criteria, adjusting a frequency of the core of the multiple cores.

Description

[0001] POWER OPTIMISATION FOR A BUSY-POLLING DEVICE

[0002] TECHNICAL FIELD

[0003] The present disclosure relates, in general, to power optimisation for busy -polling devices. Aspects of the disclosure relate to reducing power consumption for a busy-polling device in a data centre.

[0004] BACKGROUND

[0005] In spite of silicon and chips technologies becoming more and more efficient, energy used by data centres is increasing yearly due to the increase of workloads and data traffic demands. Data centres and interconnection networks accounted for 1% of the greenhouse gas emission in 2020. Some major inefficiencies can be addressed with the development of smart power controller devices specific for data centres use cases.

[0006] Key components of modem data centres are fast networks. Some of the devices implementing fast interconnections in data centres, such as network switches, can implement a busy polling method where the CPU of the devices is continuously polling the network card to check for available traffic to be processed. Such busy -polling mechanism enables faster traffic processing compared to an interrupt model. It also implies that CPUs are always busy and pushed to their maximum operating frequency.

[0007] Nevertheless, traffic in data centres is bursty and non-uniformly distributed by nature. This implies that such devices can stay idle for considerable amounts of time causing unnecessary power consumption.

[0008] SUMMARY

[0009] An objective of the present disclosure is to provide a mechanism for power optimisation for a busy-polling device in a data centre.

[0010] The foregoing and other objectives are achieved by the features of the independent claims.

[0011] Further implementation forms are apparent from the dependent claims, the description and the Figures.

[0012] A first aspect of the present disclosure provides a method of power optimisation for a busy-polling device in a data centre, the method comprising receiving, by a controller, at least one performance characteristic associated with the busy -polling device, wherein the busy-polling device comprises a processor comprising multiple cores, processing, by the controller, the at least one performance characteristic, whereby to determine, for each core of the multiple cores, whether its load meets one or more optimisation criteria, and, in response to determining that the load of a core of the multiple cores meets the one or more optimisation criteria, adjusting a frequency of the core of the multiple cores.

[0013] Accordingly, a data centre network-oriented power controller method whose objective is to reduce power consumption of a busy-polling data centre network systems while minimising the impact on packet forwarding performance can be provided. The system to be controlled, providing the utilisation metric for busy -polling cores, can overcome the limitations of standard kernel-based CPU frequency governors and drivers.

[0014] The optimisation criteria may comprise a threshold value, the method comprising: in response to determining that the load of a core of the multiple cores is above or below the threshold value, adjusting the frequency of the core of the multiple cores. The method may further comprise determining the optimisation criteria based on a multi-objective optimisation scalarised function.

[0015] Determining the optimisation criteria based on the multi-objective optimisation scalarised function may comprise changing at least one tuning parameter of the busy-polling device and registering a resulting output, analysing the resulting output using a reward function, and determining the optimisation criteria based on the reward function.

[0016] The at least one performance characteristic associated with the busy -polling device may comprise at least one of a utilisation measurement indicating a ratio of the processor cycles spent processing packets to an amount of time spent idle busy -polling, network traffic characteristics forthe network traffic processed on each core of the multiple cores, per-core frequency, available frequencies to set the processor to, power consumption of the processor, and power consumption of the busy -polling device.

[0017] The method may further comprise inserting, by a busy -polling application running on the busy -polling device, a first timestamp into a packet, the first timestamp indicative of a receival time of the packet by the busy -polling device, inserting, by the busypolling application, a second timestamp into the packet, the second timestamp indicative of a transmission time of the packet by the busy -polling device, and calculating a computational latency of the busy -poll application based on the first timestamp and the second timestamp.

[0018] The at least one performance characteristic associated with the busy-polling device may comprise a frequency transition latency, and the method may further comprise calculating, based on the computational latency of the busy -poll application, the frequency transition latency.

[0019] Calculating the frequency transition latency may comprise generating, based on the computational latency of the busy-poll application, a minimum computational latency time series, an average computational latency time series, and a maximum computational latency time series, marking a frequency transition command trigger as a transition starting point and a statistical variation of the minimum or the maximum computational latency as a transition ending point, and calculating the frequency transition latency based on the transition starting point and the transition ending point.

[0020] Adjusting the frequency of the core of the multiple cores may comprise gradually decreasing or increasing the frequency of the core, setting the frequency of the core to its maximum or minimum operating frequency in a single operation, instructing the core to a wake state or a sleep state without disabling the core, and adding or removing the core of the multiple cores dedicated to the busy -polling application of the device in the data centre.

[0021] The method may further comprise generating, using a statistical model, the at least one performance characteristic associated with the busy -polling device, and transmitting it to the controller.

[0022] The method may further comprise applying an exponentially weighted moving average (EWMA) to the at least one performance characteristic associated with the busy -polling device.

[0023] The statistical model may comprise an autoregressive integrated moving average (ARIMA).

[0024] The at least one performance characteristic received by the controller may comprise an average value.

[0025] A second aspect of the present disclosure provides a computer readable storage medium comprising computer program code, accessible by an apparatus comprising a processor, to provide instructions and / or data to the apparatus, the computer program code configured to, with the processor, cause the apparatus to perform the method described herein. A third aspect of the present disclosure provides an apparatus for power optimisation for a busy -polling device in a data centre, the apparatus comprising a processor, a memory coupled to the processor, the memory configured to store program code executable by the processor, the program code comprising one or more instructions, whereby to cause the apparatus to receive at least one performance characteristic associated with the busy -polling device, wherein the busy -polling device comprises a processor comprising multiple cores, process the at least one performance characteristic, whereby to determine, for each core of the multiple cores, whether its load meets one or more optimisation criteria, and, in response to determining that the load of a core of the multiple cores meets one or more optimisation criteria, adjust a frequency of the core of the multiple cores.

[0026] These and other aspects of the disclosure will be apparent from the embodiment s) described below.

[0027] BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order that the present disclosure may be more readily understood, embodiments of the disclosure will now be described, by way of example, with reference to the accompanying drawings, in which:

[0029] Fig. 1 is a flow chart of a method of power optimisation for a busy -polling device in a data centre according to an example ;

[0030] Fig. 2 is a schematic representation of a controller according to an example;

[0031] Fig. 3 is a flow chart of a method of adjusting a frequency of a core according to an example; and

[0032] Fig. 4 is a schematic representation of an apparatus according to an example.

[0033] DETAILED DESCRIPTION

[0034] Example embodiments are described below in sufficient detail to enable those of ordinary skill in the art to embody and implement the systems and processes herein described. It is important to understand that embodiments can be provided in many alternate forms and should not be construed as limited to the examples set forth herein.

[0035] Accordingly, while embodiments can be modified in various ways and take on various alternative forms, specific embodiments thereof are shown in the drawings and described in detail below as examples. There is no intent to limit to the particular forms disclosed. On the contrary, all modifications, equivalents, and alternatives falling within the scope of the appended claims should be included. Elements of the example embodiments are consistently denoted by the same reference numerals throughout the drawings and detailed description where appropriate.

[0036] The terminology used herein to describe embodiments is not intended to limit the scope. The articles “a,” “an,” and “the” are singular in that they have a single referent, however the use of the singular form in the present document should not preclude the presence of more than one referent. In other words, elements referred to in the singular can number one or more, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “comprising,” “includes,” and / or “including,” when used herein, specify the presence of stated features, items, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, items, steps, operations, elements, components, and / or groups thereof.

[0037] Unless otherwise defined, all terms (including technical and scientific terms) used herein are to be interpreted as is customary in the art. It will be further understood that terms in common usage should also be interpreted as is customary in the relevant art and not in an idealized or overly formal sense unless expressly so defined herein. Dynamic Voltage and Frequency Scaling (DVFS) is the general term for the mechanism introduced in modem processors to dynamically switch operating frequency and voltage to reduce power consumption and adapt the frequency to the workload. Adjusting frequency alone of the CPU does not provide relevant benefit in terms of energy consumption; on the other hand, power consumption is proportional to the square of the operating voltage, which is the main driver in reducing energy utilization and heat dissipation. Most CPU manufacturers implement DVFS strategies for all their CPU flavours and architectures. DVFS is particularly useful in mobile devices to reduce battery usage. It also becomes relevant in data centres, where an improvement in the energy efficiency of the single server can have considerable impacts on the data centres power usage at scale.

[0038] For DVFS strategies to be more effective, it is necessary for the CPU to expose a software interface for the operating system to drive the frequency switching according to the load. Linux currently implements multiple type of CPU governors through the CPUFreq subsystem. Scaling governors implement specific algorithms to scale frequency on the CPU according to given conditions and performance targets. The scaling is effectively enforced by scaling drivers that control the hardware frequency switch. Multiple drivers exist, with ACPI being the default one. Others specialized drivers exist, especially for the x86 architecture, such as the Intel-specific PSTATE driver. Another driver of interest is the one implemented forKVM guest VMs; it drives an external controller running on the KVM host to control the frequency of the VM pinned physical CPUs.

[0039] The Linux kernel implements multiple CPUFreq governors to meet different user needs. For example, the performance governor, will scale up the core’s frequency to the maximum available at all time. The powersave implements the opposite policy, keeping the CPU frequency always at the minimum one. The on-demand governor has been the first implementing a DVFS strategy based on estimating the system workload. The first on-demand algorithm implemented had a simple design, and tried to minimize performance loss more than minimize energy consumption: the algorithm was quick at increasing frequency, but more conservative when the detected load was lowering. More recent implementations of the governor decrease frequency more aggressively.

[0040] The Data Plane Development Kit is a framework for user-space packet processing. Its main advantage consists in high- performance processing in software, enabling a variety of use-cases for network applications. A common use case is software based virtual switches handling tenths of millions of packets per second, such as OVS-DPDK. DPDK is based on a busy polling model where packets are polled continuously from the NIC by a user-space driver. This enables high-performance at the cost of high-resources consumption compared to an interrupt-based model, such as the one implemented by the Linux kernel networking stack. DPDK offers a power management library (librte_power) to control frequency and sleep states of the physical cores associated to logical cores used to busy poll in a DPDK application. librte_power provides an API to interact with the frequency and the sleep-state of the running cores, and the ethemet poll -mode driver power management.

[0041] Various approaches to detect a DPDK application load and reduce power consumption have been studied. However, the existing approaches suffer from a number of different disadvantages. One of the available approaches focuses exclusively on changing the processing parallelism of the device and does not consider other control strategies nor investigates the load measurements of the controlled system. Another approach looks exclusively at event-based processing systems and all the measurements and control actions are taken based on their timestamps. While this generalize effectively to many use cases, it does not include a variety of other system metrics that can be taken into consideration to determine the most appropriate power management action. Other approaches may not be suitable for use in a data centre due to the size of data centre high speed links.

[0042] According to an example, there is provided a mechanism for power optimisation to reduce power consumption of busy -polling network systems while minimising the impact on packet forwarding performance. A power management controller for a busypolling device is based on general purpose computing hardware, therefore reducing the complexity associated with implementing the method. The mechanism favours performance to energy saving, guaranteeing compliance with network availability and quality-of-service (QoS) in data centre environments. The controlled system provides a utilisation metric for busy -polling cores, overcoming the limitations of standard kernel-based CPU frequency governors and drivers. Furthermore, a method for measuring CPU frequency transition latency in busy -polling application is proposed.

[0043] The approach described herein provides improvements over standard DVFS techniques to control busy-polling systems by defining an optimal operating point in terms of CPU utilization that the controller tries to maintain during operation; idle and overload are also detected and acted accordingly. Advantageously, the controller can perform a number of signal processing operations on the controlled system measurements to smooth measurement fluctuations or forecast system resources demand.

[0044] Examples in the present disclosure can be provided as methods, systems or machine-readable instructions, such as any combination of software, hardware, firmware or the like. Such machine-readable instructions may be included on a computer readable storage medium (including but not limited to disc storage, CD-ROM, optical storage, etc.) having computer readable program codes therein or thereon.

[0045] The present disclosure is described with reference to flow charts and / or block diagrams of the method, devices and systems according to examples of the present disclosure. Although the flow diagrams described above show a specific order of execution, the order of execution may differ from that which is depicted. Blocks described in relation to one flow chart may be combined with those of another flow chart. In some examples, some blocks of the flow diagrams may not be necessary and / or additional blocks may be added. It shall be understood that each flow and / or block in the flow charts and / or block diagrams, as well as combinations of the flows and / or diagrams in the flow charts and / or block diagrams can be realized by machine readable instructions.

[0046] The machine-readable instructions may, for example, be executed by a machine such as a general-purpose computer, user equipment such as a smart device, e.g., a smart phone, a special purpose computer, an embedded processor or processors of other programmable data processing devices to realize the functions described in the description and diagrams. In particular, a processor or processing apparatus may execute the machine-readable instructions. Thus, modules of apparatus (for example, a module implementing a comparator unit, or a firewall structure and so on) may be implemented by a processor executing machine readable instructions stored in a memory, or a processor operating in accordance with instructions embedded in logic circuitry. The term 'processor' is to be interpreted broadly to include a CPU, processing unit, ASIC, logic unit, or programmable gate set etc. The methods and modules may all be performed by a single processor or divided amongst several processors.

[0047] Such machine-readable instructions may also be stored in a computer readable storage that can guide the computer or other programmable data processing devices to operate in a specific mode. For example, the instructions may be provided on a non- transitory computer readable storage medium encoded with instructions, executable by a processor.

[0048] Fig. 1 is a flow chart of a method of power optimisation for a busy-polling device in a data centre according to an example. The method comprises, in block 101, receiving, by a controller, at least one performance characteristic associated with the busy-polling device. Here, the term “busy -polling device” (and / or a system, and / or an application) may refer to a device that verifies the availability of a given resource continuously, without performing any other operation in between checks. Busypolling devices are common in synchronous input / output systems. The busy-polling device can be, e.g., a computing system or apparatus, user equipment, a network device (physical or virtual), or part thereof. The busy-polling device comprises a processor comprising multiple cores.

[0049] Fig. 2 is a schematic representation of a controller according to an example. The controller 200 may be either internal or external to the controlled system. The controller 200 may comprise a control interface 201 to communicate with a control interface of the busy-polling network application, as well as control logic 202 that determines the instructions to be provided to the controlled system based on its current (or forecasted) status. The controller 200 may comprise a device or a system to control the power consumption of a network device built using a processor able to perform dynamic voltage frequency switching (DVFS) or other techniques suitable for controlling its operating power dynamically. For example, the controller 200 may comprise a general-purpose computing system with a DVFS-controllable multi-core processor running a busy-loop network processing software (such as DPDK) to process the network packets.

[0050] The at least one performance characteristic may comprise at least one of a utilisation measurement indicating a ratio of the processor cycles spent processing packets to an amount of time spent idle busy-polling, thus overcoming the limitations of standard kernel-based CPU frequency governors and drivers. Other performance characteristics provided by the system may comprise, for example, per-core frequency, instantaneous CPU and system power, per-core utilisation, frequency transition latency, and per-core network traffic characteristics. The network traffic characteristics may comprise throughput, packet loss, transport connection latency, and / or processing delay. Furthermore, the network traffic characteristics may comprise the mean packet size of all packets processed in a given time window or a packet size distribution representation of the same time window. The at least one performance characteristic may be made available to the controller by means of a physical or a software interface. For example, the interface may be made available through software and may be accessible both locally as well as remotely (e.g., via a management network interface).

[0051] In order to determine the CPU frequency transition latency, the busy -poll application may timestamp an incoming packet at trx (i.e., the time at which the packet is read from the NIC PMD receive ring), and timestamp it again right before queueing it back in the PMD transmission ring at ttx. Timestamping may be performed on a sample of the total incoming packets. With the timestamps present, it may be possible to compute the computational latency of the busy -poll application, clat — ttx— trx. The application may also timestamp the frequency transition command issued from the controller to the application (or to the DVFS driver). Thus, estimating effective CPU frequency transition latency may be possible. The transition latency information may be taken into account by the controller when determining whether a frequency switch command is worth issuing, considering the time required to transition from a first frequency to a second frequency and the possible variation in system workload that might invalidate the need for the frequency to be adjusted.

[0052] Three time series can be constructed starting from the computational latency - more specifically, the minimum, average, and maximum computational latency of the busy-polling application. When a frequency switch event is triggered, the current minimum computational latency min data is taken as reference at to. The frequency transition latency At for the event at to may be calculated using the below equation. (cto)0

[0053] The equation refers to a scenario in when the difference between the average computational avg clat, at instant t, and the average computational latency avg clat,-! at instant ti-i, is bigger than the minimum computational latency min clato at instant to. When the transition event is from maximum to minimum frequency, the maximum frequency max clato may be used as reference instead.

[0054] Referring back to Fig. 1, in block 102, the method comprises processing, by the controller, the at least one performance characteristic, whereby to determine, for each core of the multiple cores, whether its load meets one or more optimisation criteria. The method comprises, in block 103, in response to determining that the load of a core of the multiple cores meets the one or more optimisation criteria, adjusting a frequency of the core of the multiple cores.

[0055] The optimisation criteria may comprise a threshold value, such that, in response to determining that the load of a core of the multiple cores is above or below the threshold value, a frequency of the core of the multiple cores may be adjusted. In other words, the controller may process the performance characteristic(s) provided by the busy-polling device and decide on a per- core basis whetherthe load of the core is below a threshold value. The threshold value may comprise a static value or a dynamic value. The dynamic threshold value may be calculated periodically.

[0056] Adjusting the frequency of the core of the multiple cores may comprise increasing or decreasing the frequency of the core (i.e., DVFS action), as described in more detail below. Additionally, adjusting the frequency of the core may also comprise instructing the core to wake from or enter a deep sleep state without disabling the core, and / or dynamically reconfiguring the parallelism of the busy-polling device by enabling or disabling a given core as part of the busy polling subset of the core processing packets, i.e., adding or removing the core dedicated to the busy-polling application of the device.

[0057] To aid in understanding the mechanism of adjusting a frequency of the core, reference will now be made to Fig. 3. Fig. 3 is a flow chart of a method of adjusting a frequency of a core according to an example. In block 301, the method may comprise retrieving at least one performance characteristic (i.e., core utilisation / load metrics) from the busy-polling device, similar to block 101 of Fig. 1.

[0058] In block 302, the method may comprise performing signal processing on the retrieved performance characteristic. Signal processing performed in block 302 may comprise, for example, smoothing or forecasting. To combat the reading fluctuations and introduce hysteresis in the control, the measurements may be averaged over a period of time. In a specific example, the average may be computed over multiple consecutive samples, with an exponential weighted moving average (EWMA). In the below equation, represent the current value for the metric used as an evaluation criterion to enforce control over the system (e.g., utilisation / load measurement), and a represents the smoothing factor of the EWMA.

[0059] EWMAt= a • rt+ (1 — a) • EWMAt-t

[0060] The smoothing factor of the EWMA may be tuned to either stabilise or dynamise the control. The smoothing factor may be set statically or dynamically, by means of a feedback mechanism that evaluates the smoothing factor performance in terms of stability or reactiveness. The feedback mechanism may explore various values for the smoothing factor by comparing the target system response to a predefined performance lookup table.

[0061] The controller may optionally make decisions based on a forecast of system metrics such as CPU usage or power consumption of the busy-polling device. These metrics may be forecasted using statistical models such as the Autoregressive Integrated Moving Average (ARIMA). ARIMA is suitable for forecasting resources in data centre systems since these metrics tend to show seasonality, which the model can handle thanks to its differencing step. The controller may comprise a pre-fitted ARIMA ). d, q) model, in which model parameters have been defined from historical data from a production system (or any other system whose behaviour resembles the behaviour of the system to be controlled). The data may be collected at regular intervals and tested for stationarity (for example, by using an augmented Dickey -Fuller test). If the series is non-stationary , the differencing step of the model may be applied multiple times, whereby to obtain a stationary series. The number of times that the differencing step has to be taken in order to transform the series into a stationary series is expressed using the d parameter of the ARIMA model. The remaining parameters q and p may be obtained through autocorrelation and partial autocorrelation studies of the series. The parameters of the ARIMA model may be updated over time as more new samples of the time series metrics are collected. The forecast obtained from the ARIMA model may be used to cause the controller to act proactively (rather than reactively) in response to possible future states of the system.

[0062] In block 303, the method may comprise determining if the per-core performance characteristics (for example, load metrics) are above or below the triggering thresholds.

[0063] In block 304, if the per-core load value (or any other performance characteristic) is below the given threshold, the controller may issue a command to the busy-polling device to reduce its operating power, for example, by reducing the target core frequency. The reduction may comprise a partial reduction (for example, a single step, or multiple step reduction) or a reduction down to the minimum operating frequency in a single operation, depending on the provided performance characteristics. Similarly, the controller can also evaluate when the load increases and surpasses the optimal threshold.

[0064] In contrast to block 304, in block 405, in response to determining that the load is above the threshold value, the controller may issue a command to increase the operating frequency of the core, thereby increasing the processing capabilities of the busypolling device. The increase may comprise a partial increase or an increase up to the maximum nominal core frequency.

[0065] In some cases, the CPU of the busy -polling device may be able to operate at a frequency higher than the nominal maximum frequency. The frequency higher than the nominal maximum frequency may be referred to as a turbo frequency. In a scenario where the load of the core is very high, in order to maximise the number of packets processed per second, the core frequency may be set to the turbo frequency. However, as a downside, the turbo frequency can considerably increase the operating power of the system.

[0066] Alternatively, the optimisation criteria may be determined based on a multi-objective optimisation scalarised function. Multiobjective optimisation (MOP) is a type of mathematical optimisation problems where multiple objective functions must be optimised simultaneously. The multiple objectives often comprise conflicting objectives. As such, typically, MOP solvers search for the best possible trade-off between the different objective functions, given some optimisation criteria that can be defined in terms of minimisation of a set of objective functions. MOP solvers identify Pareto efficient solutions.

[0067] The use of a MOP scalarised function to enforce control of a core of the multiple cores aims at reducing the energy consumption without reducing performance of the busy-polling network. The scalarised function may comprise a function that identifies global optimums for a modelled system. A model-free controller may then be implemented using a reinforcement learning based approach, having the MOP function as its reward function. In particular, a mathematical model may be dynamically built using a reinforcement learning strategy in which the controller explores the solution space by periodically changing the tuning parameters and registering the target system output performance (i.e., the performance of the busy -polling device). The system response may be analysed in terms of the reward function.

[0068] Power optimisation of a computing system is an example of a typical multi-objective optimisation problem in which a tradeoff between performance and power consumption must be found. In the context of the control of a busy -polling networking application, the problem may be defined using the below equation, in which freq refers to the frequency of a core, throughput refers to the network throughput of that same core (e.g., number of packets that are processed per core each cycle), and energy refers to the power consumption of the core:

[0069] 1

[0070] Vi e (

[0071] 1core, 1 , core? 2, , core n„l S, mint— - - - — - -, Enerqy< (freq< ) throng hputi(freqi)

[0072] The Pareto frontier set may include values that are pareto-optimal in terms of the problem definition. For example, some values may favour performance, while other values may favour system power. Thus, the problem of power optimisation may be redefined as a scalarised maximisation objective function using a weighted linear scalarisation, as shown by the equation below. In the equation below, a first weight wi and a second weight W2 are used, but the disclosure is not limited thereto: max(MOPscore— w±■ throughputfrfreq) + w2Energy freq)

[0073] Specific applications may favour throughput over power saving. This may be the case for a data centre environment, where providers might be bound to specific performance service-level agreements or wish to guarantee a high level of quality-of- service. In such a case, the value of the first weight may be higher than the value of the second weight, so that the optimal frequency that maximises performance and minimises energy for a given workload can be identified. Such a scoring model is, in an example, per core. A MOP solver that follows this equation can maximize the equation per core, e.g., the final solution for the system might be the average of all the cores solution. For a typical reinforcement learning system, a set of actions that the controller can perform on the target must be defined. These actions may include actions related to adjusting the frequency of the core, for example, increasing / reducing the frequency of the core, switching between sleep / wake state of the core, assigning / removing the core from the subset of cores processing network packets. Furthermore, system measurements and variables that represent the system state must also be defined, alongside a reward function. In an unknown system implementing a busy-polling network application, the scalarised MOP function shown on the previous page may be used as the reward function. The system state may be defined based on the performance characteristics associated with the busy -polling device.

[0074] In order to store all the possible state-action pair values deriving from parameter exploration, a Q-leaming algorithm with a Q- table may be used. The reward function for the Q-leaming equation may be substantially identical to the equation defining the scalarisation of the multi-objective optimisation problem, where atrelates to the set of actions taken at step t.

[0075] To control a multicore system the Q-leaming algorithm can be applied to each core separately or to the system as a whole. For the former, atrepresents the set of actions applied to a single core, and throughput and energy refer to those measured on that single core at step t. For the latter, atrepresents the set of actions applied to all cores of the system and throughput and energy are measured on the whole system at step t.

[0076] As the use of a Q-table to store all possible state-action pairs can be associated with a large memory demand, another approach to Q-leaming may include function approximation using an Artificial Neural Network (ANN). The ANN may be made of a number of densely connected layers using a rectified linear unit (ReLu) activation function. One embodiment may use a Mean Squared Error loss functions, while other embodiments may use, for example, a Huber loss function or any type of a regression loss function. Given the controlled system input states, the neural network may map them to an action and a Q-value pair, where the Q-value represents the expected reward for the given state S . In order to improve the function approximation provided by the ANN, the reinforcement learning algorithm may then re-train the ANN with the Q-values present at the output of the network. The ANN can replace the Q-table independently of whether the Q-leaming is applied to a single core or all cores at the same time. In the case of application to a single core, n ANNs can be used, with n being the number of cores used by the busy polling system.

[0077] Fig. 4 is a schematic representation of an apparatus according to an example. The apparatus 400 may comprise a processor 403, and a memory 405 coupled to the processor 403 and configured to store instructions or program code 407, executable by the processor 403. The apparatus 400 may comprise the program code 407 arranged to cause the apparatus to perform the method of power optimisation for a busy -polling device in a data centre as described herein.

[0078] According to an example, machine-readable instructions can be loaded onto a computer or other programmable data processing devices, so that the computer or other programmable data processing devices perform a series of operations to produce computer-implemented processing, thus the instructions executed on the computer or other programmable devices provide an operation for realizing functions specified by flow(s) in the flow charts and / or block(s) in the block diagrams.

[0079] Further, the teachings herein may be implemented in the form of a computer or software product, such as a non-transitory machine-readable storage medium, the computer software or product being stored in a storage medium and comprising a plurality of instructions, e.g., machine readable instructions, for making a computer device implement the methods recited in the examples of the present disclosure. In some examples, some methods can be performed in a cloud-computing or network-based environment. Cloud-computing environments may provide various services and applications via the Internet. These cloud-based services (e.g., software as a service, platform as a service, infrastructure as a service, etc.) may be accessible through a web browser or other remote interface of the user equipment for example. Various functions described herein may be provided through a remote desktop environment or any other cloud-based computing environment.

[0080] While various embodiments have been described and / or illustrated herein in the context of fully functional computing systems, one or more of these exemplary embodiments may be distributed as a program product in a variety of forms, regardless of the particular type of computer-readable-storage media used to actually cany out the distribution. The embodiments disclosed herein may also be implemented using software modules that perform certain tasks. These software modules may include script, batch, or other executable files that may be stored on a computer-readable storage medium or in a computing system. In some embodiments, these software modules may configure a computing system to perform one or more of the exemplary embodiments disclosed herein. In addition, one or more of the modules described herein may transform data, physical devices, and / or representations of physical devices from one form to another.

[0081] The preceding description has been provided to enable others skilled in the art to best utilize various aspects of the exemplary embodiments disclosed herein. This exemplary description is not intended to be exhaustive or to be limited to any precise form disclosed. Many modifications and variations are possible without departing from the spirit and scope of the instant disclosure. The embodiments disclosed herein should be considered in all respects illustrative and not restrictive. Reference should be made to the appended claims and their equivalents in determining the scope of the instant disclosure.

Claims

CLAIMS1. A method of power optimisation for a busy -polling device in a data centre, the method comprising: receiving, by a controller, at least one performance characteristic associated with the busy-polling device, wherein the busy-polling device comprises a processor comprising multiple cores (101); processing, by the controller, the at least one performance characteristic, whereby to determine, for each core of the multiple cores, whether its load meets one or more optimisation criteria (102); and in response to determining that the load of a core of the multiple cores meets the one or more optimisation criteria, adjusting a frequency of the core of the multiple cores (103).

2. The method of claim 1, wherein the optimisation criteria comprise a threshold value, the method comprising: in response to determining that the load of a core of the multiple cores is above or below the threshold value, adjusting the frequency of the core of the multiple cores.

3. The method of claim 1, further comprising determining the optimisation criteria based on a multi-objective optimisation scalarised function.

4. The method of claim 3, wherein determining the optimisation criteria based on the multi-objective optimisation scalarised function comprises: changing at least one tuning parameter of the busy-polling device and registering a resulting output; analysing the resulting output using a reward function; and determining the optimisation criteria based on the reward function.

5. The method of any one of claims 1-4, wherein the at least one performance characteristic associated with the busypolling device comprises at least one of a utilisation measurement indicating a ratio of the processor cycles spent processing packets to an amount of time spent idle busy-polling, network traffic characteristics forthe network traffic processed on each core of the multiple cores, per-core frequency, available frequencies to set the processor to, power consumption of the processor, and power consumption of the busy-polling device.

6. The method of any one of claims 1 to 5, further comprising: inserting, by a busy-polling application running on the busy-polling device, a first timestamp into a packet, the first timestamp indicative of a receival time of the packet by the busy -polling device; inserting, by the busy-polling application, a second timestamp into the packet, the second timestamp indicative of a transmission time of the packet by the busy -polling device; calculating a computational latency of the busy -poll application based on the first timestamp and the second timestamp.

7. The method of claim 6, wherein the at least one performance characteristic associated with the busy-polling device comprises a frequency transition latency, the method further comprising: calculating, based on the computational latency of the busy -poll application, the frequency transition latency.

8. The method of claim 7, wherein calculating the frequency transition latency comprises:generating, based on the computational latency of the busy -poll application, a minimum computational latency time series, an average computational latency time series, and a maximum computational latency time series; marking a frequency transition command trigger as a transition starting point and a statistical variation of the minimum or the maximum computational latency as a transition ending point; calculating the frequency transition latency based on the transition starting point and the transition ending point.

9. The method of any preceding claim, wherein adjusting the frequency of the core of the multiple cores (103) comprises: gradually decreasing or increasing the frequency of the core; setting the frequency of the core to its maximum or minimum operating frequency in a single operation; instructing the core to a wake state or a sleep state without disabling the core; adding or removing the core of the multiple cores dedicated to the busy -polling application of the device in the data centre.

10. The method of any preceding claim, further comprising: generating, using a statistical model, the at least one performance characteristic associated with the busypolling device, and transmitting it to the controller.

11. The method of claim 10, further comprising applying an exponentially weighted moving average, EWMA, to the at least one performance characteristic associated with the busy -polling device.

12. The method of claim 10 or 11, wherein the statistical model comprises an autoregressive integrated moving average, ARIMA.

13. The method of any preceding claim, wherein the at least one performance characteristic received by the controller comprises an average value.

14. A computer readable storage medium comprising computer program code, accessible by an apparatus comprising a processor, to provide instructions and / or data to the apparatus, the computer program code configured to, with the processor, cause the apparatus to perform the method of any one of claims15. An apparatus (400) for power optimisation for a busy -polling device in a data centre, the apparatus (400) comprising: a processor (403); a memory (405) coupled to the processor (403), the memory (405) configured to store program code (407) executable by the processor (403), the program code (407) comprising one or more instructions, whereby to cause the apparatus (400) to: receive at least one performance characteristic associated with the busy -polling device, wherein the busy-polling device comprises a processor comprising multiple cores; process the at least one performance characteristic, whereby to determine, for each core of the multiple cores, whether its load meets one or more optimisation criteria; and in response to determining that the load of a core of the multiple cores meets one or more optimisation criteria, adjust a frequency of the core of the multiple cores.

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