Image processing device, image processing method, and program

Abstract

Provided is an image processing device in which an interlace video signal is I / P-converted by inter-frame interpolation, wherein fixation of the video signal is detected.　The image processing device includes a control unit with which it is possible to access a frame memory in which an odd-numbered scanning line frame including odd-numbered scanning lines in an interlaced video and an even-numbered scanning line frame including even-numbered scanning lines in the interlaced video are alternately stored as input frames. The control unit acquires, on the basis of an input frame stored in the frame memory and a subsequent frame following the stored input frame, a digest value from the stored input frame when performing an interlace / progressive (I / P) conversion. Then, the control unit compares the digest values sequentially acquired from a plurality of input frames with the subsequent digest values of subsequent frames following the respective input frames, thereby detecting video fixation in the input frames.

Description

Image processing device, image processing method and program

[0001] The present invention relates to an image processing device, an image processing method, and a program.

[0002] Conventionally, there have been image processing devices that perform I / P conversion to convert interlaced video signals into progressive video signals when outputting video to a display. I / P conversion can be performed by interpolating within a single frame of a video having multiple frames (hereinafter referred to as intra-frame interpolation), or by inter-frame interpolation between multiple frames.

[0003] Intra-frame interpolation converts an interlaced video signal into a progressive video signal based on one or more scan line data stored in a line memory. Meanwhile, inter-frame interpolation stores a frame having odd scan line data, for example, from the interlaced video signal in a frame memory. Then, I / P conversion is performed based on both the frame having odd scan line data stored in the frame memory and a subsequently input frame having even scan line data.

[0004] Generally, I / P conversion using intra-frame interpolation can cause image quality problems such as image flicker. Therefore, for image quality reasons, inter-frame interpolation is sometimes used.

[0005] JP 2009-77034 A

[0006] However, in the processing of video signals, a fault called "sticking" can occur. A sticking fault is a fault in which the video signal becomes fixed, for example, the same scanning line or the same frame is repeatedly generated. Conventionally, a method for detecting sticking has been known for progressive video signals. In addition, in the case of intra-frame interpolation in I / P conversion, sticking is easily detected because processing is performed for each scanning line.

[0007] However, when an interlaced video signal is I / P converted by frame interpolation, frames of odd-numbered scanning line data and frames of even-numbered scanning line data are input alternately, making it difficult to detect sticking. For example, even if either a frame of odd-numbered scanning line data or a frame of even-numbered scanning line data is stuck, if the other frame is not stuck, the sticking may not be detected.

[0008] Therefore, an aspect of the disclosed embodiment is to detect the fixation of a video signal in an image processing device in which an interlaced video signal is I / P converted by inter-frame interpolation.

[0009] One aspect of the disclosed embodiment is exemplified by an image processing device including a control unit that can access a frame memory that alternately stores, as input frames, odd-numbered scan line frames that include odd-numbered scan lines in an interlaced video and even-numbered scan line frames that include even-numbered scan lines in the interlaced video.

[0010] When performing interlace / progressive (I / P) conversion based on an input frame stored in a frame memory and a subsequent frame following the stored input frame, the control unit acquires digest values ​​from the stored input frames, and then detects image fixation in the input frames by comparing the digest values ​​acquired sequentially from the multiple input frames with the subsequent digest values ​​of the subsequent frames following each of the input frames.

[0011] When performing I / P conversion, the image processing device of the present invention acquires a digest value from an input frame stored in a frame memory, and then acquires a subsequent digest value of the subsequent frame and compares them to detect image freeze in the input frame. That is, when an interlaced video signal is I / P converted using interframe interpolation, even if odd-numbered and even-numbered scanline frames are input alternately, both are stored in the frame memory. Therefore, the image processing device sequentially acquires digest values ​​of frames stored in the frame memory and compares them with the digest value of the subsequent frame to determine whether the digest value has changed. The image processing device then determines that freeze has occurred if the digest value does not change, thereby enabling detection of video signal freeze in an image processing device that performs I / P conversion on an interlaced video signal using interframe interpolation.

[0012] FIG. 1 is a diagram illustrating interlaced / progressive (I / P) conversion using intra-frame interpolation by an image processing device. FIG. 2 is a diagram illustrating I / P conversion using inter-frame interpolation by an image processing device. FIG. 3 is a diagram illustrating an image system including an image processing device of this embodiment. FIG. 4 is a diagram illustrating an example of video data flow when the image processing device detects sticking. FIG. 5 is a diagram illustrating an example of the hardware configuration of the image processing device. FIG. 6 is a flowchart illustrating an example of a processing procedure of the image processing device.

[0013] An image processing device 1, an image processing method, and a program according to an embodiment will be described below with reference to the drawings.

[0014] 1 is a diagram illustrating interlaced / progressive (I / P) conversion by intra-frame interpolation executed by an image processing device 1. I / P conversion is a process of converting interlaced video data into progressive video data.

[0015] In interlaced video, one image frame is composed of two sets of odd-numbered scanning line frames, one containing only odd-numbered scanning lines (also called lines), and the other containing only even-numbered scanning lines. That is, one frame is separated into odd-numbered scanning line frames and even-numbered scanning line frames, and the image is displayed alternately on a display or the like. On the other hand, in progressive video, one frame contains odd-numbered scanning lines and even-numbered scanning lines, and all scanning lines are displayed in order on the display 5. I / P conversion can be said to be the process of converting interlaced video containing odd-numbered scanning line frames and even-numbered scanning line frames into a single-frame progressive video.

[0016] Furthermore, intra-frame interpolation, a type of I / P conversion, is a process of generating progressive video by interpolating missing scan lines on a per-scan line basis that form a frame. In Figure 1, for example, odd-numbered scan lines are generated from the even-numbered scan lines in an even-numbered scan line frame, thereby converting the even-numbered scan line frame into a progressive video frame. Similarly, the process of converting an odd-numbered scan line frame into a progressive video frame by generating even-numbered scan lines from the odd-numbered scan lines in an odd-numbered scan line frame is the same as that shown in Figure 1.

[0017] 2 is a diagram illustrating an example of I / P conversion by inter-frame interpolation executed by the image processing device 1. Inter-frame interpolation is a process of generating one frame of progressive video using both an even-numbered scanning line frame and an odd-numbered scanning line frame.

[0018] For example, assume that frames of interlaced video are input to the image processing device 1 in the form of fields F1, F2, F3, etc. It is also assumed that field F1 is an odd-numbered scanning line frame, field F2 is an even-numbered scanning line frame, field F3 is an odd-numbered scanning line frame, and so on. In this embodiment, the data of each frame is referred to as fields F1, F2, F3, etc.

[0019] In such a case, the image processing device 1 generates one progressive video from the odd-numbered scanning line frame of field F1 and the even-numbered scanning line frame of field F2 during inter-frame interpolation. The image processing device 1 then generates one progressive video from fields F2 and F3. Fields F3 and onward are processed in the same manner. Inter-frame interpolation causes less flickering of characters and fixed lines on the screen than intra-frame interpolation.

[0020] 3 is a diagram illustrating an image system 50 including the image processing device 1 of this embodiment. The image system 50 includes the image processing device 1, a frame memory 2, an analog-to-digital conversion circuit (ADC) 3, a video decoder 4, and a display 5. The image system 50 is, for example, an in-vehicle device equipped in a vehicle with audio, visual, navigation, and other functions.

[0021] Analog video is input to the imaging system 50 from, for example, a camera, a video playback device, etc. The ADC 3 converts the video signal in the analog video into a digital signal. Note that, although the ADC 3 is shown as being separate from the video decoder 4 in FIG. 3 , the ADC 3 may be incorporated into the video decoder 4.

[0022] The video decoder 4 has a signal processing circuit, an arithmetic circuit, etc., and generates digital video (digital video format) from the data stream converted into a digital signal. For example, the video decoder 4 can adjust the brightness, contrast, saturation, hue, etc. of the digital video data stream. Furthermore, when no analog video is input, the video decoder 4 generates a synchronization signal, a black image video, etc.

[0023] The frame memory 2 stores frames of digital video generated by the video decoder 4. The frame memory 2 includes, for example, a dynamic random access memory (DRAM). The frame memory 2 can store one or more frames of video. In this embodiment, a frame refers to one screen's worth of video data. The frame memory 2 has two systems of data access ports that can be simultaneously accessed by both the video decoder 4 in FIG. 2 and the image processing device 1.

[0024] The image processing device 1 executes the I / P conversion exemplified in Figures 1 and 2. The image processing device 1 has, for example, a control unit 10 including a CPU 11 and a main memory unit 12, a line memory 13 capable of storing one or more scan lines of a frame, and a processor element array 14 that processes the image stored in the line memory 13 (see Figure 5). When the image processing device 1 has the processor element array 14, it processes the images stored in the line memory 13 in parallel. Furthermore, the control unit 10 controls image processing by processors such as the processor element array 14.

[0025] The image processing device 1 is capable of performing I / P conversion using intra-frame interpolation and I / P conversion using inter-frame interpolation. When performing I / P conversion using intra-frame interpolation, the image processing device 1 stores, for example, one piece of scanning line data (e.g., Lk) of a frame (an odd-numbered scanning line frame or an even-numbered scanning line frame) input from the video decoder 4 in the built-in line memory 13. The image processing device 1 then generates scanning line data Lk+1 by interpolating from the scanning line data Lk stored in the built-in line memory 13, thereby generating scanning line data for progressive video. The image processing device 1 generates frames of progressive video by repeatedly interpolating the scanning line data.

[0026] Furthermore, when performing I / P conversion by inter-frame interpolation, the image processing device 1 uses one frame of data (e.g., field F1) stored in the frame memory 2. The image processing device 1 then stores in the built-in line memory 13 one of the scanning line data (e.g., L2) of a frame (e.g., field F2) input from the video decoder 4 following field F1.

[0027] The image processing device 1 then performs interpolation between the scanning line data L1 and the scanning line data in field F1 that corresponds to the scanning line data L1. The image processing device 1 performs such interpolation sequentially on each scanning line data of field F2, thereby performing inter-frame interpolation and generating progressive video. In this case, if field F1 is an odd-numbered scanning line frame, field F2 will be an even-numbered scanning line frame. Also, if field F1 is an even-numbered scanning line frame, field F2 will be an odd-numbered scanning line frame.

[0028] Figure 3 illustrates the relationship between video data D1 input from the video decoder 4 to the image processing device 1, video data D2 input to the image processing device 1 via the frame memory 2, and video data D3 output to the display 5.

[0029] For example, video data D1 has fields F1, F2, ..., F12. Video data D2 is input to the image processing device 1 one frame (one field) behind video data D1. However, the image processing device 1 sequentially processes frames (e.g., field F2) input from the video decoder 4 following a frame (e.g., field F1) of video data D2 input to the image processing device 1 via the frame memory 2. For example, at time T1, the image processing device 1 interpolates scanning lines from fields F1 and F2 to generate a frame (F1F2) of progressive video. Also, at time T2, the image processing device 1 interpolates scanning lines from fields F2 and F3 to generate a frame (F2F3) of progressive video. Similar processing is repeated thereafter. The image processing device 1 outputs each of the generated frames of progressive video to the display 5.

[0030] If the video data D1 is an interlaced video, for example, field F1 contains only odd scan line data of the video. In that case, for example, field F2 contains only even scan line data of the video. The same applies below, for example, field F2k-1 (k is an integer greater than or equal to 1) contains only odd scan line data of the video. Also, for example, field F2k contains only even scan line data of the video. Frame memory 2 can be said to alternately store odd scan line frames containing odd scan line data of the interlaced video and even scan line frames containing even scan line data of the interlaced video as input frames.

[0031] (Detection of Sticking Fault) A sticking fault is a fault in the frame memory 2 in which all or part of one frame's worth of video data (field F1, etc.) output from the frame memory 2 is fixed to the same data. When a sticking fault occurs in the frame memory 2, as described above, even if video data such as fields F1, F2, F3, etc. are input to the frame memory 2, the video corresponding to the failed portion will be fixed as output from the frame memory 2.

[0032] For example, suppose that field F1 is data for an odd-numbered scanning line frame and field F2 is data for an even-numbered scanning line frame. Similarly, odd-numbered scanning line frames and even-numbered scanning line frames are alternately stored in frame memory 2 and read out to image processing device 1. In this situation, assume that a sticking failure occurs in frame memory 2 when field F2 (even-numbered scanning line frame) is being stored.

[0033] As a result, the image processing device 1 will continue to read field F2 from the frame memory 2 after field F2, such as fields F1, F2, F2, .... If the image processing device 1 does not detect a sticking fault, it will end up processing fields F1, F2, F2, ... as odd scanning line frames, even scanning line frames, and odd scanning line frames.

[0034] Even if the above-mentioned sticking fault occurs, video data is normally input as video data D1 in fields F1, F2, F3, etc. in Fig. 3. Therefore, it is difficult to detect the sticking fault in the video data D1. In this embodiment, the image processing device 1 detects the sticking fault of the video occurring in the frame memory 2 (ERROR DETECTION).

[0035] The frame memory 2 of this embodiment can calculate a cyclic redundancy check code (CRC) for all or any part of the data (such as field F1) stored in the frame memory 2. The any part of the data may be, for example, scan line data corresponding to one scan line within a frame, or data for multiple scan lines. The any part of the data may also be a data portion corresponding to an image area specified by a rectangle within the frame (such as field F1).

[0036] The image processing device 1 monitors the CRC for each frame (such as field F1) input from the frame memory 2, for example. If the CRC remains unchanged for a period of time equal to or longer than a predetermined limit (for example, a certain number of frames), the image processing device 1 determines that a fixation failure has occurred in the frame memory 2. However, for example, if the video contains both moving image and still image portions, the image processing device 1 may acquire the CRC for the storage area of ​​the frame memory 2 corresponding to the moving image portion. Even if the video contains both moving image and still image portions, the image processing device 1 may acquire the CRC for the entire storage area of ​​the frame memory 2. In this way, in the configuration of FIG. 3 , the image processing device 1 monitors both odd-numbered scanning line frames and even-numbered scanning line frames by monitoring the data output from the frame memory 2.

[0037] Note that the CRC is an example of a digest value. Therefore, the method by which the image processing device 1 detects sticking is not limited to comparing the CRC calculated values ​​for each frame between frames. The image processing device 1 may use, for example, a calculated value using a checksum, a function value using a hash function, or a function value using a summary function as the digest value. The hash function may also be what is called a cryptographic hash function. In essence, the image processing device 1 is only required to generate and compare values ​​from each frame that are highly collision-resistant and have a smaller amount of data than the original frames.

[0038] 4 is a diagram illustrating an example of the video data flow when the image processing device 1 detects a sticking fault. When the image processing device 1 of this embodiment detects a sticking fault in the frame memory 2, it performs I / P conversion by intra-frame interpolation instead of inter-frame interpolation. That is, the image processing device 1 does not acquire data from the frame memory 2, but stores video data from the video decoder 4 in the built-in line memory 13, performs I / P conversion by intra-frame interpolation, and generates progressive video frames.

[0039] 5 is a diagram illustrating an example of the hardware configuration of the image processing device 1. The image processing device 1 has a central processing unit (CPU) 11, a main memory unit 12, line memories 13A and 13B, an array of processor elements 14, and an input / output unit 16.

[0040] The line memory 13A stores one or more scan line data in a frame input from the video decoder 4. The line memory 13B stores the scan line data processed by the processor element array 14 and supplies it to, for example, the display 5. The line memories 13A and 13B may be integrated. Furthermore, the line memories 13A and 13B can be collectively referred to as the line memory 13.

[0041] Each processor element in the processor element array 14 has a plurality of arithmetic units that perform various types of calculations such as addition, comparison, multiplication, and multiply-and-accumulate. The processor elements perform pipeline processing using the various arithmetic units, and also perform image processing such as I / P conversion in parallel on frames input to the image processing device 1. Note that the image processing device 1 may have a single or multiple processors (for example, digital signal processors (DSPs)) instead of the processor element array 14.

[0042] The processor element array 14 and the line memory 13A are connected by a network N1. The processor element array 14 and the line memory 13B are connected by a network N2. The networks N1 and N2 may be an integrated network. The networks N1 and N2 may include, for example, a crossbar switch. The networks N1 and N2 enable parallel access from the processor element array 14 to the line memories 13A and 13B and parallel data transfer between the processor elements.

[0043] The CPU 11 executes a computer program that has been loaded in an executable manner into the main memory unit 12, and controls each unit of the image processing device 1. That is, the CPU 11 controls the storage of scan line data input from the video decoder 4 into the line memory 13A, the storage of scan line data from the frame memory 2 into the line memory 13A, and executes the initiation of image processing by the processor element array 14. The CPU 11 also obtains from the frame memory 2 a digest value of frame data (field F1, etc.) read from the frame memory 2.

[0044] Furthermore, the CPU 11 controls the transfer of the scanning line data that has been image processed by the processor element array 14 and stored in the line memory 13B to the display 5. The CPU 11 is also called a processor. However, the CPU 11 is not limited to a single processor and may have a multi-processor configuration.

[0045] The main memory unit 12, simply referred to as memory, stores computer programs executed by the CPU 11, data processed by the CPU 11, etc. The main memory unit 12 is a dynamic random access memory (DRAM), a static random access memory (SRAM), a read only memory (ROM), etc. The CPU 11 and the main memory unit 12 can be referred to as the control unit 10. As described in FIG. 3 , the control unit 10 can access the frame memory 2. The control unit 10 controls the I / P conversion in the image processing device 1 as described above. The image processing device 1 including the control unit 10 is also an example of a computer that can access the frame memory 2.

[0046] The input / output unit 16 is an interface for communicating with the outside of the image processing device 1. The input / output unit 16 is, for example, a serial bus. A computer program executed by the CPU 11 is loaded into the main memory unit 12 via the input / output unit 16, for example.

[0047] 6 is a flowchart illustrating a processing procedure of the image system 50. This processing starts when the power of the in-vehicle device equipped with the image processing device 1 is turned on. This processing also starts when the in-vehicle device equipped with the image processing device 1 receives an instruction to output an image from an in-vehicle camera or the like to the display 5 or the like of the in-vehicle device, for example.

[0048] In this embodiment, the image processing device 1 normally performs inter-frame interpolation. Therefore, first, the frame memory 2 stores, for example, data of the first frame (field F1) (S1). Next, the image processing device 1 acquires, for example, a digest value DJ1 (e.g., a calculated CRC value) of the entire field F1 from the frame memory 2. The image processing device 1 then stores the acquired digest value in the main memory unit 12 within the image processing device 1 (S2).

[0049] Next, the image processing device 1 performs I / P conversion by inter-frame interpolation using the field F1 stored in the frame memory 2 and the next field F2 obtained from the video decoder 4 (S3). Until the processing of S3 is completed, the frame memory 2 obtains the next field Fk (k=an integer equal to or greater than 2) from the video decoder 4. Note that, because the processing from S3 onwards is repeatedly executed, the field is referred to as the next field Fk in FIG. 6.

[0050] Next, the image processing device 1 acquires, for example, a digest value DJk of the entire field Fk from the frame memory 2 and stores the acquired digest value DJk in the main storage unit 12 within the image processing device 1 (S5).The image processing device 1 then compares the digest value DJk acquired in S5 with the digest value DJk-1 (k = 2 or greater integer) acquired in the process immediately preceding the digest value DJk (S6).As described above, the process from S3 onwards is repeated, and therefore in FIG. 6, the digest value calculated before the digest value DJk is entered as DJk-1.

[0051] If digest value DJk and digest value DJk-1 do not match (NO in S7), the image processing device 1 clears the number of matches Ns (S8). Then, the image processing device 1 returns the process to S3. That is, the image processing device 1 performs I / P conversion by inter-frame interpolation using field Fk and field Fk+1, which is the subsequent frame input next from the video decoder 4.

[0052] On the other hand, if the digest value DJk and the digest value DJk-1 match (YES in S7), the image processing device 1 counts up the number of matches Ns (S9). Note that it is assumed that the number of matches Ns is initialized to 0 at the start of the process in FIG. 6.

[0053] The image processing device 1 then determines whether the number of matches Ns exceeds a limit Nmax (S10). The limit Nmax is a reference value for determining whether a sticking fault has occurred, and is, for example, a value that is set at the time of shipping from the factory of the in-vehicle device that includes the image processing device 1. The limit Nmax may be 0 or an integer greater than 0.

[0054] If the number of matches Ns does not exceed the limit Nmax (NO in S10), the image processing device 1 returns to S3 and performs I / P conversion by inter-frame interpolation using field Fk and the subsequent frame, field Fk+1. This is because the image processing device 1 has determined that no sticking fault has occurred. On the other hand, if the number of matches Ns exceeds the limit Nmax (YES in S10), the image processing device 1 performs I / P conversion by intra-frame interpolation instead of inter-frame interpolation (S11). In other words, in this case, the image processing device 1 determines that a sticking fault has occurred and performs I / P conversion without using the frame memory 2.

[0055] The image processing device 1 then determines whether to end the processing. The image processing device 1 ends the processing when the power supply of the in-vehicle device in which the image processing device 1 is installed is turned off. The processing also ends when the in-vehicle device in which the image processing device 1 is installed receives an instruction to stop the processing of outputting video to the display 5 or the like of the in-vehicle device, for example.

[0056] In the process of Fig. 6, the image processing device 1 obtains the digest value of the entire frame and compares it between frames. However, as already mentioned, the image processing device 1 may obtain the digest value of data of a partial area of ​​the frame (e.g., a moving image area) and compare it between frames. Also, in Fig. 6, the image processing device 1 obtains the digest value DJk from the frame memory 2. However, the control unit 10 of the image processing device 1 may calculate the digest value DJk of the entire frame or a partial area (e.g., a moving image area) obtained from the frame memory 2.

[0057] Effect of the Embodiment As described above, the frame memory 2 alternately stores odd scan line frames containing odd scan line data and even scan line frames containing even scan line data in interlaced video as input frames. The image processing device 1 performs I / P conversion based on a frame (e.g., field F1) stored in the frame memory 2 and a subsequent frame (e.g., field F2) following the stored frame. At this time, the image processing device 1 acquires digest values ​​from the stored frames. The image processing device 1 then compares digest values ​​sequentially acquired from multiple input frames with the subsequent digest value of the subsequent frame to detect video fixation in the input frames.

[0058] In this way, the image processing device 1 detects a sticking fault in each of the odd-numbered scanning line frames and the even-numbered scanning line frames stored in the frame memory 2. Therefore, the image processing device 1 can detect a sticking fault even when one of the frames has a sticking fault during I / P conversion using inter-frame interpolation. Here, a frame with a sticking fault on one side is, for example, a frame output from the faulty frame memory 2.

[0059] As already described with reference to FIG. 3 , even if fields F1, F2, F3, and so on are input from the video decoder 4 to the frame memory 2, if a fixation fault occurs in the frame memory 2 from field F2 onward, the frame memory 2 will output the same data. For example, video data such as fields F1, F2, F2, F2, and so on is input from the frame memory 2 to the image processing device 1. On the other hand, normal video data such as fields F1, F2, F3, F4, and so on is input from the video decoder 4 to the image processing device 1. Therefore, a video with a fixed frame on one side is input to the image processing device 1, and I / P conversion using inter-frame interpolation is performed. Furthermore, one frame from the video decoder 4 is not fixed. For this reason, it may be difficult to detect a fixation fault using I / P conversion. In this embodiment, as described above, the image processing device 1 sequentially acquires the digest value of an input frame and the subsequent digest value of a subsequent frame from the frame memory 2 and compares them to detect video fixation in the input frame.

[0060] Furthermore, when the image processing device 1 detects a video sticking, it stores the scanning line data in the input frame in the line memory 13 instead of the frame memory 2. Then, the image processing device 1 performs I / P conversion by intra-frame interpolation based on the scanning line data stored in the line memory 13. Therefore, when a sticking fault is detected in a frame from the frame memory 2, the image processing device 1 does not use the frame memory 2. In other words, the image processing device 1 performs I / P conversion by storing the scanning line data obtained directly from the video decoder 4 in the line memory 13. Therefore, the image processing device 1 can continue to perform I / P conversion even when a sticking fault occurs in the frame memory 2.

[0061] In this embodiment, the digest value includes any one of a calculated value of a cyclic redundancy check code, a calculated value using a checksum, a function value using a hash function, and a function value using a summary function. By calculating such digest values, the image processing device 1 can easily detect a frame stuck fault in the video, i.e., a stuck fault in the frame memory 2.

[0062] (Modification) In the above embodiment, when the image processing device 1 detects a sticking failure in the frame memory 2, the image processing device 1 performs I / P conversion by intra-frame interpolation using the line memory 13 instead of the frame memory 2. However, this does not mean that the processing of the image processing device 1 when a sticking failure is detected is limited to intra-frame interpolation using the line memory 13.

[0063] For example, consider a case where two independent frame memories 2 (hereinafter, frame memories 2A and 2B) are provided, each capable of receiving two frames, and accessible by the image processing device 1. In such an image system 50, if one of the frame memories 2A experiences a sticking failure, the image processing device 1 performs I / P conversion by inter-frame interpolation, as in the above embodiment, using the remaining frame memory 2B, in which a sticking failure has not been detected. That is, the image processing device 1 performs I / P conversion between a frame (e.g., field Fk) stored in the frame memory 2B and a subsequent frame (e.g., field Fk+1) directly input from the video decoder 4. In other words, when a usable frame memory 2 is present, the image processing device 1 can perform I / P conversion by inter-frame interpolation, thereby suppressing image quality degradation.

[0064] (Computer-readable recording medium) A program that causes a computer or other machine or device (hereinafter, referred to as a computer, etc.) to realize any of the above functions can be recorded on a computer-readable recording medium. Then, the image processing device 1 or the computer, etc. can provide the function by reading and executing the program from the recording medium.

[0065] Here, a computer-readable recording medium refers to a recording medium that stores information such as data and programs through electrical, magnetic, optical, mechanical, or chemical action and can be read by a computer. Among such recording media, those that can be removed from a computer include, for example, flexible disks, magneto-optical disks, Compact Disc (CD)-Read Only Memory (ROM), CD-Read / Write (R / W), Digital Versatile Disc (DVD), Blu-ray Disc, and memory cards such as flash memory. Furthermore, examples of recording media that are fixed to a computer include hard disks and ROMs (read-only memories). Furthermore, SSDs (Solid State Drives) can be used both as recording media that can be removed from a computer and as recording media that are fixed to a computer.

[0066] REFERENCE SIGNS LIST 1 Image processing device 2 Frame memory 3 ADC 4 Video decoder 5 Display 10 Control unit 11 CPU 12 Main storage unit 13, 13A, 13B Line memory 14 Processor element array 16 Input / output unit

Claims

1. An image processing device comprising a control unit that can access a frame memory that alternately stores odd scan line frames containing odd scan lines in an interlaced video and even scan line frames containing even scan lines in the interlaced video as input frames, wherein the control unit performs the following operations when performing interlace / progressive (I / P) conversion based on the input frame stored in the frame memory and a subsequent frame that follows the stored input frame: acquiring a digest value from the stored input frame; and detecting image fixation in the input frame by comparing the digest values acquired sequentially from a plurality of the input frames with the subsequent digest values of the subsequent frames that follow each of the input frames.

2. The image processing device according to claim 1, wherein the control unit, when detecting image freezing, stores the scanning line data in the input frame in a line memory instead of the frame memory, and performs I / P conversion by intra-frame interpolation based on the scanning line data stored in the line memory.

3. The image processing device according to claim 1, wherein the digest value includes any one of a calculated value of a cyclic redundancy check code, a calculated value using a checksum, a function value using a hash function, and a function value using a summary function.

4. An image processing method in which a computer that can access a frame memory that alternately stores odd scan line frames containing odd scan lines in an interlaced video and even scan line frames containing even scan lines in the interlaced video as input frames, performs interlace / progressive (I / P) conversion based on the input frame stored in the frame memory and a subsequent frame that follows the stored input frame, obtains a digest value from the stored input frame, and detects image fixation in the input frame by comparing the digest values obtained sequentially from a plurality of the input frames with the subsequent digest values of the subsequent frames that follow each of the input frames.

5. A program for causing a computer that can access a frame memory that alternately stores odd scan line frames containing odd scan lines in an interlaced video and even scan line frames containing even scan lines in the interlaced video as input frames to execute the following steps when performing interlace / progressive (I / P) conversion based on the input frame stored in the frame memory and the subsequent frame that follows the stored input frame: acquiring a digest value from the stored input frame; and detecting image fixation in the input frame by comparing the digest values acquired sequentially from a plurality of the input frames with the subsequent digest values of the subsequent frame that follows each of the input frames.

Images