Display device

Abstract

This display device comprises a first light-emitting region for emitting first light, a second light-emitting region for emitting second light, and a third light-emitting region for emitting third light, each of which is defined on a substrate. The display device includes: an input sensing layer disposed on the substrate and including a first input insulating layer that overlaps the first light-emitting region and the second light-emitting region in a plan view and contains scattering particles; and a color filter layer disposed on the input sensing layer.

Description

display device

[0001] The present invention relates to a display device.

[0002] The electrodes, wiring, etc. of the display panel included in the display device can reflect various types of light. When light is generated from the light-emitting element of the display device, some of the generated light may be reflected from the electrodes, wiring, etc. of the display panel. In addition, when an external light source exists, external light that enters the interior of the display device from the outside may be reflected from the electrodes, wiring, etc. of the display panel. If such reflected light is visible from the outside, it may affect the display quality of the display device. For example, a user may perceive colored bands due to reflection from the electrodes, wiring, etc. of the display panel.

[0003] An object of the present invention is to provide a display device with improved display quality.

[0004] However, the purpose of the present invention is not limited to the purpose described above, and may be expanded in various ways without departing from the spirit and scope of the present invention.

[0005] In order to achieve the above-described object of the present invention, a display device according to an embodiment of the present invention may include a first light-emitting region emitting a first light, a second light-emitting region emitting a second light, and a third light-emitting region emitting a third light, each defined on a substrate, an input sensing layer disposed on the substrate, overlapping the first light-emitting region and the second light-emitting region on a plane and including a first input insulating layer including scattering particles, and a color filter layer disposed on the input sensing layer.

[0006] In one embodiment, the first input insulating layer may non-overlap with the third light-emitting region on a plane.

[0007] In one embodiment, the first light may be light in a red wavelength band, the second light may be light in a green wavelength band, and the third light may be light in a blue wavelength band.

[0008] In one embodiment, the first input insulating layer may comprise an organic material.

[0009] In one embodiment, the average diameter of the scattering particles may be from about 50 nm to about 500 nm.

[0010] In one embodiment, the content of the scattering particles included in the first input insulating layer may be greater than about 0 wt% and less than or equal to about 10 wt% based on the total weight of the first input insulating layer.

[0011] In one embodiment, the thickness of the first input insulating layer may be about 1.0 μm or more and about 1.8 μm or less.

[0012] In one embodiment, the input sensing layer may further include a second input insulating layer disposed on the first input insulating layer and covering the first input insulating layer.

[0013] In one embodiment, the second input insulating layer may extend continuously in the first light-emitting region, the second light-emitting region, and the third light-emitting region.

[0014] In one embodiment, the color filter layer may include a first color filter overlapping the first light-emitting area on a plane, a second color filter overlapping the second light-emitting area on a plane, and a third color filter overlapping the third light-emitting area on a plane.

[0015] In one embodiment, the color filter layer may further include a light-shielding member disposed between the first color filter, the second color filter, and the third color filter.

[0016] In one embodiment, the haze of the first input insulating layer may be greater than or equal to about 10% and less than or equal to about 50%.

[0017] In one embodiment, the display device may further include a pixel defining film disposed between the substrate and the input sensing layer, and a spacer disposed on the pixel defining film.

[0018] In one embodiment, the spacer may include the scattering particles.

[0019] In one embodiment, the content of the scattering particles included in the spacer may be about 5 wt% or more and about 50 wt% or less based on the total weight of the spacer.

[0020] In one embodiment, the display device may further include a light-emitting layer disposed between the substrate and the input sensing layer. The light-emitting layer may include a first light-emitting layer that overlaps the first light-emitting region on a plane and emits the first light, a second light-emitting layer that overlaps the second light-emitting region on a plane and emits the second light, and a third light-emitting layer that overlaps the third light-emitting region on a plane and emits the third light.

[0021] In order to achieve the above-described object of the present invention, a display device according to an embodiment of the present invention may include a light-emitting area defined on a substrate and a non-light-emitting area surrounding the light-emitting area, a pixel defining film disposed on the substrate and overlapping the non-light-emitting area in a plane, a spacer disposed on the pixel defining film, overlapping the non-light-emitting area in a plane, and including scattering particles in a content of about 5 wt% or more and about 50 wt% or less based on the total weight, and a color filter layer disposed on the spacer.

[0022] In one embodiment, the average diameter of the scattering particles may be from about 50 nm to about 500 nm.

[0023] In one embodiment, the display device may further include an input sensing layer disposed between the spacer and the color filter layer.

[0024] In one embodiment, the light-emitting region may include a first light-emitting region that emits a first light, a second light-emitting region that emits a second light, and a third light-emitting region that emits a third light. The color filter layer may include a first color filter that overlaps the first light-emitting region on a plane, a second color filter that overlaps the second light-emitting region on a plane, and a third color filter that overlaps the third light-emitting region on a plane.

[0025] In one embodiment, the color filter layer may further include a light-shielding portion that overlaps the non-emissive region on a plane.

[0026] In one embodiment, the first light may be light in a red wavelength band, the second light may be light in a green wavelength band, and the third light may be light in a blue wavelength band.

[0027] In one embodiment, the display device may further include a light-emitting layer disposed between the substrate and the color filter layer. The light-emitting layer may include a first light-emitting layer that overlaps the first light-emitting region on a plane and emits the first light, a second light-emitting layer that overlaps the second light-emitting region on a plane and emits the second light, and a third light-emitting layer that overlaps the third light-emitting region on a plane and emits the third light.

[0028] In order to achieve the above-described object of the present invention, a display device according to an embodiment of the present invention may include a display panel, an input sensing layer, and a color filter layer sequentially disposed on a substrate. The display panel may include a first light-emitting region emitting red light, a second light-emitting region emitting green light, and a third light-emitting region emitting blue light. The input sensing layer may include a first conductive layer, a first input insulating layer disposed on the first conductive layer and covering the first conductive layer, a second conductive layer disposed on the first input insulating layer, and a second input insulating layer disposed on the first input insulating layer and the second conductive layer and covering the first input insulating layer and the second conductive layer. The first input insulating layer may include scattering particles and may not overlap with the third light-emitting region on a plane.

[0029] In a display device according to embodiments of the present invention, the input sensing layer may include an input insulating layer including scattering particles. On a plane, the input insulating layer may overlap a first light-emitting region that emits a first light and a second light-emitting region that emits a second light, and may not overlap a third light-emitting region that emits a third light. Accordingly, a color band phenomenon due to external light reflection can be prevented or minimized, and a decrease in the light extraction efficiency of the display device can be minimized, so that the display quality of the display device can be improved.

[0030] Additionally, in the display device according to embodiments of the present invention, the spacer may be disposed on the pixel defining film and may include scattering particles. Accordingly, the color band phenomenon caused by external light reflection can be prevented or minimized, and the reduction in the light extraction efficiency of the display device can be minimized, thereby improving the display quality of the display device.

[0031] However, the effects of the present invention are not limited to the effects described above, and may be expanded in various ways without departing from the spirit and scope of the present invention.

[0032] FIG. 1 is a plan view showing a display device according to one embodiment of the present invention.

[0033] Fig. 2 is a plan view that enlarges a portion of the display area of ​​the display device of Fig. 1.

[0034] Figure 3 is an example of a cross-sectional view taken along line II' of Figure 2.

[0035] Fig. 4 is a cross-sectional view showing a circuit layer included in the display device of Fig. 3.

[0036] Fig. 5 is a cross-sectional view showing scattering particles included in the display device of Fig. 3.

[0037] Figure 6 is another example of a cross-sectional view taken along line II' of Figure 2.

[0038] Fig. 7 is a cross-sectional view showing a display device according to another embodiment of the present invention.

[0039] Fig. 8 is a cross-sectional view showing a display device according to another embodiment of the present invention.

[0040] Figures 1 through 8 are for illustrative purposes only and therefore, elements in the drawings are not necessarily drawn to scale. For example, some elements may be enlarged or exaggerated for clarity.

[0041] Hereinafter, embodiments of the present invention will be described in more detail with reference to the attached drawings. Identical components in the drawings will be designated by the same reference numerals, and redundant descriptions of identical components will be omitted.

[0042] FIG. 1 is a plan view showing a display device according to one embodiment of the present invention.

[0043] Referring to FIG. 1, the display device (10) may include a display area (DA) and a non-display area (NDA).

[0044] The display area (DA) may be an area for displaying an image. A plurality of pixels (PX) may be arranged in the display area (DA). The plurality of pixels (PX) may be arranged in a matrix form along a first direction (DR1) and a second direction (DR2) intersecting the first direction (DR1), but the present invention is not limited thereto. For example, the plurality of pixels (PX) may be arranged in a pentile matrix form or a diamond form. For example, the first direction (DR1) may be perpendicular to the second direction (DR2). Each of the plurality of pixels (PX) may emit light. As each of the plurality of pixels (PX) emits light, the display area (DA) may display an image in a third direction (DR3) intersecting the first direction (DR1) and the second direction (DR2), respectively. For example, the third direction (DR3) may be perpendicular to the first direction (DR1) and the second direction (DR2), respectively. The above image may include still images as well as video.

[0045] In the above display area (DA), additional wires connected to the plurality of pixels (PX) may be arranged. For example, the wires may include data signal wires, gate signal wires, power wires, etc.

[0046] The non-display area (NDA) may be an area that does not display an image. The non-display area (NDA) may be located around the display area (DA). For example, the non-display area (NDA) may entirely surround the display area (DA). However, Fig. 1 illustrates only one example, and the non-display area (NDA) may be located adjacent to only one side of the display area (DA), or may not be provided at all.

[0047] In the non-display area (NDA), driving units for driving the plurality of pixels (PX) may be arranged. For example, the driving units may include a data driving unit, a gate driving unit, a power voltage generating unit, a timing controller, etc. The plurality of pixels (PX) may emit light based on signals received from the driving units.

[0048] The display device (10) can detect external input applied from the outside. The external input may include various types of input provided from the outside of the display device (10). For example, the external input may include contact by a part of the user's body, such as a hand, as well as an external input (e.g., hovering) applied in proximity to the display device (10) or at a predetermined distance. In addition, the external input may take various forms, such as force, pressure, temperature, and light. For example, the display device (10) may obtain coordinate information according to an external input (e.g., touch).

[0049] The display device (10) can detect the user's biometric information applied from the outside. The display area (DA) of the display device (10) may be provided with a biometric information detection area capable of detecting the user's biometric information. The biometric information detection area may be provided in the entire area of ​​the display area (DA) or in a portion of the display area (DA).

[0050] Fig. 2 is a plan view that enlarges a portion of the display area of ​​the display device of Fig. 1.

[0051] Referring to FIGS. 1 and 2, the display area (DA) of the display device (10) may include a first light-emitting area (PXA_R), a second light-emitting area (PXA_G), a third light-emitting area (PXA_B), and a non-light-emitting area (NPXA). Each of the first light-emitting area (PXA_R), the second light-emitting area (PXA_G), and the third light-emitting area (PXA_B) may be a light-emitting area. For example, each of the first light-emitting area (PXA_R), the second light-emitting area (PXA_G), and the third light-emitting area (PXA_B) may be defined on the substrate (SUB) as an area in which light emitted from a light-emitting element is emitted to the outside of the display device (10). As each of the first light-emitting area (PXA_R), the second light-emitting area (PXA_G), and the third light-emitting area (PXA_B) emits light, the display area (DA) may display an image. The first to third light-emitting regions (PXA_R, PXA_G, PXA_B) may each correspond to the plurality of pixels (PX).

[0052] In one embodiment, the first light-emitting region (PXA_R), the second light-emitting region (PXA_G), and the third light-emitting region (PXA_B) can emit light of different wavelength bands. The first light-emitting region (PXA_R) can emit a first light, the second light-emitting region (PXA_G) can emit a second light, and the third light-emitting region (PXA_B) can emit a third light. For example, the first light can be light in a red wavelength band ranging from about 620 nanometers (nm) to about 750 nm, the second light can be light in a green wavelength band ranging from about 495 nm to about 570 nm, and the third light can be light in a blue wavelength band ranging from about 450 nm to about 495 nm, but the present invention is not limited thereto. As used herein, "about" includes the stated value and means within an acceptable range of deviation from the stated value as determined by a person skilled in the art, taking into account the measurement in question and the errors associated with measuring the particular quantity (i.e., limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ± 30%, 20%, 10%, or 5% of the stated value.

[0053] In one embodiment, the first light-emitting region (PXA_R), the second light-emitting region (PXA_G), and the third light-emitting region (PXA_B) can emit light of the same wavelength band. In one embodiment, at least one of the first light-emitting region (PXA_R), the second light-emitting region (PXA_G), and the third light-emitting region (PXA_B) can emit light of a different wavelength band.

[0054] In one embodiment, the first light-emitting region (PXA_R) and the third light-emitting region (PXA_B) may be arranged in the same row and the same column, and may be arranged alternately along the first direction (DR1) and the second direction (DR2). The second light-emitting region (PXA_G) may be arranged in a different row and a different column from the first light-emitting region (PXA_R) and the third light-emitting region (PXA_B), and may be arranged along the first direction (DR1) and the second direction (DR2). However, the present invention is not limited thereto, and the arrangement structure of the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) may be variously modified.

[0055] In one embodiment, the first light-emitting region (PXA_R) may have a larger area than the second light-emitting region (PXA_G) on a plane. The third light-emitting region (PXA_B) may have a larger area than or equal to the first light-emitting region (PXA_R) on a plane. However, the present invention is not limited thereto, and the areas of each of the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) may be variously modified. In one embodiment, the shapes of the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) may generally be, for example, an octagon, a square, or a rhombus with or without rounded corners, but the present invention is not limited thereto. For example, the shapes of the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) may be a circle or another polygon with or without rounded corners. The first to third light-emitting regions (PXA_R, PXA_G, PXA_B) may have different shapes and / or sizes.

[0056] The non-luminescent region (NPXA) may be a region that does not emit light. The non-luminescent region (NPXA) may surround each of the first to third luminescent regions (PXA_R, PXA_G, PXA_B). For example, the non-luminescent region (NPXA) may partition the first to third luminescent regions (PXA_R, PXA_G, PXA_B).

[0057] Fig. 3 is an example of a cross-sectional view taken along line II' of Fig. 2. Fig. 4 is a cross-sectional view showing a circuit layer included in the display device of Fig. 3. Fig. 5 is a cross-sectional view showing scattering particles included in the display device of Fig. 3.

[0058] Referring to FIGS. 3 to 5, the display device (10) may include a display panel (DP), an input sensing layer (ISL), a color filter layer (CFL), and a window (WM). The display panel (DP) may include a substrate (SUB), a circuit layer (DP_CL), a device layer (DP_LE), and an encapsulation layer (TFE).

[0059] The substrate (SUB) may include a transparent or opaque material. Examples of materials that can be used as the substrate (SUB) include polyimide, quartz, glass, etc. These may be used alone or in combination. In one embodiment, the substrate (SUB) may include a flexible material. The flexible material may refer to a flexible substrate that is easily bendable, foldable, or rollable. The substrate (SUB) including such a flexible material may include, for example, ultra-thin glass or plastic.

[0060] The circuit layer (DP_CL) may be disposed on the substrate (SUB). The circuit layer (DP_CL) may include a buffer layer (BFR), a first transistor (TR1), a second transistor (TR2), a third transistor (TR3), a gate insulating layer (GI), an interlayer insulating layer (ILD), and a via insulating layer (VIA). The circuit layer (DP-CL) may include a driving circuit of the pixels (PX). The driving circuit of the pixels (PX) may include transistors such as the first transistor (TR1), the second transistor (TR2), and the third transistor (TR3), and a capacitor.

[0061] Here, the first transistor (TR1) may include a first active pattern (AP1), a first gate electrode (GE1), a first source electrode (SE1), and a first drain electrode (DE1), the second transistor (TR2) may include a second active pattern (AP2), a second gate electrode (GE2), a second source electrode (SE2), and a second drain electrode (DE2), and the third transistor (TR3) may include a third active pattern (AP3), a third gate electrode (GE3), a third source electrode (SE3), and a third drain electrode (DE3).

[0062] The buffer layer (BFR) may be disposed on the substrate (SUB). The buffer layer (BFR) may prevent metal atoms or impurities from diffusing from the substrate (SUB). In addition, the buffer layer (BFR) may improve the flatness of the surface of the substrate (SUB) when the surface of the substrate (SUB) is not uniform. In one embodiment, the buffer layer (BFR) may control a heat transfer rate during a crystallization process for forming the first to third active patterns (AP1, AP2, AP3) so that the first to third active patterns (AP1, AP2, AP3) may be uniformly formed. The buffer layer (BFR) may be formed of silicon oxide (SiO). x), silicon nitride (SiN x ), silicon carbide (SiC) x ), silicon oxynitride (SiO x N y ), silicon dioxide (SiO x C y ) may include inorganic substances such as these. These may be used alone or in combination with each other.

[0063] The first to third active patterns (AP1, AP2, AP3) may be disposed on the buffer layer (BFR). Each of the first to third active patterns (AP1, AP2, AP3) may include a source region, a drain region, and a channel region between the source region and the drain region. Each of the first to third active patterns (AP1, AP2, AP3) may include a silicon semiconductor material or an oxide semiconductor material. Examples of the silicon semiconductor material may include amorphous silicon, polycrystalline silicon, etc. Examples of the oxide semiconductor material may include indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), etc. These may be used alone or in combination with each other.

[0064] The gate insulating layer (GI) may be disposed on the buffer layer (BFR) and the first to third active patterns (AP1, AP2, AP3). The gate insulating layer (GI) may cover the first to third active patterns (AP1, AP2, AP3). The gate insulating layer (GI) may include an inorganic material such as silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, or silicon oxycarbide. These may be used alone or in combination with each other.

[0065] The first to third gate electrodes (GE1, GE2, GE3) may be disposed on the gate insulating layer (GI). The first to third gate electrodes (GE1, GE2, GE3) may overlap the channel regions of the first to third active patterns (AP1, AP2, AP3) on a plane, respectively. The first to third active patterns (AP1, AP2, AP3) may be electrically insulated from the first to third gate electrodes (GE1, GE2, GE3) by the gate insulating layer (GI). Each of the first to third gate electrodes (GE1, GE2, GE3) may include a metal, an alloy, a conductive metal oxide, a conductive metal nitride, or the like. Examples of the metals include silver (Ag), molybdenum (Mo), aluminum (Al), tungsten (W), copper (Cu), nickel (Ni), chromium (Cr), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), etc. Examples of the conductive metal oxides include indium tin oxide, indium zinc oxide, etc. Examples of the conductive metal nitrides include aluminum nitride (AlN x ), tungsten nitride (WN x ), chromium nitride (CrN x ) may be present. These may be used alone or in combination with each other. Additionally, the first to third gate electrodes (GE1, GE2, GE3) may include a conductive polymer such as metal nanowires, graphene, or poly(3,4-ethylenedioxythiophene) (PEDOT).

[0066] The interlayer insulating layer (ILD) may be disposed on the gate insulating layer (GI) and the first to third gate electrodes (GE1, GE2, GE3). The interlayer insulating layer (ILD) may cover the first to third gate electrodes (GE1, GE2, GE3). In one embodiment, the interlayer insulating layer (ILD) may be disposed over the entire display area (DA) and the non-display area (NDA) on the gate insulating layer (GI). The interlayer insulating layer (ILD) may include an inorganic material such as silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, or silicon oxycarbide. These may be used alone or in combination with each other.

[0067] The first to third source electrodes (SE1, SE2, SE3) and the first to third drain electrodes (DE1, DE2, DE3) may be disposed on the interlayer insulating layer (ILD). Each of the first to third source electrodes (SE1, SE2, SE3) and the first to third drain electrodes (DE1, DE2, DE3) may include a metal, an alloy, a conductive metal oxide, a conductive metal nitride, or the like. These may be used alone or in combination with each other. In one embodiment, each of the first to third source electrodes (SE1, SE2, SE3) and the first to third drain electrodes (DE1, DE2, DE3) may have a multilayer structure including a plurality of conductive layers. For example, each of the first to third source electrodes (SE1, SE2, SE3) and the first to third drain electrodes (DE1, DE2, DE3) may have a three-layer structure of Ti / Al / Ti in which titanium (Ti), aluminum (Al), and titanium (Ti) are sequentially stacked.

[0068] The first to third source electrodes (SE1, SE2, SE3) may be connected to the first to third active patterns (AP1, AP2, AP3), respectively. For example, the first to third source electrodes (SE1, SE2, SE3) may contact the source regions of the first to third active patterns (AP1, AP2, AP3), respectively. In addition, the first to third drain electrodes (DE1, DE2, DE3) may be connected to the first to third active patterns (AP1, AP2, AP3), respectively. For example, the first to third drain electrodes (DE1, DE2, DE3) may contact the drain regions of the first to third active patterns (AP1, AP2, AP3), respectively.

[0069] The via insulation layer (VIA) may be disposed on the interlayer insulation layer (ILD), the first to third source electrodes (SE1, SE2, SE3) and the first to third drain electrodes (DE1, DE2, DE3). The via insulation layer (VIA) may cover the first to third source electrodes (SE1, SE2, SE3) and the first to third drain electrodes (DE1, DE2, DE3). In one embodiment, the via insulation layer (VIA) may be disposed on the entire display area (DA) and the non-display area (NDA) on the interlayer insulation layer (ILD). The via insulation layer (VIA) may protect the first to third transistors (TR1, TR2, TR3) and provide a flat surface on the upper portions of the first to third transistors (TR1, TR2, TR3). Additionally, the via insulation layer (VIA) may be used to cover and protect some of the wiring on the interlayer insulation layer (ILD). The via insulation layer (VIA) may include organic materials such as phenol resin, acrylic resin, polyimide resin, polyamide resin, siloxane resin, epoxy resin, etc. These may be used alone or in combination with each other.

[0070] The above-mentioned element layer (DP_LE) may be disposed on the above-mentioned circuit layer (DP_CL). The above-mentioned element layer (DP_LE) may include a first light-emitting element (LE_R), a second light-emitting element (LE_G), a third light-emitting element (LE_B), and a pixel definition layer (PDL).

[0071] Here, the first light-emitting element (LE_R) may include a first pixel electrode (PE1), a first light-emitting layer (EL1), and a common electrode (CE), the second light-emitting element (LE_G) may include a second pixel electrode (PE2), a second light-emitting layer (EL2), and the common electrode (CE), and the third light-emitting element (LE_B) may include a third pixel electrode (PE3), a third light-emitting layer (EL3), and the common electrode (CE). The common electrode (CE) may be arranged to cover the pixel defining layer (PDL) and the first to third light-emitting layers (EL1, EL2, EL3).

[0072] The first to third pixel electrodes (PE1, PE2, PE3) may be disposed on the circuit layer (DP_CL). The first to third pixel electrodes (PE1, PE2, PE3) may overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) on a plane, respectively. The first to third pixel electrodes (PE1, PE2, PE3) may be connected to the first to third transistors (TR1, TR2, TR3), respectively. For example, the first to third pixel electrodes (PE1, PE2, PE3) may be connected to the first to third drain electrodes (DE1, DE2, DE3) or the first to third source electrodes (SE1, SE2, SE3), respectively, through contact holes formed in the via insulating layer (VIA). Each of the first to third pixel electrodes (PE1, PE2, PE3) may include a metal, an alloy, a conductive metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These may be used alone or in combination. In one embodiment, each of the first to third pixel electrodes (PE1, PE2, PE3) may have a multilayer structure including a plurality of conductive layers. For example, each of the first to third pixel electrodes (PE1, PE2, PE3) may have a three-layer structure of ITO / Ag / ITO in which indium tin oxide (ITO), silver (Ag), and indium tin oxide (ITO) are sequentially stacked.

[0073] The pixel defining layer (PDL) may be disposed on the circuit layer (DP_CL). The pixel defining layer (PDL) may expose at least a portion of an upper surface of each of the first to third pixel electrodes (PE1, PE2, PE3). For example, the pixel defining layer (PDL) may cover a side surface of each of the first to third pixel electrodes (PE1, PE2, PE3) and expose a central portion of each of the first to third pixel electrodes (PE1, PE2, PE3). The pixel defining layer (PDL) may overlap the non-emission area (NPXA) on a plane. The first to third emission areas (PXA_R, PXA_G, PXA_B) may be defined on the substrate (SUB) respectively in correspondence with the areas of the first to third pixel electrodes (PE1, PE2, PE3) exposed by the pixel defining layer (PDL). The non-emission region (NPXA) may be defined between the first to third emission regions (PXA_R, PXA_G, PXA_B) on the substrate (SUB). For example, the emission region and the non-emission region (NPXA) surrounding the emission region may be defined on the substrate (SUB), respectively, wherein the emission region may include the first to third emission regions (PXA_R, PXA_G, PXA_B).

[0074] The pixel defining layer (PDL) may include an organic material such as a polyimide resin, an epoxy resin, a siloxane resin, or the like, or an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride. These may be used alone or in combination. In one embodiment, the pixel defining layer (PDL) may include a light-blocking material. In addition, the pixel defining layer (PDL) may implement a black pixel defining layer. The light-blocking material may include carbon black, a black dye, a black pigment, a metal (e.g., nickel, aluminum, molybdenum, and alloys thereof), a metal oxide (e.g., chromium oxide), a metal nitride (e.g., chromium nitride), or the like.

[0075] The first to third light-emitting layers (EL1, EL2, EL3) may be respectively disposed on the first to third pixel electrodes (PE1, PE2, PE3). The first to third light-emitting layers (EL1, EL2, EL3) may be respectively disposed on the first to third pixel electrodes (PE1, PE2, PE3) exposed by the pixel defining film (PDL). That is, the first to third light-emitting layers (EL1, EL2, EL3) may respectively overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) on a plane.

[0076] The first light-emitting layer (EL1) can emit the first light (LR) and can include an organic material that emits the first light (LR). The second light-emitting layer (EL2) can emit the second light (LG) and can include an organic material that emits the second light (LG). The third light-emitting layer (EL3) can emit the third light (LB) and can include an organic material that emits the third light (LB). For example, each of the first to third light-emitting layers (EL1, EL2, EL3) may include an organic light-emitting layer and an auxiliary layer including an organic material. The auxiliary layer may include at least one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. In one embodiment, each of the first to third light-emitting layers (EL1, EL2, EL3) may include at least one of an organic light-emitting material and a quantum dot. For example, each of the first to third light-emitting layers (EL1, EL2, EL3) may include an organic material including a fluorescent or phosphorescent material that emits red, green, or blue light, or that emits white light. The quantum dot is a particle having a crystal structure with a size of several nanometers to several tens of nanometers, and may include hundreds of thousands to thousands of atoms. The quantum dot may include a fluorescent material or a phosphorescent material, and may generate monochromatic red, green, and blue light. In addition, each of the first to third light-emitting layers (EL1, EL2, EL3) may include an inorganic light-emitting material, and may include, for example, a crystalline semiconductor such as gallium nitride (GaN) or indium phosphide (InP).

[0077] The common electrode (CE) may be disposed on the pixel defining layer (PDL) and the first to third light-emitting layers (EL1, EL2, EL3). The common electrode (CE) may entirely overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) and the non-light-emitting region (NPXA) on a plane. That is, the common electrode (CE) may extend continuously in the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) and the non-light-emitting region (NPXA). The common electrode (CE) may include a metal, an alloy, a conductive metal oxide, a conductive metal nitride, a transparent conductive material, or the like. These may be used alone or in combination with each other.

[0078] The encapsulating layer (TFE) may be disposed on the common electrode (CE) and may seal the element layer (DP_LE). The encapsulating layer (TFE) may prevent impurities, moisture, external air, etc. from penetrating into the first to third light-emitting elements (LE_R, LE_G, LE_B) from the outside. The encapsulating layer (TFE) may include at least one inorganic encapsulating layer and at least one organic encapsulating layer. The inorganic encapsulating layer may protect the element layer (DP_LE) from moisture / oxygen, and the organic encapsulating layer may protect the element layer (DP_LE) from foreign substances such as dust particles. The organic encapsulating layer may provide a flat upper surface and may relieve stress between layers in contact with each other.

[0079] The input sensing layer (ISL) may be disposed on the encapsulation layer (TFE). For example, the input sensing layer (ISL) may be disposed directly on the encapsulation layer (TFE). The input sensing layer (ISL) may detect the external input applied from the outside. The input sensing layer (ISL) may include a first conductive layer (ICL1), a first input insulating layer (IL1), a second conductive layer (ICL2), and a second input insulating layer (IL2).

[0080] The first conductive layer (ICL1) may be disposed on the encapsulation layer (TFE). The first conductive layer (ICL1) may overlap the non-emissive region (NPXA) on a plane. The first conductive layer (ICL1) may have a single-layer structure or a multi-layer structure and may include a plurality of conductive patterns. The first conductive layer (ICL1) may include a metal, an alloy, a transparent conductive material, or the like. These may be used alone or in combination with each other.

[0081] The first input insulating layer (IL1) may be disposed on the first conductive layer (ICL1). The first input insulating layer (IL1) may cover the first conductive layer (ICL1). In one embodiment, in a plane, the first input insulating layer (IL1) may overlap the first light-emitting region (PXA_R) and the second light-emitting region (PXA_G), and may not overlap the third light-emitting region (PXA_B). For example, in a plane, the first input insulating layer (IL1) may overlap the first and second light-emitting regions (PXA_R, PXA_G) that emit light in a relatively long wavelength band, and may not overlap the third light-emitting region (PXA_B) that emits light in a relatively short wavelength band. In addition, the first input insulating layer (IL1) may overlap the non-light-emitting region (NPXA) in a plane.

[0082] The first input insulating layer (IL1) may include an organic material such as an acrylic resin, a polyimide resin, or the like. The first input insulating layer (IL1) may be formed through a photolithography process so as to not overlap only with the third light-emitting region (PXA_B). For example, the thickness (TH) of the first input insulating layer (IL1) may be about 1.0 μm or more and about 1.8 μm or less, but the present invention is not limited thereto.

[0083] In one embodiment, the first input insulating layer (IL1) may include scattering particles (SP). The scattering particles (SP) may be dispersed and positioned within the first input insulating layer (IL1). For example, the scattering particles (SP) may include titanium oxide (TiO2), zinc oxide (ZnO), zirconium oxide (ZrO2), aluminum oxide (Al2O3), cerium oxide (CeO2), silicon oxide (SiO2), or the like. The scattering particles (SP) scatter light reflected from a lower structure and traveling to the outside, thereby preventing color bands due to reflection from being visible or minimizing the degree to which they are visible. In addition, since the scattering particles (SP) are positioned so as not to overlap with the third light-emitting area (PXA_B) that emits the third light (LB), a decrease in light extraction efficiency of the display device (10) may be minimized. For example, when the scattering particle (SP) is located in the first and second light-emitting regions (PXA_R, PXA_G) corresponding to the red pixel (PX) and the green pixel (PX), but not in the third light-emitting region (PXA_B) corresponding to the blue pixel (PX), the light extraction efficiency of the blue pixel (PX) may not be reduced or may be reduced to a minimum. Accordingly, the display quality of the display device (10) may be improved.

[0084] The scattering particles (SP) may be spherical, elliptical, or amorphous. In one embodiment, the average diameter of the scattering particles (SP) may be about 50 nm or more and about 500 nm or less. For example, the average diameter of the scattering particles (SP) may be an arithmetic mean of the cross-sectional diameters (D) of each of a plurality of the scattering particles (SP). When the average diameter of the scattering particles (SP) is less than about 50 nm, the light extraction efficiency of the display device (10) may relatively decrease, and when the average diameter of the scattering particles (SP) is greater than about 500 nm, the film properties of the first input insulating layer (IL1) may relatively deteriorate.

[0085] In one embodiment, the content of the scattering particles (SP) included in the first input insulating layer (IL1) may be greater than about 0 wt% and less than or equal to about 10 wt% based on the total weight of the first input insulating layer (IL1). When the content of the scattering particles (SP) exceeds about 10 wt%, manufacturing the first input insulating layer (IL1) may be relatively difficult. The haze of the first input insulating layer (IL1) may be greater than or equal to about 10% and less than or equal to about 50%. By allowing the first input insulating layer (IL1) to include less than or equal to about 10 wt% of the scattering particles (SP) so that the haze of the first input insulating layer (IL1) is maintained at greater than or equal to about 10% and less than or equal to about 50%, a decrease in the light extraction efficiency of the display device (10) may be minimized.

[0086] The second conductive layer (ICL2) may be disposed on the first input insulating layer (IL1). The second conductive layer (ICL2) may overlap the non-emitting region (NPXA) on a plane. The second conductive layer (ICL2) may have a single-layer structure or a multi-layer structure and may include a plurality of conductive patterns. Some of the plurality of conductive patterns of the second conductive layer (ICL2) may be connected to the first conductive layer (ICL1). The second conductive layer (ICL2) may include a metal, an alloy, a transparent conductive material, or the like. These may be used alone or in combination with each other.

[0087] The second input insulating layer (IL2) may be disposed on the first input insulating layer (IL1) and the second conductive layer (ICL2). The second input insulating layer (IL2) may cover the first input insulating layer (IL1) and the second conductive layer (ICL2). The second input insulating layer (IL2) may prevent the second conductive layer (ICL2) from contacting the color filter layer (CFL). Accordingly, the material (e.g., an organic layer) forming the color filter layer (CFL) may be prevented from damaging the second conductive layer (ICL2). The second input insulating layer (IL2) may entirely overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) and the non-light-emitting region (NPXA) on a plane. That is, the second input insulating layer (IL2) may extend continuously in the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) and the non-light-emitting region (NPXA). The second input insulating layer (IL2) may include an organic material such as an acrylic resin or a polyimide resin, or an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride. These may be used alone or in combination with each other.

[0088] Although the input sensing layer (ISL) is illustrated in FIG. 3 as including the first conductive layer (ICL1), the second conductive layer (ICL2), and the second input insulating layer (IL2), the present invention is not limited thereto. For example, the input sensing layer (ISL) may further include a base insulating layer disposed between the first conductive layer (ICL1) and the encapsulation layer (TFE), may include only one of the first and second conductive layers (ICL1, ICL2), or may not include the second input insulating layer (IL2).

[0089] The color filter layer (CFL) may be disposed on the input sensing layer (ISL). The color filter layer (CFL) may include a first color filter (CF_R), a second color filter (CF_G), a third color filter (CF_B), a light-shielding portion (BM), and an overcoating layer (OCL). The first to third color filters (CF_R, CF_G, CF_B) and the light-shielding portion (BM) may be disposed on the input sensing layer (ISL).

[0090] The first color filter (CF_R) may overlap the first light emitting area (PXA_R) on a plane. That is, the first color filter (CF_R) may be arranged to correspond to the first light emitting layer (EL1). The first color filter (CF_R) may transmit the first light (LR) and block light of a wavelength band different from the first light (LR). For example, the first color filter (CF_R) may transmit light of a red wavelength band and block light of a green and blue wavelength band, but the present invention is not limited thereto. Accordingly, in the first light emitting area (PXA_R), the first light (LR) may be emitted to the outside (i.e., in the third direction (DR3)).

[0091] The second color filter (CF_G) may overlap the second light-emitting area (PXA_G) on a plane. That is, the second color filter (CF_G) may be arranged to correspond to the second light-emitting layer (EL2). The second color filter (CF_G) may transmit the second light (LG) and block light of a different wavelength band from the second light (LG). For example, the second color filter (CF_G) may transmit light of a green wavelength band and block light of a red and blue wavelength band, but the present invention is not limited thereto. Accordingly, in the second light-emitting area (PXA_G), the second light (LG) may be emitted to the outside (i.e., in the third direction (DR3)).

[0092] The third color filter (CF_B) may overlap the third light-emitting area (PXA_B) on a plane. That is, the third color filter (CF_B) may be arranged to correspond to the third light-emitting layer (EL3). The third color filter (CF_B) may transmit the third light (LB) and block light of a wavelength band different from the third light (LB). For example, the third color filter (CF_B) may transmit light of a blue wavelength band and block light of a red and green wavelength band, but the present invention is not limited thereto. For example, the third color filter (CF_B) may be a transparent filter including a transparent photosensitive resin. Accordingly, in the third light-emitting area (PXA_B), the third light (LB) may be emitted to the outside (i.e., in the third direction (DR3)).

[0093] For example, the color filter layer (CFL) may include the first color filter (CF_R) that transmits light in a red wavelength band, the second color filter (CF_G) that transmits light in a green wavelength band, and the third color filter (CF_B) that transmits light in a blue wavelength band. The first to third color filters (CF_R, CF_G, CF_B) arranged in the pixels (PX) may improve the color purity of light emitted from the emission area of ​​each pixel (PX). Therefore, the color filter layer (CFL) including the first to third color filters (CF_R, CF_G, CF_B) may improve the display quality of the display device (10).

[0094] The above-described light-shielding portion (BM) may overlap the non-emission region (NPXA) on a plane. The light-shielding portion (BM) may be disposed between the first to third color filters (CF_R, CF_G, CF_B). In one embodiment, the light-shielding portion (BM) may include a light-blocking material. The light-blocking material may include carbon black, black dye, black pigment, metal, metal oxide, metal nitride, or the like. However, the present invention is not limited thereto, and the material of the light-shielding portion (BM) is not limited as long as it is a material that absorbs light. Since the light-shielding portion (BM) includes the light-blocking material, external light reflection by lower components may be reduced.

[0095] The above overcoating layer (OCL) may be disposed on the first to third color filters (CF_R, CF_G, CF_B) and the light-shielding portion (BM). The overcoating layer (OCL) may include an organic material such as an acrylic resin, an epoxy resin, or the like. The overcoating layer (OCL) may compensate for a step difference between the first to third color filters (CF_R, CF_G, CF_B). The overcoating layer (OCL) may have a predetermined thickness and may planarize an upper surface of the color filter layer (CFL).

[0096] The window (WM) may be disposed on the color filter layer (CFL). The window (WM) may include an optically transparent material. For example, the window (WM) may include glass or plastic. The window (WM) may have a single-layer structure or a multi-layer structure. For example, the window (WM) may include a plurality of plastic films bonded with an adhesive, or may include a glass substrate and a plastic film bonded with an adhesive. The window (WM) may be bonded to the color filter layer (CFL) by an adhesive layer. The adhesive layer may include an optically clear adhesive, an optically clear adhesive resin, a pressure sensitive adhesive, or the like. In one embodiment, the window (WM) may further include at least one functional layer. For example, the functional layer may be a hard coating layer, an anti-fingerprint coating layer, an anti-reflection layer, or the like, but the present invention is not limited thereto.

[0097] Figure 6 is another example of a cross-sectional view taken along line II' of Figure 2.

[0098] The display device (10) described with reference to FIG. 6 may be substantially the same as or similar to the display device (10) described with reference to FIG. 3, except for the color filter layer (CFL). Hereinafter, overlapping descriptions are omitted or simplified.

[0099] Referring to FIG. 6, the display device (10) may include the display panel (DP), the input sensing layer (ISL), the color filter layer (CFL), and the window (WM). The display panel (DP) may include the substrate (SUB), the circuit layer (DP_CL), the element layer (DP_LE), and the encapsulation layer (TFE).

[0100] The input sensing layer (ISL) and the color filter layer (CFL) may be sequentially arranged on the display panel (DP). The color filter layer (CFL) may include a first color filter (CF_R), a second color filter (CF_G), a third color filter (CF_B), and an overcoating layer (OCL). The first to third color filters (CF_R, CF_G, CF_B) may be arranged on the input sensing layer (ISL).

[0101] The first color filter (CF_R) may overlap the first light-emitting area (PXA_R) on a plane. That is, the first color filter (CF_R) may be arranged to correspond to the first light-emitting layer (EL1). The first color filter (CF_R) may transmit the first light (LR) and block light of a wavelength band different from the first light (LR). Accordingly, in the first light-emitting area (PXA_R), the first light (LR) may be emitted to the outside (i.e., in the third direction (DR3)).

[0102] The second color filter (CF_G) may overlap the second light-emitting area (PXA_G) on a plane. That is, the second color filter (CF_G) may be arranged to correspond to the second light-emitting layer (EL2). The second color filter (CF_G) may transmit the second light (LG) and block light of a wavelength band different from the second light (LG). Accordingly, in the second light-emitting area (PXA_G), the second light (LG) may be emitted to the outside (i.e., in the third direction (DR3)).

[0103] The third color filter (CF_B) may overlap the third light-emitting area (PXA_B) on a plane. That is, the third color filter (CF_B) may be arranged to correspond to the third light-emitting layer (EL3). The third color filter (CF_B) may transmit the third light (LB) and block light of a wavelength band different from the third light (LB). Alternatively, the third color filter (CF_B) may be a transparent filter. Accordingly, in the third light-emitting area (PXA_B), the third light (LB) may be emitted to the outside (i.e., in the third direction (DR3)).

[0104] In one embodiment, each of the first color filter (CF_R), the second color filter (CF_G), and the third color filter (CF_B) may overlap the non-emission region (NPXA) on a plane. That is, on a plane, the first color filter (CF_R) may overlap the first emission region (PXA_R) and the non-emission region (NPXA), and may not overlap the second and third emission regions (PXA_G, PXA_B). On a plane, the second color filter (CF_G) may overlap the second emission region (PXA_G) and the non-emission region (NPXA), and may not overlap the first and third emission regions (PXA_R, PXA_B). On a plane, the third color filter (CF_B) may overlap with the third light-emitting area (PXA_B) and the non-light-emitting area (NPXA), and may not overlap with the first and second light-emitting areas (PXA_R, PXA_G).

[0105] In this case, in the non-emission region (NPXA), the first to third color filters (CF_R, CF_G, CF_B) may overlap each other in the third direction (DR3). For example, in the non-emission region (NPXA), the third color filter (CF_B) may be disposed on the first color filter (CF_R), and the second color filter (CF_G) may be disposed on the third color filter (CF_B). Accordingly, color mixing between the first to third emission regions (PXA_R, PXA_G, PXA_B) may be prevented. In FIG. 6, the first to third color filters (CF_R, CF_G, CF_B) that overlap each other in the third direction (DR3) in the non-emitting area (NPXA) can function similarly to the light-shielding portion (BM) of FIG. 3 to reduce external light reflection of the lower configuration.

[0106] The above overcoating layer (OCL) may be disposed on the first to third color filters (CF_R, CF_G, CF_B), and the window (WM) may be disposed on the color filter layer (CFL).

[0107] The input sensing layer (ISL) of the display device (10) according to one embodiment of the present invention may include the first input insulating layer (IL1) including the scattering particles (SP). By effectively scattering the light incident on the first input insulating layer (IL1), a color band phenomenon due to external light reflection can be prevented or minimized. In addition, since the first input insulating layer (IL1) overlaps the first and second light-emitting regions (PXA_R, PXA_G) on a plane and does not overlap the third light-emitting region (PXA_B), a decrease in the light extraction efficiency of the display device (10) can be minimized. Accordingly, the display quality of the display device (10) can be improved.

[0108] Fig. 7 is a cross-sectional view showing a display device according to another embodiment of the present invention. For example, Fig. 7 may correspond to the cross-sectional view of Fig. 3.

[0109] Hereinafter, descriptions overlapping with those of the display device (10) described with reference to FIGS. 1 to 6 are omitted or simplified.

[0110] Referring to FIG. 7, a display device (20) may include a display panel (DP), an input sensing layer (ISL), a color filter layer (CFL), and a window (WM). The display panel (DP) may include a substrate (SUB), a circuit layer (DP_CL), a device layer (DP_LE), and an encapsulation layer (TFE).

[0111] The circuit layer (DP_CL) and the element layer (DP_LE) may be sequentially arranged on the substrate (SUB). The element layer (DP_LE) may include a first light-emitting element (LE_R), a second light-emitting element (LE_G), a third light-emitting element (LE_B), a pixel definition layer (PDL), and a spacer (SPC).

[0112] Here, the first light-emitting element (LE_R) may include a first pixel electrode (PE1), a first light-emitting layer (EL1), and a common electrode (CE), the second light-emitting element (LE_G) may include a second pixel electrode (PE2), a second light-emitting layer (EL2), and the common electrode (CE), and the third light-emitting element (LE_B) may include a third pixel electrode (PE3), a third light-emitting layer (EL3), and the common electrode (CE). The common electrode (CE) may be arranged to cover the pixel defining layer (PDL), the spacer (SPC), and the first to third light-emitting layers (EL1, EL2, EL3).

[0113] The first to third pixel electrodes (PE1, PE2, PE3) may be arranged on the circuit layer (DP_CL). The first to third pixel electrodes (PE1, PE2, PE3) may overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) on a plane, respectively.

[0114] The pixel defining layer (PDL) may be disposed on the circuit layer (DP_CL). The pixel defining layer (PDL) may expose at least a portion of an upper surface of each of the first to third pixel electrodes (PE1, PE2, PE3). The pixel defining layer (PDL) may overlap a non-emission region (NPXA) on a plane. The first to third emission regions (PXA_R, PXA_G, PXA_B) may be defined on the substrate (SUB) respectively, corresponding to the regions of the first to third pixel electrodes (PE1, PE2, PE3) exposed by the pixel defining layer (PDL). The non-emission region (NPXA) may be defined between the first to third emission regions (PXA_R, PXA_G, PXA_B). In one embodiment, the pixel defining layer (PDL) may include a light-blocking material. Additionally, the pixel defining film (PDL) can implement a black pixel defining film.

[0115] The spacer (SPC) may be disposed on the pixel defining layer (PDL). The spacer (SPC) may overlap the non-emitting area (NPXA) on a plane. For example, the thickness of the spacer (SPC) may be about 1.0 μm or more and about 1.5 μm or less, but the present invention is not limited thereto.

[0116] In one embodiment, the spacer (SPC) may include scattering particles (SP). The scattering particles (SP) may be dispersed and positioned within the spacer (SPC). For example, the scattering particles (SP) may include titanium oxide (TiO2), zinc oxide (ZnO), zirconium oxide (ZrO2), aluminum oxide (Al2O3), cerium oxide (CrO2), silicon oxide (SiO2), or the like.

[0117] The scattering particles (SP) may be spherical, elliptical, or amorphous. In one embodiment, the average diameter of the scattering particles (SP) may be about 50 nm or more and about 500 nm or less. For example, the average diameter of the scattering particles (SP) may be an arithmetic mean of the cross-sectional diameters of each of a plurality of the scattering particles (SP). The scattering particles (SP) may scatter light reflected from the spacer (SPC) and traveling to the outside, thereby preventing color bands due to reflection from being visible or minimizing the degree to which they are visible.

[0118] In one embodiment, the content of the scattering particles (SP) included in the spacer (SPC) may be about 5 wt% or more and about 50 wt% or less based on the total weight of the spacer (SPC). When the content of the scattering particles (SP) is less than about 5 wt%, reflected light scattering may be relatively insufficient, and when the content of the scattering particles (SP) exceeds about 50 wt%, manufacturing the spacer (SPC) may be relatively difficult.

[0119] The first to third light-emitting layers (EL1, EL2, EL3) may be respectively disposed on the first to third pixel electrodes (PE1, PE2, PE3) exposed by the pixel defining film (PDL). The first to third light-emitting layers (EL1, EL2, EL3) may respectively overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) on a plane.

[0120] The first light-emitting layer (EL1) can emit first light (LR) and can include an organic material that emits the first light (LR). The second light-emitting layer (EL2) can emit second light (LG) and can include an organic material that emits the second light (LG). The third light-emitting layer (EL3) can emit third light (LB) and can include an organic material that emits the third light (LB). For example, the first light (LR) can be light in a red wavelength band, the second light (LG) can be light in a green wavelength band, and the third light (LB) can be light in a blue wavelength band, but the present invention is not limited thereto.

[0121] The common electrode (CE) may be disposed on the pixel defining layer (PDL), the spacer (SPC), and the first to third light-emitting layers (EL1, EL2, EL3). The common electrode (CE) may entirely overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) and the non-light-emitting region (NPXA) on a plane.

[0122] The encapsulation layer (TFE) and the input sensing layer (ISL) may be sequentially disposed on the common electrode (CE). For example, the input sensing layer (ISL) may be directly disposed on the encapsulation layer (TFE). Since the common electrode (CE) may be disposed on the pixel defining layer (PDL) and the spacer (SPC), the pixel defining layer (PDL) may be disposed between the substrate (SUB) and the input sensing layer (ISL), and the spacer (SPC) may be disposed on the pixel defining layer (PDL). The input sensing layer (ISL) may include a first conductive layer (ICL1), a first input insulating layer (IL1), a second conductive layer (ICL2), and a second input insulating layer (IL2).

[0123] The first conductive layer (ICL1), the first input insulating layer (IL1), the second conductive layer (ICL2), and the second input insulating layer (IL2) can be sequentially arranged on the sealing layer (TFE).

[0124] Each of the first and second conductive layers (ICL1, ICL2) may overlap with the non-emission region (NPXA) on a plane. The first and second input insulating layers (IL1, IL2) may cover the first and second conductive layers (ICL1, ICL2), respectively. Each of the first and second input insulating layers (IL1, IL2) may entirely overlap with the first to third emission regions (PXA_R, PXA_G, PXA_B) and the non-emission region (NPXA) on a plane. That is, each of the first and second input insulating layers (IL1, IL2) may extend continuously in the first to third emission regions (PXA_R, PXA_G, PXA_B) and the non-emission region (NPXA). Each of the first and second input insulating layers (IL1, IL2) may include an organic material such as an acrylic resin or a polyimide resin, or an inorganic material such as a silicon oxide, a silicon nitride, a silicon oxynitride, or the like. These may be used alone or in combination with each other.

[0125] Although the input sensing layer (ISL) is illustrated in FIG. 7 as including the first conductive layer (ICL1), the second conductive layer (ICL2), and the second input insulating layer (IL2), the present invention is not limited thereto. For example, the input sensing layer (ISL) may further include a base insulating layer disposed between the first conductive layer (ICL1) and the encapsulation layer (TFE), may include only one of the first and second conductive layers (ICL1, ICL2), or may not include the second input insulating layer (IL2).

[0126] The color filter layer (CFL) may be disposed on the input sensing layer (ISL). The color filter layer (CFL) may include a first color filter (CF_R), a second color filter (CF_G), a third color filter (CF_B), a light-shielding portion (BM), and an over-coating layer (OCL).

[0127] The first to third color filters (CF_R, CF_G, CF_B) and the light-shielding portion (BM) may be arranged on the input sensing layer (ISL). On a plane, the first to third color filters (CF_R, CF_G, CF_B) may overlap the first to third light-emitting areas (PXA_R, PXA_G, PXA_B), respectively, and the light-shielding portion (BM) may overlap the non-light-emitting area (NPXA).

[0128] The first color filter (CF_R) can transmit the first light (LR) and block light of a different wavelength band from the first light (LR). Accordingly, in the first light emitting area (PXA_R), the first light (LR) can be emitted to the outside (i.e., in the third direction (DR3)). The second color filter (CF_G) can transmit the second light (LG) and block light of a different wavelength band from the second light (LG). Accordingly, in the second light emitting area (PXA_G), the second light (LG) can be emitted to the outside (i.e., in the third direction (DR3)). The third color filter (CF_B) can transmit the third light (LB) and block light of a different wavelength band from the third light (LB). Alternatively, the third color filter (CF_B) may be a transparent filter. Accordingly, in the third light-emitting region (PXA_B), the third light (LB) can be emitted to the outside (i.e., in the third direction (DR3)).

[0129] The above overcoating layer (OCL) may be disposed on the first to third color filters (CF_R, CF_G, CF_B) and the light-shielding portion (BM). The window (WM) may be disposed on the color filter layer (CFL).

[0130] In Fig. 7, the color filter layer (CFL) is illustrated as including the first to third color filters (CF_R, CF_G, CF_B) and the light-shielding portion (BM), but the present invention is not limited thereto. For example, the color filter layer (CFL) may not include the light-shielding portion (BM), and each of the first to third color filters (CF_R, CF_G, CF_B) may further overlap the non-emitting region (NPXA) on a plane, and the first to third color filters (CF_R, CF_G, CF_B) may overlap each other in the third direction (DR3) in the non-emitting region (NPXA).

[0131] The display device (20) according to one embodiment of the present invention may include the spacer (SPC) disposed on the pixel defining layer (PDL) and including the scattering particles (SP). By having the scattering particles (SP) scatter light incident on the spacer (SPC), a color band phenomenon caused by reflection of external light can be prevented or minimized. In addition, since the spacer (SPC) overlaps the non-emitting area (NPXA) on a plane, a decrease in the light extraction efficiency of the display device (20) can be minimized. Accordingly, the display quality of the display device (20) can be improved.

[0132] Fig. 8 is a cross-sectional view showing a display device according to another embodiment of the present invention. For example, Fig. 8 may correspond to the cross-sectional view of Fig. 3.

[0133] Hereinafter, descriptions overlapping with those of the display device (10) described with reference to FIGS. 1 to 6 are omitted or simplified.

[0134] Referring to FIG. 8, a display device (30) may include a display panel (DP), an input sensing layer (ISL), a color filter layer (CFL), and a window (WM). The display panel (DP) may include a substrate (SUB), a circuit layer (DP_CL), a device layer (DP_LE), and an encapsulation layer (TFE).

[0135] The circuit layer (DP_CL) and the element layer (DP_LE) may be sequentially arranged on the substrate (SUB). The element layer (DP_LE) may include a first light-emitting element (LE_R), a second light-emitting element (LE_G), a third light-emitting element (LE_B), a pixel definition layer (PDL), and a spacer (SPC).

[0136] Here, the first light-emitting element (LE_R) may include a first pixel electrode (PE1), a first light-emitting layer (EL1), and a common electrode (CE), the second light-emitting element (LE_G) may include a second pixel electrode (PE2), a second light-emitting layer (EL2), and the common electrode (CE), and the third light-emitting element (LE_B) may include a third pixel electrode (PE3), a third light-emitting layer (EL3), and the common electrode (CE). The common electrode (CE) may be arranged to cover the pixel defining layer (PDL), the spacer (SPC), and the first to third light-emitting layers (EL1, EL2, EL3).

[0137] The first to third pixel electrodes (PE1, PE2, PE3) may be arranged on the circuit layer (DP_CL). The first to third pixel electrodes (PE1, PE2, PE3) may overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) on a plane, respectively.

[0138] The pixel defining layer (PDL) may be disposed on the circuit layer (DP_CL). The pixel defining layer (PDL) may expose at least a portion of an upper surface of each of the first to third pixel electrodes (PE1, PE2, PE3). The pixel defining layer (PDL) may overlap a non-emission region (NPXA) on a plane. The first to third emission regions (PXA_R, PXA_G, PXA_B) may be defined on the substrate (SUB) respectively, corresponding to the regions of the first to third pixel electrodes (PE1, PE2, PE3) exposed by the pixel defining layer (PDL). The non-emission region (NPXA) may be defined between the first to third emission regions (PXA_R, PXA_G, PXA_B). In one embodiment, the pixel defining layer (PDL) may include a light-blocking material. Additionally, the pixel defining film (PDL) can implement a black pixel defining film.

[0139] The spacer (SPC) may be disposed on the pixel defining layer (PDL). The spacer (SPC) may overlap the non-emitting area (NPXA) on a plane. For example, the thickness of the spacer (SPC) may be about 1.0 μm or more and about 1.5 μm or less, but the present invention is not limited thereto.

[0140] In one embodiment, the spacer (SPC) may include scattering particles (SP). The scattering particles (SP) may be dispersed and positioned within the spacer (SPC). For example, the scattering particles (SP) may include titanium oxide (TiO2), zinc oxide (ZnO), zirconium oxide (ZrO2), aluminum oxide (Al2O3), cerium oxide (CrO2), silicon oxide (SiO2), or the like.

[0141] The scattering particles (SP) may be spherical, elliptical, or amorphous. In one embodiment, the average diameter of the scattering particles (SP) may be about 50 nm or more and about 500 nm or less. For example, the average diameter of the scattering particles (SP) may be an arithmetic mean of the cross-sectional diameters (D) of each of a plurality of the scattering particles (SP). In one embodiment, the content of the scattering particles (SP) included in the spacer (SPC) may be about 5 wt% or more and about 50 wt% or less based on the total weight of the spacer (SPC). The scattering particles (SP) may scatter light reflected from the spacer (SPC) and traveling to the outside, thereby preventing a color band due to reflection from being visible or minimizing the degree of visibility.

[0142] The first to third light-emitting layers (EL1, EL2, EL3) may be respectively disposed on the first to third pixel electrodes (PE1, PE2, PE3) exposed by the pixel defining film (PDL). The first to third light-emitting layers (EL1, EL2, EL3) may respectively overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) on a plane.

[0143] The first light-emitting layer (EL1) can emit first light (LR) and can include an organic material that emits the first light (LR). The second light-emitting layer (EL2) can emit second light (LG) and can include an organic material that emits the second light (LG). The third light-emitting layer (EL3) can emit third light (LB) and can include an organic material that emits the third light (LB). For example, the first light (LR) can be light in a red wavelength band, the second light (LG) can be light in a green wavelength band, and the third light (LB) can be light in a blue wavelength band, but the present invention is not limited thereto.

[0144] The common electrode (CE) may be disposed on the pixel defining layer (PDL), the spacer (SPC), and the first to third light-emitting layers (EL1, EL2, EL3). The common electrode (CE) may entirely overlap the first to third light-emitting regions (PXA_R, PXA_G, PXA_B) and the non-light-emitting region (NPXA) on a plane.

[0145] The encapsulation layer (TFE) and the input sensing layer (ISL) may be sequentially disposed on the common electrode (CE). For example, the input sensing layer (ISL) may be directly disposed on the encapsulation layer (TFE). The input sensing layer (ISL) may include a first conductive layer (ICL1), a first input insulating layer (IL1), a second conductive layer (ICL2), and a second input insulating layer (IL2).

[0146] The first conductive layer (ICL1) may be disposed on the encapsulation layer (TFE) and may overlap with the non-emitting region (NPXA) on a plane. The first input insulating layer (IL1) may be disposed on the first conductive layer (ICL1) and may cover the first conductive layer (ICL1).

[0147] In one embodiment, on a plane, the first input insulating layer (IL1) may overlap the first light-emitting region (PXA_R) and the second light-emitting region (PXA_G), and may not overlap the third light-emitting region (PXA_B). In addition, the first input insulating layer (IL1) may overlap the non-light-emitting region (NPXA) on a plane. The first input insulating layer (IL1) may include an organic material such as an acrylic resin, a polyimide resin, or the like. The first input insulating layer (IL1) may be formed through a photolithography process so as to not overlap only the third light-emitting region (PXA_B) on a plane. For example, the thickness (TH) of the first input insulating layer (IL1) may be about 1.0 μm or more and about 1.8 μm or less, but the present invention is not limited thereto.

[0148] In one embodiment, the first input insulating layer (IL1) may include the scattering particles (SP). The scattering particles (SP) may be dispersed and positioned within the first input insulating layer (IL1). In one embodiment, the average diameter of the scattering particles (SP) may be about 50 nm or more and about 500 nm or less. In one embodiment, the content of the scattering particles (SP) included in the first input insulating layer (IL1) may be about 0 wt% or more and about 10 wt% or less based on the total weight of the first input insulating layer (IL1). The haze of the first input insulating layer (IL1) may be about 10% or more and about 50% or less.

[0149] The above scattering particles (SP) can scatter light reflected from the lower structure and propagate to the outside, thereby preventing color bands due to reflection from being visible or minimizing the degree to which they are visible. In addition, the scattering particles (SP) are arranged so as not to overlap with the third light-emitting region (PXA_B) that emits the third light (LB) on a plane, thereby minimizing a decrease in the light extraction efficiency of the display device (30).

[0150] The second conductive layer (ICL2) may be disposed on the first input insulating layer (IL1) and may overlap with the non-emissive region (NPXA) in a plane. The second input insulating layer (IL2) may be disposed on the first input insulating layer (IL1) and the second conductive layer (ICL2) and may cover the first input insulating layer (IL1) and the second conductive layer (ICL2). The second input insulating layer (IL2) may entirely overlap with the first to third emissive regions (PXA_R, PXA_G, PXA_B) and the non-emissive region (NPXA) in a plane. The second input insulating layer (IL2) may include an organic material such as an acrylic resin or a polyimide resin, or an inorganic material such as a silicon oxide, a silicon nitride, or a silicon oxynitride. These may be used alone or in combination with each other.

[0151] In Fig. 8, the input sensing layer (ISL) is illustrated as including the first conductive layer (ICL1), the second conductive layer (ICL2), and the second input insulating layer (IL2), but the present invention is not limited thereto. For example, the input sensing layer (ISL) may further include a base insulating layer disposed between the first conductive layer (ICL1) and the encapsulation layer (TFE), may include only one of the first and second conductive layers (ICL1, ICL2), or may not include the second input insulating layer (IL2).

[0152] The color filter layer (CFL) may be disposed on the input sensing layer (ISL). The color filter layer (CFL) may include a first color filter (CF_R), a second color filter (CF_G), a third color filter (CF_B), a light-shielding portion (BM), and an over-coating layer (OCL).

[0153] Since the input sensing layer (ISL) can be directly disposed on the encapsulation layer (TFE), and the encapsulation layer (TFE) can be disposed on the common electrode (CE) disposed on the first to third light-emitting layers (EL1, EL2, EL3), an emission layer including the first to third light-emitting layers (EL1, EL2, EL3) can be disposed between the substrate (SUB) and the input sensing layer (ISL). In addition, since the color filter layer (CFL) can be disposed on the input sensing layer (ISL), an emission layer including the first to third light-emitting layers (EL1, EL2, EL3) can be disposed between the substrate (SUB) and the color filter layer (CFL).

[0154] The first to third color filters (CF_R, CF_G, CF_B) and the light-shielding portion (BM) may be arranged on the input sensing layer (ISL). On a plane, the first to third color filters (CF_R, CF_G, CF_B) may overlap the first to third light-emitting areas (PXA_R, PXA_G, PXA_B), respectively, and the light-shielding portion (BM) may overlap the non-light-emitting area (NPXA).

[0155] The first color filter (CF_R) can transmit the first light (LR) and block light of a different wavelength band from the first light (LR). Accordingly, in the first light emitting area (PXA_R), the first light (LR) can be emitted to the outside (i.e., in the third direction (DR3)). The second color filter (CF_G) can transmit the second light (LG) and block light of a different wavelength band from the second light (LG). Accordingly, in the second light emitting area (PXA_G), the second light (LG) can be emitted to the outside (i.e., in the third direction (DR3)). The third color filter (CF_B) can transmit the third light (LB) and block light of a different wavelength band from the third light (LB). Alternatively, the third color filter (CF_B) may be a transparent filter. Accordingly, in the third light-emitting region (PXA_B), the third light (LB) can be emitted to the outside (i.e., in the third direction (DR3)).

[0156] The above overcoating layer (OCL) may be disposed on the first to third color filters (CF_R, CF_G, CF_B) and the light-shielding portion (BM). The window (WM) may be disposed on the color filter layer (CFL).

[0157] In Fig. 8, the color filter layer (CFL) is illustrated as including the first to third color filters (CF_R, CF_G, CF_B) and the light-shielding portion (BM), but the present invention is not limited thereto. For example, the color filter layer (CFL) may not include the light-shielding portion (BM), and each of the first to third color filters (CF_R, CF_G, CF_B) may further overlap the non-emitting region (NPXA) on a plane, and the first to third color filters (CF_R, CF_G, CF_B) may overlap each other in the third direction (DR3) in the non-emitting region (NPXA).

[0158] The display device (30) according to one embodiment of the present invention may include the input sensing layer (ISL) including the first input insulating layer (IL1) including the scattering particles (SP) and the spacer (SPC) disposed on the pixel defining layer (PDL) and including the scattering particles (SP). The scattering particles (SP) scatter light incident on each of the first input insulating layer (IL1) and the spacer (SPC), so that a color band phenomenon due to reflection of external light can be prevented or minimized. In addition, on a plane, the first input insulating layer (IL1) does not overlap the third light-emitting area (PXA_B), and the spacer (SPC) overlaps the non-light-emitting area (NPXA), so that a decrease in light extraction efficiency of the display device (30) can be minimized. Accordingly, the display quality of the display device (30) can be improved.

[0159] The present invention can be applied to display devices and electronic devices including them. For example, the present invention can be applied to high-resolution smartphones, mobile phones, smart pads, smart watches, tablet PCs, vehicle navigation systems, televisions, computer monitors, laptops, and the like.

[0160] Although the present invention has been described above with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various modifications and changes may be made to the present invention without departing from the spirit and scope of the present invention as set forth in the following claims.

[0161] <Explanation of symbols>

[0162] 10, 20, 30: Display device

[0163] PXA_R, PXA_G, PXA_B: first to third light-emitting regions

[0164] NPXA: non-luminescent region

[0165] LR, LG, LB: 1st to 3rd light sources

[0166] ISL: Input Sensing Layer

[0167] IL1, IL2: first and second input insulation layers

[0168] SP: Scattered particle

[0169] CFL: color filter layer

[0170] CF_R, CF_G, CF_B: first to third color filters

[0171] BM: Shade

[0172] SPC: Spacer

Claims

1. A first light-emitting region emitting a first light, a second light-emitting region emitting a second light, and a third light-emitting region emitting a third light, each defined on a substrate; An input sensing layer disposed on the substrate, overlapping the first light-emitting region and the second light-emitting region on a plane, and including a first input insulating layer including scattering particles; and A display device including a color filter layer disposed on the input sensing layer.

2. A display device according to claim 1, characterized in that the first input insulating layer does not overlap with the third light-emitting region on a plane.

3. In the first paragraph, the first light is light in the red wavelength band, The above second light is light in the green wavelength band, A display device characterized in that the third light is light in the blue wavelength band.

4. A display device according to claim 1, characterized in that the first input insulating layer comprises an organic material.

5. A display device according to claim 1, characterized in that the average diameter of the scattering particles is 50 nm or more and 500 nm or less.

6. A display device according to claim 1, characterized in that the content of the scattering particles included in the first input insulating layer is greater than 0 wt% and less than or equal to 10 wt% based on the total weight of the first input insulating layer.

7. A display device according to claim 1, characterized in that the thickness of the first input insulating layer is 1.0 μm or more and 1.8 μm or less.

8. In the first paragraph, the input sensing layer, A display device characterized in that it further includes a second input insulating layer disposed on the first input insulating layer and covering the first input insulating layer.

9. A display device according to claim 8, characterized in that the second input insulating layer extends continuously in the first light-emitting region, the second light-emitting region, and the third light-emitting region.

10. In the first paragraph, the color filter layer, A first color filter overlapping the first light-emitting region on a plane; a second color filter overlapping the second light-emitting region on a plane; and A display device characterized by including a third color filter overlapping the third light-emitting area on a plane.

11. In the 10th paragraph, the color filter layer, A display device further comprising a light-shielding portion disposed between the first color filter, the second color filter, and the third color filter.

12. A display device according to claim 1, characterized in that the haze of the first input insulating layer is 10% or more and 50% or less.

13. In the first paragraph, a pixel defining film disposed between the substrate and the input sensing layer; and A display device characterized by further comprising a spacer disposed on the pixel defining film.

14. A display device according to claim 13, characterized in that the spacer includes the scattering particles.

15. A display device according to claim 14, characterized in that the content of the scattering particles included in the spacer is 5 wt% or more and 50 wt% or less based on the total weight of the spacer.

16. In the first paragraph, further comprising a light-emitting layer disposed between the substrate and the input sensing layer, The above light-emitting layer is, A first light-emitting layer overlapping the first light-emitting region on a plane and emitting the first light; A second light-emitting layer overlapping the second light-emitting region on a plane and emitting the second light; and A display device characterized by including a third light-emitting layer that overlaps the third light-emitting region on a plane and emits the third light.

17. A light-emitting area defined on each substrate and a non-light-emitting area surrounding the light-emitting area; A pixel defining film disposed on the substrate and overlapping the non-emitting region on a plane; A spacer disposed on the pixel defining film, overlapping the non-luminous region on a plane, and including scattering particles in a content of 5 wt% or more and 50 wt% or less based on the total weight; and A display device comprising a color filter layer disposed on the above spacer.

18. A display device according to claim 17, characterized in that the average diameter of the scattering particles is 50 nm or more and 500 nm or less.

19. A display device characterized in that it further comprises an input sensing layer disposed between the spacer and the color filter layer in the 17th paragraph.

20. In the 17th paragraph, the light-emitting region is A first light-emitting region emitting a first light; a second light-emitting region emitting a second light; and comprising a third light-emitting region that emits a third light; The above color filter layer, A first color filter overlapping the first light-emitting region on a plane; a second color filter overlapping the second light-emitting region on a plane; and A display device characterized by including a third color filter overlapping the third light-emitting area on a plane.

21. A display device according to claim 20, characterized in that the color filter layer further includes a light-shielding portion overlapping the non-emissive region on a plane.

22. In the 20th paragraph, the first light is light of a red wavelength band, The above second light is light in the green wavelength band, A display device characterized in that the third light is light in the blue wavelength band.

23. In the 20th paragraph, further comprising a light-emitting layer disposed between the substrate and the color filter layer, The above light-emitting layer is, A first light-emitting layer overlapping the first light-emitting region on a plane and emitting the first light; A second light-emitting layer overlapping the second light-emitting region on a plane and emitting the second light; and A display device characterized by including a third light-emitting layer that overlaps the third light-emitting region on a plane and emits the third light.

24. Including a display panel, an input sensing layer, and a color filter layer sequentially arranged on a substrate, The above display panel A first light-emitting region emitting red light; a second light-emitting region emitting green light; and Contains a third luminescent region that emits blue light, The above input detection layer 1st challenge layer; A first input insulating layer disposed on the first conductive layer and covering the first conductive layer; A second conductive layer disposed on the first input insulating layer; and A second input insulating layer is disposed on the first input insulating layer and the second conductive layer and covers the first input insulating layer and the second conductive layer, A display device in which the first input insulating layer includes scattering particles and does not overlap with the third light-emitting region on a plane.

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