Transmission circuit and communication device equipped with same
The power amplifier circuit with dual Doherty amplifiers and phase-shift lines addresses inefficiencies by achieving a 12 dB back-off, enhancing efficiency and robustness against load fluctuations.
Patent Information
- Application Number
- PCT/JP2025/003248
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-20
- Filing Date
- 2025-01-31
- Publication Date
- 2025-08-28
AI Technical Summary
Existing power amplifier circuits struggle to achieve a back-off amount greater than 6 dB due to variations in modulation methods, digital ET set voltage, and target frequency bandwidth, leading to inefficiencies and potential fluctuations in output power.
A power amplifier circuit configuration using two Doherty amplifiers connected via phase-shift lines, with the ability to switch amplifier states based on input signal power levels, allowing for multiple stages of impedance adjustment to achieve a back-off amount of 12 dB.
The solution enables efficient power amplification with a back-off of 12 dB, improving efficiency and robustness against load fluctuations by alternating amplifier states and impedance adjustments.
Smart Images

Figure JP2025003248_28082025_PF_FP_ABST
Abstract
Description
Transmitter circuit and communication device incorporating the same
[0001] The present disclosure relates to a transmission circuit and a communication device equipped with the same, and more particularly to a technique for improving the efficiency of a transmission circuit having an amplifier.
[0002] Japanese Patent Laid-Open Publication No. 2018-137566 (Patent Document 1) discloses an amplifier circuit including a first differential amplifier (carrier amplifier) and a second differential amplifier (peak amplifier) that amplify signals distributed from an input signal, and transformers (first transformer, second transformer) individually provided for each differential amplifier. The first differential amplifier operates in a range where the power level of the input signal is equal to or higher than a first level, and the second differential amplifier operates in a range where the power level of the input signal is equal to or higher than a second level that is higher than the first level. The first transformer and the second transformer receive and combine the signals output from the first differential amplifier and the second differential amplifier, respectively, and output the combined output signal to a load.
[0003] Japanese Patent Application Laid-Open No. 2018-137566
[0004] By applying digital envelope tracking (ET) to the power supply voltage of a power amplifier circuit configured as described in Patent Document 1, it is possible to improve the efficiency in the back-off region from the high output region where both the carrier amplifier and peak amplifier are in an operating state to the low output state where only the carrier amplifier is in an operating state.
[0005] In the configuration of Patent Document 1 and a typical Doherty amplifier, a back-off amount of 6 dB can generally be achieved. However, the back-off amount required for a power amplifier circuit may vary depending on, for example, the modulation method, the set voltage of the digital ET, and / or the target frequency bandwidth. Therefore, depending on the specifications required for the device to which the power amplifier circuit is applied, a back-off amount greater than 6 dB may be required.
[0006] The present disclosure has been made to solve such problems, and its purpose is to provide a power amplifier circuit that can achieve a back-off amount of 6 dB or more.
[0007] A transmission circuit according to the present disclosure amplifies a high-frequency signal and transmits it to a radiating element. The transmission circuit includes an input terminal for receiving the high-frequency signal, a first output terminal for connecting to the radiating element, a first amplifier circuit, a second amplifier circuit, and a first output line. Each of the first amplifier circuit and the second amplifier circuit amplifies the high-frequency signal received at the input terminal. The first output line transmits an output signal from the first amplifier circuit to the first output terminal. The first amplifier circuit is a Doherty amplifier including a first carrier amplifier, a first peak amplifier, and a first phase-shift line connected between the output terminal of the first carrier amplifier and the output terminal of the first peak amplifier. The second amplifier circuit includes a first amplifier, a second amplifier, and a hybrid coupler. The hybrid coupler includes a first line, a second line, a third line, and a fourth line connected in a ring configuration. The output terminal of the first amplifier is connected to a first connection node between the first line and the second line. The output terminal of the second amplifier is connected to a second connection node between the first line and the third line. The output terminal of the first peak amplifier and the first output line are connected to a third connection node between the second line and the fourth line. The driving states of the first peak amplifier, the first amplifier, and the second amplifier are switched according to the power level of the input signal.
[0008] The power amplifier circuit included in the transmitter circuit according to the present disclosure includes a first amplifier circuit constituting a Doherty amplifier and a second amplifier circuit composed of two amplifiers and a hybrid coupler. The output signals from these two amplifier circuits are combined and output from an output terminal. In the power amplifier circuit, the operating states of the peak amplifier in the first amplifier circuit and the two amplifiers in the second amplifier circuit are switched according to the power level of the input signal. Since the impedance of the operating amplifier can be changed depending on the operating state of each amplifier, the back-off amount can be set in multiple stages. This allows the transmitter circuit to achieve a back-off amount of 6 dB or more.
[0009] 13 is a schematic configuration diagram of a communication device to which a transmission circuit according to a first embodiment is applied. FIG. 14 is a diagram showing a detailed configuration of the power amplifier circuit in FIG. 1. FIG. 15 is a diagram for explaining a circuit configuration when a high-frequency signal is transmitted from an output terminal T1. FIG. 16 is a diagram for explaining a circuit configuration when a high-frequency signal is transmitted from an output terminal T2. FIG. 17 is a diagram for explaining the relationship between output power and efficiency of the power amplifier circuit in FIG. 1. FIG. 18 is a diagram for explaining impedance in a region RG1 of FIG. 5. FIG. 19 is a diagram for explaining impedance in a region RG2 of FIG. 5. FIG. 20 is a diagram for explaining impedance in a region RG3 of FIG. 5. FIG. 21 is a first diagram for explaining the influence of load fluctuations at maximum power output. FIG. 22 is a second diagram for explaining the influence of load fluctuations at maximum power output. FIG. 22 is a first diagram for explaining the influence of load fluctuations at 6 dB back-off. FIG. 23 is a diagram for explaining the configuration of a power amplifier circuit used in a transmission circuit according to a second embodiment, and impedance in a region RG1. FIG. 24 is a diagram for explaining impedance in a region RG2 in the power amplifier circuit of FIG. 13. FIG. 25 is a diagram for explaining impedance in a region RG3 in the power amplifier circuit of FIG. 13. FIG. 10 is a diagram illustrating a configuration of a power amplifier circuit used in a transmission circuit according to a third embodiment.
[0010] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals, and description thereof will not be repeated.
[0011] 1 is a schematic diagram of a communication device 1 to which a transmission circuit 10 according to an embodiment is applied. The communication device 1 is, for example, a mobile terminal such as a mobile phone, a smartphone, or a tablet, or a personal computer with a communication function.
[0012] 1 , the communication device 1 includes an antenna ANT, a transmission circuit 10, a baseband integrated circuit (BBIC) 20 constituting a baseband signal processing circuit, a radio frequency integrated circuit (RFIC) 30, and a power supply circuit 40. The transmission circuit 10 includes input terminals T0, T3, and T4, output terminals T1 and T2, a bias control circuit 50, and a power amplifier circuit 100. In general, the communication device 1 upconverts an intermediate frequency (IF) signal transmitted from the BBIC 20 to a high frequency (radio frequency: RF) signal in the RFIC 30, amplifies the high frequency signal in the power amplifier circuit 100, and emits the amplified signal from the antenna ANT.
[0013] The RFIC 30 is an example of a signal processing circuit that processes a high-frequency signal. The RFIC 30 up-converts the intermediate frequency signal transmitted from the BBIC 20 into a high-frequency signal and outputs the generated high-frequency signal to the transmission circuit 10 via the input terminal T0.
[0014] The bias control circuit 50 receives a control signal CON via an input terminal T3 from the RFIC 30. Based on the control signal CON, the bias control circuit 50 generates a bias signal BS for controlling the magnitude and supply timing of the bias current of the amplifier included in the power amplifier circuit 100, and outputs the bias signal BS to the power amplifier circuit 100.
[0015] The power amplifier circuit 100 amplifies an input signal Pin received from the RFIC 30 via an input terminal T0, and generates output signals Pout1 and Pout2.
[0016] The antenna ANT is, for example, a flat patch antenna. An output terminal T1 of the transmission circuit 10 is connected to a feed point SP1 of the antenna ANT. An output terminal T2 of the transmission circuit 10 is connected to a feed point SP2 of the antenna ANT. The antenna ANT radiates output signals Pout1 and Pout2, which are high-frequency signals output from the transmission circuit 10, as radio waves.
[0017] The power supply circuit 40 is an example of a so-called digital tracker, and can supply power supply voltages Vcc of a plurality of different voltage levels to the power amplifier circuit 100. The power supply circuit 40 includes a multilevel power converter (MPC) 410, a power supply selection circuit 420, and a digital envelope tracker (digital ET) 430.
[0018] The MPC 410 includes a plurality of DC / DC converters, which are not shown in Fig. 1. The MPC 410 converts the battery voltage VB supplied from an external battery into a plurality of different voltage levels and supplies the voltages to the power supply selection circuit 420.
[0019] The digital ET 430 receives the I and Q waveform signals of the transmit signal from the BBIC 20 and tracks the envelope of the transmit signal in the digital ET mode. The digital ET 430 generates a selection signal SEL corresponding to the voltage level of the envelope of the transmit signal and outputs it to the power supply selection circuit 420.
[0020] The power supply selection circuit 420 selects a voltage corresponding to the selection signal SEL from the plurality of voltage levels supplied from the MPC 410, and supplies the selected voltage to the power amplifier circuit 100 via the input terminal T4 as the power supply voltage Vcc.
[0021] (Detailed Configuration of Power Amplifier Circuit) Next, the detailed configuration of the power amplifier circuit 100 in the transmitter circuit 10 will be described with reference to FIG.
[0022] The power amplifier circuit 100 includes a branching circuit 115, amplifier circuits 105A, 105B, and 105C, and output lines 151 and 152. The amplifier circuit 105A includes a carrier amplifier 141A, a peak amplifier 142A, and a phase-shift line 135A. The phase-shift line 135A is connected between the output terminal of the carrier amplifier 141A and the output terminal (connection node N1A) of the peak amplifier 142A. The phase-shift line 135A has an electrical length corresponding to a quarter wavelength of the center frequency of the frequency band (Band A) of the high-frequency signal output using the amplifier circuit 105A.
[0023] The amplifier circuit 105B includes a carrier amplifier 141B, a peak amplifier 142B, and a phase-shift line 135B. The phase-shift line 135B is connected between the output terminal of the carrier amplifier 141B and the output terminal (connection node N1B) of the peak amplifier 142B. The phase-shift line 135B has an electrical length corresponding to a quarter wavelength of the center frequency of the frequency band (Band B) of the high-frequency signal output using the amplifier circuit 105B.
[0024] The amplifier circuit 105C includes amplifiers 141C and 142C and a hybrid coupler 130. The hybrid coupler 130 includes phase shift lines 131 to 134 connected in a ring shape. The phase shift lines 131 to 134 of the hybrid coupler 130 have electrical lengths that are ¼ wavelength of the center frequencies of the frequency bands defined by band A and band B. An output terminal of the amplifier 141C is connected to a connection node N1C between the phase shift line 131 and the phase shift line 132. An output terminal of the amplifier 142C is connected to a connection node N2C between the phase shift line 131 and the phase shift line 133.
[0025] The output terminal of the peak amplifier 142A of the amplifier circuit 105A is connected to a connection node N3C between the phase shift line 132 and the phase shift line 134. An output line 151 is connected between the connection node N3C and the output terminal T1. The output line 151 has an electrical length corresponding to a quarter wavelength of the center frequency of band A.
[0026] The output end of the peak amplifier 142B of the amplifier circuit 105B is connected to a connection node N4C between the phase shift line 133 and the phase shift line 134. An output line 152 is connected between the connection node N4C and the output terminal T2. The output line 152 has an electrical length corresponding to a quarter wavelength of the center frequency of band B.
[0027] The branching circuit 115 includes a phase shift circuit (PS) 110 and hybrid couplers 120A and 120B. The phase shift circuit 110 branches the input signal Pin received at the input terminal T0 from the RFIC 30 into multiple paths (first path to fourth path) while imparting a phase difference to the input signal Pin.
[0028] The first path transmits the high-frequency signal to amplifier circuit 105A via hybrid coupler 120A. The second and third paths transmit the high-frequency signal to amplifier circuit 105C. The fourth path transmits the high-frequency signal to amplifier circuit 105B via hybrid coupler 120B. Each of hybrid couplers 120A and 120B further branches the signal from phase shift circuit 110 into two paths and imparts a 90° phase difference between the two branched signals.
[0029] One input terminal of the hybrid coupler 120A is connected to the first path. The other input terminal of the hybrid coupler 120A is connected to the ground potential GND. One output terminal of the hybrid coupler 120A is connected to the carrier amplifier 141A of the amplifier circuit 105A. The other output terminal of the hybrid coupler 120A is connected to the peak amplifier 142A of the amplifier circuit 105A. The carrier amplifier 141A receives a phase θ of the signal supplied to the peak amplifier 142A. 1 A signal with a phase lead of 90° is supplied.
[0030] One input terminal of the hybrid coupler 120B is connected to the fourth path. The other input terminal of the hybrid coupler 120B is connected to the ground potential GND. One output terminal of the hybrid coupler 120B is connected to the carrier amplifier 141B of the amplifier circuit 105B. The other output terminal of the hybrid coupler 120B is connected to the peak amplifier 142B of the amplifier circuit 105B. The carrier amplifier 141B receives a phase θ 2 A signal with a phase lead of 90° is supplied.
[0031] The second path is connected to an amplifier 141C of the amplifier circuit 105C. The third path is connected to an amplifier 142C of the amplifier circuit 105C. When a high-frequency signal is supplied to the first path, i.e., the amplifier circuit 105A, the amplifier 141C receives a phase θ 1 The amplifier 142C is supplied with a signal whose phase is advanced by 90° with respect to the signal supplied to the peak amplifier 142A. 1 A signal whose phase is advanced by 180° with respect to the
[0032] On the other hand, when a high-frequency signal is supplied to the fourth path, that is, the amplifier circuit 105B, the amplifier 141C receives a phase θ 2 The amplifier 142C is supplied with a signal whose phase is 180° ahead of the signal supplied to the peak amplifier 142B. 2 A signal with a phase lead of 90° is supplied.
[0033] Here, the impedance of the antenna ANT is Z 0 / 2, the impedance of the output lines 151 and 152 is Z 0 / 2, and the impedances of the phase shift lines 135A and 135B in the amplifier circuits 105A and 105B are set to 2Z 0 The impedance of the phase shift lines 131 and 134 in the hybrid coupler 130 of the amplifier circuit 105C is set to Z 0 and the impedance of the phase shift lines 132 and 133 is set to Z 0 / √2.
[0034] (Dual-Band Support) In recent years, studies have been conducted on communications using signals in the sub-terahertz frequency band (e.g., 122.25 GHz to 174.8 GHz). Because the center frequency of this frequency band is 148.525 GHz, the fractional bandwidth is (174.8 - 122.25) x 100 / 148.525 = 35.4%. This is significantly larger than the typical fractional bandwidth of just over 10%. Therefore, it is difficult to achieve the entire target frequency band using a single amplifier circuit.
[0035] In such cases, a conceivable method is to divide the target frequency band into two or more bands and use a switch to switch the amplifier circuit to be used depending on the frequency band. However, since the passage loss through the switch is larger for signals in the sub-terahertz band than for signals in lower frequency bands, such a switching method using a switch may result in a decrease in the efficiency of the amplifier circuit.
[0036] Therefore, the power amplifier circuit 100 in the transmitter circuit 10 of the first embodiment employs a configuration in which amplifier circuits 105A and 105B corresponding to two frequency bands are connected using a hybrid coupler 130 in an amplifier circuit 105C shared between these frequency bands. In this configuration, one of amplifier circuits 105A and 105B corresponding to the frequency band of the high-frequency signal to be transmitted is driven, while the other amplifier circuit corresponding to the other frequency band is stopped. This makes it possible to alternately switch and transmit high-frequency signals of two different frequency bands without using a switch with large losses.
[0037] 3 and 4 are diagrams showing circuit configurations for switching between high-frequency signals of two different frequency bands. Fig. 3 shows the case where a high-frequency signal of band A (e.g., 122.25 GHz to 148.5 GHz) is transmitted from output terminal T1, and Fig. 4 shows the case where a high-frequency signal of band B (e.g., 151.5 GHz to 174.8 GHz) is transmitted from output terminal T2.
[0038] 3, when a high-frequency signal of band A is transmitted from output terminal T1, amplifier circuits 105A and 105C are driven, and amplifier circuit 105B is dedriven. This shorts the impedance of connection node N4C in hybrid coupler 130, and as a result, the impedance seen from connection node N2C to phase shift line 133 and the impedance seen from connection node N3C to phase shift line 134 are open. Therefore, the high-frequency signal supplied to amplifier circuit 105C is not transmitted to output terminal T2.
[0039] As a result, amplifier circuit 105C functions as a Doherty amplifier, with amplifier 142C as a carrier amplifier and amplifier 141C as a peak amplifier. By supplying amplifier circuit 105C with a signal that is 90° ahead in phase with the high-frequency signal supplied to amplifier circuit 105A, the high-frequency signal supplied to amplifier circuit 105A and the high-frequency signal supplied to amplifier circuit 105C are combined in phase at connection node N3C. The combined high-frequency signal passes through output line 151 and is output from output terminal T1 to antenna ANT.
[0040] 4, when a high-frequency signal of band B is transmitted from output terminal T2, amplifier circuits 105B and 105C are driven, and amplifier circuit 105C is dedriven. This shorts the impedance of connection node N3C in hybrid coupler 130, and as a result, the impedance seen from connection node N1C to phase shift line 132 and the impedance seen from connection node N4C to phase shift line 134 become open. Therefore, the high-frequency signal supplied to amplifier circuit 105C is not transmitted to output terminal T1.
[0041] As a result, amplifier circuit 105C functions as a Doherty amplifier, with amplifier 141C as a carrier amplifier and amplifier 142C as a peak amplifier. By supplying amplifier circuit 105C with a signal that is 90° ahead in phase with the high-frequency signal supplied to amplifier circuit 105B, the high-frequency signal supplied to amplifier circuit 105B and the high-frequency signal supplied to amplifier circuit 105C are combined in phase at connection node N4C. The combined high-frequency signal passes through output line 152 and is output from output terminal T2 to antenna ANT.
[0042] As described above, the power amplifier circuit 100 can alternately switch between and output high-frequency signals in two different frequency bands without using a switch.
[0043] (Increasing the Back-Off Amount) Signals in higher frequency bands than conventionally used frequency bands, such as the sub-terahertz band described above, tend to be more susceptible to attenuation than signals in lower frequency bands. Therefore, in a power amplifier circuit, it is necessary to make the power supply voltage follow changes in an input signal with a wide modulation bandwidth. To meet this requirement, a digital ET mode is generally used, in which the power supply voltage is set to multiple discrete, different voltage levels within one frame.
[0044] A typical amplifier has a tendency for its efficiency to decrease as the input signal decreases. Therefore, if the power level of the input signal decreases in digital ET mode, the amplifier's efficiency may decrease. On the other hand, an amplifier also has a tendency for its efficiency to increase as the load impedance increases. A Doherty amplifier is known as a configuration that takes advantage of this characteristic to increase amplification efficiency.
[0045] A Doherty amplifier generally has a configuration in which a carrier amplifier and a peaking amplifier are connected in parallel between an input terminal and an output terminal, and a phase shifter functioning as an impedance inverter is disposed between the carrier amplifier and a combining node. When the output power is low, only the carrier amplifier operates, and when the output power exceeds a predetermined value, both the carrier amplifier and the peaking amplifier operate. When the peaking amplifier is deactivated, the load impedance of the carrier amplifier increases. Therefore, by switching between activation and deactivation of the peaking amplifier in response to changes in the power level of the input signal in digital ET mode, the Doherty amplifier can achieve a back-off of approximately 6 dB.
[0046] However, the back-off amount required for the power amplifier circuit may vary depending on, for example, the modulation scheme, the set voltage of the digital ET, and / or the target bandwidth, and therefore, depending on the specifications required for the device to which the power amplifier circuit is applied, a back-off amount greater than 6 dB may be required.
[0047] Therefore, in the power amplifier circuit 100 according to the first embodiment, two Doherty amplifiers are connected using a phase-shift line, and the peak amplifier in each Doherty amplifier is first deactivated as the power level of the input signal decreases. When the power level of the input signal further decreases, the carrier amplifier of one of the Doherty amplifiers is further deactivated. With this configuration, a back-off of 6 dB can be achieved by deactivating the peak amplifier, and an additional 6 dB can be achieved by deactivating one of the carrier amplifiers. Therefore, the power amplifier circuit 100 can achieve a total back-off of 12 dB.
[0048] 5 is a diagram illustrating the relationship between output power and efficiency in the power amplifier circuit 100 according to the first embodiment. In Fig. 5, the horizontal axis represents the power level of the output signal Pout from the power amplifier circuit 100, and the vertical axis represents the efficiency of the power amplifier circuit 100. Note that the solid line LN1 represents the efficiency in the case of the power amplifier circuit 100, and the dashed line LN2 represents the efficiency in the case of using a class AB amplifier capable of outputting the same maximum power as the power amplifier circuit 100.
[0049] In the power amplifier circuit 100, the power supply voltage Vcc from the power supply circuit 40 is switched between three stages depending on the power level of the input signal Pin. In the high output region RG1, the power supply voltage Vcc is set to V1. In the medium output region RG2, the power supply voltage Vcc is set to V2, which is lower than V1 (V1>V2). In the low output region RG3, the power supply voltage Vcc is set to V3, which is even lower than V2 (V2>V3).
[0050] In region RG1, a large amount of power is required, so both the carrier amplifier and peak amplifier of each Doherty amplifier are driven. In region RG2, the peak amplifier of each Doherty amplifier is deactivated, and only the carrier amplifier is driven. In region RG3, the carrier amplifier of one Doherty amplifier is also deactivated.
[0051] Referring to FIG. 5, when a class AB amplifier is used, the efficiency is maximized when the output power is at maximum power P0, and the efficiency gradually decreases as the output power decreases (dashed line LN2).
[0052] On the other hand, in the power amplifier circuit 100, in region RG1, the parallel operation of the carrier amplifier and peak amplifier in the two Doherty amplifiers improves efficiency compared to the case of a class AB amplifier. In region RG2, the peak amplifier of each Doherty amplifier is stopped, thereby increasing the load impedance of the carrier amplifier in each Doherty amplifier. This improves the efficiency of the carrier amplifier. In region RG3, the carrier amplifier of one Doherty amplifier is also stopped, further increasing the load impedance of the ultimately driven carrier amplifier, thereby improving the efficiency of that carrier amplifier. This allows a back-off of 12 dB to be achieved (solid line LN1).
[0053] Next, the impedance within the power amplifier circuit 100 in the operating states corresponding to the respective regions in Fig. 5 will be described with reference to Fig. 6 to Fig. 8. Fig. 6 is a diagram for explaining the impedance within the power amplifier circuit 100 in region RG1 in Fig. 5. Fig. 7 is a diagram for explaining the impedance within the power amplifier circuit 100 in region RG2 in Fig. 5. Fig. 8 is a diagram for explaining the impedance within the power amplifier circuit 100 in region RG3 in Fig. 5.
[0054] 6 to 8, an example will be described in which a high-frequency signal in the frequency band A is output, i.e., the amplifier circuit 105A and the amplifier circuit 105C are driven. In this case, as described above, the impedance when looking at the phase shift line 133 from the connection node N2C and the impedance when looking at the phase shift line 134 from the connection node N3C become open.
[0055] The load impedance of the antenna ANT is Z 0 / 2, the impedance of the output line 151 is also Z 0 / 2, the impedance when looking at the load side from the connection node N3C is also Z 0 / 2.
[0056] Since the impedance when looking at the phase shift line 134 from the connection node N3C is open, the impedance of the branch path from the connection node N3C to the amplifier circuit 105A and the impedance of the branch path from the connection node N3C to the phase shift line 132 are both Z 0 This becomes:
[0057] In the amplifier circuit 105A, the impedance of the branch path from the connection node N1A to the phase shift line 135A and the impedance of the branch path from the connection node N1A to the peak amplifier 142A are 2Z. 0 The impedance of the phase shift line 135A is also 2Z. 0 Therefore, the impedance of the carrier amplifier 141A is also 2Z 0 This becomes:
[0058] On the other hand, in the amplifier circuit 105C, the impedance of the phase shift line 132 is Z 0 / √2, the impedance when looking at the load side from the connection node N1C is Z 0 The impedance of the phase shift line 131 becomes Z 0 Therefore, the impedance when looking at the load side from the output terminals of the amplifiers 141C and 142C is Z 0 This becomes:
[0059] Generally, when amplifiers have the same size, an amplifier with a lower impedance can output more power than an amplifier with a higher impedance, so the size of amplifiers 141C and 142C in amplifier circuit 105C can be smaller than the size of amplifier circuits 105A and 105B.
[0060] 7, the peak amplifier 142A in the amplifier circuit 105A and the amplifier 141C in the amplifier circuit 105C are in a non-driven state. Therefore, in the amplifier circuit 105A, the impedance of the branch path from the connection node N1A to the phase shift line 135A is Z 0 As a result, the impedance when looking at the load side from the output terminal of the carrier amplifier 141A is 4Z. 0, and the impedance is doubled compared to the case of region RG1 in FIG.
[0061] Similarly, the impedance of the branch path from the connection node N1C to the phase shift line 131 is Z 0 As a result, the impedance seen from the output terminal of the amplifier 142C is 2Z / 2. 0 , and the impedance is doubled compared to the case of region RG1 in FIG.
[0062] Thus, in region RG2, in each of the Doherty amplifiers configured in amplifier circuit 105A and amplifier circuit 105C, the number of amplifiers is halved and the load impedance is doubled compared to the operating state in region RG1, so a back-off amount of 6 dB can be obtained.
[0063] In the case of the region RG3 in FIG. 8, the amplifier 142C of the amplifier circuit 105C is further deactivated, so that the impedance when looking at the phase shift line 132 from the connection node N3C is open. Therefore, the impedance in the branch path from the connection node N3C to the amplifier circuit 105A is Z 0 In the amplifier circuit 105A, since the peak amplifier 142A is in a non-driving state, the impedance when looking at the load side from the output terminal of the carrier amplifier 141A is 8Z. 0 That is, the impedance is doubled compared to the case of region RG2 in FIG.
[0064] In region RG3, the number of amplifiers is halved and the load impedance is doubled compared to the operating state in region RG2, so an additional 6 dB of back-off can be obtained. Therefore, compared to the operating state in region RG1, a 12 dB back-off can be obtained.
[0065] When a band B high-frequency signal is output from output terminal T2, amplifier circuit 105A is deactivated, so that in amplifier circuit 105C, the impedance seen from connection node N1C to phase shift line 132 and the impedance seen from connection node N4C to phase shift line 134 are open. This allows amplifier circuit 105C to operate as a Doherty amplifier with amplifier 141C as the carrier amplifier and amplifier 142C as the peak amplifier. Therefore, in this case as well, a back-off of 6 dB can be obtained when peak amplifier 142B of amplifier circuit 105B and amplifier 142C of amplifier circuit 105C are deactivated. Furthermore, by deactivating amplifier 141C of amplifier circuit 105C, an additional 6 dB of back-off can be obtained.
[0066] (Improvement of Robustness Against Load Fluctuations) Next, robustness when load fluctuations occur in the power amplifier circuit 100 will be described with reference to Figures 9 to 12. Note that Figures 9 to 12 also use an example in which a signal in the frequency band A is output.
[0067] As shown in Figure 6, when a high-frequency signal is output from output terminal T1, amplifier circuit 105B is set to a non-driven state, and the output terminal of the Doherty amplifier formed by amplifier circuit 105B is connected to the output terminal of amplifier circuit 105A via phase shift line 132 at connection node N3C.
[0068] The phase-shift line 132 has an electrical length of ¼ wavelength of the center frequency of the frequency bands defined by band A and band B. Therefore, the load impedance R ANT is the characteristic impedance R LWhen the load fluctuates from the load fluctuating direction, the direction of the load fluctuation at the connection node N1A, which is the output terminal of the amplifier circuit 105A, and the direction of the load fluctuation at the connection node N1C, which is the output terminal of the amplifier circuit 105C, are opposite to each other due to the phase shift line 132. As a result, in the composite signal of the output signal from the amplifier circuit 105A and the output signal from the amplifier circuit 105C, the fluctuations in output power cancel each other out, so that the fluctuations in output power due to load fluctuations are suppressed, i.e., robustness against load fluctuations is improved.
[0069] 9 and 10 are diagrams for explaining the influence of load fluctuations when the maximum power is output, i.e., when all the amplifiers included in the amplifier circuits 105A and 105C are in a driven state. ANT is the characteristic impedance R L When it becomes larger than (R L <R ANT 10 is a diagram for explaining the output state of each amplifier in the load impedance R of the antenna ANT. ANT is the characteristic impedance R L When it becomes smaller than (R ANT <R L ) is a diagram for explaining the output state of each amplifier.
[0070] 9 and 10 to 12, the left side shows the direction of variation in the load impedance at each point in the power amplifier circuit 100. The upper right side shows the variation in the output power of each amplifier in the amplifier circuit 105A, and the lower right side shows the variation in the output power of each amplifier in the amplifier circuit 105C.
[0071] In FIG. 9, the load impedance R of the antenna ANT ANT is the characteristic impedance R L When the load impedance at the connection node N3C becomes Hi due to the phase shift line 135A, the load impedance at the peak amplifier 142A becomes Lo due to the output line 151. In the amplifier circuit 105A, the load impedance at the peak amplifier 142A becomes Lo. On the other hand, the load impedance at the carrier amplifier 141A becomes Hi due to the phase shift line 135A.
[0072] In each amplifier, an increase in load impedance reduces the output power, and a decrease in load impedance increases the output power. Therefore, in the amplifier circuit 105A, as shown in the graph on the right, when the phase is between 0° and 90° and between 270° and 360°, an increase in the load reduces the output power of the carrier amplifier 141A (solid line LN11), while a decrease in the load increases the output power of the peak amplifier 142A (dashed line LN10). As a result, the power fluctuations are offset by the decrease in output power of the carrier amplifier 141A and the increase in output power of the peak amplifier 142A, and the combined output power of the amplifier circuit 105A exhibits a flat characteristic, as shown by the solid line LN12.
[0073] On the other hand, in the amplifier circuit 105C, the load impedance of the amplifier 141C becomes Hi, and the load impedance of the amplifier 142C becomes Lo due to the phase shift line 131. Therefore, in the amplifier circuit 105C, an increase in the load reduces the output power of the amplifier 141C (dashed line LN15), while a decrease in the load increases the output power of the amplifier 142C (solid line LN16). As a result, the power fluctuations are offset by the decrease in output power of the amplifier 141C and the increase in output power of the amplifier 142C, and the combined output power of the amplifier circuit 105C exhibits a flat characteristic as shown by the solid line LN17.
[0074] That is, as a result, fluctuations in output power due to load impedance fluctuations are canceled out in each of the amplifier circuits 105A and 105C, thereby suppressing fluctuations in output power of the entire power amplifier circuit 100. This makes it possible to improve robustness in response to antenna load fluctuations.
[0075] The load impedance R of the antenna ANT in FIG. ANT is the characteristic impedance R L, the load impedance fluctuations in each amplifier in the amplifier circuits 105A and 105C are opposite to those in FIG. 9. That is, as in the case where the phase of the graph on the right is between 90° and 270°, in the amplifier circuit 105A, the output power of the carrier amplifier 141A increases (solid line LN11) and the output power of the peak amplifier 142A decreases (dashed line LN10). On the other hand, in the amplifier circuit 105C, the output power of the amplifier 141C increases (dashed line LN15) and the output power of the amplifier 142C decreases (solid line LN16). As a result, in each amplifier circuit 105A and 105C, the fluctuations in output power due to the load impedance fluctuations are canceled out, as in the case of FIG. 9. Therefore, the load impedance R of the antenna ANT ANT is the characteristic impedance R L , the fluctuation in the output power of the entire power amplifier circuit 100 can be suppressed, thereby improving the robustness against the load fluctuation of the antenna.
[0076] 11 and 12 are diagrams for explaining the influence of load fluctuations when the back-off is 6 dB, i.e., when only the carrier amplifier 141A is in a driving state in the amplifier circuit 105A and when only the amplifier 142C is in a driving state in the amplifier circuit 105C. ANT is the characteristic impedance R L When it becomes larger than (R L <R ANT 12 is a diagram for explaining the output state of each amplifier in the load impedance R of the antenna ANT. ANT is the characteristic impedance R L When it becomes smaller than (R ANT <R L ) is a diagram for explaining the output state of each amplifier.
[0077] At 6 dB back-off, only one amplifier is driven in each of the amplifier circuits 105A and 105C, and therefore, output fluctuations due to load fluctuations cannot be offset in each of the amplifier circuits 105A and 105C, as shown in FIGS. 9 and 10 .
[0078] However, the direction of change in the load impedance in carrier amplifier 141A driven by amplifier circuit 105A is opposite to the direction of change in the load impedance in amplifier 142C driven by amplifier circuit 105C. Therefore, in the combined signal combined at connection node N3C, the fluctuation in output power in carrier amplifier 141A (solid line LN11) and the fluctuation in output power in amplifier 142C (solid line LN16) cancel each other out.
[0079] Therefore, even at 6 dB back-off, fluctuations in output power are canceled out between the output signals of amplifier circuit 105A and amplifier circuit 105C, thereby improving robustness against antenna load fluctuations.
[0080] During 12 dB back-off, only the carrier amplifier 141A in the amplifier circuit 105A is driven, and therefore, fluctuations in output power due to fluctuations in the antenna load cannot be suppressed.
[0081] As described above, in the power amplifier circuit of a communication device, by connecting amplifier circuits corresponding to the two different frequency bands of the output targets using a hybrid coupler of amplifier circuits shared by the two frequency bands, it is possible to switch between and output the high-frequency signals of the two different frequency bands without using a switch.
[0082] Furthermore, by configuring the two amplifier circuits used when outputting signals as Doherty amplifiers, it is possible to achieve a back-off amount of 6 dB or more and improve robustness against antenna load fluctuations.
[0083] The "amplifier circuit 105A," "amplifier circuit 105C," and "amplifier circuit 105B" in the first embodiment correspond to the "first amplifier circuit," "second amplifier circuit," and "third amplifier circuit," respectively, in the present disclosure. The "output terminal T1" and "output terminal T2" in the first embodiment correspond to the "first output terminal" and "second output terminal," respectively, in the present disclosure. The "output line 151" and "output line 152" in the first embodiment correspond to the "first output line" and "second output line," respectively, in the present disclosure. The "carrier amplifier 141A" and "carrier amplifier 141B" in the first embodiment correspond to the "first carrier amplifier" and "second carrier amplifier," respectively, in the present disclosure. The "peak amplifier 142A" and "peak amplifier 142B" in the first embodiment correspond to the "first peak amplifier" and "second peak amplifier," respectively, in the present disclosure. The "phase shift line 135A" and the "phase shift line 135B" in the first embodiment correspond to the "first phase shift line" and the "second phase shift line" in the present disclosure, respectively. The "amplifier 141C" and the "amplifier 142C" in the first embodiment correspond to the "first amplifier" and the "second amplifier" in the present disclosure, respectively. The "phase shift line 131" to the "phase shift line 134" in the first embodiment correspond to the "first line" to the "fourth line" in the present disclosure, respectively. The "connection node N1C" to the "connection node N4C" in the first embodiment correspond to the "first connection node" to the "fourth connection node" in the present disclosure, respectively.
[0084] Second Embodiment In a second embodiment, a different configuration of the amplifier circuits 105A and 105B from the first embodiment will be described.
[0085] 13 to 15 are diagrams illustrating the configuration of a power amplifier circuit 100A used in a transmitter circuit according to embodiment 2, and the impedance of each amplifier at maximum power output and back-off. Fig. 13 shows the state at maximum power output, Fig. 14 shows the state at 6 dB back-off, and Fig. 15 shows the state at 12 dB back-off.
[0086] In the power amplifier circuit 100A, the amplifier circuits 105A and 105B in the power amplifier circuit 100 of the first embodiment are replaced with amplifier circuits 106A and 106B. In the following explanation, an example will be described in which a high frequency signal of band A is output from the output terminal T1.
[0087] 13, amplifier circuit 106A includes a transformer TRA and phase shift lines 136A and 137A instead of phase shift line 135A in amplifier circuit 105A. Similarly, amplifier circuit 106B includes a transformer TRB and phase shift lines 136B and 137B instead of phase shift line 135B in amplifier circuit 105B.
[0088] In the amplifier circuit 106A, the transformer TRA has a turn ratio of 1:m between the primary winding and the secondary winding. One end of the primary winding of the transformer TRA is connected to the output terminal of the carrier amplifier 141A. The other end of the primary winding is connected to the output terminal of the peak amplifier 142A via the phase shift line 136A.
[0089] One end of the secondary winding of the transformer TRA is connected to a connection node N3C in the amplifier circuit 105C via a phase shift line 137A, and the other end of the secondary winding is connected to the ground potential GND.
[0090] In the amplifier circuit 106B, the transformer TRB has a turn ratio of 1:m between the primary winding and the secondary winding. One end of the primary winding of the transformer TRB is connected to the output terminal of the carrier amplifier 141B. The other end of the primary winding is connected to the output terminal of the peak amplifier 142B via the phase shift line 136B.
[0091] One end of the secondary winding of the transformer TRB is connected to a connection node N4C in the amplifier circuit 105C via a phase shift line 137B, and the other end of the secondary winding is connected to the ground potential GND.
[0092] Here, each of the phase shift lines 136A and 137A has an electrical length corresponding to a quarter wavelength of the center frequency of the frequency band A. Also, each of the phase shift lines 136B and 137B has an electrical length corresponding to a quarter wavelength of the center frequency of the frequency band B. When the impedance of the antenna ANT is Z 0 / 2, the impedance of the phase shift lines 136A and 136B is Z 0 The impedance of the phase shift lines 137A and 137B is set to (√2)×Z 0 is set to
[0093] In the power amplifier circuit 100A, the amplifier circuits 106A and 106B are connected to the amplifier circuit 105C using transformers TRA and TRB. As a result, the output signals of the Doherty amplifiers, which are configured as carrier amplifiers and peak amplifiers in the amplifier circuits 106A and 106B, respectively, are voltage-combined in the amplifier circuit 105C.
[0094] As shown in Figure 13, when a high frequency signal from band A is output at maximum power, the amplifiers included in amplifier circuits 106A and 106C are driven, and amplifier circuit 106B is not driven. At this time, the impedance when looking at the load side from the output terminals of carrier amplifier 141A and peak amplifier 142A in amplifier circuit 106A is Z 0 / m 2 On the other hand, the impedance when looking at the load side from the output terminals of the amplifiers 141C and 142C in the amplifier circuit 105C is Z 0 This becomes:
[0095] 14, the peak amplifier 142A of the amplifier circuit 106A and the amplifier 141C of the amplifier circuit 105C are in a non-driving state. As a result, the impedance when looking at the load side from the output terminal of the carrier amplifier 141A in the amplifier circuit 106A is 2Z. 0 / m 2 On the other hand, the impedance when looking at the load side from the output terminal of the amplifier 142C in the amplifier circuit 105C is 2Z 0That is, in amplifier circuit 106A and amplifier circuit 105C, the number of amplifiers used is reduced by half compared to the case of Fig. 13, and the impedance of carrier amplifier 141A and amplifier 142C used is doubled, so that a back-off amount of 6 dB can be achieved.
[0096] 15, in the case of 12 dB back-off, the peak amplifier 142A of the amplifier circuit 106A is in a non-driving state, and the amplifier circuits 105C and 106B are in a non-driving state. In other words, in the power amplifier circuit 100A, only the amplifier 141C of the amplifier circuit 106A is in a driving state. In this case, the impedance when looking at the load side from the output terminal of the carrier amplifier 141A is 4Z. 0 / m 2 This impedance is twice the impedance in the case of FIG. 14 and four times the impedance in the case of FIG. 13. That is, in the amplifier circuit 106A, the number of amplifiers used is halved compared to the case of FIG. 14, and the impedance of each amplifier driven is doubled. This makes it possible to obtain an additional 6 dB of back-off, which is 12 dB more than the case of FIG. 13.
[0097] [Embodiment 3] In the first and second embodiments, a dual-band type configuration is used in which high-frequency signals in two different frequency bands are output. However, the features of the present disclosure are also applicable to a single-band type configuration in which high-frequency signals in one frequency band are output.
[0098] 16 is a diagram showing the configuration of a power amplifier circuit 100B used in a transmission circuit according to the third embodiment. The power amplifier circuit 100B has a configuration in which the circuit corresponding to band B in the power amplifier circuit 100 of the first embodiment shown in FIG. 2 is deleted. Specifically, the hybrid coupler 120B, the amplifier circuit 105B, and the output line 152 in the branch circuit 115 are deleted. Furthermore, the connection node N4C in the hybrid coupler 130 of the amplifier circuit 105C is connected to the ground potential GND. This results in a configuration equivalent to that shown in FIG. 3.
[0099] In the power amplifier circuit 100B, the power supply voltage Vcc is switched in accordance with the power level of the input signal Pin, and the drive states of the peak amplifier 142A in the amplifier circuit 105A and the amplifiers 141C and 142C in the amplifier circuit 105C are switched as described in FIGS. 7 and 8, thereby achieving a back-off amount of 12 dB and improving the robustness of the antenna ANT against load fluctuations.
[0100] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the description of the above embodiments, and is intended to include all modifications within the meaning and scope of the claims.
[0101] 1 Communication device, 10 Transmission circuit, 20 BBIC, 30 RFIC, 40 Power supply circuit, 50 Bias control circuit, 100, 100A, 100B Power amplifier circuit, 105A to 105C, 106A, 106B Amplifier circuit, 110 Phase shift circuit, 115 Branch circuit, 120A, 120B, 130 Hybrid coupler, 131 to 134, 135A, 135B, 136A, 136B, 137A, 137B Phase shift line, 141A, 141B Carrier amplifier, 141C, 142C Amplifier, 142A, 142B Peak amplifier, 151, 152 Output line, 410 MPC, 420 Power supply selection circuit, 430 Digital ET, ANT Antenna, GND Ground potential, N1A, N1B, N1C to N4C connection nodes, SP1, SP2 power supply points, T0, T3, T4 input terminals, T1, T2 output terminals, TRA, TRB transformers, VB battery voltage, Vcc power supply voltage.
Claims
1. A transmitting circuit for amplifying a high frequency signal and transmitting it to a radiating element, comprising: an input terminal for receiving a high frequency signal; a first output terminal for connecting to the radiating element; a first amplifier circuit and a second amplifier circuit for amplifying the high frequency signal received at the input terminal; and a first output line for transmitting an output signal from the first amplifier circuit to the first output terminal, wherein the first amplifier circuit is a Doherty amplifier including a first carrier amplifier, a first peak amplifier, and a first phase shift line connected between the output terminal of the first carrier amplifier and the output terminal of the first peak amplifier, wherein the second amplifier circuit includes a first amplifier, a second amplifier, and a hybrid coupler, wherein the hybrid coupler includes a first line, a second line, a third line, and a fourth line connected in a ring, wherein the output terminal of the first amplifier is connected to a first connection node between the first line and the second line, and the output terminal of the second amplifier is connected to a second connection node between the first line and the third line, an output terminal of the first peak amplifier and the first output line are connected to a third connection node between the second line and the fourth line, and drive states of the first peak amplifier, the first amplifier, and the second amplifier are switched according to a power level of an input signal.
2. The transmitter circuit according to claim 1, further comprising: a second output terminal; a third amplifier circuit; and a second output line that transmits an output signal from the third amplifier circuit to the second output terminal, wherein the third amplifier circuit is a Doherty amplifier including a second carrier amplifier, a second peak amplifier, and a second phase shift line connected between the output end of the second carrier amplifier and the output end of the second peak amplifier, wherein the output end of the second peak amplifier and the second output line are connected to a fourth connection node between the third line and the fourth line, and wherein the drive states of the second peak amplifier, the first amplifier, and the second amplifier are switched according to the power level of the input signal.
3. The transmission circuit of claim 2, wherein the radiating element is configured to be capable of radiating radio waves corresponding to two high-frequency signals having different frequency bands, and when radiating radio waves corresponding to a high-frequency signal of a first frequency band, the high-frequency signal of the first frequency band is supplied to the first amplifier circuit and the second amplifier circuit, and the third amplifier circuit is not driven, and when radiating radio waves corresponding to a high-frequency signal of a second frequency band, the high-frequency signal of the second frequency band is supplied to the second amplifier circuit and the third amplifier circuit, and the first amplifier circuit is not driven.
4. The transmitter circuit according to claim 3, further comprising a branching circuit for branching the high-frequency signal received at the input terminal to each amplifier circuit, wherein the branching circuit, when radiating radio waves in the first frequency band, supplies to the first carrier amplifier and the first amplifier a signal that is 90° phase-advanced with respect to the signal to be supplied to the first peak amplifier, and supplies to the second amplifier a signal that is 180° phase-advanced with respect to the signal to be supplied to the first peak amplifier, and when radiating radio waves in the second frequency band, supplies to the second carrier amplifier and the second amplifier a signal that is 90° phase-advanced with respect to the signal to be supplied to the second peak amplifier, and supplies to the first amplifier a signal that is 180° phase-advanced with respect to the signal to be supplied to the second peak amplifier.
5. The transmission circuit of claim 4, wherein, when emitting radio waves in the first frequency band, if the power level of the input signal is equal to or greater than a first threshold, the first carrier amplifier, the first peak amplifier, the first amplifier, and the second amplifier are driven, and if the power level of the input signal is less than the first threshold and equal to or greater than a second threshold, the first carrier amplifier and the second amplifier are driven, while the first peak amplifier and the first amplifier are not driven.
6. A transmission circuit as described in claim 5, wherein, when emitting radio waves in the first frequency band, if the power level of the input signal is less than the second threshold, the first carrier amplifier is driven, while the first peak amplifier, the first amplifier, and the second amplifier are not driven.
7. The transmission circuit of claim 4, wherein, when emitting radio waves in the second frequency band, if the power level of the input signal is equal to or greater than a first threshold, the second carrier amplifier, the second peak amplifier, the first amplifier, and the second amplifier are driven, and if the power level of the input signal is less than the first threshold and equal to or greater than a second threshold, the second carrier amplifier and the first amplifier are driven, while the second peak amplifier and the second amplifier are not driven.
8. A transmission circuit as described in claim 7, wherein, when emitting radio waves in the second frequency band, if the power level of the input signal is less than the second threshold, the second carrier amplifier is driven, while the second peak amplifier, the first amplifier, and the second amplifier are not driven.
9. A communication device comprising: a transmission circuit according to any one of claims 1 to 8; a signal processing circuit for processing a high-frequency signal to be supplied to said transmission circuit; and said radiating element for emitting the high-frequency signal amplified by said transmission circuit as a radio wave.
Citation Information
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