Surge current suppression circuit and power supply apparatus
By designing the current detection module and the slow start capacitor module in the inrush current suppression circuit, the slow start time is adaptively adjusted, which solves the inrush current problem when the server power supply device is powered on, and a stable and fast power supply process is achieved.
Patent Information
- Application Number
- PCT/CN2024/122619
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-02-28
- Filing Date
- 2024-09-30
- Publication Date
- 2025-09-04
AI Technical Summary
When the server power supply device is powered on, the inrush current will cause shock and electromagnetic interference to the power supply. It is difficult for the prior art to adjust the slow start time adaptively according to the magnitude of the input current to effectively suppress the inrush current.
A surge current suppression circuit is designed, including a current detection module, a first controllable switch, a slow start capacitor module and a slow start capacitor charging module. The input current is collected through the current detection module, the total capacitance value and charging speed of the slow start capacitor are adjusted, and the slow start time is adaptively adjusted.
Adaptive adjustment according to the input current magnitude is realized, inrush current is suppressed more timely, and power supply stability and speed are ensured.
Smart Images

Figure CN2024122619_04092025_PF_FP_ABST
Abstract
Description
Surge current suppression circuit and power supply device
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to the Chinese patent application filed with the Patent Office of China on February 28, 2024, with application number 202410220299.5 and application name “A Surge Current Suppression Circuit and Power Supply Device”, the entire contents of which are incorporated herein by reference. Technical Field
[0003] The present application relates to the field of power supplies, and in particular to a surge current suppression circuit and a power supply device. Background Art
[0004] When a server uses its own power supply to power loads such as the motherboard, the power supply must convert the external input voltage into the required supply voltage for each load. Because the input voltage is relatively high, capacitors are required for filtering and voltage stabilization. When the power supply is powered on, the instantaneous charging of the capacitors generates a surge current, which can impact and drop the power supply providing the input voltage, potentially causing electromagnetic interference. To avoid these adverse effects, an inrush current suppression circuit is required within the power supply to enable a slow startup.
[0005] Summary of the Invention
[0006] The purpose of this application is to provide an inrush current suppression circuit and a power supply device, which can suppress the inrush current while adaptively adjusting the slow start time according to the size of the input current, so as to suppress the inrush current more timely and ensure stable power supply.
[0007] To solve the above technical problems, the present application provides an inrush current suppression circuit, comprising a current detection module, a first controllable switch, a slow-start capacitor module, and a slow-start capacitor charging module;
[0008] The first end of the current detection module is arranged between the input end of the inrush current suppression circuit and the first end of the first controllable switch, the second end and the third end of the current detection module are connected to the slow-start capacitor module and the slow-start capacitor charging module respectively, and the second end of the first controllable switch serves as the output end of the inrush current suppression circuit;
[0009] The slow-start capacitor charging module is used to charge the slow-start capacitor module so that the first controllable switch changes from an off state to an on state after the slow-start capacitor module is charged to a preset voltage;
[0010] The current detection module is used to collect the input current of the input end of the inrush current suppression circuit, and adjust the total capacitance value of the slow-start capacitor module according to the magnitude of the input current, or adjust the charging speed of the slow-start capacitor charging module for charging the slow-start capacitor module, so as to adjust the slow-start time required for the first controllable switch to change from the off state to the on state.
[0011] In some embodiments, the current detection module is specifically used to collect the input current; when the input current is greater than a first current threshold, the total capacitance value of the slow-start capacitor module is increased to extend the slow-start time; when the input current is less than a second current threshold, the slow-start capacitor charging module is accelerated to charge the slow-start capacitor module to shorten the slow-start time.
[0012] In some embodiments, the slow-start capacitor module includes a first capacitor, at least one second capacitor, and a second controllable switch corresponding to each second capacitor.
[0013] The control end of each second controllable switch is connected to the second end of the current detection module. The second controllable switches are connected in series with the second capacitors in a one-to-one correspondence, and the series circuit is connected in parallel with the first capacitor.
[0014] In some embodiments, the slow-start capacitor charging module includes a first resistor, a second resistor, at least one third resistor, and a third controllable switch corresponding to each of the third resistors.
[0015] The control end of each of the third controllable switches is connected to the third end of the current detection module, the third controllable switches are connected in series with the third resistors in a one-to-one correspondence, the series circuit is connected in parallel with the second resistor, the first end of the second resistor is connected to the first end of the first resistor, the second end of the second resistor is grounded, and the first resistor is connected in parallel with the first capacitor.
[0016] In some embodiments, the current detection module includes a fourth resistor, a current sensor, and a processing module;
[0017] The fourth resistor is provided between the input end of the inrush current suppression circuit and the first end of the first controllable switch, the first end of the current sensor is connected to the fourth resistor, the second end of the current sensor is connected to the first end of the processing module, the second end of the processing module is connected to the control end of each of the second controllable switches, and the third end of the processing module is connected to the control end of each of the third controllable switches;
[0018] The current sensor is used to determine the input current according to the current on the fourth resistor;
[0019] The processing module is specifically configured to control each of the second controllable switches in the slow-start capacitor module to be turned on when the input current is greater than the first current threshold; and to control each of the third controllable switches in the slow-start capacitor charging module to be turned on when the input current is less than the second current threshold.
[0020] In some embodiments, the first controllable switch is a first PMOS, the second controllable switch is a first NMOS, and the third controllable switch is a second NMOS;
[0021] The gate of the first PMOS serves as the control terminal of the first controllable switch, the source of the first PMOS serves as the first terminal of the first controllable switch, and the drain of the first PMOS serves as the second terminal of the first controllable switch;
[0022] The gate of the first NMOS serves as the control terminal of the second controllable switch, the source of each first NMOS is connected to each second capacitor in a one-to-one correspondence, and the drain of each first NMOS is connected to the first capacitor;
[0023] The gate of the second NMOS serves as the control end of the third controllable switch, the drain of each second NMOS is connected to the first end of the first resistor, and the source of each second NMOS is connected to each third resistor in a one-to-one correspondence.
[0024] In some embodiments, the processing module is specifically used to output a high level to the gate of each first NMOS and a low level to the gate of each second NMOS when the input current is greater than the first current threshold, so as to increase the total capacitance value of the slow-start capacitor module; when the input current is less than the second current threshold, output a low level to the gate of each first NMOS and a high level to the gate of each second NMOS, so as to speed up the charging speed of the slow-start capacitor charging module for the slow-start capacitor module.
[0025] In some embodiments, the processing module is further configured to control each of the second controllable switches and each of the third controllable switches to be disconnected when it is detected that the input current is between the first current threshold and the second current threshold.
[0026] In some embodiments, the first controllable switch is a first PMOS, the second controllable switch is a first NMOS, and the third controllable switch is a second NMOS;
[0027] When detecting that the input current is between the first current threshold and the second current threshold, controlling each of the second controllable switches and each of the third controllable switches to be disconnected includes:
[0028] When it is detected that the input current is between the first current threshold and the second current threshold, a low level is output to the gates of the first NMOSs and the gates of the second NMOSs.
[0029] In some embodiments, the first current threshold is the product of the maximum drain-source pulse current of the first controllable switch and a first percentage, the second current threshold is the product of the maximum drain-source pulse current of the first controllable switch and a second percentage, and the first percentage is greater than the second percentage.
[0030] In some embodiments, further comprising an energy absorption module;
[0031] The first end of the energy absorption module is arranged between the input end of the inrush current suppression circuit and the first end of the first controllable switch, and the second end of the energy absorption module is grounded.
[0032] In some embodiments, the energy absorption module is a transient voltage suppression diode;
[0033] The anode of the transient voltage suppression diode is grounded, and the cathode of the transient voltage suppression diode is arranged between the input end of the surge current suppression circuit and the first end of the first controllable switch.
[0034] In some embodiments, the current detection module is specifically used to collect the real-time current value of the input end of the inrush current suppression circuit within a preset time, and use the maximum real-time current value within the preset time as the input current;
[0035] The total capacitance value of the slow-start capacitor module is adjusted according to the magnitude of the input current, or the charging speed of the slow-start capacitor charging module for charging the slow-start capacitor module is adjusted to adjust the slow-start time required for the first controllable switch to change from the off state to the on state.
[0036] In some embodiments, the current detection module is further configured to determine whether a configuration change signal is received before collecting the input current of the input terminal of the inrush current suppression circuit;
[0037] In response to not receiving the configuration change signal, adjusting the total capacitance value of the slow-start capacitor module to the historical total capacitance value last set for the slow-start capacitor module, and adjusting the charging speed of the slow-start capacitor charging module to the historical charging speed last set for the slow-start capacitor charging module;
[0038] In response to receiving a configuration change signal, the input current of the input end of the inrush current suppression circuit is collected and the total capacitance value of the slow-start capacitor module is adjusted according to the magnitude of the input current, or the charging speed of the slow-start capacitor charging module for charging the slow-start capacitor module is adjusted to adjust the slow-start time required for the first controllable switch to change from the off state to the on state.
[0039] To solve the above technical problems, the present application also provides a power supply device, comprising any of the above-mentioned inrush current suppression circuits, and further comprising a voltage conversion module connected to the inrush current suppression circuit;
[0040] The voltage conversion module is used to convert the voltage output by the inrush current suppression circuit into a voltage required by a load.
[0041] The beneficial effect of the present application is to provide an inrush current suppression circuit and a power supply device, including a current detection module, a first controllable switch, a slow-start capacitor module and a slow-start capacitor charging module. The slow-start capacitor charging module is used to charge the slow-start capacitor module, and the first controllable switch changes from an off state to an on state after the slow-start capacitor charging module is charged to a preset voltage. The current detection module collects the input current at the input end of the inrush current suppression circuit, adjusts the total capacitance value of the slow-start capacitor module according to the magnitude of the input current, or adjusts the charging speed of the slow-start capacitor charging module to charge the slow-start capacitor module, thereby changing the slow-start time required for the first controllable switch to change from off to on. While suppressing the inrush current, the present application can adaptively adjust the slow-start time according to the magnitude of the input current, so that the surge current can be suppressed more timely and the power supply can be guaranteed to be stable. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0043] FIG1 is a first circuit diagram of an inrush current suppression circuit provided by the present application;
[0044] FIG2 is a transfer characteristic curve diagram of a MOS tube;
[0045] FIG3 is a schematic diagram of a current threshold in an inrush current suppression circuit provided by the present application;
[0046] FIG4 is a flow chart of an inrush current suppression circuit provided by the present application for implementing inrush current suppression;
[0047] FIG5 is a second circuit diagram of an inrush current suppression circuit provided by the present application. DETAILED DESCRIPTION
[0048] The core of this application is to provide an inrush current suppression circuit and a power supply device, which can adaptively adjust the slow start time according to the size of the input current while suppressing the inrush current, so as to suppress the inrush current more timely and ensure stable power supply.
[0049] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0050] Please refer to FIG1 , which is a first circuit diagram of an inrush current suppression circuit provided by the present application. The inrush current suppression circuit includes a current detection module 1 , a first controllable switch Q1 , a slow-start capacitor module 2 , and a slow-start capacitor charging module 3 ;
[0051] The first end of the current detection module 1 is arranged between the input end of the inrush current suppression circuit and the first end of the first controllable switch Q1. The second end and the third end of the current detection module 1 are connected to the slow-start capacitor module 2 and the slow-start capacitor charging module 3 respectively. The second end of the first controllable switch Q1 serves as the output end of the inrush current suppression circuit.
[0052] The slow-start capacitor charging module 3 is used to charge the slow-start capacitor module 2 so that the first controllable switch Q1 changes from an off state to an on state after the slow-start capacitor module 2 is charged to a preset voltage;
[0053] The current detection module 1 is used to collect the input current of the input end of the surge current suppression circuit, and adjust the total capacitance value of the slow-start capacitor module 2 according to the size of the input current, or adjust the charging speed of the slow-start capacitor charging module 3 to charge the slow-start capacitor module 2, so as to adjust the slow-start time required for the first controllable switch Q1 to change from the off state to the on state.
[0054] In order to suppress the inrush current when the power supply device is powered on and realize the slow start of the power supply device, the present application provides an inrush current suppression circuit. And the present application further considers that when the size of the inrush current is different, the requirements for the slow start time of the power supply device are also different. For example, when the inrush current is relatively large, the slow start time of the power supply device should be extended to more effectively suppress the inrush current; when the inrush current is relatively small, the slow start time of the power supply device can be shortened, thereby increasing the speed at which the power supply device supplies power to the load. Therefore, the inrush current suppression circuit provided by the present application can also adaptively adjust the slow start time according to the size of the inrush current, and the suppression of the inrush current is more targeted.
[0055] The present application considers that the slow-start time of the power supply device is the time required for the first controllable switch Q1 to switch from an off state to an on state. Therefore, the slow-start time can be indirectly adjusted by adjusting factors that affect the conduction of the first controllable switch Q1. Referring to FIG2 , FIG2 is a transfer characteristic curve of a MOS transistor, where Ids is the current between the drain and source of the MOS transistor, Vgs is the voltage between the gate and source of the MOS transistor, and Vth is the voltage threshold. Taking the first controllable switch Q1 as an example, when the voltage difference Vgs between the gate and source of the MOS transistor is less than the voltage threshold Vth, the equivalent resistance between the drain and source of the MOS transistor is very large, equivalent to an open circuit, and the MOS transistor is in the off state. When the voltage difference Vgs between the gate and source of the MOS transistor reaches the voltage threshold Vth, the equivalent resistance between the drain and source of the MOS transistor begins to decrease rapidly. When the voltage difference Vgs between the gate and source of the MOS transistor reaches a certain value, the equivalent resistance between the drain and source of the MOS transistor is very small, equivalent to a short circuit, and the MOS transistor is in the on state. It can be seen that the voltage difference Vgs between the gate and source of the MOS transistor is a factor that affects its conduction. Therefore, the slow start time can be changed by changing the time for charging the gate and source of the MOS transistor.
[0056] In the inrush current suppression circuit provided by the present application, the slow-start capacitor module 2 is charged by the slow-start capacitor charging module 3. When the slow-start capacitor module 2 is charged to a preset voltage, the first controllable switch Q1 switches from an off state to an on state. Therefore, by changing the time it takes for the slow-start capacitor module 2 to charge to the preset voltage, the slow-start time of the power supply device can be changed. Through analysis, the present application concludes that the charging of the slow-start capacitor module 2 to the preset voltage is related to two factors: one factor is the total capacitance of the slow-start capacitor module 2 itself, and the other factor is the charging speed at which the slow-start capacitor charging module 3 charges the slow-start capacitor module 2. If the charging speed of the slow-start capacitor charging module 3 for charging the slow-start capacitor module 2 remains unchanged, the greater the total capacitance of the slow-start capacitor module 2, the longer it takes to charge the slow-start capacitor module 2 to the preset voltage, and accordingly, the longer the slow-start time. If the total capacitance of the slow-start capacitor module 2 remains unchanged, the faster the charging speed of the slow-start capacitor charging module 3 for charging the slow-start capacitor module 2, the shorter the time it takes for the slow-start capacitor module 2 to reach the preset voltage, and accordingly, the shorter the slow-start time.
[0057] Based on the above considerations, the present application provides an inrush current suppression circuit, which includes a current detection module 1, a first controllable switch Q1, a slow-start capacitor module 2, and a slow-start capacitor charging module 3. Please refer to Figure 1, which is a first circuit diagram of an inrush current suppression circuit provided by the present application. In Figure 1, Vin is the voltage input to the input end of the inrush current suppression circuit, and Vout is the voltage output from the output end of the inrush current suppression circuit. The total capacitance value of the slow-start capacitor module 2 and the charging speed of the slow-start capacitor charging module 3 for charging the slow-start capacitor are both adjustable. The first end of the current detection module 1 is arranged between the input end of the inrush current suppression circuit and the first end of the first controllable switch Q1, so that the current detection module 1 collects the input current of the input end of the inrush current suppression circuit, that is, the inrush current. The second end and the third end of the current detection module 1 are respectively connected to the slow-start capacitor module 2 and the slow-start capacitor charging module 3, so as to adjust the total capacitance value of the slow-start capacitor module 2 and the charging speed of the slow-start capacitor charging module 3 for charging the slow-start capacitor.
[0058] After the inrush current suppression circuit is powered on, the current detection module 1 begins to collect the input current of the input end of the inrush current suppression circuit, and adjusts the total capacitance value of the slow-start capacitor module 2 according to the magnitude of the input current, or adjusts the charging speed of the slow-start capacitor charging module 3 for charging the slow-start capacitor module 2, so as to adjust the slow-start time required for the first controllable switch Q1 to change from the off state to the on state. For example, when the input current is relatively large, the total capacitance value of the slow-start capacitor module 2 is increased to extend the slow-start time, thereby more effectively suppressing the inrush current; when the input current is relatively small, the charging speed of the slow-start capacitor charging module 3 for charging the slow-start capacitor module 2 is accelerated to shorten the slow-start time of the power supply device, thereby increasing the speed at which the power supply device supplies power to the load, that is, the slow-start time is adaptively adjusted according to the magnitude of the inrush current, so that the suppression of the inrush current is more targeted.
[0059] In summary, the present application provides an inrush current suppression circuit, comprising a current detection module 1, a first controllable switch Q1, a slow-start capacitor module 2 and a slow-start capacitor charging module 3. The slow-start capacitor charging module 3 is used to charge the slow-start capacitor module 2, and the first controllable switch Q1 changes from an off state to an on state after the slow-start capacitor charging module 3 is charged to a preset voltage. The current detection module 1 collects the input current at the input end of the inrush current suppression circuit, adjusts the total capacitance value of the slow-start capacitor module 2 according to the magnitude of the input current, or adjusts the charging speed of the slow-start capacitor charging module 3 to charge the slow-start capacitor module 2, thereby changing the slow-start time required for the first controllable switch Q1 to change from off to on. While suppressing the inrush current, the present application can adaptively adjust the slow-start time according to the magnitude of the input current, so that the inrush current can be suppressed more timely, thereby ensuring stable power supply.
[0060] Based on the above embodiment:
[0061] On the other hand, the current detection module 1 is specifically used to collect the input current; when the input current is greater than the first current threshold, the total capacitance value of the slow-start capacitor module 2 is increased to extend the slow-start time; when the input current is less than the second current threshold, the slow-start capacitor charging module 3 is accelerated to charge the slow-start capacitor module 2 to shorten the slow-start time.
[0062] In this embodiment, the specific current detection module 1 uses a pre-set first current threshold and a second current threshold to determine whether the input current of the inrush current suppression circuit is too large or too small. When the input current is greater than the first current threshold, it is considered that the input current is too large, so the total capacitance value of the slow-start capacitor module 2 is increased to extend the slow-start time, thereby more effectively suppressing the inrush current. When the input current is less than the second current threshold, it is considered that the input current is too small, so the slow-start capacitor charging module 3 is accelerated to charge the slow-start capacitor module 2, so as to shorten the slow-start time, thereby increasing the speed at which the power supply device supplies power to the load.
[0063] In addition, please refer to Figure 3, which is a schematic diagram of current thresholds in an inrush current suppression circuit provided by the present application. In Figure 3, Y1 is the first current threshold, Y2 is the second current threshold, I is the magnitude of the drain-source pulse current of the first controllable switch Q1, and t is time. The first current threshold and the second current threshold can be set based on the maximum drain-source pulse current of the first controllable switch Q1 to optimize the inrush current suppression effect. For example, the first current threshold is set to the product of the maximum drain-source pulse current of the first controllable switch Q1 and a first percentage, and the second current threshold is set to the product of the maximum drain-source pulse current of the first controllable switch Q1 and a second percentage, and the first percentage is greater than the second percentage. The first percentage can be set to 80%, and the second percentage can be set to 20%.
[0064] On the other hand, the slow-start capacitor module 2 includes a first capacitor C1, at least one second capacitor C2, and a second controllable switch Q2 corresponding to each second capacitor C2.
[0065] The control end of each second controllable switch Q2 is connected to the second end of the current detection module 1 . The second controllable switches Q2 and the second capacitors C2 are connected in series one by one, and the series circuit is connected in parallel with the first capacitor C1 .
[0066] Please refer to Figure 1, which is a first circuit diagram of an inrush current suppression circuit provided by this application. Figure 1 uses a single second capacitor C2 as an example. To achieve adjustable total capacitance of a slow-start capacitor module 2, this embodiment provides a slow-start capacitor module 2 comprising a first capacitor C1, a second capacitor C2, and a second controllable switch Q2. The second capacitors C2 and the second controllable switches Q2 correspond one-to-one, and the circuit formed by the second capacitors C2 and the second controllable switches Q2 connected in series is then connected in parallel with the first capacitor C1. When the current detection module 1 controls the second controllable switches Q2 to be off, the total capacitance of the slow-start capacitor module 2 equals the capacitance of the first capacitor C1. When the current detection module 1 controls the second controllable switches Q2 to be on, each second capacitor C2 is connected in parallel with the first capacitor C1, thereby increasing the total capacitance of the slow-start capacitor module 2. Furthermore, the more second controllable switches Q2 that are turned on in the slow-start capacitor module 2, the greater the total capacitance of the slow-start capacitor module 2. The number of second capacitors C2 and second controllable switches Q2 can be set according to actual needs and is not limited by this application. In summary, this embodiment provides a slow-start capacitor module 2 with an adjustable total capacitance value, so as to adjust the slow-start time. Moreover, the slow-start capacitor module 2 has a simple circuit structure, low cost, and is easy to implement.
[0067] On the other hand, the slow-start capacitor charging module 3 includes a first resistor R1, a second resistor R2, at least one third resistor R3, and a third controllable switch Q3 corresponding to each third resistor R3;
[0068] The control end of each third controllable switch Q3 is connected to the third end of the current detection module 1. The third controllable switch Q3 and the third resistor R3 are connected in series one by one. The series circuit is connected in parallel with the second resistor R2. The first end of the second resistor R2 is connected to the first end of the first resistor R1, the second end of the second resistor R2 is grounded, and the first resistor R1 is connected in parallel with the first capacitor C1.
[0069] Please refer to Figure 1, which is a first circuit diagram of an inrush current suppression circuit provided by this application. Figure 1 uses a third resistor R3 as an example. To enable the slow-start capacitor charging module 3 to adjust the charging speed of the slow-start capacitor module 2, this embodiment provides a slow-start capacitor charging module 3 comprising a first resistor R1, a second resistor R2, a third resistor R3, and a third controllable switch Q3. The third resistor R3 corresponds one-to-one with the third controllable switch Q3. The circuit formed by the third resistor R3 and the third controllable switch Q3 in series is then connected in parallel with the second resistor R2. The first resistor R1 is equivalent to the first voltage divider branch, and the second resistor R2 and the third resistor R3 connected in parallel with the second resistor R2 are equivalent to the second voltage divider branch. The slow-start capacitor module 2 is connected in parallel with the first voltage divider branch to achieve charging. The more third resistors R3 are connected in parallel with the second resistor R2, the smaller the equivalent resistance of the second voltage divider branch, resulting in a greater voltage divider in the first voltage divider branch, thereby accelerating the charging speed of the slow-start capacitor module 2. The number of the third resistor R3 and the third controllable switch Q3 can be set according to actual needs and is not limited in this application. In summary, this embodiment provides a slow-start capacitor charging module 3 with an adjustable total capacitance value to adjust the slow-start time, and the slow-start capacitor charging module 3 has a simple circuit structure, low cost, and is easy to implement.
[0070] On the other hand, the current detection module 1 includes a fourth resistor R4, a current sensor and a processing module;
[0071] The fourth resistor R4 is provided between the input terminal of the inrush current suppression circuit and the first terminal of the first controllable switch Q1. The first terminal of the current sensor is connected to the fourth resistor R4. The second terminal of the current sensor is connected to the first terminal of the processing module. The second terminal of the processing module is connected to the control terminal of each second controllable switch Q2. The third terminal of the processing module is connected to the control terminal of each third controllable switch Q3.
[0072] The current sensor is used to determine the input current according to the current on the fourth resistor R4;
[0073] The processing module is specifically configured to control each second controllable switch Q2 in the slow-start capacitor module 2 to be turned on when the input current is greater than the first current threshold; and to control each third controllable switch Q3 in the slow-start capacitor charging module 3 to be turned on when the input current is less than the second current threshold.
[0074] Please refer to Figure 1, which is a first circuit diagram of an inrush current suppression circuit provided by the present application. This embodiment provides a current detection module 1 comprising a fourth resistor R4, a current sensor, and a processing module. The fourth resistor R4 is disposed between the input end of the inrush current suppression circuit and the first end of the first controllable switch Q1, so that the current sensor treats the current flowing through the fourth resistor R4 as the input current and outputs the input current to the processing module. When the input current is greater than a first current threshold, the processing module controls each second controllable switch Q2 in the slow-start capacitor module 2 to conduct, thereby increasing the total capacitance of the slow-start capacitor module 2, thereby lengthening the time required for the slow-start capacitor module 2 to charge to a preset voltage, thereby increasing the slow-start time of the power supply device and more effectively suppressing the inrush current. When the input current is less than a second current threshold, the processing module controls each third controllable switch Q3 in the slow-start capacitor charging module 3 to conduct, increasing the voltage divider value of the first voltage divider branch for charging the slow-start capacitor module 2, thereby accelerating the charging speed of the slow-start capacitor charging module 3 for the slow-start capacitor module 2, shortening the slow-start time of the power supply device, and thereby increasing the speed at which the power supply device supplies power to the load.
[0075] In summary, this embodiment provides a current detection module 1 that can increase the soft-start time of a power supply device when the inrush current is high, more effectively suppressing the inrush current; and shorten the soft-start time of the power supply device when the inrush current is low, thereby increasing the speed at which the power supply device can supply power to the load. Furthermore, the current detection module 1 has a simple circuit structure, making it easy to implement and maintain.
[0076] Please refer to Figure 4, which is a flow chart of an inrush current suppression circuit provided by the present application to implement inrush current suppression. In Figure 4, Y1 is the first current threshold, and Y2 is the second current threshold. Taking the structure of the inrush current suppression circuit shown in Figure 1 as an example, the first controllable switch Q1 can be selected based on the voltage and current of the load connected to the back end of the power supply device. The first resistor R1, the second resistor R2 and the first capacitor C1 are selected according to the slow start time and the input voltage of the power supply device. Specifically, the relationship between the slow start time and the input voltage of the power supply device can be expressed as: Vin(R1 / (R1+R2))(1-e -T / τ ) = Vth, τ = C1(R1 / / R2); where Vin is the input voltage of the power supply device, R1 and R2 are the resistances of the first resistor R1 and the second resistor R2, respectively, (R1 / / R2) is the resistance of the first resistor R1 and the second resistor R2 in parallel, T is the soft start time, τ is the time constant, and Vth is the turn-on threshold voltage of the first controllable switch Q1. The second capacitor C2 and the third resistor R3 are then selected based on the maximum drain-source pulse current of the first controllable switch Q1 and its SOA (Safe Operating Area) curve.
[0077] On the other hand, the first controllable switch Q1 is a first PMOS, the second controllable switch Q2 is a first NMOS, and the third controllable switch Q3 is a second NMOS;
[0078] The gate of the first PMOS serves as the control terminal of the first controllable switch Q1 , the source of the first PMOS serves as the first terminal of the first controllable switch Q1 , and the drain of the first PMOS serves as the second terminal of the first controllable switch Q1 ;
[0079] The gate of the first NMOS serves as the control terminal of the second controllable switch Q2, the source of each first NMOS is connected to each second capacitor C2 in a one-to-one correspondence, and the drain of each first NMOS is connected to the first capacitor C1;
[0080] The gate of the second NMOS serves as the control terminal of the third controllable switch Q3 , the drain of each second NMOS is connected to the first end of the first resistor R1 , and the source of each second NMOS is connected to each third resistor R3 in a one-to-one correspondence.
[0081] The processing module is specifically used to output a high level to the gate of each first NMOS and a low level to the gate of each second NMOS when the input current is greater than the first current threshold, so as to increase the total capacitance value of the slow-start capacitor module 2; when the input current is less than the second current threshold, it outputs a low level to the gate of each first NMOS and a high level to the gate of each second NMOS, so as to speed up the charging speed of the slow-start capacitor charging module 3 for the slow-start capacitor module 2.
[0082] Please refer to Figure 1, which is a first circuit diagram of an inrush current suppression circuit provided by the present application. This embodiment and Figure 1 take the first controllable switch Q1 as a first PMOS, the second controllable switch Q2 as a first NMOS, and the third controllable switch Q3 as a second NMOS as an example. In order to achieve adaptive adjustment of the slow start time of the power supply device, when the input current is greater than the first current threshold, the processing module outputs a high level to the gate of each first NMOS to control each first NMOS to be turned on; and outputs a low level to the gate of each second NMOS to control each second NMOS to be turned off. At this time, the charging speed of the slow start capacitor charging module 3 for charging the slow start capacitor remains unchanged, and the total capacitance value of the slow start capacitor module 2 increases, so that the slow start time is extended.
[0083] When the input current is less than the second current threshold, the processing module outputs a low level to the gate of each first NMOS transistor to turn off the first NMOS transistor, and outputs a high level to the gate of each second NMOS transistor to turn on the second NMOS transistor. At this point, the total capacitance of the slow-start capacitor module 2 remains unchanged, and the slow-start capacitor charging module 3 accelerates the charging speed of the slow-start capacitor module 2, thereby shortening the slow-start time.
[0084] On the other hand, the processing module is further configured to control each of the second controllable switches Q2 and each of the third controllable switches Q3 to be turned off when it is detected that the input current is between the first current threshold and the second current threshold.
[0085] In this embodiment, the processing module is further configured to control each second controllable switch Q2 and each third controllable switch Q3 to be disconnected upon detecting that the input current is between the first current threshold and the second current threshold, that is, upon determining that the inrush current is neither excessively high nor excessively low. At this point, the total capacitance of the slow-start capacitor module 2 is equal to the capacitance of the first capacitor C1, and the slow-start charging module comprises only the first resistor R1 and the second resistor R2 connected in series for voltage division. This ensures that the time it takes for the slow-start capacitor module 2 to charge to a preset voltage is between the time it takes when the inrush current is excessively high and the time it takes when the inrush current is excessively low. This effectively suppresses the inrush current while ensuring that the power supply device can supply power to the load in a timely manner.
[0086] Please refer to Figure 5, which is a second circuit diagram of an inrush current suppression circuit provided by the present application. In this embodiment, the inrush current suppression circuit is equivalent to the circuit described in Figure 5. Accordingly, when the first controllable switch Q1 is a first PMOS, the second controllable switch Q2 is a first NMOS, and the third controllable switch Q3 is a second NMOS, when the processing module detects that the input current is between the first current threshold and the second current threshold, it outputs a low level to the gate of each first NMOS and the gate of each second NMOS. At this time, the total capacitance value of the slow-start capacitor module 2 is equal to the capacitance value of the first capacitor C1, and the slow-start charging module only has the first resistor R1 and the second resistor R2 connected in series for voltage division. The voltage across the first resistor R1 is used to charge the first capacitor C1, and the time it takes for the first capacitor C1 to charge to the preset voltage is the slow-start time.
[0087] In summary, in this embodiment, when the inrush current is judged to be neither too large nor too small, the soft start time is controlled within an appropriate range to achieve stable suppression of the inrush current. It can be seen that in this application, no matter what range the inrush current falls within, targeted control of the inrush current can be achieved.
[0088] On the other hand, it also includes an energy absorption module;
[0089] A first end of the energy absorption module is disposed between the input end of the inrush current suppression circuit and the first end of the first controllable switch Q1 , and a second end of the energy absorption module is grounded.
[0090] In order to further improve the safety of the power supply device, this embodiment also provides an energy absorption module in the surge current suppression circuit. The first end of the energy absorption module is arranged between the input end of the surge current suppression circuit and the first end of the first controllable switch Q1, and the second end of the energy absorption module is grounded. Therefore, when the surge current suppression circuit is impacted by a transient high-voltage spike pulse (such as electrostatic discharge or lightning surge), it can actively absorb the impact and avoid damage to the components in the surge current suppression circuit.
[0091] The energy absorption module can specifically be a transient voltage suppressor diode D1. The anode of the transient voltage suppressor diode D1 is grounded, and the cathode of the transient voltage suppressor diode D1 is disposed between the input terminal of the inrush current suppression circuit and the first terminal of the first controllable switch Q1. When subjected to a transient high-voltage spike pulse, the transient voltage suppressor diode D1 rapidly changes from a high impedance to a low impedance, absorbing most of the energy, thereby effectively protecting the components in the inrush current suppression circuit.
[0092] On the other hand, the current detection module 1 is specifically used to collect the real-time current value of the input end of the inrush current suppression circuit within a preset time, and use the maximum real-time current value within the preset time as the input current;
[0093] The total capacitance of the slow-start capacitor module 2 is adjusted according to the magnitude of the input current, or the charging speed of the slow-start capacitor charging module 3 for charging the slow-start capacitor module 2 is adjusted to adjust the slow-start time required for the first controllable switch Q1 to change from the off state to the on state.
[0094] In this embodiment, the current detection module 1 collects the real-time current value at the input of the inrush current suppression circuit within a preset time period and uses the maximum real-time current value within the preset time period as the input current to ensure the suppression effect of the inrush current and improve the reliability of the power supply device in supplying power to the subsequent load. In addition, this application does not limit the range of the preset time period and can be adjusted according to actual application scenarios.
[0095] On the other hand, the current detection module 1 is further used to determine whether a configuration change signal is received before collecting the input current of the input end of the inrush current suppression circuit;
[0096] If not, the total capacitance value of the slow-start capacitor module 2 is adjusted to the historical total capacitance value set for the slow-start capacitor module 2 last time, and the charging speed of the slow-start capacitor charging module 3 is adjusted to the historical charging speed set for the slow-start capacitor charging module 3 last time;
[0097] If so, the input current of the input end of the surge current suppression circuit is collected, and the total capacitance value of the slow-start capacitor module 2 is adjusted according to the size of the input current, or the charging speed of the slow-start capacitor charging module 3 for charging the slow-start capacitor module 2 is adjusted to adjust the slow-start time required for the first controllable switch Q1 to change from the off state to the on state.
[0098] This application takes into account that the surge current to which the power supply device is subjected is mainly related to the load connected to the back end of the power supply device. When the configuration of the load connected to the back end of the power supply device remains unchanged, the surge current generally does not fluctuate widely. Therefore, in order to improve the speed at which the surge current suppression circuit suppresses the surge circuit and shorten the time it takes for the current detection module 1 to adjust the slow-start capacitor module 2 and the slow-start capacitor charging module 3, in this embodiment, the current detection module 1 will determine whether a configuration change signal has been received before collecting the input current.
[0099] If the current detection module 1 receives a configuration change signal, it indicates that the load connected to the back end of the power supply device has changed, so the surge current may also change. Therefore, in this case, the current detection module 1 will re-collect the input current and complete the subsequent adjustment of the total capacitance value of the slow-start capacitor module 2 according to the input current, or adjust the charging speed of the slow-start capacitor charging module 3 to charge the slow-start capacitor module 2.
[0100] If the current detection module 1 does not receive the configuration change signal, it indicates that the load connected to the rear end of the power supply device has not changed, so the inrush current will not fluctuate on a large scale. Therefore, the slow-start capacitor module 2 and the slow-start capacitor charging module 3 can still maintain the previous state. Specifically, the current detection module 1 adjusts the total capacitance value of the slow-start capacitor module 2 to the historical total capacitance value set for the slow-start capacitor module 2 last time, and adjusts the charging speed of the slow-start capacitor charging module 3 to the historical charging speed set for the slow-start capacitor charging module 3 last time.
[0101] It should also be noted that the configuration change signal can be input to the current detection module 1 by the operation and maintenance personnel after replacing the load of the power supply device. This application does not limit the generation method of the configuration change signal.
[0102] In summary, in this embodiment, the current detection module 1 determines whether the load connected to the back end of the power supply device has changed based on whether the configuration change signal is received. When the load connected to the back end of the power supply device has not changed, the time for the current detection module 1 to adjust the slow-start capacitor module 2 and the slow-start capacitor charging module 3 can be shortened, further accelerating the speed of suppressing the surge current.
[0103] The present application also provides a power supply device, comprising any of the above-mentioned inrush current suppression circuits, and further comprising a voltage conversion module connected to the inrush current suppression circuit;
[0104] The voltage conversion module is used to convert the voltage output by the inrush current suppression circuit into the voltage required by the load.
[0105] For a detailed introduction to the power supply device provided in this application, please refer to the above-mentioned embodiment of the surge current suppression circuit, which will not be described in detail in this application. For example, for a server with a 48V power supply architecture, the voltage conversion module can convert the input 48V voltage into the 5V, 3V3, and other power supplies required by the server's motherboard, central processing unit, and fan loads. This application does not specifically limit the voltage conversion module, and the specific voltage conversion module can be adjusted according to the load connected to the back end of the power supply device.
[0106] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can be referred to each other. It should also be noted that in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, article or equipment including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, article or equipment. In the absence of further restrictions, the elements defined by the sentence "comprise a..." do not exclude the presence of other identical elements in the process, article or equipment including the elements.
[0107] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A surge current suppression circuit, characterized in that: It includes a current detection module, a first controllable switch, a slow-start capacitor module and a slow-start capacitor charging module; The first end of the current detection module is arranged between the input end of the inrush current suppression circuit and the first end of the first controllable switch, the second end and the third end of the current detection module are connected to the slow-start capacitor module and the slow-start capacitor charging module respectively, and the second end of the first controllable switch serves as the output end of the inrush current suppression circuit; The slow-start capacitor charging module is used to charge the slow-start capacitor module so that the first controllable switch changes from an off state to an on state after the slow-start capacitor module is charged to a preset voltage; The current detection module is used to collect the input current of the input end of the inrush current suppression circuit, and adjust the total capacitance value of the slow-start capacitor module according to the magnitude of the input current, or adjust the charging speed of the slow-start capacitor charging module for charging the slow-start capacitor module, so as to adjust the slow-start time required for the first controllable switch to change from the off state to the on state.
2. The inrush current suppression circuit according to claim 1, wherein: The current detection module is specifically used to collect the input current; when the input current is greater than a first current threshold, the total capacitance value of the slow-start capacitor module is increased to extend the slow-start time; when the input current is less than a second current threshold, the slow-start capacitor charging module is accelerated to charge the slow-start capacitor module to shorten the slow-start time.
3. The inrush current suppression circuit according to claim 2, wherein: The slow-start capacitor module includes a first capacitor, at least one second capacitor, and a second controllable switch corresponding to each second capacitor. The control end of each second controllable switch is connected to the second end of the current detection module. The second controllable switches are connected in series with the second capacitors in a one-to-one correspondence, and the series circuit is connected in parallel with the first capacitor.
4. The inrush current suppression circuit according to claim 3, wherein: The slow-start capacitor charging module includes a first resistor, a second resistor, at least one third resistor, and a third controllable switch corresponding to each of the third resistors; The control end of each of the third controllable switches is connected to the third end of the current detection module, the third controllable switches are connected in series with the third resistors in a one-to-one correspondence, the series circuit is connected in parallel with the second resistor, the first end of the second resistor is connected to the first end of the first resistor, the second end of the second resistor is grounded, and the first resistor is connected in parallel with the first capacitor.
5. The inrush current suppression circuit according to claim 4, wherein: The current detection module includes a fourth resistor, a current sensor and a processing module; The fourth resistor is provided between the input terminal of the inrush current suppression circuit and the first terminal of the first controllable switch, the first terminal of the current sensor is connected to the fourth resistor, the second terminal of the current sensor is connected to the first terminal of the processing module, the second terminal of the processing module is connected to the control terminal of each of the second controllable switches, and the third terminal of the processing module is connected to the control terminal of each of the third controllable switches; The current sensor is used to determine the input current according to the current on the fourth resistor; The processing module is specifically configured to control each of the second controllable switches in the slow-start capacitor module to be turned on when the input current is greater than the first current threshold; and to control each of the third controllable switches in the slow-start capacitor charging module to be turned on when the input current is less than the second current threshold.
6. The inrush current suppression circuit according to claim 5, wherein: The first controllable switch is a first PMOS, the second controllable switch is a first NMOS, and the third controllable switch is a second NMOS; The gate of the first PMOS serves as the control terminal of the first controllable switch, the source of the first PMOS serves as the first terminal of the first controllable switch, and the drain of the first PMOS serves as the second terminal of the first controllable switch; The gate of the first NMOS serves as the control terminal of the second controllable switch, the source of each first NMOS is connected to each second capacitor in a one-to-one correspondence, and the drain of each first NMOS is connected to the first capacitor; The gate of the second NMOS serves as the control end of the third controllable switch, the drain of each second NMOS is connected to the first end of the first resistor, and the source of each second NMOS is connected to each third resistor in a one-to-one correspondence.
7. The inrush current suppression circuit according to claim 6, wherein: The processing module is specifically configured to output a high level to the gate of each first NMOS and a low level to the gate of each second NMOS when the input current is greater than the first current threshold, so as to increase the total capacitance value of the slow-start capacitor module; and output a low level to the gate of each first NMOS and a high level to the gate of each second NMOS when the input current is less than the second current threshold, so as to speed up the charging speed of the slow-start capacitor charging module for the slow-start capacitor module.
8. The inrush current suppression circuit according to claim 5, wherein: The processing module is further configured to control each of the second controllable switches and each of the third controllable switches to be disconnected when it is detected that the input current is between the first current threshold and the second current threshold.
9. The inrush current suppression circuit according to claim 8, wherein: The first controllable switch is a first PMOS, the second controllable switch is a first NMOS, and the third controllable switch is a second NMOS; When detecting that the input current is between the first current threshold and the second current threshold, controlling each of the second controllable switches and each of the third controllable switches to be disconnected includes: When it is detected that the input current is between the first current threshold and the second current threshold, a low level is output to the gates of the first NMOSs and the gates of the second NMOSs.
10. The inrush current suppression circuit according to claim 2, wherein: The first current threshold is the product of the maximum drain-source pulse current of the first controllable switch and a first percentage, and the second current threshold is the product of the maximum drain-source pulse current of the first controllable switch and a second percentage, and the first percentage is greater than the second percentage.
11. The inrush current suppression circuit according to claim 1, wherein: Also included is an energy absorption module; The first end of the energy absorption module is arranged between the input end of the inrush current suppression circuit and the first end of the first controllable switch, and the second end of the energy absorption module is grounded.
12. The inrush current suppression circuit according to claim 11, wherein: The energy absorption module is a transient voltage suppression diode; The anode of the transient voltage suppression diode is grounded, and the cathode of the transient voltage suppression diode is arranged between the input end of the surge current suppression circuit and the first end of the first controllable switch.
13. The inrush current suppression circuit according to claim 1, wherein: The current detection module is specifically used to collect the real-time current value of the input end of the inrush current suppression circuit within a preset time, and use the maximum real-time current value within the preset time as the input current; The total capacitance value of the slow-start capacitor module is adjusted according to the magnitude of the input current, or the charging speed of the slow-start capacitor charging module for charging the slow-start capacitor module is adjusted to adjust the slow-start time required for the first controllable switch to change from the off state to the on state.
14. The inrush current suppression circuit according to any one of claims 1 to 13, wherein: The current detection module is further configured to determine whether a configuration change signal is received before collecting the input current of the input end of the inrush current suppression circuit; In response to not receiving the configuration change signal, adjusting the total capacitance value of the slow-start capacitor module to the historical total capacitance value last set for the slow-start capacitor module, and adjusting the charging speed of the slow-start capacitor charging module to the historical charging speed last set for the slow-start capacitor charging module; In response to receiving a configuration change signal, the input current of the input end of the inrush current suppression circuit is collected and the total capacitance value of the slow-start capacitor module is adjusted according to the magnitude of the input current, or the charging speed of the slow-start capacitor charging module for charging the slow-start capacitor module is adjusted to adjust the slow-start time required for the first controllable switch to change from the off state to the on state.
15. The inrush current suppression circuit according to claim 3, wherein: The current detection module controls the second controllable switch to be disconnected, so that the total capacitance value of the slow-start capacitor module is equal to the capacitance value of the first capacitor.
16. The inrush current suppression circuit according to claim 3, wherein: The current detection module controls the second controllable switch to be turned on, so that each of the second capacitors is connected in parallel with the first capacitor.
17. The inrush current suppression circuit according to claim 10, wherein: The first percentage is set to 80%.
18. The inrush current suppression circuit according to claim 10, wherein: The second percentage is set to 20%.
19. A power supply device, characterized in that: comprising the inrush current suppression circuit according to any one of claims 1 to 18, further comprising a voltage conversion module connected to the inrush current suppression circuit; The voltage conversion module is used to convert the voltage output by the inrush current suppression circuit into a voltage required by a load.
20. The power supply device according to claim 19, wherein: The relationship between the slow start time and the input voltage of the power supply device satisfies: Vin(R1 / (R1+R2))(1-e -T / τ )=Vth,τ=C1(R1 / / R2) Wherein, Vin is the input voltage of the power supply device, R1 and R2 are the resistance values of the first resistor R1 and the second resistor R2, respectively, (R1 / / R2) is the resistance value of the first resistor and the second resistor in parallel, T is the soft start time, τ is the time constant, Vth is the turn-on threshold voltage of the first controllable switch, and C1 is the first capacitor.
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